A bidirectional active equalization circuit based on flyback topology and a battery management system

Abstract

The application discloses a bidirectional active equalization circuit based on a flyback topology and a battery management system, and relates to the technical field of battery management. The circuit comprises a multi-winding flyback transformer, a first equalization control chip, a second equalization control chip, an isolation communication unit and a current detection and isolation feedback unit. The first equalization control chip is integrated with a primary side power switch tube, and controls the bidirectional flow of energy between a direct current bus and a primary winding of the transformer; the second equalization control chip is integrated with multiple groups of gating switch tubes, and corresponds to the gating of each single battery cell and a secondary winding of the transformer, thereby realizing the bidirectional transmission of energy on the battery cell side. Signal interaction is carried out between the two chips through the isolation communication unit, and the current detection and isolation feedback unit realizes closed-loop constant current regulation of the equalization current. The application supports multiple equalization modes such as the bus to single / multiple battery cells, the battery cell to the bus, the battery cell to the battery cell and cross-module, and has the advantages of flexible control, high integration, high equalization efficiency, safety and reliability and the like.

Description

Technical Field

[0001] This invention relates to the field of battery management technology, specifically to an active balancing circuit for series battery packs, and more particularly to a bidirectional active balancing control circuit based on a flyback topology and a battery management system including this circuit. This invention can be widely applied in scenarios with stringent requirements for battery pack consistency, such as energy storage systems, electric vehicles, and uninterruptible power supplies. Background Technology

[0002] Lithium-ion batteries, due to their superior performance such as high energy density, long cycle life, and low self-discharge rate, have been widely used in electric vehicles, energy storage power stations, portable electronic devices, and many other fields. In practical applications, to meet high-voltage power supply requirements, dozens or even hundreds of individual cells are typically connected in series to form a battery pack. However, due to the discreteness of manufacturing processes, differences in operating temperature, and varying charge-discharge cycle counts, inconsistencies in parameters such as voltage, state of charge (SOC), and internal resistance inevitably occur among the individual cells in a series-connected battery pack during actual use. This inconsistency can lead to overcharging or over-discharging of some cells, not only reducing the usable capacity and lifespan of the battery pack but also potentially causing serious safety accidents. Therefore, introducing a balancing management function into the Battery Management System (BMS) to effectively balance the energy of the series-connected battery pack is a key technical means to ensure the safe operation of the battery pack and extend its lifespan.

[0003] Based on different energy dissipation methods, battery balancing technologies can be divided into two main categories: passive balancing and active balancing. Passive balancing releases excess energy from high-voltage cells as heat through energy-consuming components such as resistors. Although the circuit structure is simple and the cost is low, it has inherent drawbacks such as serious energy waste, large heat generation, and slow balancing speed. Active balancing, on the other hand, uses energy storage components such as inductors, capacitors, or transformers to transfer energy from higher-voltage cells to lower-voltage cells, achieving energy reuse. It has significant advantages such as high balancing efficiency and low heat generation. Among the various active balancing topologies, balancing schemes based on flyback converters have become a research hotspot in academia and industry due to their advantages such as electrical isolation, relatively simple structure, and ease of implementing multiple outputs.

[0004] In existing active balancing techniques based on flyback topology, the main technical approaches can be categorized as follows, depending on the differences in topology:

[0005] The first type is the single-inductor or independent flyback converter solution. This type of solution equips each cell or battery module with an independent energy storage element (inductor or flyback transformer), and achieves energy transfer by controlling the on / off state of the switching transistor. Although the control logic of this type of solution is relatively intuitive, the need to configure independent power devices and magnetic components for each cell results in a complex overall topology, a large number of components, high hardware costs, and greater difficulty in PCB layout, which is not conducive to engineering applications.

[0006] The second type is the multi-winding flyback transformer scheme. This scheme uses a single multi-winding flyback transformer. The primary winding of the transformer is connected to the entire battery pack or an external power bus, while the multiple windings on the secondary side are connected to individual battery cells. By controlling the selection of different secondary windings, energy transfer between the battery pack and individual cells can be achieved. Compared to the independent flyback scheme, the multi-winding scheme significantly reduces the number of magnetic components, simplifies the circuit structure, and lowers system costs. Currently, the multi-winding flyback transformer scheme has become one of the mainstream technologies in the field of active balancing, and related patent applications (such as CN118783597A) and academic research have explored it in depth.

[0007] The third category is chip-integrated equalization solutions. With the development of semiconductor technology, some manufacturers have begun to launch dedicated active equalization chips, integrating power switches, drive circuits, and protection functions into a single chip. For example, Analog Devices' LTC3300 series chips can achieve transformer-based bidirectional active equalization. However, existing chip-based solutions mostly use general-purpose equalization chips, whose control strategies are relatively fixed, making it difficult to flexibly configure and optimize for specific application scenarios.

[0008] Although multi-winding flyback transformer schemes have made significant progress in topology simplification, analysis reveals the following shortcomings in existing technologies:

[0009] Firstly, the control method for bidirectional balancing is simplistic and lacks flexibility. Most existing multi-winding flyback balancing schemes primarily achieve unidirectional or bidirectional energy transfer between the entire battery pack and individual cells, or between individual cells and the entire battery pack. For complex operating conditions such as direct cell-to-cell balancing (without the entire battery pack or busbar as an intermediary) and parallel balancing of multiple cells simultaneously, existing schemes have limited support capabilities. In practical applications, the voltage differences between cells within a battery pack are often dispersed and dynamically changing; a single control method cannot meet the differentiated and dynamic balancing adjustment requirements of cells under complex operating conditions.

[0010] Secondly, there is still room for improvement in the circuit integration of existing solutions. Whether it's a standalone flyback scheme or a multi-winding scheme, the selection control of the switching transistors is mostly built using discrete components. When the number of battery strings is large (such as the dozens or even hundreds of cells commonly found in energy storage systems), the required number of discrete switching transistors is enormous, increasing not only the PCB area and wiring complexity but also the system failure rate. Although some chip-based solutions exist (such as the LTC3300), these are general-purpose chips, and the dedicated control logic and integration for multi-winding flyback topologies are still insufficient.

[0011] Third, the control signal isolation scheme between the primary and secondary sides is not perfect. In multi-winding flyback equalization circuits, there is a voltage level difference between the primary side (the entire battery pack or bus side) and the secondary side (the cell side), requiring effective electrical isolation to ensure system safety. Existing solutions sometimes use optocouplers for signal transmission, but optocouplers have limitations in transmission rate and anti-interference capability; other solutions use digital isolators, but these only achieve isolation of control signals and lack a closed-loop regulation mechanism for current feedback signals.

[0012] Fourth, the closed-loop control capability of the balancing current is insufficient. In existing solutions, the magnitude of the balancing current often depends on the fixed design of transformer parameters and switching frequency, lacking real-time, dynamic closed-loop adjustment methods. This causes the balancing current to deviate from the optimal value under different operating conditions, either resulting in too slow balancing speed or excessive current that damages the cells and devices.

[0013] In summary, how to further improve the flexibility and intelligence of equalization control, increase circuit integration, and improve isolation communication and closed-loop control mechanisms while maintaining the simplicity of multi-winding flyback topologies has become a pressing technical challenge in this field. Based on the aforementioned shortcomings of existing technologies, this invention proposes an improved bidirectional active equalization control circuit and battery management system based on flyback topology. Summary of the Invention

[0014] This invention addresses the aforementioned shortcomings of existing active battery balancing technologies based on flyback topology by providing a bidirectional active balancing circuit and battery management system based on flyback topology. The invention aims to solve technical challenges in existing technologies, such as a single balancing control method, insufficient circuit integration, imperfect primary-secondary side isolation communication schemes, and lack of closed-loop regulation of the balancing current. It achieves efficient, flexible, and safe bidirectional energy balancing between any cells within the battery pack and between cells and the DC bus. Simultaneously, it simplifies the circuit topology, reduces device stress, and improves system reliability to meet the stringent requirements for battery consistency in high-end applications such as energy storage systems and electric vehicles.

[0015] To achieve the above-mentioned objectives, the technical solution adopted by the present invention is as follows:

[0016] In a first aspect, the present invention provides a bidirectional active equalization circuit based on flyback topology, including a multi-winding flyback transformer, a first equalization control chip, a second equalization control chip, an isolation communication unit, and a current detection and isolation feedback unit.

[0017] The multi-winding flyback transformer has a primary winding and multiple secondary windings corresponding to the number of individual cells in the series-connected battery pack. The primary winding is connected to an external DC bus via a first set of power switches, and each of the secondary windings is connected to an individual cell via a corresponding selection switch.

[0018] The first equalization control chip (as the primary-side equalization control chip) integrates a first set of power switches, which are connected between the DC bus and the primary winding to control the bidirectional flow of energy between the DC bus and the primary winding. The first equalization control chip has built-in PWM control logic, which drives the high-frequency switching action of the first set of power switches to realize the transmission of electrical energy from the DC bus to the primary winding, or the feedback of electrical energy from the primary winding to the DC bus.

[0019] The second equalization control chip (as a secondary-side equalization control chip) integrates multiple sets of selection switches corresponding to the plurality of secondary windings. Each set of selection switches is connected between a corresponding single cell and a corresponding secondary winding. The second equalization control chip selects the target cell by controlling the on / off state of the selection switches and controls the bidirectional flow of energy between the target cell and the corresponding secondary winding. The second equalization control chip has built-in PWM modulation logic, which can control one or more sets of selection switches to be turned on simultaneously, so as to achieve simultaneous selection and equalization of one or more cells.

[0020] The isolation communication unit is connected between the first equalization control chip and the second equalization control chip to achieve isolated transmission of their control signals. In a preferred embodiment, the isolation communication unit employs a digital isolator to achieve isolated transmission of the SCL and SDA signals for I2C communication, effectively avoiding interference between strong and weak electrical circuits.

[0021] The current detection and isolation feedback unit includes a sampling resistor disposed in the balancing circuit of each individual cell and an isolation feedback device connected between the second balancing control chip and the first balancing control chip. The second balancing control chip detects the circuit current in real time by acquiring the voltage signal on the sampling resistor, and transmits the current feedback signal to the first balancing control chip through the isolation feedback device, forming a closed-loop feedback to adjust the driving logic of the first balancing control chip and / or the second balancing control chip, thereby realizing constant current regulation of the secondary-side balancing current.

[0022] Furthermore, the bidirectional active equalization circuit is configured to selectively execute multiple equalization modes, including but not limited to:

[0023] First mode: DC bus equalization charging of a single cell. The first equalization control chip controls the first set of power switches to transfer the power from the DC bus to the primary winding, and the second equalization control chip controls a set of selector switches to conduct, outputting the power coupled to the corresponding secondary winding to the single target cell.

[0024] Second mode: DC bus equalizes charging of multiple battery cells. The first equalization control chip controls the first set of power switches to transfer the power from the DC bus to the primary winding, while the second equalization control chip simultaneously controls multiple sets of selection switches to conduct, outputting the power transferred from the primary winding to the multiple target battery cells respectively.

[0025] Third mode: Discharging one or more battery cells to the DC bus. The second equalization control chip controls one or more sets of selection switches to conduct, transferring the electrical energy of one or more source cells to the corresponding secondary winding. The first equalization control chip controls the first set of power switches to conduct, feeding the electrical energy coupled from the primary winding to the DC bus.

[0026] Fourth mode: Direct cell-to-cell balancing. The second balancing control chip controls the first set of selection switches to conduct, transferring the energy of the source cell to the corresponding first secondary winding, and controls the second set of selection switches to conduct, outputting the electrical energy coupled from the second secondary winding to the target cell, realizing direct energy transfer between cells without passing through a DC bus.

[0027] Furthermore, the bidirectional active balancing circuit can be expanded into a multi-module architecture. When a second balancing module connected to the same DC bus is included, energy can be bidirectionally transferred between the cells of the first balancing module, the cells of the second balancing module, and the DC bus, achieving cross-module balancing.

[0028] Furthermore, the first equalization control chip integrates overvoltage detection, undervoltage detection, and short-circuit detection functions for the DC bus power supply circuit, and provides short-circuit protection for the first set of power switching transistors built into it.

[0029] Furthermore, the second equalization control chip integrates overvoltage and undervoltage protection functions for each individual cell, is used to identify the direction of equalization current flow and collect current values ​​in real time, and has short-circuit protection function for all of its built-in selection switches.

[0030] Secondly, the present invention provides a battery management system, including a voltage acquisition unit, a main control unit, and a bidirectional active balancing circuit based on a flyback topology as described above. The voltage acquisition unit is used to acquire the voltage information of each individual battery cell in real time and send it to the main control unit. The main control unit determines the inconsistency of each battery cell based on the voltage information and sends an balancing start command and a target battery cell selection command to the bidirectional active balancing circuit.

[0031] Compared with the prior art, the present invention has the following beneficial effects:

[0032] 1. Flexible and adaptable equalization control methods. This invention achieves various equalization modes, such as "DC bus to single cell," "DC bus to multiple cells," "multiple cells to DC bus," "cell to cell," and "cross-module," through the coordinated control of the first equalization control chip (primary side) and the second equalization control chip (secondary side), combined with a multi-winding flyback transformer and an integrated gating switch array. The same hardware architecture can support multiple equalization strategies, flexibly selecting the optimal equalization path according to the differentiated state of each cell in the battery pack, avoiding the shortcomings of the single control method in traditional solutions, and significantly improving the system's adaptability to different operating conditions.

[0033] 2. High circuit integration and simple topology. This invention integrates all multi-channel selection switching transistors (corresponding to Q11 to Q133, etc.) into the second equalization control chip, eliminating the need for external discrete power switching devices, significantly reducing the number of components and PCB area, and lowering hardware costs and wiring complexity. Simultaneously, the transformer secondary winding corresponds one-to-one with the battery cell, and the selection control is uniformly completed by a single chip, resulting in clear control logic and strong engineering feasibility.

[0034] 3. Excellent isolated communication and closed-loop control ensure system safety and reliability. This invention employs a digital isolator to achieve isolated transmission of I2C control signals between the first and second equalization control chips. Simultaneously, an optocoupler is used as an isolation feedback device to provide closed-loop feedback of the equalization current sampling signal to the primary control chip, forming a dual isolation architecture of "control signal isolation + current feedback isolation." This ensures electrical isolation safety between strong and weak currents while achieving real-time constant current closed-loop regulation of the equalization current, avoiding the risk of equalization current runaway and improving the system's anti-interference capability and operational stability.

[0035] 4. High energy conversion efficiency, no need for secondary equalization. This invention achieves isolated energy transfer through transformer electromagnetic coupling, resulting in a direct energy path and fewer conversion stages, effectively reducing energy loss. Especially in the cell-to-cell direct equalization mode, energy does not need to pass through a DC bus, reducing the number of energy conversion stages and further improving equalization efficiency. During the equalization process, each cell is directly controlled by the precise selection and constant current regulation of the equalization chip, achieving the target state in a single equalization step, eliminating the need for secondary equalization.

[0036] 5. Low electrical stress and comprehensive protection functions. This invention employs an optimized topology and soft-switching control strategy, effectively reducing voltage spikes and current surges during the switching process, thus minimizing electrical stress and switching losses. Simultaneously, both the first and second equalization control chips integrate comprehensive fault detection and protection functions (including overvoltage, undervoltage, and short-circuit protection), ensuring the safe operation of power devices and cells at the chip level, significantly improving the reliability and lifespan of the entire equalization system.

[0037] 6. Highly scalable and adaptable to high-voltage battery platforms. This invention adopts a modular design approach, where a single balancing module can manage a string of cells (e.g., 13 strings). It can be easily expanded to multiple balancing modules via a shared DC bus, achieving cross-module energy balancing. This architecture can flexibly adapt to the needs of battery packs with different numbers of strings, and is particularly suitable for high-voltage battery platforms in energy storage systems and new energy vehicles, demonstrating significant engineering practical value. Attached Figure Description

[0038] Figure 1 This is a block diagram of the overall scheme of a bidirectional active balancing circuit based on flyback topology according to the present invention, which shows the system-level architecture of the balancing circuit of the present invention in the battery management system and its connection relationship with the battery pack and DC bus.

[0039] Figure 2 This is a block diagram of a bidirectional active equalization circuit based on flyback topology according to the present invention, showing the complete circuit architecture composed of core components such as primary-side equalization chip U1, secondary-side equalization chip U2, multi-winding flyback transformer T1, digital isolator U4 and optocoupler U3.

[0040] Figure 3 This is a schematic diagram of the circuit of the equalization circuit of the present invention in the first working mode (equalization charging of a single cell by the DC bus), taking the charging of cell B1 by the 24V DC bus as an example.

[0041] Figure 4 This is a schematic diagram of the circuit of the equalization circuit of the present invention in the second working mode (equal charging of multiple cells by the DC bus), taking the simultaneous charging of cells B1 and B13 by the 24V DC bus as an example.

[0042] Figure 5 This is a schematic diagram of the circuit of the equalization circuit of the present invention in the fourth working mode (cell-to-cell direct equalization), and the example of transferring energy from cell B13 to cell B1 is used for illustration.

[0043] Figure 6This is a schematic diagram of the circuit for balancing multiple source cells to a single target cell in the fourth working mode of the equalization circuit of the present invention. The example is that cell B13 and cell B11 simultaneously transfer energy to cell B1.

[0044] Figure 7 This is a schematic diagram of the circuit of the equalization circuit of the present invention in the cross-module equalization working mode, taking the transfer of energy from cell B26 in module 2 to cell B1 in module 1 as an example for illustration.

[0045] Figure 8 This is an internal functional block diagram of the first equalization control chip (i.e., primary-side equalization chip U1) of the present invention.

[0046] Figure 9 This is an internal functional block diagram of the second equalization control chip (i.e., the secondary equalization chip U2) of the present invention.

[0047] Figure 10 This is a schematic diagram of the circuit of the equalization circuit of the present invention in the third working mode (single or multiple cells discharging to the DC bus), taking the simultaneous discharge of cells B1 and B13 to the 24V DC bus as an example. Detailed Implementation

[0048] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of the present invention, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of the present invention without creative effort are within the scope of protection of the present invention.

[0049] In the description of this invention, the terms "first," "second," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. The term "connection" should be interpreted broadly; for example, it can refer to a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium. Those skilled in the art can understand the specific meaning of the above terms in this invention according to the specific circumstances.

[0050] like Figure 1As shown, the present invention provides a bidirectional active balancing circuit based on a flyback topology, which generally includes a series battery pack (B1~Bn), a multi-winding flyback transformer T1, a first balancing control chip U1, a second balancing control chip U2, a digital isolator U4, an optocoupler U3, and balancing current sampling resistors R1~Rn. This balancing circuit is connected between an external DC bus (e.g., a 24V DC bus) and the series battery pack. The DC bus can be a 24V power supply bus provided by an onboard low-voltage power supply, or it can be a common DC bus in the energy storage system.

[0051] Figure 2 A more detailed block diagram of the equalization circuit of the present invention is shown. For example... Figure 2 As shown, the multi-winding flyback transformer T1 has a primary winding L0 and multiple secondary windings L1 to L13. The primary winding L0 is connected to the 24V DC bus through the first set of power switches Q01 and Q02 integrated inside the first equalization control chip U1. The multiple secondary windings L1 to L13 are respectively connected to each individual battery cell B1 to B13 through multiple sets of selection switches Q11 to Q133 integrated inside the second equalization control chip U2. Each set of selection switches includes three switches; for example, the set of selection switches corresponding to battery cell B1 consists of Q11, Q12, and Q13, and the set of selection switches corresponding to battery cell B13 consists of Q131, Q132, and Q133. Through the combined control of the three switches, a controllable bidirectional conduction circuit can be formed between the corresponding individual battery cell and the corresponding secondary winding, realizing bidirectional energy flow.

[0052] A communication link is established between the first equalization control chip U1 and the second equalization control chip U2 through a digital isolator U4 to achieve isolated transmission of the SCL and SDA signals of I2C communication. The digital isolator U4 can be a Nanochip NSI8200-DSWR type digital isolator, which has high isolation voltage and high-speed signal transmission capability, and can effectively isolate the electrical connection between the primary side (DC bus side) and the secondary side (cell side), avoid interference between strong and weak currents, and improve the anti-interference capability and electrical safety of the system.

[0053] The detection and closed-loop control of the equalization current are achieved through sampling resistors R1-R13 and optocoupler U3. Sampling resistors R1-R13 are installed in the equalization circuit of each individual cell. The second equalization control chip U2 collects the voltage signals across each sampling resistor to detect the magnitude and direction of the current in each equalization circuit in real time. The second equalization control chip U2 feeds back the detected current signal to the first equalization control chip U1 through the optocoupler U3, which can be an Everlight EL1019(TA)-VG type optocoupler with an isolation voltage of 5000Vrms and a current transfer ratio (CTR) of 200%–400%. The first equalization control chip U1 adjusts the duty cycle of its internal PWM drive based on the feedback signal, thereby achieving constant current closed-loop regulation of the transformer secondary equalization current and ensuring stable and controllable equalization current.

[0054] Figure 8 The internal functional block diagram of the first equalization control chip U1 is shown. The first equalization control chip U1 is a primary-side equalization control chip specifically designed for the equalization topology of this invention. It integrates a first set of power switches Q01 and Q02, a PWM control logic module, an overvoltage detection module, an undervoltage detection module, a short-circuit detection module, and a communication interface module. The power switches Q01 and Q02 are N-type power MOSFETs, featuring low on-resistance and fast switching characteristics, used to achieve high-frequency switching control between the 24V DC bus power supply circuit and the primary winding L0 of transformer T1.

[0055] The first equalization control chip U1 integrates overvoltage and undervoltage detection modules to monitor the voltage status of the 24V DC bus power supply circuit in real time. When the bus voltage exceeds the preset normal operating range, the chip automatically triggers a protection mechanism to stop the PWM drive output, preventing damage to the devices due to abnormal power supply. The short-circuit detection module provides dedicated short-circuit protection for the internally integrated power switches Q01 and Q02. When the on-state current of the power switches exceeds a preset threshold, the chip immediately shuts off the drive signal, effectively protecting the power switches from short-circuit current surges.

[0056] The chip's built-in PWM control logic module generates a high-frequency PWM drive signal to control the on / off state of power switches Q01 and Q02, enabling the transfer of electrical energy from the DC bus to the primary winding of the transformer, or the feedback of electrical energy from the primary winding of the transformer to the DC bus. The communication interface module communicates with the second equalization control chip U2 via I2C through the digital isolator U4, receiving equalization commands and operating status information from the second equalization control chip U2, and simultaneously sending the operating status of the primary side to the second equalization control chip U2.

[0057] Figure 9The internal functional block diagram of the second equalization control chip U2 is shown. The second equalization control chip U2 is a secondary equalization control chip specifically designed for the equalization topology of this invention. It integrates multiple sets of selection switches Q11 to Q133 (13 sets in total, 3 in each set, totaling 39), a PWM modulation logic module, a cell voltage monitoring module, a current detection module, an overvoltage protection module, an undervoltage protection module, a short circuit protection module, and a communication interface module.

[0058] Multiple sets of selector switches Q11 to Q133 are all N-type power MOSFETs, integrated within the second equalization control chip U2. Each set of three switches works in coordination to control the conduction and cutoff of the circuit between the corresponding individual battery cell and the corresponding secondary coil. Taking the selector switch group Q11, Q12, and Q13 corresponding to battery cell B1 as an example, the three switches are turned on and off in an orderly manner under the internal PWM modulation logic control of the second equalization control chip U2, realizing a bidirectional energy path between battery cell B1 and secondary coil L1. The second equalization control chip U2 can control the conduction of a single set of selector switches (selecting a single battery cell) or simultaneously control the conduction of multiple sets of selector switches (selecting multiple battery cells simultaneously) through its internal PWM modulation logic, achieving flexible parallel equalization control.

[0059] The cell voltage monitoring module monitors the voltage status of each individual cell (B1-B13) in real time. When the voltage of a cell exceeds the preset normal operating range, it triggers overvoltage or undervoltage protection and actively reports the abnormal status to the main control unit. The current detection module acquires the voltage signals across external sampling resistors R1-R13, identifies the current flow direction (charging or discharging) of each equalization circuit in real time, and accurately acquires the current value, providing a data basis for constant current closed-loop control. The short-circuit protection module sets short-circuit protection for all internally integrated selector switches (Q11-Q133). When the conduction current of any selector switch exceeds a preset threshold, the chip immediately shuts off the drive signal of the corresponding switch, comprehensively avoiding the risk of device damage.

[0060] The first equalization control chip U1 and the second equalization control chip U2 communicate via an I2C communication link established through a digital isolator U4 for status synchronization and control command exchange. In actual operation, U1 sends its primary-side operating status (including bus voltage status, PWM drive status, fault status, etc.) to U2 through the isolated communication link; U2 sends its secondary-side operating status (including cell voltage status, circuit equalization current, selection status, fault status, etc.) to U1 through the isolated communication link. Both chips collaboratively adjust their respective control strategies based on the exchanged information to achieve efficient and reliable operation of the entire equalization system.

[0061] like Figure 3As shown, taking the equalization charging of cell B1 by a 24V DC bus as an example, the working process of the equalization circuit of the present invention in the first working mode is described in detail.

[0062] When the main control unit of the battery management system detects through the voltage acquisition unit that the voltage of a single cell B1 in the series battery pack deviates from the normal range (for example, the voltage of B1 is lower than the average voltage of other cells and reaches a preset threshold), and determines that B1 needs to be balanced and charged, the main control unit sends a balancing start command and a target cell selection command (selecting cell B1) to the balancing circuit.

[0063] After receiving the equalization start command, the first equalization control chip U1 starts working on its internal PWM control logic, generating a high-frequency PWM drive signal to drive the internally integrated power switches Q01 and Q02 to perform high-frequency switching operations according to the preset switching frequency and duty cycle. During the conduction period of power switches Q01 and Q02, the electrical energy of the 24V DC bus flows into the primary coil L0 of transformer T1, where the primary coil L0 stores magnetic energy. During the turn-off period of power switches Q01 and Q02, the magnetic energy stored in the primary coil L0 is transferred to the secondary coils L1 to L13 of transformer T1 through electromagnetic induction coupling.

[0064] Meanwhile, the second equalization control chip U2, based on the target cell selection command (selecting cell B1) issued by the main control unit, uses internal PWM modulation logic to control the orderly conduction and cutoff of a set of selection switches Q11, Q12, and Q13 corresponding to cell B1, precisely selecting the power supply branch of cell B1. Within the time window during which the secondary coil L1 couples out electrical energy, the selection switches Q11, Q12, and Q13 conduct, smoothly delivering the electrical energy coupled from the secondary coil L1 to cell B1, completing the equalization and replenishment of the single cell B1.

[0065] Throughout the equalization process, the first equalization control chip U1 and the second equalization control chip U2 establish an isolated communication link through a digital isolator U4, enabling reliable interaction between operating status and control signals. The second equalization control chip U2 collects the current signal of the equalization circuit of cell B1 in real time through a sampling resistor R1. This current signal is used internally by U2 to determine whether the current equalization current is within a preset safe range, and is also fed back to the first equalization control chip U1 through an optocoupler U3. Based on the current signal fed back from the optocoupler U3, the first equalization control chip U1 dynamically adjusts the duty cycle of its internal PWM drive, forming a closed-loop feedback regulation to optimize the output current in real time, ensuring the equalization current remains stable at the preset target value and guaranteeing a safe and controllable equalization process.

[0066] like Figure 4 As shown, taking the simultaneous equalization charging of battery cells B1 and B13 by a 24V DC bus as an example, the working process of the equalization circuit of the present invention in the second working mode is explained in detail.

[0067] When the main control unit of the battery management system detects that the voltages of individual cells B1 and B13 are both deviating from the normal range (for example, the voltages of B1 and B13 are both lower than the average voltage of other cells reaching a preset threshold), and determines that B1 and B13 need to be balanced and charged at the same time, the main control unit sends a balancing start command and a target cell selection command to the balancing circuit (selecting cells B1 and B13 at the same time).

[0068] The working process of the first equalization control chip U1 is the same as that of the first working mode. Its internal PWM control logic drives the power switching transistors Q01 and Q02 to switch at high frequency, and the power of the 24V DC bus is coupled and transmitted through the primary coil L0 of the transformer T1. The power is then transmitted to each secondary coil of the transformer T1 through electromagnetic induction.

[0069] Unlike the first operating mode, after receiving the instruction to simultaneously select cells B1 and B13, the second equalization control chip U2 uses its internal PWM modulation logic to simultaneously control the operation of two sets of selection switches: on the one hand, it controls the orderly conduction and cutoff of the set of selection switches Q11, Q12, and Q13 corresponding to cell B1, accurately selecting the power supply branch of cell B1 and delivering the electrical energy coupled from the secondary coil L1 to cell B1; on the other hand, it simultaneously controls the orderly conduction and cutoff of the set of selection switches Q131, Q132, and Q133 corresponding to cell B13, accurately selecting the power supply branch of cell B13 and delivering the electrical energy coupled from the secondary coil L13 to cell B13.

[0070] Thus, the equalization circuit of this invention can simultaneously provide equalization power to multiple battery cells within the same time period, significantly improving equalization efficiency. The second equalization control chip U2 collects the current signals of the equalization circuits of battery cells B1 and B13 in real time through sampling resistors R1 and R13, and transmits the current feedback signals to the first equalization control chip U1 through optocoupler U3, thereby realizing independent closed-loop adjustment of each equalization current and ensuring that each equalization current is stable at the preset target value.

[0071] Those skilled in the art will understand that the above description using two battery cells (B1 and B13) as an example does not constitute a limitation of the present invention. In practical applications, the second equalization control chip U2 can simultaneously select any number of target battery cells (not exceeding the total number of secondary coils) according to the instructions of the main control unit, so as to realize the parallel equalization charging of multiple battery cells by the DC bus.

[0072] like Figure 10 As shown, taking the discharge of cell B13 to the 24V DC bus (i.e., cell B13 feeding back excess energy to the DC bus) as an example, the working process of the equalization circuit of the present invention in the third working mode is explained in detail.

[0073] When the main control unit of the battery management system detects that the voltage of the single cell B13 is higher than the average voltage of other cells and reaches a preset threshold, and determines that the excess energy of B13 needs to be released, the main control unit sends an equalization start command, a source cell selection command (selecting source cell B13), and an energy direction command (cell discharging to the bus) to the equalization circuit.

[0074] The second equalization control chip U2, according to the instructions of the main control unit, first controls the high-frequency switching of a set of selection switches Q131, Q132, and Q133 corresponding to the battery cell B13 through internal PWM modulation logic. This allows the electrical energy of the battery cell B13 to be coupled and transferred through the secondary coil L13 of the transformer T1. When the selection switches Q131, Q132, and Q133 are on, the electrical energy of the battery cell B13 flows into the secondary coil L13, where it stores magnetic energy. When the selection switches are off, the magnetic energy stored in the secondary coil L13 is transferred to the primary coil L0 of the transformer T1 through electromagnetic induction coupling.

[0075] At the same time, according to the energy direction command (the cell discharges to the bus) from the main control unit, the first equalization control chip U1 drives the power switching transistors Q01 and Q02 to conduct in the corresponding timing sequence, and feeds the rectified electrical energy coupled from the primary coil L0 to the 24V DC bus, thus completing the energy feedback from cell B13 to the DC bus.

[0076] Throughout the discharge equalization process, the second equalization control chip U2 collects the current signal of the discharge circuit of cell B13 in real time through the sampling resistor R13, and feeds it back to the first equalization control chip U1 through the optocoupler U3. The first equalization control chip U1 adjusts the PWM drive duty cycle according to the feedback signal to realize constant current closed-loop control of the discharge current, ensuring that the discharge process is safe and controllable.

[0077] Those skilled in the art will understand that the above description, which takes the discharge of a single cell (B13) to the DC bus as an example, does not constitute a limitation of the present invention. In practical applications, the second equalization control chip U2 can simultaneously select multiple source cells according to the instructions of the main control unit, so as to realize the parallel equalization of the discharge of multiple cells to the DC bus at the same time.

[0078] like Figure 5 As shown, taking the transfer of energy from cell B13 to cell B1 as an example, the working process of the equalization circuit of the present invention in the fourth working mode (cell-to-cell direct equalization) is explained in detail.

[0079] When the main control unit of the battery management system detects that the voltage of cell B13 is higher than the normal range (requiring discharge) while the voltage of cell B1 is lower than the normal range (requiring charging), and the voltage difference between the two reaches a preset threshold, it determines that direct cell-to-cell equalization is required. The main control unit sends an equalization start command to the equalization circuit, specifying the source cell (B13) and the target cell (B1) respectively.

[0080] The second equalization control chip U2 first controls the high-frequency switching of a set of selection switches Q131, Q132, and Q133 corresponding to the source cell B13, transferring the electrical energy of cell B13 through electromagnetic coupling via the secondary coil L13 of transformer T1. When the selection switches Q131, Q132, and Q133 are on, the electrical energy of cell B13 flows into the secondary coil L13, where it stores magnetic energy. When the selection switches are off, the magnetic energy stored in the secondary coil L13 is transferred to the other secondary coils of transformer T1, including the secondary coil L1, through electromagnetic induction coupling.

[0081] At the same time, the second equalization control chip U2 synchronously controls a set of selection switches Q11, Q12, and Q13 corresponding to the target cell B1 to conduct according to the corresponding timing sequence, so as to smoothly deliver the electrical energy coupled from the secondary coil L1 to the cell B1, thus completing the equalization and replenishment of the cell B1.

[0082] In the aforementioned direct cell-to-cell balancing process, energy is transferred only on the secondary side of transformer T1, without passing through the primary coil L0 and the DC bus. This reduces intermediate energy conversion steps and improves energy transfer efficiency. Simultaneously, because the energy does not pass through the DC bus, it also reduces the current surge to the DC bus.

[0083] Throughout the equalization process, the second equalization control chip U2 collects the current signals of the discharge circuit of the source cell B13 and the charging circuit of the target cell B1 in real time through sampling resistors R13 and R1, respectively. It dynamically adjusts the driving timing and duty cycle of each selected switch through internal PWM modulation logic to ensure that the energy transfer process is stable and controllable.

[0084] like Figure 6As shown, the equalization circuit of this invention also supports parallel equalization of multiple source cells to a single target cell. Taking the simultaneous energy transfer from cell B13 and cell B11 to cell B1 as an example: the second equalization control chip U2 simultaneously controls the high-frequency switching of a set of selection switches Q131, Q132, and Q133 corresponding to source cell B13 and a set of selection switches Q111, Q112, and Q113 corresponding to source cell B11, so that the electrical energy of cells B13 and B11 is electromagnetically coupled and transmitted through secondary coils L13 and L11 respectively; at the same time, it controls the conduction of a set of selection switches Q11, Q12, and Q13 corresponding to target cell B1, so that the electrical energy coupled from secondary coil L1 is delivered to cell B1. In this way, multiple source cells can simultaneously replenish energy to a single target cell, further improving the equalization speed.

[0085] Those skilled in the art will understand that the above description, which uses single-source cell to single-target cell and dual-source cell to single-target cell as examples, does not constitute a limitation of the present invention. In practical applications, the second equalization control chip U2 can realize flexible parallel equalization of any number of source cells to any number of target cells according to the instructions of the main control unit.

[0086] like Figure 7 As shown, taking the transfer of energy from cell B26 in module 2 to cell B1 in module 1 as an example, the working process of the equalization circuit of the present invention in the cross-module equalization working mode is explained in detail.

[0087] In practical large-scale battery systems, battery packs are often divided into multiple modules, each containing several series-connected cells (e.g., 13 cells per module). Each module is equipped with a set of equalization circuits as described in this invention, and all modules share a common DC bus (e.g., a 24V common power bus). The equalization circuit of module 1 includes a primary-side equalization chip U1, a secondary-side equalization chip U2, a transformer T1, and related peripheral devices; the equalization circuit of module 2 includes a primary-side equalization chip U1', a secondary-side equalization chip U6, a transformer T2, and related peripheral devices.

[0088] When the main control unit of the battery management system detects that the voltage of cell B26 in module 2 is higher than the normal range (requiring discharge) while the voltage of cell B1 in module 1 is lower than the normal range (requiring charging), it determines that cross-module energy balancing is required. The cross-module balancing process is divided into two stages: the energy release stage on the module 2 side and the energy absorption stage on the module 1 side.

[0089] During the energy release phase on module 2, the secondary-side equalization chip U6 of module 2, according to the instructions of the main control unit, first drives a set of selection switches Q261, Q262, and Q263 corresponding to cell B26 to operate at high frequency through internal PWM control logic. This allows the electrical energy from cell B26 to be electromagnetically coupled to the primary-side coil L02 of transformer T2 via the secondary-side coil L26. Subsequently, the primary-side equalization chip U1' of module 2, relying on its internal PWM logic, drives the built-in power switches Q03 and Q04 to operate at high frequency, feeding the electrical energy coupled from the primary-side coil L02 of transformer T2 back to the 24V common power bus. Thus, the excess energy of cell B26 is released to the common DC bus.

[0090] During the energy absorption phase on the module 1 side, the primary-side equalization chip U1 of module 1 drives the built-in power switches Q01 and Q02 to switch frequently via internal PWM control logic. This allows the excess energy from module 2 on the 24V common power bus to be coupled into the primary coil L0 of transformer T1 in module 1. The electrical energy is then transferred to the secondary coil L1 of transformer T1 via electromagnetic induction. Subsequently, the secondary-side equalization chip U2 of module 1 controls the high-frequency switching of a set of selection switches Q11, Q12, and Q13 corresponding to cell B1 via internal PWM logic, smoothly supplying the electrical energy coupled from the secondary coil L1 of transformer T1 to cell B1.

[0091] Through the coordinated operation of the two stages described above, bidirectional energy balancing across modules was ultimately achieved, enabling cell B26 in module 2 to discharge and cell B1 in module 1 to charge. Throughout the cross-module balancing process, the primary and secondary balancing chips of each module establish isolated communication links through their respective digital isolators, enabling synchronized and coordinated control of their operating states. The balancing current of each module is adjusted through its respective sampling resistor and optocoupler to achieve closed-loop constant current regulation, ensuring the safety and stability of the cross-module energy transfer process.

[0092] Those skilled in the art will understand that the above description, which takes the transfer of energy from a single cell in module 2 to a single cell in module 1 as an example, does not constitute a limitation of the present invention. In practical applications, cross-module parallel balancing can be achieved by transferring any number of cells from any module to any number of cells in other modules according to the instructions of the main control unit.

[0093] In a specific embodiment of the present invention, the selection and key parameters of each core component are as follows:

[0094] The first equalization control chip U1 is a primary-side control chip dedicated to active equalization of flyback topologies. It integrates a pair of power MOSFETs (corresponding to Q01 and Q02), supports bus voltage input of 9 to 36V, has a PWM switching frequency range of 100kHz to 600kHz, and has built-in multiple protection functions such as overvoltage, undervoltage, and short circuit.

[0095] The second equalization control chip, U2, is a dedicated secondary-side control chip for active equalization of flyback topologies. It integrates 39 power MOSFETs (corresponding to Q11 to Q133, a total of 39), arranged in groups of three, for a total of 13 groups, each corresponding to the selection control of 13 battery cells. The chip supports equalization currents from 0.5 to 3A and includes comprehensive functions such as cell voltage monitoring, equalization current detection, overvoltage and undervoltage protection, and short-circuit protection.

[0096] The multi-winding flyback transformers T1 / T2 can adopt a 10-layer FR-4 PCB embedded transformer design with a single board size of 30mm×30mm×3mm. The turns ratio between the primary coil L0 and the secondary coils L1 to L13 is 4:1. The inductance of each coil is 40uH±10% (L0) and 2.5uH±10% (L1 to L13), respectively, with leakage inductance <0.1uH.

[0097] The digital isolators U4 / U8 can use the Naxin Micro NSI8200-DSWR type digital isolator, which supports isolated transmission of I2C communication signals, with an isolation voltage of 5000Vrms and a maximum signal transmission rate of 2Mbps.

[0098] Optocouplers U3 / U7 can use Everlight EL1019(TA)-VG type optocouplers, which are packaged in 4-Pin-SO6L, with a collector-emitter voltage VCEO of 80V, a reverse voltage VR of 6V, an operating temperature range of -55℃ to 110℃, a forward current If of 60mA, an isolation voltage of 5000Vrms, and a current transfer ratio CTR of 200% to 400%.

[0099] The sampling resistors R1 to R13 can be high-precision alloy resistors with low temperature coefficient, a resistance of 10mΩ, an accuracy of ±1%, and a temperature coefficient of ±50ppm / ℃.

[0100] The primary side MOSFETs Q01 and Q02 have a withstand voltage of 80V, an on-resistance of less than 20mΩ, and a drive voltage of 12V. The secondary side MOSFETs Q11 to Q133 have a withstand voltage of 20V and an on-resistance of less than 20mΩ.

[0101] To verify the technical effects of this invention, the applicant conducted the following comparative tests:

[0102] (I) Comparison of Circuit Integration

[0103] This invention integrates all 39 MOSFETs (multi-channel selection switching transistors) into the second equalization control chip U2. Compared with the traditional solution that uses discrete components, the PCB area is reduced by about 20% and the number of components is reduced by about 30, which significantly reduces hardware costs and wiring complexity.

[0104] (II) Comparison of Equalization Accuracy

[0105] Under constant current closed-loop control, the deviation between the actual balanced current and the target current of the equalization circuit of this invention is controlled within ±5%, while the current deviation of the traditional open-loop control scheme is ±10%. The current control accuracy of this invention is significantly better than that of the traditional scheme.

[0106] The above embodiments use 13 series-connected battery cells (B1~B13) as an example to illustrate the present invention in detail. However, those skilled in the art should understand that the equalization circuit of the present invention can be flexibly extended to any number of series-connected battery cells. When the number of battery cells n changes, only the number of secondary windings of the multi-winding flyback transformer (from 13 to n) and the number of selection switch groups integrated inside the second equalization control chip U2 (from 13 to n) need to be adjusted accordingly to achieve adaptive modifications to the present invention. These modifications do not depart from the protection scope of the present invention.

[0107] The above embodiments use a 24V DC bus as an example to illustrate the present invention. However, those skilled in the art should understand that the equalization circuit of the present invention can be adapted to DC buses of different voltage levels (e.g., 12V, 24V, 48V, etc.). Only the transformer turns ratio and the withstand voltage level of the first equalization control chip U1 need to be adjusted accordingly. These modifications do not depart from the protection scope of the present invention.

[0108] The above embodiments are illustrated using lithium iron phosphate batteries as an example. However, those skilled in the art should understand that the equalization circuit of the present invention is also applicable to other types of rechargeable batteries such as ternary lithium batteries and lithium titanate batteries, and these applications do not depart from the protection scope of the present invention.

[0109] The above embodiments illustrate the management of 13 battery cells by a single balancing module. However, those skilled in the art should understand that in practical applications, multiple balancing modules can be flexibly configured according to the total number of battery cells in the battery pack. Each module shares a DC bus, and flexible balancing across the entire battery pack is achieved through unified scheduling by the main control unit. These extended applications do not depart from the protection scope of this invention.

[0110] The above description is merely a preferred embodiment of the present invention and is not intended to limit the invention. Various modifications and variations can be made to the present invention by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the scope of protection of the present invention.

Claims

1. A bidirectional active equalization circuit based on flyback topology, characterized in that, include: A multi-winding flyback transformer has one primary winding and multiple secondary windings corresponding to the number of individual cells in a series-connected battery pack. The first equalization control chip integrates a first set of power switching transistors, which are connected between the external DC bus and the primary winding. The first equalization control chip is used to control the bidirectional flow of energy between the DC bus and the primary winding. The second equalization control chip integrates multiple sets of selection switches corresponding to the multiple secondary windings. Each set of selection switches is connected between a corresponding single cell and a corresponding secondary winding. Each set of selection switches includes multiple switches. The multiple switches in each set cooperate to form a controllable bidirectional conduction circuit between the corresponding single cell and the corresponding secondary winding. The second equalization control chip selects the target cell by controlling the on and off of the selection switches and controls the bidirectional flow of energy between the target cell and the corresponding secondary winding. An isolation communication unit is connected between the first equalization control chip and the second equalization control chip to achieve isolated transmission of control signals between the two. The current detection and isolation feedback unit includes a sampling resistor disposed in the equalization circuit of each of the individual cells and an isolation feedback device connected between the second equalization control chip and the first equalization control chip, for collecting equalization current and forming closed-loop feedback to adjust the driving logic of the first equalization control chip and / or the second equalization control chip.

2. The bidirectional active equalization circuit based on flyback topology according to claim 1, characterized in that, The second equalization control chip is configured to, in response to an equalization command, simultaneously control at least two sets of the selected switching transistors to be turned on, so as to simultaneously select at least two target cells to participate in equalization.

3. The bidirectional active equalization circuit based on flyback topology according to claim 1, characterized in that, The isolation communication unit is a digital isolator, used to achieve isolated transmission of I2C communication signals between the first equalization control chip and the second equalization control chip.

4. The bidirectional active equalization circuit based on flyback topology according to claim 1, characterized in that, The isolation feedback device is an optocoupler; the second equalization control chip collects the equalization current signal through the sampling resistor and feeds it back to the first equalization control chip through the optocoupler isolation. The first equalization control chip adjusts the drive duty cycle of the first group of power switches according to the feedback signal to achieve constant current closed-loop regulation of the secondary equalization current.

5. The bidirectional active equalization circuit based on flyback topology according to claim 1, characterized in that, The bidirectional active equalization circuit is configured to selectively perform at least one of the following equalization modes: In the first operating mode, the first equalization control chip controls the first group of power switching transistors to transfer the electrical energy of the DC bus to the primary winding, and the second equalization control chip controls a group of the selection switching transistors to turn on, so as to output the electrical energy coupled to the corresponding secondary winding to the single target cell. In the second operating mode, the first equalization control chip controls the first group of power switching transistors to transfer the electrical energy of the DC bus to the primary winding, and the second equalization control chip simultaneously controls multiple groups of the selection switching transistors to conduct, so as to output the electrical energy transferred by the primary winding to multiple target cells respectively. In the third operating mode, the second equalization control chip controls one or more groups of the selected switching transistors to conduct, transferring the electrical energy of one or more source cells to the corresponding secondary winding, and the first equalization control chip controls the first group of power switching transistors to conduct, feeding the electrical energy coupled to the primary winding to the DC bus. In the fourth operating mode, the second equalization control chip controls the first set of selection switches to turn on, transferring the energy of the source cell to the corresponding first secondary winding, and controls the second set of selection switches to turn on, outputting the electrical energy coupled from the second secondary winding to the target cell.

6. The bidirectional active equalization circuit based on flyback topology according to claim 1, characterized in that, It also includes a second equalization module connected to the DC bus, the second equalization module having the same structure as the equalization circuit described in claim 1; energy can be bidirectionally transferred between the cells of the equalization circuit, the cells of the second equalization module, and the DC bus.

7. The bidirectional active equalization circuit based on flyback topology according to claim 1, characterized in that, The first equalization control chip integrates overvoltage detection, undervoltage detection and short circuit detection functions for the DC bus power supply circuit, and has a short circuit protection function for the first group of power switching transistors built into it.

8. The bidirectional active equalization circuit based on flyback topology according to claim 1, characterized in that, The second equalization control chip integrates overvoltage and undervoltage protection functions for each individual cell, is used to identify the direction of equalization current flow and collect current values ​​in real time, and has short-circuit protection function for all of its built-in selection switches.

9. The bidirectional active equalization circuit based on flyback topology according to claim 1, characterized in that, Each group of selector switches includes a first switch, a second switch, and a third switch, which work together to form a controllable bidirectional conduction circuit between the corresponding individual cell and the corresponding secondary winding.

10. A battery management system, characterized in that, It includes a voltage acquisition unit, a main control unit, and a bidirectional active balancing circuit based on flyback topology as described in any one of claims 1 to 9; the voltage acquisition unit is used to acquire the voltage information of each individual cell in real time and send it to the main control unit, the main control unit is an MCU or DSP, the main control unit determines the inconsistency of each cell according to the voltage information, and sends an balancing start command and a target cell selection command to the bidirectional active balancing circuit.

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