A four-pipe buck / boost small power ZVS loss reduction control method

Abstract

The application discloses a four-tube buck / boost small-power ZVS loss-reducing control method, and belongs to the technical field of power electronics. In view of the problem that the existing control strategy can only realize single-tube zero-voltage switching (ZVS) in a small-current continuous conduction mode, and another switching tube is in a hard switching state, leading to large loss, the application dynamically adjusts a switching frequency by detecting an inductor current zero-crossing signal: when no zero-crossing is detected, the frequency is gradually reduced to increase an inductor current ripple, until the inductor current is reversed and reaches a critical ZVS current value. The method enables the upper and lower bridge arm switching tubes to be current-continued through anti-parallel diodes in a dead time in each switching cycle, and realizes double-tube ZVS. The application can significantly reduce switching loss, improve converter efficiency and improve device thermal performance, and is simple to control, easy to realize in a digital manner, and suitable for wide-voltage conversion scenes such as battery management, USB PD fast charging, photovoltaic energy storage and the like.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, and in particular to a control method for reducing losses in a four-tube buck / boost low-power ZVS. Background Technology

[0002] Four-transistor buck / boost converters are widely used in applications requiring wide voltage range conversion, such as battery management systems, USB Power Delivery (PD) fast charging, and photovoltaic energy storage, because they can achieve buck-boost functionality and have the same input and output voltage polarity. A typical topology includes four switching transistors (usually MOSFETs). By controlling the on / off state of different transistors, the circuit can operate in Buck mode, Boost mode, or Buck-Boost mode.

[0003] In traditional four-transistor buck / boost control schemes, when the converter operates in a single mode (e.g., Buck mode), one of the main switch and synchronous rectifier transistors is always in a hard-switching state across the entire load range. Taking Buck mode as an example, when the input current is large and the inductor current is in continuous conduction mode (CCM) and remains positive, the anti-parallel diode of the main switch is not conducting before it turns on, and its voltage is not zero. Therefore, the main switch is in a hard-switching state. As the bus voltage (input voltage) increases, the switching losses caused by this hard switching increase significantly, leading to a decrease in the converter's output efficiency. It also exacerbates the heating problem of power devices (especially MOSFETs), posing challenges to thermal design and system reliability.

[0004] Existing improvement schemes typically only enable one of the switching transistors (such as the synchronous rectifier) ​​to achieve zero-voltage turn-on (ZVS), while the other switching transistor (the main switch) still cannot achieve ZVS across the entire load range. The loss problem has not been fundamentally solved. As the bus voltage (input voltage) increases, the switching losses caused by hard switching will increase significantly, leading to a decrease in the converter's output efficiency and exacerbating the heat generation problem of power devices.

[0005] Therefore, a new control strategy is urgently needed to enable the upper and lower bridge arm switches of a four-transistor buck / boost converter to achieve zero-voltage switching (ZVS) under different load conditions, especially under low-current conditions, thereby significantly reducing losses and improving efficiency. Summary of the Invention

[0006] Purpose of the invention: The purpose of this invention is to provide a control method for reducing losses in a four-transistor buck / boost low-power ZVS. The core of this method is to adjust the inductor current ripple by actively controlling the switching frequency, so that the inductor current reverses under light load or low current conditions, thereby achieving zero-voltage turn-on of all switching transistors.

[0007] Technical Solution: A control method for reducing losses in a four-transistor buck / boost low-power ZVS converter, applied to a four-transistor buck / boost converter, the converter including a first switch (Q1), a second switch (Q2), a third switch (Q3), and a fourth switch (Q4), and an inductor (L); the method includes the following steps:

[0008] Step 1: Determine the converter's operating mode (Buck mode, Boost mode) and load conditions. When the inductor current is detected to enter continuous conduction mode (CCM) and the current value is less than the preset threshold, proceed to Step 2.

[0009] Step 2: Obtain the inductor current zero-crossing detection signal;

[0010] Utilizing the characteristic that inductor current ripple is inversely proportional to switching frequency ( ). For inductor current ripple, The voltage across the inductor is the input voltage. Output When the duty cycle D and inductance L are fixed, reduce the switching frequency. It can effectively increase the inductor current ripple. This causes the inductor current to reverse in continuous conduction mode;

[0011] Step 3: Based on the zero-crossing detection signal, dynamically adjust the switching frequency of the switching transistor, specifically as follows:

[0012] If no zero-crossing signal of inductor current is detected, the switching frequency is gradually reduced by a preset step size.

[0013] When the inductor current zero-crossing signal is first detected, the current switching frequency is recorded. Based on this frequency, and according to the circuit parameters and the characteristics of the switching transistor, the switching frequency is further reduced to the final operating frequency. This is to ensure that the inductor current can be reliably reversed and reach the critical negative current value required for the main switch to achieve ZVS;

[0014] Step 4: At the final operating frequency By controlling the switching transistors to turn on and off, the inductor current can be reversed in each switching cycle. During the dead time from the turn-off of the upper bridge arm switch to the turn-on of the lower bridge arm switch, the lower bridge arm switch achieves ZVS through the freewheeling current of the anti-parallel diode. Similarly, during the dead time from the turn-off of the lower bridge arm switch to the turn-on of the upper bridge arm switch, the upper bridge arm switch achieves ZVS through the freewheeling current of the anti-parallel diode.

[0015] Furthermore, in step three, the final operating frequency f1 is calculated and determined based on the current operating mode of the converter using the following formula:

[0016] 1. When the converter operates in Buck mode and is referenced to the input side, the final switching frequency is... The following derivation is obtained:

[0017] Dead time is set as The delay turn-off time of transistor Q3 is The critical ZVS current is Based on the circuit's operating waveform (e.g.) Figure 2 As shown), during the delay turn-off phase of transistor Q3. Inside, the inductor current satisfies:

[0018]

[0019] Therefore, the critical current is:

[0020]

[0021] Meanwhile, in order to achieve ZVS for transistor Q1, the charge stored in its equivalent capacitance C1 must be completely released within the dead time, that is:

[0022]

[0023] Lianlide:

[0024]

[0025] For the Buck pattern, there are Substituting the values, we obtain the final switching frequency:

[0026]

[0027] in, The duty cycle is given by C1, which is the equivalent capacitance across the first switching transistor (Q1). Where L is the input voltage and L is the inductance. Dead time, For output voltage, and For time node parameters.

[0028] 2. When the converter operates in Boost mode and is referenced to the input side, the final switching frequency is... for:

[0029]

[0030] C4 is the equivalent capacitance across the fourth switching transistor (Q4).

[0031] 3. When the converter operates in Buck mode and is referenced to the output side, the final switching frequency is... for:

[0032]

[0033] C2 is the equivalent capacitance across the second switching transistor (Q2).

[0034] 4. When the converter operates in Boost mode and is referenced to the output side, the final switching frequency is... for:

[0035]

[0036] C3 is the equivalent capacitance across the third switching transistor (Q3).

[0037] Furthermore, the equivalent capacitances (C1, C2, C3, C4) include the parasitic capacitance of the switching transistor itself and the absorption capacitance artificially connected in parallel across the switching transistor to assist ZVS.

[0038] Furthermore, the switching transistor in the method is a metal-oxide-semiconductor field-effect transistor (MOSFET) or an insulated-gate bipolar transistor (IGBT); when using an IGBT, its freewheeling process is achieved through its anti-parallel diode.

[0039] Furthermore, the inductor current zero-crossing detection signal is implemented through the current sampling and comparison function of a hardware comparator or a digital controller.

[0040] Beneficial effects:

[0041] Achieving full-range ZVS and significantly reducing switching losses: This invention breaks through the limitations of traditional control strategies by actively reducing the switching frequency under low current or light load conditions, increasing the inductor current ripple, and forcing the inductor current to reverse during the switching cycle. This reverse current provides a freewheeling path for the anti-parallel diodes of the upper and lower bridge arm switches, thereby enabling both switches to turn on under zero voltage conditions (ZVS) and completely eliminating hard switching states.

[0042] Improved converter efficiency: Due to the significant reduction in switching losses, especially in applications with high input or high output voltages, the overall efficiency of the converter is significantly improved. At the same time, in the low-current continuous conduction mode, by actively reducing the frequency to increase ripple, the additional losses on inductors and other components are negligible, and the overall efficiency gains far outweigh the slight increase in core losses caused by the frequency reduction.

[0043] Improved thermal performance: Reduced losses directly reduce the heat generated by power devices (MOSFET / IGBT), lower the requirements for the heat dissipation system, and improve the system's reliability and power density.

[0044] The control strategy is simple and effective: This invention only requires adding an inductor current zero-crossing detection signal and using this signal to perform closed-loop regulation of the switching frequency. No additional hardware circuits or complex algorithms are required, making it easy to implement in digital power controllers at a low cost. Attached Figure Description

[0045] Figure 1 A schematic diagram of a four-transistor buck / boost converter topology provided in an embodiment of the present invention;

[0046] Figure 2 The waveform diagram of key nodes for implementing dual-tube ZVS in Buck mode is provided for embodiments of the present invention. Detailed Implementation

[0047] To make the technical solution of the present invention clearer, the present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0048] This embodiment provides a control method for a four-transistor buck / boost converter, which aims to achieve zero-voltage turn-on (ZVS) of all switching transistors through frequency regulation under low current and light load conditions.

[0049] Converter topology

[0050] like Figure 1 As shown, the converter includes a first switch Q1, a second switch Q2, a third switch Q3, a fourth switch Q4, and an inductor L. Q1 and Q2 form the upper bridge arm, and Q3 and Q4 form the lower bridge arm. When the converter operates in Buck mode, Q1 acts as the main switch, Q3 acts as the synchronous rectifier, Q2 remains normally open (conducting), and Q4 remains normally closed (off). When the converter operates in Boost mode, Q4 acts as the main switch, Q2 acts as the synchronous rectifier, Q1 remains normally closed, and Q3 remains normally open. The following explanation uses Buck mode as an example to illustrate its working principle.

[0051] Control Principles

[0052] Under low current input conditions, the converter operates as follows to achieve ZVS for Q1 and Q3.

[0053] Step 1: Initial State and Judgment

[0054] The system detects the input current (i.e., the average value of the inductor current). When it is determined that the inductor current is in continuous conduction mode (CCM) and the value is small, the ZVS control strategy described in this invention is triggered.

[0055] Step 2: Switching frequency adjustment

[0056] The core of this invention lies in utilizing the characteristic that the inductor current ripple is inversely proportional to the switching frequency. ). For inductor current ripple, The voltage across the inductor is the input voltage. Output When the duty cycle D and inductance L are fixed, reduce the switching frequency. It can effectively increase the inductor current ripple. The controller has a built-in inductor current zero-crossing detection module. The control process is as follows:

[0057] The controller starts operating at an initial high frequency.

[0058] If no zero-crossing signal of the inductor current is detected (i.e., the inductor current is always positive), the controller gradually reduces the switching frequency in small steps (e.g., 1kHz to 5kHz, the specific step size is determined by the resolution of the digital controller and the circuit response speed).

[0059] When the inductor current first crosses zero, it indicates that the inductor current has begun to reverse. At this time, the controller records the current frequency and then slightly reduces the frequency (the reduction is determined by the circuit parameters and the characteristics of the switching transistor, typically 5% to 10% of the current frequency) to ensure that the negative value of the inductor current is large enough to meet the critical current required for ZVS and to prevent the anti-parallel diode of the upper bridge arm switching transistor from failing to reliably turn on due to an insufficiently small negative current value.

[0060] Step 3: Implement dual-tube ZVS

[0061] Please see Figure 2 The waveform diagram shown illustrates the specific working process as follows:

[0062] Period: Q1 is on, inductor current... Linear increase.

[0063] Time period (dead zone time): Q1 is turned off at time 1. Due to the inductor current... While still positive at time t1, this current draws charge from output capacitor C1 of Q1 and charges output capacitor C3 of Q3. Simultaneously, current freewheels through the anti-parallel diode of Q3. At this point, the drain-source voltage of Q3 is clamped to near zero, creating conditions for Q3 to achieve ZVS conduction.

[0064] Period: Q3 is on, operating in synchronous rectification mode, inductor current... Linear decrease.

[0065] Time period (delayed shutdown period): At a certain moment, the controller sends a Q3 turn-off signal, but Q3 will turn off after a brief delay. Only then was it actually shut down (i.e.) This design aims to reduce the inductor current to a controllable negative value (i.e., reverse current) before Q3 turns off. The magnitude of this reverse current must satisfy the critical ZVS current. (in for Dead time).

[0066] Time period: At this moment, Q3 is actually turned off. At this time, the reverse current (negative current) on the inductor will draw the charge from the output capacitor C3 of Q3 and charge the output capacitor C1 of Q1. The current will freewheel through the anti-parallel diode of Q1, clamping the drain-source voltage of Q1 to near zero.

[0067] Dead time: During the freewheeling period of the anti-parallel diode of Q1, the controller gives a drive signal to Q1, thereby realizing zero-voltage turn-on of Q1.

[0068] Critical current and frequency calculation

[0069] To achieve ZVS in Q1, it is necessary to ensure that the dead time is within the specified range. Inside, the charge on output capacitor C1 of Q1 is completely released. Based on the circuit principle, the critical negative current value required to achieve ZVS can be derived. :

[0070]

[0071] Simultaneously, this critical current is also related to the decrease in inductor current during the Q3 delay turn-off period. By solving these simultaneous equations, the final switching frequency can be obtained. The expression:

[0072]

[0073] In practical engineering applications, the controller can perform feedforward calculations based on this formula and fine-tune it using zero-crossing detection signals to quickly and accurately determine the optimal operating frequency. The calculation methods for Boost mode and other ports are similar; simply substitute the corresponding voltage, capacitance, and duty cycle parameters into the appropriate formula.

[0074] Step 4: Stable operation

[0075] The controller uses the calculated final switching frequency Stable operation and continuous monitoring of the inductor current zero-crossing signal ensure that Q1 and Q3 can reliably operate in ZVS state during each switching cycle, thereby minimizing switching losses.

[0076] Other mode extensions

[0077] Similarly, when the converter operates in Boost mode, a similar frequency adjustment mechanism can be used to control switches Q4 and Q2 to achieve dual-transistor ZVS. When it is necessary to achieve ZVS for all four transistors, the corresponding control formula can be applied when switching between different operating modes.

[0078] The control method described in this invention is also applicable to converters using insulated-gate bipolar transistors (IGBTs) as switching transistors. When using an IGBT, its freewheeling process is achieved through an anti-parallel diode integrated inside the IGBT. During the synchronous rectification stage, the corresponding IGBT is switched on to allow the anti-parallel diode to conduct the freewheeling. The remaining operating processes (dead-time control, frequency adjustment, zero-crossing detection) are exactly the same as those of a MOSFET. Therefore, the scope of protection of this invention covers four-transistor buck / boost topologies using MOSFETs or IGBTs as switching transistors.

[0079] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the present invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of this patent should be determined by the appended claims.

Claims

1. A control method for reducing losses in a four-transistor buck / boost low-power ZVS converter, applied to a four-transistor buck / boost converter, the converter comprising a first switch (Q1), a second switch (Q2), a third switch (Q3), a fourth switch (Q4), and an inductor (L), characterized in that, Includes the following steps: Step S1: Determine the converter's operating mode and load conditions. When the inductor current is in continuous conduction mode and the current value is less than the preset threshold, proceed to step S2. Step S2: Acquire the inductor current zero-crossing detection signal; Step S3: Dynamically adjust the switching frequency of the switching transistor based on the zero-crossing detection signal. If no zero-crossing signal of inductor current is detected, the switching frequency is gradually reduced by a preset step size; When the inductor current zero-crossing signal is first detected, the current switching frequency is recorded, and the switching frequency is further reduced from this frequency to the final operating frequency. This causes the inductor current to reverse and reach the critical zero voltage turn-on current value; Step S4: At the final operating frequency Controlling the switching transistor to turn it on and off ensures that within each switching cycle: During the dead time from the turn-off of the upper bridge arm switch to the turn-on of the lower bridge arm switch, the inductor current freewheels through the anti-parallel diode of the lower bridge arm switch, thereby achieving zero-voltage turn-on of the lower bridge arm switch. During the dead time between the lower bridge arm switch being turned off and the upper bridge arm switch being turned on, the reverse inductor current freewheels through the anti-parallel diode of the upper bridge arm switch, achieving zero-voltage turn-on of the upper bridge arm switch.

2. The control method according to claim 1, characterized in that, When the converter operates in Buck mode and is referenced to the input side, the final operating frequency Calculated using the following formula: in, The duty cycle is given by C1, which is the equivalent capacitance across the first switching transistor (Q1). Where L is the input voltage and L is the inductance. Dead time, For output voltage, and For time node parameters.

3. The control method according to claim 1, characterized in that, When the converter operates in Boost mode and is referenced to the input side, the final operating frequency Calculated using the following formula: C4 is the equivalent capacitance across the fourth switching transistor (Q4).

4. The control method according to claim 1, characterized in that, When the converter operates in Buck mode and is referenced to the output side, the final operating frequency Calculated using the following formula: C2 is the equivalent capacitance across the second switching transistor (Q2).

5. The control method according to claim 1, characterized in that, When the converter operates in Boost mode and is referenced to the output side, the final operating frequency Calculated using the following formula: C3 is the equivalent capacitance across the third switching transistor (Q3).

6. The control method according to any one of claims 1 to 5, characterized in that, The equivalent capacitance includes the parasitic capacitance of the switching transistor itself and the absorption capacitance artificially connected in parallel across the switching transistor to assist zero-voltage turn-on.

7. The control method according to claim 1, characterized in that, The switching transistor is a metal-oxide-semiconductor field-effect transistor or an insulated-gate bipolar transistor. When the switching transistor is an insulated-gate bipolar transistor, the synchronous rectification stage is switched to the freewheeling of the corresponding transistor in anti-parallel diode. The freewheeling during the dead time and the ZVS implementation process are the same as those of the metal-oxide-semiconductor field-effect transistor.

8. The control method according to claim 1, characterized in that, The inductor current zero-crossing detection signal is obtained through the current sampling and comparison function of a hardware comparator or a digital controller.

9. The control method according to claim 1, characterized in that, When the converter operates in Buck mode, the second switch (Q2) remains normally open and the fourth switch (Q4) remains normally closed; when the converter operates in Boost mode, the first switch (Q1) remains normally closed and the third switch (Q3) remains normally open.

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