High power density multi-channel direct current power supply synchronous control method and system

Abstract

The application provides a high-power-density multi-channel direct-current power supply synchronous control method and system, which acquires output currents, working temperatures of multiple working channels and bus ripple voltages of power input buses in real time, dynamically compensates current loop control gains according to the output currents of the working channels, corrects control phases of the working channels in combination with the bus ripple voltages, uniformly performs heat conduction decoupling calculation on the working temperatures of all the working channels to obtain real junction temperatures of power switch tubes in the working channels, adjusts target current weights of the working channels according to the real junction temperatures, finally generates pulse width modulation control signals corresponding to the working channels, realizes synchronous and coordinated control of output ripple and spatial heat distribution of the working channels, improves heat dissipation uniformity of the high-power-density direct-current power supply, and improves operation stability, reliability and service life of power devices of the whole machine.

Description

Technical Field

[0001] This application relates to the field of power supply equipment technology, and in particular to a method and system for synchronous control of a high power density multi-channel DC power supply. Background Technology

[0002] As communication power supplies, server power supplies, new energy equipment, and industrial automation equipment develop towards higher power and higher integration, multi-channel DC power supplies are gradually becoming an important component of high-power power supply systems. By having multiple power conversion units share the load, not only can the system output capacity be improved, but modular design can also be achieved, enhancing system scalability and maintenance convenience.

[0003] However, in high-power-density applications, the operating channels of DC power supplies are typically concentrated in a limited space. During operation, not only is there electrical coupling between the input and output sides, but significant heat transfer also occurs between adjacent power devices. When the operating state of one operating channel changes, the resulting electrical disturbances and heat dissipation can easily affect the operating state of other operating channels, creating a mutually influential coupling relationship between them.

[0004] Most current multi-channel DC power supplies still employ independent control for each working channel, with each channel operating according to a fixed control strategy, lacking unified coordination of the overall operating status of each channel. When the system load changes or operates under full load for extended periods, inconsistencies in the output capabilities of each working channel, increased output ripple, and localized heat accumulation can easily occur. This not only reduces the output stability of the power supply system but also forces some power devices to operate at high temperatures for extended periods, accelerating device aging, reducing device lifespan, and affecting the overall reliability of the system. Summary of the Invention

[0005] This application provides a high power density multi-channel DC power supply synchronous control method and system to solve the problems of poor output stability, poor operational reliability and short device lifespan in existing DC power supply control methods.

[0006] In a first aspect, embodiments of this application provide a high-power-density multi-channel DC power supply synchronous control method, comprising: The operating parameters of multiple working channels in the DC power supply are collected in real time. The operating parameters include the output current and operating temperature of each working channel, as well as the bus ripple voltage of the power input bus. Based on the output current of each working channel, the current loop control gain of the corresponding working channel is compensated to obtain the corrected target current loop control gain. The initial reference phase of each working channel is corrected based on the bus ripple voltage to obtain the target control phase that is different for each working channel. A unified thermal conduction decoupling calculation is performed on the operating temperature of all working channels to eliminate heat penetration between working channels, obtain the true junction temperature of the power switching transistors in each working channel, and adjust the target current weight of each working channel according to the true junction temperature. Based on the target current loop control gain, target control phase, and target current weight, pulse width modulation control signals are generated for each working channel. The power switching transistors in each working channel are driven by the corresponding pulse width modulation control signal to synchronously coordinate and control the output ripple and spatial heat distribution of each working channel in the DC power supply.

[0007] In one embodiment, pulse width modulation control signals for each working channel are generated based on the target current loop control gain, target control phase, and target current weight, including: When the output current of any working channel changes abruptly, the voltage fluctuation prediction value is calculated based on the output current change rate of the working channel with the change and the bus ripple voltage, and the voltage fluctuation prediction value is converted into the duty cycle compensation amount of other working channels that have not experienced current changes. Based on the target current loop control gain, target control phase, target current weight, and duty cycle compensation of each working channel, a pulse width modulation control signal for the corresponding working channel is generated.

[0008] In one embodiment, a pulse width modulation control signal for the corresponding working channel is generated based on the target current loop control gain, target control phase, target current weight, and duty cycle compensation for each working channel, including: Based on the target current weight of each working channel and the total system demand current, the given reference value of the current closed-loop control loop corresponding to each working channel is determined, and the difference between the given reference value and the output current is used as the current error of the corresponding working channel. Using the target current loop control gain as the adjustment coefficient, the proportional-integral operation is performed on the current error of the corresponding working channel to obtain the basic duty cycle control quantity of each working channel, and then added to the corresponding duty cycle compensation quantity to obtain the target duty cycle of each working channel. The interleaved timing sequence of the triangular carriers of each working channel is reconstructed on the time axis according to the target control phase, and the target duty cycle is used to perform an intersection comparison with the reconstructed triangular carriers to generate the pulse width modulation control signal for each working channel.

[0009] In one embodiment, the current loop control gain of the corresponding working channel is compensated based on the output current of each working channel to obtain the corrected target current loop control gain, including: Obtain the current loop control gain of each working channel in the DC power supply; Based on the output current of each working channel, calculate the actual inductance value of the inductor in the corresponding working channel under the current bias. Based on the actual inductance value and the preset nominal inductance value, determine the inductance compensation coefficient for the corresponding working channel; Based on the inductance compensation coefficient, the current loop control gain of the corresponding working channel is compensated to obtain the target current loop control gain of each working channel.

[0010] In one embodiment, the actual inductance value of the inductor element in the corresponding working channel under the current current bias is calculated based on the output current of each working channel, including: Based on the output current of the working channel and the nominal inductance value of the inductor in the working channel, the DC bias magnetic field strength of the magnetic core inside the inductor is calculated. The relative permeability decay coefficient of the inductor core under the current current bias is calculated by nonlinear magnetic saturation analysis of the DC bias magnetic field strength. Based on the relative permeability decay coefficient and the preset temperature compensation coefficient, a nonlinear drop factor is calculated to characterize the overall inductance shrinkage of the inductor element. Multiply the nominal inductance value by the corresponding nonlinear drop factor to obtain the actual inductance value of the inductor element in each working channel under the current current bias.

[0011] In one embodiment, the initial reference phase of each working channel is corrected based on the bus ripple voltage to obtain target control phases that are different for each working channel, including: The basic staggered phase shift angle between two adjacent working channels is calculated based on the total number of working channels, and an initial reference phase that is uniformly staggered on the time axis is assigned to each working channel based on the basic staggered phase shift angle. The initial phase reference of each working channel is adaptively corrected based on the bus ripple voltage to obtain a different target control phase for each working channel.

[0012] In one embodiment, the initial phase reference of each working channel is adaptively corrected based on the bus ripple voltage to obtain a target control phase that is different for each working channel, including: Separate the second and fourth harmonics caused by the high-frequency switching overlap of multiple operating channels from the bus ripple voltage; With minimizing the total energy of the second and fourth harmonics as the optimization objective, the phase shift compensation angle of each working channel is iteratively solved. The initial reference phase of each working channel is added to the corresponding phase shift compensation angle to obtain the target control phase of each working channel.

[0013] In one embodiment, a unified heat conduction decoupling calculation is performed on the operating temperature of all operating channels to eliminate heat penetration between operating channels, thereby obtaining the true junction temperature of the power switching transistors in each operating channel, including: Arrange the working temperatures of each working channel in order of channel index value to construct a temperature vector matrix; Obtain the pre-constructed channel thermal impedance matrix, which is used to characterize the spatial heat penetration ratio between each working channel under a specific physical spatial layout due to thermal radiation and thermal conduction. Matrix operations are performed on the inverse matrix of the channel thermal impedance matrix and the temperature vector matrix to eliminate cross heat penetration between adjacent channels, and the core heating temperature of the power switch in each working channel is obtained. Based on the temperature change rate and time delay constant of each working channel, as well as the inherent thermal resistance and thermal capacity parameters of the power switching transistor in each working channel, the temperature difference compensation from the heating core of the power switching transistor to the outer surface of the casing is calculated, and the dynamic temperature difference compensation of each working channel is obtained. The true junction temperature of the power switching transistor in each working channel is obtained by adding the core temperature of the heat-generating transistor in each working channel to the corresponding dynamic temperature difference compensation.

[0014] In one embodiment, adjusting the target current weight of each operating channel based on the actual junction temperature includes: The lifetime score of each working channel is calculated based on the temperature margin between the actual junction temperature and the preset safe limit junction temperature, as well as the rate of change of the actual junction temperature over time. Based on the lifetime score, the target current weights of each working channel are redistributed.

[0015] In one embodiment, the lifetime score of each working channel is calculated based on the temperature margin between the actual junction temperature and the preset safe junction temperature, and the rate of change of the actual junction temperature over time, including: Based on the actual junction temperature of the power switching transistors in each working channel, the instantaneous thermal stress degradation coefficient caused by the steady-state high temperature of the heat-generating core is calculated. The difference between the actual junction temperature and the corresponding operating temperature is used as the internal and external dynamic temperature difference of the power switch in the corresponding operating channel. Based on the rate of change of the internal and external dynamic temperature difference and the corresponding working temperature, the instantaneous heat index value of the corresponding working channel is calculated. The instantaneous heat index value is used to characterize the thermal transient impact energy of the thermal shear stress between the internal wafer and the outer shell of the power switch tube. The instantaneous thermal index values ​​of each working channel are integrated over time to obtain the cumulative thermal fatigue damage value of each working channel. The instantaneous thermal stress degradation coefficient and the cumulative thermal fatigue damage value are weighted and summed, and the weighted sum is normalized to obtain the life score of each working channel.

[0016] Secondly, embodiments of this application provide a high power density multi-channel DC power supply synchronous control system, including a high power density multi-channel DC power supply and a control device, the control device including: The acquisition module is used to acquire the operating parameters of multiple working channels in the DC power supply in real time. The operating parameters include the output current and operating temperature of each working channel, as well as the bus ripple voltage of the power input bus. The compensation module is used to compensate the current loop control gain of the corresponding working channel according to the output current of each working channel, so as to obtain the corrected target current loop control gain. The correction module is used to correct the initial reference phase of each working channel based on the bus ripple voltage, so as to obtain a different target control phase for each working channel. The calculation module is used to perform a unified heat conduction decoupling calculation on the operating temperature of all working channels to eliminate heat penetration between working channels, obtain the true junction temperature of the power switching transistors in each working channel, and adjust the target current weight of each working channel according to the true junction temperature. The generation module is used to generate pulse width modulation control signals for each working channel based on the target current loop control gain, target control phase, and target current weight. The control module is used to drive the power switching transistors in each working channel using the corresponding pulse width modulation control signal, so as to synchronously coordinate and control the output ripple and spatial heat distribution of each working channel in the DC power supply.

[0017] Thirdly, embodiments of this application provide an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the above-described method.

[0018] Fourthly, embodiments of this application provide a readable storage medium storing a computer program that, when executed by a processor, implements the above-described method.

[0019] Fifthly, embodiments of this application provide a computer program product, which includes a computer program that, when executed by a processor, causes a device to implement the above-described method.

[0020] In one scheme provided by the aforementioned high power density multi-channel DC power supply synchronous control method and system, the output current, operating temperature, and bus ripple voltage of multiple working channels are acquired in real time. The current loop control gain is dynamically compensated based on the output current of each working channel, and the control phase of each working channel is corrected in conjunction with the bus ripple voltage. Then, a unified thermal conduction decoupling calculation is performed on the operating temperature of all working channels to obtain the true junction temperature of the power switching transistors in each working channel. The target current weight of each working channel is adjusted based on the true junction temperature, and finally, a pulse width modulation control signal corresponding to each working channel is generated. This achieves synchronous and coordinated control of the output ripple and spatial heat distribution of each working channel, thereby effectively reducing the output ripple during the operation of the multi-channel DC power supply, reducing local heat accumulation caused by thermal coupling between working channels, improving the load balancing capability and output consistency of each working channel, improving the heat dissipation uniformity of the high power density DC power supply, and ultimately enhancing the overall operational stability, reliability, and lifespan of the power devices. Attached Figure Description

[0021] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments of this application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] Figure 1 This is a schematic diagram of a high power density multi-channel DC power supply synchronous control system according to an embodiment of this application; Figure 2 This is a flowchart illustrating a high power density multi-channel DC power supply synchronous control method in one embodiment of this application; Figure 3 yes Figure 2 A schematic diagram of the implementation process of step S30; Figure 4 yes Figure 2 A schematic diagram of the implementation process of step S40; Figure 5 yes Figure 2 A schematic diagram of the implementation process of step S60; Figure 6 yes Figure 1 A schematic diagram of the structure of the central control device; Figure 7 This is a schematic diagram of the structure of an electronic device according to an embodiment of this application. Detailed Implementation

[0023] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0024] It should be understood that, when used in this specification and the appended claims, the term "comprising" indicates the presence of a described feature, integral, step, operation, element, and / or component, but does not exclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or collections thereof. It should also be understood that, as used in this specification and the appended claims, the term "and / or" refers to any combination of one or more of the associated listed items and all possible combinations, and includes such combinations.

[0025] Furthermore, in the description of this application and the appended claims, the terms "first," "second," "third," etc., are used only to distinguish descriptions and should not be construed as indicating or implying relative importance.

[0026] References to "one embodiment" or "some embodiments" as described in this specification mean that one or more embodiments of this application include a specific feature, structure, or characteristic described in connection with that embodiment. Therefore, the phrases "in one embodiment," "in some embodiments," "in other embodiments," "in still other embodiments," etc., appearing in different parts of this specification do not necessarily refer to the same embodiment, but rather mean "one or more, but not all, embodiments," unless otherwise specifically emphasized. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless otherwise specifically emphasized.

[0027] To illustrate the technical solution of this application, specific embodiments are described below.

[0028] The high power density multi-channel DC power supply synchronization control method provided in this application embodiment can be applied to, for example... Figure 1 The high power density multi-channel DC power supply synchronous control system (hereinafter referred to as the system) shown includes a high power density multi-channel DC power supply and a control device, wherein the DC power supply communicates with the control device through cables.

[0029] In this context, power density refers to the power output per unit volume or weight of the power supply; multiple operating channels refer to a power system containing multiple independent output or input control loops, each of which can independently adjust voltage and current without interference. In this embodiment, the high power density multi-operating-channel DC power supply refers to a high-performance, technically challenging power supply architecture. It typically requires integrating multiple independent output loops into a highly compact and small volume, such as multi-port gallium nitride (GaN) portable fast chargers, drone smart charging boxes, and vehicle chargers. The control device can be a microcontroller.

[0030] During the operation of a high-power-density multi-channel DC power supply, the control device collects operating parameters such as output current, operating temperature, and bus ripple voltage of multiple working channels (i.e., channels in operation) in real time through various sensors. Based on the output current of each working channel, the control device compensates for the current loop control gain of that channel to obtain a corrected target current loop control gain. Simultaneously, it corrects the initial reference phase of each working channel based on the bus ripple voltage to obtain distinct target control phases for each channel. Furthermore, it performs unified thermal conduction decoupling calculations on the operating temperatures of all working channels to eliminate spatial heat penetration between channels, obtaining the true junction temperature of the power switches in each channel. Based on this true junction temperature, the target current weight of each working channel is adjusted. Then, based on the target current loop control gain, target control phase, and target current weight, a pulse width modulation (PWM) control signal is generated for each working channel. Finally, the corresponding PWM control signal is used to drive the power switches in each working channel to synchronously and coordinately control the output ripple and spatial heat distribution of each working channel in the DC power supply.

[0031] In this embodiment, real-time acquisition of operating parameters such as output current, operating temperature, and bus ripple voltage of multiple working channels can comprehensively reflect the real-time operating status of each working channel and the overall operating status of the power supply, providing an accurate data foundation for subsequent coordinated control of each working channel and improving the real-time performance and accuracy of control decisions. The current loop control gain is dynamically corrected based on the actual output current of each working channel, enabling each working channel to adjust its control response speed and control precision according to its own load status, improving the consistency of current regulation of each working channel, reducing current distribution deviation between multiple channels, and improving load balancing capability.

[0032] By dynamically adjusting the control phase of each working channel based on the bus ripple voltage, a reasonable phase relationship is maintained between the working channels. This helps reduce the current ripple and bus ripple generated by the superposition of working channels, thereby improving the output stability and electromagnetic compatibility of the DC power supply. By eliminating measurement interference caused by heat transfer between adjacent working channels through unified heat conduction decoupling calculation, the accuracy and reliability of power switch junction temperature estimation are improved. Furthermore, by adjusting the current carrying ratio of each working channel based on the actual junction temperature, the heat load can be reasonably distributed among multiple working channels, avoiding long-term high-temperature operation of local devices and improving the overall thermal balance performance of the system.

[0033] Finally, a pulse width modulation (PWM) control signal is generated by integrating the target current loop control gain, target control phase, and target current weight. This achieves unified coordination of current control, phase control, and thermal management strategies, improving the consistency and synergy of control strategies for each working channel, and enabling simultaneous optimization of output performance and thermal management performance. The generated PWM control signal is used to drive the power switches of each working channel, achieving synchronous and coordinated control of output ripple and spatial heat distribution across multiple working channels. This effectively reduces output ripple, alleviates local heat accumulation, and improves the operational stability, reliability, and lifespan of high-power-density DC power supplies and power devices.

[0034] In one embodiment, such as Figure 2 As shown, a high power density multi-channel DC power supply synchronous control method is provided, which is applied to... Figure 1 Taking the control device in the middle as an example, the following steps are included: S10: Real-time acquisition of operating parameters of multiple working channels in the DC power supply. Operating parameters include the output current and operating temperature of each working channel, as well as the bus ripple voltage of the power input bus.

[0035] The control device synchronously collects instantaneous operating data for each working channel using sensors deployed on each channel, according to a preset sampling period (e.g., once every 10 microseconds). Specifically, the output current is collected by current sensors connected in series at the output terminals of each working channel; the operating temperature is collected by temperature sensors mounted on the surface of the power switching transistor housing; and the bus ripple voltage is collected by a voltage detection circuit connected to the power input bus. The control device stores the collected data in an internal buffer for subsequent steps.

[0036] In this context, a working channel refers to a power circuit unit in the system capable of independently performing DC-DC power conversion. Each channel includes components such as power switches, inductors, and output capacitors. Operating parameters refer to the set of data describing the current electrical and thermal state of each working channel. Bus ripple voltage refers to the high-frequency voltage fluctuation component on the power input bus caused by switching operations.

[0037] S20: Based on the output current of each working channel, compensate the current loop control gain of the corresponding working channel to obtain the corrected target current loop control gain.

[0038] The control device reads the real-time output current value of each working channel from the buffer, uses the current value to calculate the degree of inductance attenuation caused by the magnetic saturation effect of the inductor, and then obtains a compensation coefficient to compensate for the attenuation. The coefficient is then multiplied by the original current loop control gain to obtain the corrected target current loop control gain.

[0039] Among them, the current loop control gain refers to the proportional amplification factor between the current error signal and the duty cycle adjustment in the current closed-loop control circuit, which determines the response speed and control accuracy of the current loop.

[0040] For example, a current-compensation coefficient lookup table can be pre-stored in the control device. This table, obtained through experimental calibration, records the compensation coefficient values ​​corresponding to different output current values. The control device directly looks up the corresponding compensation coefficient from the table based on the currently acquired output current value, and then multiplies it by the original current loop control gain. This method is simple to implement, requires little computation, and is suitable for cost-sensitive embedded control systems with limited computing power.

[0041] S30: Correct the initial reference phase of each working channel based on the bus ripple voltage to obtain a target control phase that is different for each working channel.

[0042] The control device first counts the number of currently operating channels and calculates a basic staggered phase, assigning each channel an initial reference phase that is uniformly staggered along the time axis. Then, the control device performs harmonic analysis on the bus ripple voltage signal, extracting specific harmonic components generated by the superposition of high-frequency switching operations across multiple channels. With the goal of suppressing these harmonics, iteratively calculates the additional fine-tuning angle required for each channel. Finally, the initial reference phase and the fine-tuning angle are superimposed to obtain a target control phase that is different for each channel.

[0043] The initial reference phase refers to the basic phase angle evenly distributed based on the total number of channels, used to ensure that the working channels are basically uniformly staggered on the time axis. The target control phase refers to the control phase angle actually used by each working channel after correction.

[0044] S40: Perform a unified thermal conduction decoupling calculation on the operating temperature of all working channels to eliminate heat penetration between working channels, obtain the true junction temperature of the power switching transistors in each working channel, and adjust the target current weight of each working channel according to the true junction temperature.

[0045] The control unit combines the operating temperature data of all operating channels into a temperature vector and inputs it into a pre-calibrated thermal conduction decoupling model. This model uses matrix inverse operations to eliminate the thermal conduction coupling effects caused by the compact space between operating channels, and reversely calculates the true junction temperature of the power switches in each operating channel. Then, based on the true junction temperature of each channel, combined with the safe operating temperature limit of the power switches and the rate of temperature change, the control unit evaluates the lifetime score of each channel and accordingly reallocates the current proportion that each operating channel should bear, i.e., the target current weight.

[0046] Thermal conduction decoupling calculation refers to the process of separating the independent temperature information of each operating channel from mutually coupled temperature measurements using thermal impedance matrices and their inverse matrix operations. True junction temperature refers to the actual operating temperature of the semiconductor chip inside the power switch, which reflects the thermal stress state of the device more accurately than the casing operating temperature. Target current weight refers to the proportion of current that each operating channel should bear in the total output current.

[0047] S50: Based on the target current loop control gain, target control phase, and target current weight, generate pulse width modulation control signals for each working channel.

[0048] The control device integrates the calculation results of the previous steps, allocates the current setpoint of each channel according to the target current weight of each channel, performs current closed-loop regulation calculation in combination with the target current loop control gain, and obtains the duty cycle control quantity of each channel; then adjusts the interleaved timing of the triangular carrier of each channel on the time axis according to the target control phase; finally, it compares the duty cycle control quantity with the adjusted triangular carrier to generate the pulse width modulation (PWM) control signal for each working channel.

[0049] For example, based on the target current weight of each working channel and the total system demand current, the given reference value of the current closed-loop control loop corresponding to each working channel is determined, and the difference between the given reference value and the output current is used as the current error of the corresponding working channel; the target current loop control gain is used as the adjustment coefficient, and proportional-integral calculation is performed on the current error of the corresponding working channel to obtain the duty cycle control quantity of each working channel; the staggered timing of the triangular carriers of each working channel on the time axis is reconstructed according to the target control phase, and the duty cycle control quantity is used to perform an intersection comparison with the reconstructed triangular carriers to generate the pulse width modulation control signal of each working channel.

[0050] S60: Uses the corresponding pulse width modulation control signal to drive the power switching transistors in each working channel to synchronously coordinate and control the output ripple and spatial heat distribution of each working channel in the DC power supply.

[0051] The control device outputs the pulse width modulation control signal of each working channel generated in step S50 to the drive circuit of the power switch in each working channel. The drive circuit amplifies the signal and applies it to the gate of the power switch to control the switching on and off. By precisely controlling the conduction timing and conduction width of each working channel, the output current of each working channel is staggered on the time axis, thereby reducing the ripple amplitude of the total output current. At the same time, by differentiating the current load of each working channel, the heat generation of each working channel is matched with its heat dissipation capacity, thereby achieving uniform spatial heat distribution.

[0052] In this context, power switching transistors refer to power electronic devices, such as MOSFETs or IGBTs, used in the operating channels to perform high-frequency switching actions. Synchronous coordination control refers to the unified scheduling of the switching behavior of multiple operating channels simultaneously, achieving synergistic optimization in both output ripple and heat distribution.

[0053] This embodiment achieves comprehensive synchronous control of multiple operating channels in a DC power supply by collecting three operating parameters: output current, operating temperature, and bus ripple voltage. In particular, by compensating for the current loop control gain based on the output current, it effectively solves the problem of inductor saturation due to large current bias under high power density, which leads to a decrease in the accuracy of current loop control. The control phase is corrected based on the bus ripple voltage, breaking through the traditional fixed mode of uniform interleaved phase. This can suppress harmonics generated by the superposition of multi-channel switching actions in real time and reduce the bus ripple amplitude. The true junction temperature is obtained through heat conduction decoupling calculation, eliminating the influence of heat penetration between channels on temperature judgment and making the current distribution more scientific and reasonable. By generating PWM control signals to drive power switching transistors, comprehensive and coordinated control of output ripple and spatial heat distribution is achieved, improving the overall performance and reliability of the system.

[0054] In one embodiment, step S20, which involves compensating the current loop control gain of the corresponding working channel based on the output current of each working channel to obtain the corrected target current loop control gain, specifically includes the following steps: S21: Obtain the current loop control gain of each working channel in the DC power supply.

[0055] The control unit reads the current loop control gain value used by each working channel in the current control cycle from the internal register or parameter storage area. This gain value can be the default value set during system initialization, or it can be the value saved after correction in the previous control cycle.

[0056] S22: Calculate the actual inductance value of the inductor in the corresponding working channel under the current current bias based on the output current of each working channel.

[0057] The control device takes the output current value of each working channel acquired in step S10 and substitutes it into the inductance calculation model pre-stored in the control device. This model describes the nonlinear relationship between the inductance value and the magnitude of the current. The actual inductance value of the inductor under the current bias is calculated using this model.

[0058] In this context, an inductor refers to a magnetic component (such as a power inductor) used for energy storage and filtering in the operating channel. Current bias refers to the phenomenon where the operating point of the magnetic core shifts when a DC or large current passes through the inductor. The actual inductance value refers to the true inductance value of the inductor after the inductance decreases due to the magnetic core entering the nonlinear saturation region when a specific current passes through it.

[0059] S23: Determine the inductance compensation coefficient for the corresponding working channel based on the actual inductance value and the preset nominal inductance value.

[0060] The control device divides the nominal inductance value (i.e., the initial inductance value of the inductor under no current bias conditions) by the actual inductance value calculated in step S22, obtaining the ratio between the two. This ratio is the inductance compensation coefficient. This coefficient reflects the degree of inductance attenuation caused by inductance saturation.

[0061] The nominal inductance value refers to the rated inductance of the inductor component as specified at the factory. The inductance compensation coefficient is a dimensionless scaling factor used to correct control loop gain deviations caused by changes in inductance value.

[0062] S24: Based on the inductance compensation coefficient, compensate the current loop control gain of the corresponding working channel to obtain the target current loop control gain of each working channel.

[0063] The control device multiplies the current current loop control gain obtained in step S21 with the inductor compensation coefficient calculated in step S22 to obtain the target current loop control gain. This gain will be used in the subsequent current closed-loop control calculation to ensure that the control loop gain does not decrease due to the decrease in inductance when the inductor saturates under high current conditions.

[0064] This embodiment forms a complete current loop gain compensation process through four sub-steps: obtaining the current gain, calculating the actual inductance value, determining the compensation coefficient, and compensating for the gain. Compared with simple fixed compensation, this embodiment can dynamically determine the compensation amount based on the real-time output current, resulting in higher compensation accuracy and effectively preventing control loop bandwidth distortion and system instability caused by inductor saturation.

[0065] In one embodiment, step S22, which involves calculating the actual inductance value of the inductor element in the corresponding working channel under the current current bias based on the output current of each working channel, specifically includes the following steps: S221: Calculate the DC bias magnetic field strength of the magnetic core inside the inductor based on the output current of the working channel and the nominal inductance value of the inductor in the working channel.

[0066] The control device multiplies the output current of the working channel acquired in step S10 with the number of turns parameter of the inductor element, and then divides it by the effective magnetic path length of the magnetic core to calculate the DC bias magnetic field strength experienced by the magnetic core inside the inductor element under the current current. This magnetic field strength reflects the degree of magnetization of the magnetic core.

[0067] The magnetic core refers to the magnetic material portion inside an inductor, used to concentrate and enhance the magnetic field. The DC bias magnetic field strength refers to the magnitude of the magnetic field generated by the DC current inside the magnetic core; it is the fundamental cause of core saturation.

[0068] S222: Perform nonlinear magnetic saturation analysis on the DC bias magnetic field strength to calculate the relative permeability decay coefficient of the inductor core under the current current bias.

[0069] The control device substitutes the DC bias magnetic field strength calculated in step S221 into the nonlinear magnetic saturation curve model of the magnetic core material. This model describes the nonlinear relationship between the relative permeability of the magnetic core and the decrease in magnetic field strength. The model is used to calculate the attenuation ratio of the relative permeability of the magnetic core under the current magnetic field strength, i.e., the relative permeability attenuation coefficient.

[0070] Relative permeability is a physical quantity characterizing the magnetic permeability of a magnetic core material. The relative permeability decay coefficient refers to the proportion by which the relative permeability of a magnetic core decreases relative to its initial value after being subjected to DC bias.

[0071] S223: Based on the relative permeability attenuation coefficient and the preset temperature compensation coefficient, calculate the nonlinear drop factor used to characterize the degree of shrinkage of the overall inductance of the inductor element.

[0072] The control device performs a comprehensive calculation on the relative permeability attenuation coefficient calculated in step S221 and the preset temperature compensation coefficient. The temperature compensation coefficient is used to correct the influence of temperature changes on the magnetic permeability of the core. Through calculation, a comprehensive nonlinear drop factor is obtained, which directly reflects the overall degree of inductance shrinkage of the inductor under the current operating conditions.

[0073] Among them, the temperature compensation coefficient is an empirical coefficient used to compensate for the influence of changes in the permeability of the core material at different temperatures. The nonlinear drop factor is a comprehensive attenuation coefficient used to characterize the overall magnitude of the decrease in inductance of an inductor under the combined effects of current bias and temperature.

[0074] S224: Multiply the nominal inductance value by the corresponding nonlinear drop factor to obtain the actual inductance value of the inductor element in each working channel under the current current bias.

[0075] The control device multiplies the nominal inductance value by the calculated nonlinear drop factor to obtain the actual inductance value of the inductor in the working channel under the current current bias and temperature conditions. It then iterates through all working channels to obtain the actual inductance value of the inductor in each working channel under the current current bias.

[0076] This embodiment achieves high-precision calculation of the actual inductance value of an inductor through a progressively refined process, from calculating the DC bias magnetic field strength to nonlinear magnetic saturation analysis, and then to temperature compensation correction. Compared with directly using empirical formulas or lookup tables, this embodiment starts from the physical mechanism of the magnetic core, considering three dimensions: magnetic field strength, magnetic saturation characteristics, and temperature effects. The calculation results are more accurate and reliable, and are especially suitable for applications with large ranges of operating current and temperature variations.

[0077] In one embodiment, such as Figure 3 As shown, in step S30, the initial reference phase of each working channel is corrected based on the bus ripple voltage to obtain a target control phase that is different for each working channel. This specifically includes the following steps: S31: Calculate the basic interleaved phase shift angle between two adjacent working channels based on the total number of working channels, and assign an initial reference phase that is uniformly staggered on the time axis to each working channel based on the basic interleaved phase shift angle.

[0078] The control device counts the total number N of currently active channels, divides 360 degrees by N to obtain the basic interleaved phase shift angle. Then, according to the channel numbering order, an initial reference phase is assigned to each channel, that is, the initial reference phase of the m-th channel is m multiplied by the basic interleaved phase shift angle.

[0079] For example, when four channels are working, the basic staggered phase shift angle is 360 / 4 = 90 degrees, and the initial reference phases of channels 1 to 4 are 0 degrees, 90 degrees, 180 degrees, and 270 degrees, respectively, so that the four channels are evenly staggered on the time axis.

[0080] The basic interleaved phase shift angle refers to the basic phase interval angle between two adjacent channels when multiple parallel operating channels are uniformly staggered in their conduction sequence during the switching cycle. The initial reference phase refers to the initial phase allocation value obtained by each operating channel based on the basic interleaved phase shift angle.

[0081] S32: Adaptively correct the initial phase reference of each working channel based on the bus ripple voltage to obtain a target control phase that is different for each working channel.

[0082] The control device analyzes the acquired bus ripple voltage signal and extracts the harmonic components generated by the superposition of multiple channel switching operations. Then, with the goal of suppressing these harmonic components, an iterative optimization algorithm is used to calculate the additional offset correction angle required for each channel. Finally, the initial reference phase of each working channel is added to the corresponding correction angle to obtain the target control phase that is different for each channel.

[0083] This embodiment introduces an adaptive correction mechanism based on bus ripple voltage, building upon the foundation of a basic uniform interleaved phase. Compared to the traditional fixed uniform interleaving method, this embodiment can dynamically adjust the phase of each working channel according to the actual operating conditions, ensuring that bus ripple remains at a low level even when the load on each working channel is uneven or the parameters differ.

[0084] In one embodiment, step S32, which involves adaptively correcting the initial phase reference of each working channel based on the bus ripple voltage to obtain different target control phases for each working channel, specifically includes the following steps: S321: Separate the second and fourth harmonics caused by the high-frequency switching overlap of multiple operating channels from the bus ripple voltage.

[0085] The control device inputs the acquired bus ripple voltage signal into a generalized second-order integrator. This integrator is a digital filter capable of signal extraction at specific frequency points. By setting the resonant frequency of the integrator to 2 times and 4 times the switching frequency of the working channel, the instantaneous values ​​of the second and fourth harmonic components can be separated from the bus ripple voltage.

[0086] The second harmonic refers to the voltage ripple component with a frequency twice that of the operating channel switching frequency. The fourth harmonic refers to the voltage ripple component with a frequency four times that of the operating channel switching frequency. When multiple channels operate in parallel, due to the superposition effect of the switching actions of each operating channel, ripple energy dominated by the second and fourth harmonics will be generated on the input bus.

[0087] S322: With minimizing the total energy of the second and fourth harmonics as the optimization objective, the phase shift compensation angle of each working channel is solved iteratively.

[0088] The control device uses the sum of the squares of the extracted second and fourth harmonic components as the objective function, which reflects the total magnitude of ripple energy on the bus. Then, a gradient descent iterative algorithm is employed. In each iteration, the gradient of the objective function with respect to the phase shift compensation angle of each channel is calculated, and the phase shift compensation angle of each working channel is gradually adjusted along the direction of gradient descent to continuously reduce the objective function value. This iteration is repeated until the objective function converges to its minimum value, at which point the phase shift compensation angle of each working channel is the optimal value.

[0089] The phase shift compensation angle refers to the additional angle correction introduced on top of the basic staggered phase to further suppress bus ripple. The gradient descent iterative algorithm is an optimization method that gradually approximates the minimum value of a function along the negative gradient direction.

[0090] S323: Add the initial reference phase of each working channel to the corresponding phase shift compensation angle to obtain the target control phase of each working channel.

[0091] The control device adds the initial reference phase of each working channel allocated in step S31 to the phase shift compensation angle of each working channel obtained by iterative solution in step S322 to obtain the target control phase used by each working channel.

[0092] This embodiment achieves fine-tuning of the phase compensation angle by extracting the second and fourth harmonics and iteratively optimizing to minimize their energy. Compared to setting fixed compensation values ​​based solely on experience, this embodiment is adaptive, capable of adjusting the phase of each working channel in real time according to the actual harmonic components of the bus ripple, ensuring that the ripple suppression effect is always maintained at its optimal state.

[0093] In one embodiment, step S40 involves performing a unified thermal conduction decoupling calculation on the operating temperature of all operating channels to eliminate heat penetration between operating channels and obtain the true junction temperature of the power switching transistors in each operating channel. This specifically includes the following steps: S401: Arrange the working temperatures of each working channel in order of channel index value to construct a temperature vector matrix.

[0094] For example, the control device arranges the collected operating temperature data of each working channel into a one-dimensional temperature vector matrix according to the channel number in ascending order. For example, if the operating temperatures of the four channels are 65℃, 68℃, 63℃, and 70℃, then the temperature vector matrix is ​​[65, 68, 63, 70]^T.

[0095] S402: Obtain the pre-built channel thermal impedance matrix. The channel thermal impedance matrix is ​​used to characterize the spatial heat penetration ratio between each working channel under a specific physical spatial layout due to thermal radiation and thermal conduction.

[0096] The control device reads the pre-calibrated channel thermal impedance matrix from the internal memory. This matrix, obtained through finite element simulation or experimental testing during the system design phase, is an N×N square matrix (N being the total number of channels). The element in the i-th row and j-th column represents the contribution of the power loss of the j-th channel to the thermal conduction of the i-th channel's casing temperature.

[0097] The channel thermal impedance matrix is ​​a mathematical model that describes the thermal coupling relationship between the working channels. It quantifies the proportion of heat transferred from one channel to another under a specific physical layout.

[0098] S403: Perform matrix operations on the inverse matrix of the channel thermal impedance matrix and the temperature vector matrix to eliminate cross heat penetration between adjacent channels and obtain the core heating temperature of the power switching transistor in each working channel.

[0099] The control device inverts the acquired channel thermal impedance matrix to obtain its inverse matrix, and then performs matrix multiplication on this inverse matrix and the temperature vector matrix constructed in step S401. Through this matrix inverse operation, the cross heat permeating between each working channel is extracted from the mutually coupled shell temperature measurements, and the core heating temperature of the power switching transistor in each working channel is obtained.

[0100] The core heating temperature refers to the temperature at the heating center of the semiconductor chip inside the power switch tube, without considering the temperature gradient from the chip to the casing.

[0101] S404: Based on the temperature change rate and time delay constant corresponding to each working channel, as well as the inherent thermal resistance and thermal capacity parameters of the power switching transistor in each working channel, calculate the temperature difference compensation from the heating core of the power switching transistor to the surface of the outer casing, and obtain the dynamic temperature difference compensation for each working channel.

[0102] The control device calculates the time derivative of the calculated heating core temperature to obtain the rate of temperature change. Then, combining the inherent thermal resistance parameter (representing the degree of obstruction to heat transfer) and thermal capacity parameter (representing heat storage capacity) of the power switching transistor, as well as the time delay constant reflecting the heat transfer delay, it calculates the dynamic temperature difference compensation between the heating core and the outer casing surface. This compensation reflects the temperature difference between the heating core and the outer casing during temperature changes.

[0103] Among them, dynamic temperature difference compensation refers to the correction amount of the difference between the temperature of the heating core and the temperature of the outer shell under non-steady-state conditions.

[0104] S405: Add the core temperature of the heating element in each working channel to the corresponding dynamic temperature difference compensation to obtain the true junction temperature of the power switching transistor in each working channel.

[0105] The control device adds the core temperature of each working channel calculated in step S403 to the dynamic temperature difference compensation amount of the corresponding working channel calculated in step S404 to obtain the actual junction temperature of the power switching transistor in each working channel.

[0106] This embodiment achieves accurate calculation of the true junction temperature of the power switch transistor by constructing a temperature vector matrix, obtaining the thermal impedance matrix, solving for the core heating temperature through matrix inverse operation, and performing dynamic temperature difference compensation. Compared with directly using the case temperature as the junction temperature estimate, this embodiment considers both the inter-channel thermal coupling effect and the temperature gradient from the chip to the case, significantly improving the calculation accuracy and providing a reliable temperature basis for subsequent current weight adjustment.

[0107] In one embodiment, such as Figure 4 As shown, step S40, which involves adjusting the target current weight of each operating channel based on the actual junction temperature, specifically includes the following steps: S41: Calculate the lifetime score of each working channel based on the temperature margin between the actual junction temperature and the preset safe limit junction temperature, as well as the rate of change of the actual junction temperature over time.

[0108] For each operating channel, the control device first subtracts the actual junction temperature calculated in step S405 from the allowable safe junction temperature limit of the power switch transistor to obtain a temperature margin. A larger temperature margin indicates that the device is further away from the limit temperature, and the higher the safety. Then, the time derivative of the actual junction temperature is calculated to obtain the rate of change of the actual junction temperature (i.e., the thermal shock rate). This rate reflects the severity of the device temperature change; a larger rate indicates a more severe thermal shock. Combining the temperature margin and the thermal shock rate, the lifetime score for each operating channel is calculated.

[0109] The lifetime score is a dimensionless comprehensive assessment value used to quantify the health status and remaining lifetime expectation of each operating channel under current thermal conditions. The safe junction temperature limit refers to the maximum permissible operating junction temperature specified by the power switch manufacturer.

[0110] S42: Based on the lifetime score, redistribute the target current weights of each working channel.

[0111] The control device sums the lifetime scores of all operating channels to obtain a total score. Then, it divides the lifetime score of each channel by the total score to obtain the current allocation coefficient for that channel. This coefficient is between 0 and 1, and the sum of the coefficients for all channels is 1. This current allocation coefficient is directly used as the target current weight for the corresponding operating channel. In other embodiments, the current allocation coefficient can be adjusted according to the task type of the operating channel to determine the target current weight. Then, the total system current requirement is multiplied by the current allocation coefficient of each channel to obtain the allocated current for each operating channel. Channels with higher lifetime scores receive larger current allocation coefficients and handle more output current; channels with lower lifetime scores receive smaller current allocation coefficients and handle less output current.

[0112] This embodiment uses a lifetime rating to guide current weight allocation, achieving differentiated load management for each channel. Compared to traditional current sharing control or simple temperature-based current limiting, this embodiment comprehensively considers both the static margin and dynamic rate of temperature change, enabling a more accurate assessment of the health status of each channel. This allows channels with good thermal condition to handle more output current, while channels with poor thermal condition handle less output current, thereby extending the overall mean time between failures (MTBF) of the system.

[0113] In one embodiment, step S41, which calculates the lifetime score of each working channel based on the temperature margin between the actual junction temperature and the preset safe junction temperature limit, and the rate of change of the actual junction temperature over time, specifically includes the following steps: S411: Calculate the instantaneous thermal stress degradation coefficient caused by the steady-state high temperature of the heat-generating core based on the actual junction temperature of the power switching transistors in each working channel.

[0114] The control device calculates the actual junction temperature of each channel and substitutes it into the lifetime-temperature stress model of the power switch. This model describes the performance degradation rate of the power switch due to thermal stress at different junction temperatures. Based on this model, the instantaneous thermal stress degradation coefficient of the power switch at the current junction temperature is calculated. This coefficient reflects the degree of continuous loss of device lifetime due to steady-state high temperature.

[0115] The instantaneous thermal stress degradation coefficient refers to the instantaneous rate at which the material properties of a power switching transistor degrade due to high-temperature thermal stress under the current junction temperature conditions.

[0116] S412: The difference between the actual junction temperature and the corresponding operating temperature is used as the internal and external dynamic temperature difference of the power switch in the corresponding operating channel.

[0117] The control device subtracts the corresponding operating temperature (i.e., the casing temperature) from the actual junction temperature of each channel to obtain the dynamic temperature difference between the inside and outside of the chip. This temperature difference reflects the temperature difference between the inside of the chip and the casing; a larger temperature difference indicates a more concentrated internal thermal stress.

[0118] Among them, the internal and external dynamic temperature difference refers to the difference between the junction temperature of the power switch chip and the casing temperature, which reflects the degree of heat accumulation inside the device.

[0119] S413: Based on the rate of change of the internal and external dynamic temperature difference and the corresponding operating temperature, calculate the instantaneous thermal index value of the corresponding operating channel. The instantaneous thermal index value is used to characterize the thermal transient impact energy of the thermal shear stress between the internal wafer and the outer shell of the power switch tube.

[0120] The control device combines the calculated internal and external dynamic temperature difference with the rate of change of the collected operating temperature to obtain an instantaneous thermal index value. This index reflects the thermal shear stress energy generated between the internal wafer and the outer casing of the power switch due to temperature differences and changes, and reflects the degree of damage to the device caused by thermal transient shocks.

[0121] Among them, the internal wafer of the power switch refers to the core semiconductor chip part of the power semiconductor device, and thermal shear stress refers to the mechanical stress generated when the temperature changes due to the different thermal expansion coefficients of different materials.

[0122] S414: Integrate the instantaneous thermal index values ​​of each working channel over time to obtain the cumulative thermal fatigue damage value of each working channel.

[0123] The control device accumulates and integrates the instantaneous thermal index values ​​calculated for each operating channel in each control cycle to obtain the cumulative thermal fatigue damage value of that channel from the start of operation to the current moment. This value reflects the total energy of thermal transient shocks experienced by the power switching transistor throughout the entire operation.

[0124] Among them, the cumulative thermal fatigue damage value refers to the total amount of damage accumulated by the power switch due to multiple thermal shocks during its operating history, which is similar to the concept of cumulative damage in material fatigue.

[0125] S415: The instantaneous thermal stress degradation coefficient and the cumulative thermal fatigue damage value are weighted and summed, and the weighted sum is normalized to obtain the life score of each working channel.

[0126] The control unit multiplies the calculated instantaneous thermal stress degradation coefficient by a first weight and the calculated cumulative thermal fatigue damage value by a second weight, then adds the two together to obtain a weighted sum. Finally, this weighted sum is normalized (e.g., divided by the maximum value among all channels) to obtain the final lifespan score for each working channel. A higher score indicates a better health condition for the channel.

[0127] This embodiment evaluates the lifespan of power switching transistors from two dimensions: steady-state high-temperature stress and transient thermal shock. The transient thermal stress degradation coefficient characterizes the long-term effects of sustained high temperatures, while the accumulated thermal fatigue damage value characterizes the short-term impact of drastic temperature changes. This multi-dimensional evaluation method is more comprehensive and accurate than considering only a single temperature index. It can effectively identify which channels, although currently at a low temperature, have accumulated significant thermal fatigue damage, thus providing appropriate protection in current distribution.

[0128] In one embodiment, such as Figure 5 As shown, step S60, which generates pulse width modulation control signals for each working channel based on the target current loop control gain, target control phase, and target current weight, specifically includes the following steps: S61: When the output current of any working channel changes abruptly, the voltage fluctuation prediction value is calculated based on the output current change rate of the working channel with the change and the bus ripple voltage, and the voltage fluctuation prediction value is converted into the duty cycle compensation amount of other working channels that have not experienced current changes.

[0129] The control device continuously monitors the output current of each working channel. When a drastic change in the output current of a channel is detected within a very short time and the rate of change exceeds a preset sudden change threshold, the control device immediately acquires the rate of change of the output current of that channel. Simultaneously, combining this with the bus impedance characteristics derived from bus ripple voltage analysis, the control device calculates the predicted voltage fluctuation that this current sudden change will cause on the input bus. Then, the control device multiplies this predicted value by a preset compensation gain, converting it into an additional duty cycle value, i.e., a duty cycle compensation amount. This compensation amount is then used as an additional correction value, ready to be injected into other working channels that have not experienced current sudden changes.

[0130] Among these, "output current mutation" refers to an event in which the output current of the working channel changes significantly within a short period of time. "Voltage fluctuation prediction" refers to the estimated fluctuation range of the input bus voltage based on the current change rate and bus impedance. "Duty cycle compensation" refers to the correction value added to the original duty cycle to offset the interference of bus voltage fluctuations on other channels.

[0131] S62: Based on the target current loop control gain, target control phase, target current weight, and duty cycle compensation of each working channel, generate the pulse width modulation control signal for the corresponding working channel.

[0132] The control device integrates the target current loop control gain, target control phase, target current weight, and duty cycle compensation, and calculates the final duty cycle and carrier timing for each channel according to its parameters, generating pulse width modulation control signals for each working channel. Specifically, for working channels experiencing sudden current changes, the original parameters are used to generate the signal; for working channels without sudden current changes, the duty cycle compensation is superimposed on the original parameters to compensate for interference caused by bus voltage fluctuations.

[0133] This embodiment introduces a duty cycle compensation mechanism during load surges in the PWM signal generation process. When a current surge occurs in a channel, not only is that channel affected, but other channels are also subject to crosstalk due to bus voltage fluctuations. This embodiment achieves feedforward crosstalk suppression by pre-calculating voltage fluctuations and converting them into duty cycle compensation amounts injected into the control loops of other channels. This significantly improves the dynamic response performance and output stability of the multi-channel system under load surge conditions.

[0134] In one embodiment, step S62, which generates a pulse width modulation control signal for the corresponding working channel based on the target current loop control gain, target control phase, target current weight, and duty cycle compensation amount for each working channel, specifically includes the following steps: S621: Based on the target current weight of each working channel and the total system demand current, determine the given reference value of the current closed-loop control loop corresponding to each working channel, and use the difference between the given reference value and the output current as the current error of the corresponding working channel.

[0135] The control unit multiplies the total system current demand by the target current weight of each operating channel to obtain a current reference value for each channel. Then, it subtracts the acquired output current of the corresponding channel from this reference value to obtain the current error. This error reflects the magnitude and direction of the deviation between the current output current and the target reference value.

[0136] The current reference value refers to the target current value that each working channel should output. The current error is the difference between the current reference value and the actual output current.

[0137] S622: Using the target current loop control gain as the adjustment coefficient, perform proportional-integral calculation on the current error of the corresponding working channel to obtain the basic duty cycle control quantity of each working channel, and add it with the corresponding duty cycle compensation quantity to obtain the target duty cycle of each working channel.

[0138] The control device performs proportional and integral calculations on the calculated current error, then adds the proportional and integral terms, and multiplies the result by the target current loop control gain (as an adjustment coefficient) to obtain the base duty cycle control value for each channel. Then, for operating channels without current surges, the calculated duty cycle compensation value is added to the base duty cycle control value to obtain the target duty cycle; for operating channels with current surges, the base duty cycle control value is the target duty cycle.

[0139] The basic duty cycle control value refers to the initial duty cycle value calculated by the current closed-loop controller based on the current error. The target duty cycle refers to the duty cycle value used to generate the PWM signal after all corrections.

[0140] S623: Reconstruct the staggered timing of the triangular carriers of each working channel on the time axis according to the target control phase, and use the target duty cycle to perform an intersection comparison with the reconstructed triangular carriers to generate the pulse width modulation control signal for each working channel.

[0141] The control unit generates a triangular carrier signal with a specific offset on the time axis for each working channel based on the target control phase of each channel. Then, it compares the target duty cycle of each channel with the triangular carrier signal for that channel—outputting a high-level signal when the target duty cycle is greater than the triangular carrier signal, and a low-level signal otherwise. This interleaved comparison method generates the pulse width modulation control signal for each working channel.

[0142] In this context, the triangular carrier wave refers to a periodic triangular waveform signal used for comparison with the duty cycle, and its frequency determines the switching frequency of the PWM signal. Intersection comparison refers to the process of comparing the duty cycle value with the instantaneous value of the triangular carrier wave to generate the PWM waveform.

[0143] This embodiment achieves precise generation of PWM signals through a complete process: calculating a given reference value → calculating the error → PID adjustment → superposition compensation → carrier interleaving. Compared with simple open-loop control, this embodiment ensures that the output current of each channel accurately follows the target weight allocation through current closed-loop regulation, achieves multi-channel interleaved output through phase reconstruction, and achieves anti-interference capability during load changes through duty cycle compensation. These three aspects are organically integrated to form a complete synchronous control closed loop.

[0144] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0145] In one embodiment, a control device is provided, which corresponds one-to-one with the high power density multi-channel DC power supply synchronous control method described in the above embodiments. For example... Figure 6 As shown, the control device includes a data acquisition module 601, a compensation module 602, a correction module 603, a calculation module 604, a generation module 605, and a control module 606. Detailed descriptions of each functional module are as follows: The acquisition module 601 is used to acquire the operating parameters of multiple working channels in the DC power supply in real time. The operating parameters include the output current and operating temperature of each working channel, as well as the bus ripple voltage of the power input bus. The compensation module 602 is used to compensate the current loop control gain of the corresponding working channel according to the output current of each working channel, so as to obtain the corrected target current loop control gain. The correction module 603 is used to correct the initial reference phase of each working channel according to the bus ripple voltage, so as to obtain a different target control phase for each working channel. The calculation module 604 is used to perform a unified heat conduction decoupling calculation on the operating temperature of all working channels to eliminate heat penetration between working channels, obtain the true junction temperature of the power switching transistors in each working channel, and adjust the target current weight of each working channel according to the true junction temperature. The generation module 605 is used to generate pulse width modulation control signals for each working channel based on the target current loop control gain, target control phase, and target current weight. The control module 606 is used to drive the power switching transistors in each working channel using the corresponding pulse width modulation control signal, so as to synchronously coordinate the output ripple and spatial heat distribution of each working channel in the DC power supply.

[0146] It should be noted that the information interaction and execution process between the above-mentioned devices / units are based on the same concept as the method embodiments of this application. For details on their specific functions and technical effects, please refer to the method embodiments section, and they will not be repeated here.

[0147] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0148] This application also provides an electronic device, such as... Figure 7 As shown, the electronic device includes: at least one processor, a memory, and a computer program stored in the memory and executable on the at least one processor. When the processor executes the computer program, it implements the steps in any of the above method embodiments, or when the processor executes the computer program, it implements the functions of each module / unit in the above device embodiments.

[0149] For example, the computer program may be divided into one or more modules / units, which are stored in the memory and executed by the processor to complete this application. The one or more modules / units may be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program in the electronic device.

[0150] Those skilled in the art will understand that Figure 7 The electronic device described is merely an example and does not constitute a limitation on the electronic device. It may include more or fewer components than shown, or combine certain components, or different components. For example, the electronic device may also include input / output devices, network access devices, buses, etc.

[0151] The aforementioned processor can be a Central Processing Unit (CPU), or other general-purpose processors, Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs), or Field Programmable Gate Arrays (FPGAs). Programmable Gate Array (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.

[0152] The memory can be an internal storage unit of the electronic device, such as a hard drive or RAM. The memory can also be an external storage device of the electronic device, such as a plug-in hard drive, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card. Furthermore, the memory can include both internal and external storage units of the electronic device.

[0153] This application also provides a readable storage medium storing a computer program that, when executed by a processor, causes the device to implement the above-described method.

[0154] This application provides a computer program product that enables the device to implement the above-described method when the computer program product is run on an electronic device.

[0155] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the methods of the above embodiments of this application can be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the various method embodiments described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include at least: a medium capable of carrying the computer program code, a recording medium, a computer memory, a read-only memory (ROM), a random access memory (RAM), an electrical carrier signal, a telecommunication signal, and a software distribution medium. Examples include USB flash drives, portable hard drives, magnetic disks, or optical disks. In some jurisdictions, according to legislation and patent practice, computer-readable media cannot be carrier signals or electrical signals.

[0156] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0157] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0158] In the embodiments provided in this application, it should be understood that the disclosed apparatus / device and method can be implemented in other ways. For example, the apparatus / device embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual coupling or direct coupling or communication connection may be through some interfaces, and the indirect coupling or communication connection of devices or units may be electrical, mechanical, or other forms.

[0159] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0160] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A method for synchronous control of a high power density multi-channel DC power supply, characterized in that, include: The operating parameters of multiple working channels in the DC power supply are collected in real time. The operating parameters include the output current and operating temperature of each working channel, as well as the bus ripple voltage of the power input bus. Based on the output current of each working channel, the current loop control gain of the corresponding working channel is compensated to obtain the corrected target current loop control gain. The initial reference phase of each working channel is corrected based on the bus ripple voltage to obtain a target control phase that is different for each working channel. A unified thermal conduction decoupling calculation is performed on the operating temperature of all the operating channels to eliminate spatial heat penetration between the operating channels, obtain the true junction temperature of the power switching transistors in each operating channel, and adjust the target current weight of each operating channel according to the true junction temperature. Based on the target current loop control gain, the target control phase, and the target current weight, pulse width modulation control signals are generated for each of the working channels; The power switching transistors in each of the working channels are driven by the corresponding pulse width modulation control signal to synchronously coordinate and control the output ripple and spatial heat distribution of each working channel in the DC power supply.

2. The DC power supply synchronization control method as described in claim 1, characterized in that, Based on the target current loop control gain, the target control phase, and the target current weight, pulse width modulation control signals are generated for each of the operating channels, including: When the output current of any of the working channels changes abruptly, a voltage fluctuation prediction value is calculated based on the output current change rate of the working channel that caused the change and the bus ripple voltage, and the voltage fluctuation prediction value is converted into the duty cycle compensation amount of other working channels that did not experience a current change. Based on the target current loop control gain, target control phase, target current weight, and duty cycle compensation amount of each working channel, a pulse width modulation control signal corresponding to the working channel is generated.

3. The DC power supply synchronization control method as described in claim 2, characterized in that, The generation of a pulse width modulation control signal corresponding to each working channel, based on the target current loop control gain, target control phase, target current weight, and duty cycle compensation amount for each working channel, includes: Based on the target current weight of each working channel and the total system demand current, the given reference value of the current closed-loop control loop corresponding to each working channel is determined, and the difference between the given reference value and the output current is used as the current error of the corresponding working channel. Using the target current loop control gain as the adjustment coefficient, a proportional-integral operation is performed on the current error of the corresponding working channel to obtain the basic duty cycle control value of each working channel, and then added to the corresponding duty cycle compensation value to obtain the target duty cycle of each working channel. The staggered timing of the triangular carriers of each working channel on the time axis is reconstructed according to the target control phase, and the target duty cycle is used to perform an intersection comparison with the reconstructed triangular carriers to generate the pulse width modulation control signal for each working channel.

4. The DC power supply synchronization control method according to any one of claims 1-3, characterized in that, The step of compensating the current loop control gain of the corresponding working channel based on the output current of each working channel to obtain the corrected target current loop control gain includes: Obtain the current loop control gain of each working channel in the DC power supply; Based on the output current of each working channel, calculate the actual inductance value of the inductor element in the corresponding working channel under the current bias. Based on the actual inductance value and the preset nominal inductance value, the inductance compensation coefficient corresponding to the working channel is determined; Based on the inductance compensation coefficient, the current loop control gain of the corresponding working channel is compensated to obtain the target current loop control gain of each working channel.

5. The DC power supply synchronous control method according to any one of claims 1-3, characterized in that, The step of correcting the initial reference phase of each working channel based on the bus ripple voltage to obtain a target control phase that is different for each working channel includes: Calculate the basic staggered phase shift angle between two adjacent working channels based on the total number of working channels, and assign an initial reference phase that is uniformly staggered on the time axis to each working channel based on the basic staggered phase shift angle. The initial phase reference of each working channel is adaptively corrected based on the bus ripple voltage to obtain a target control phase that is different for each working channel.

6. The DC power supply synchronization control method according to any one of claims 1-3, characterized in that, The step of adjusting the target current weight of each operating channel based on the actual junction temperature includes: The lifetime score of each working channel is calculated based on the temperature margin between the actual junction temperature and the preset safe limit junction temperature, and the rate of change of the actual junction temperature over time. Based on the lifetime score, the target current weights of each of the operating channels are redistributed.

7. A high power density multi-channel DC power supply synchronous control system, characterized in that, This includes a high-power-density, multi-channel DC power supply and a control device, the control device comprising: The acquisition module is used to acquire the operating parameters of multiple working channels in the DC power supply in real time. The operating parameters include the output current and operating temperature of each working channel, as well as the bus ripple voltage of the power input bus. The compensation module is used to compensate the current loop control gain of the corresponding working channel according to the output current of each working channel, so as to obtain the corrected target current loop control gain. The correction module is used to correct the initial reference phase of each of the working channels according to the bus ripple voltage, so as to obtain a target control phase that is different for each of the working channels. The calculation module is used to perform a unified heat conduction decoupling calculation on the operating temperature of all the working channels to eliminate heat penetration between the working channels, obtain the true junction temperature of the power switching transistors in each working channel, and adjust the target current weight of each working channel according to the true junction temperature. The generation module is used to generate pulse width modulation control signals for each of the working channels based on the target current loop control gain, the target control phase, and the target current weight. The control module is used to drive the power switching transistors in each of the working channels using the corresponding pulse width modulation control signal, so as to synchronously coordinate and control the output ripple and spatial heat distribution of each working channel in the DC power supply.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the high power density multi-channel DC power supply synchronous control method according to any one of claims 1 to 6.

9. A readable storage medium storing a computer program, characterized in that, When the computer program is executed by the processor, it implements the high power density multi-channel DC power supply synchronous control method according to any one of claims 1 to 6.

10. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements the high power density multi-channel DC power supply synchronous control method according to any one of claims 1 to 6.

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