Boost circuit, gate voltage adjusting method, chip and electronic device

Abstract

The application provides a boost circuit, a gate voltage adjusting method, a chip and an electronic device, and relates to the technical field of voltage conversion. The boost circuit comprises a voltage input end, a voltage output end, a high-side tube, a low-side tube, an inductor and a gate voltage adjusting module; the gate voltage adjusting module is used for collecting the current of the energy release path from a current sampling point when the boost circuit works in a step-down mode, determining a target voltage compensation amount based on the current and the current conduction impedance of the high-side tube, and adjusting the conduction impedance of the high-side tube based on the target voltage compensation amount, the voltage of the voltage input end and the voltage of a switching node, so that the voltage of the switching node is equal to the sum of the voltage of the voltage input end and the target voltage compensation amount; wherein the target voltage compensation amount is a positive voltage. The scheme of the application can effectively reduce the power loss of the circuit while ensuring that the current slope of the inductor is negative when the boost circuit works in the step-down mode, and can adapt to the load.

Description

Technical Field

[0001] This application relates to the field of voltage conversion technology, and in particular to a boost circuit, a gate voltage regulation method, a chip, and an electronic device. Background Technology

[0002] A boost circuit is a switching DC-DC boost circuit that can convert DC power into another DC power with a fixed or adjustable voltage.

[0003] Figure 1 A schematic diagram of the Boost circuit in the related technology is shown, with reference to... Figure 1 As shown, the Boost circuit may include a high-side transistor (HSD), a low-side transistor (LSD), and an inductor (L). One end of the inductor (L) is connected to the voltage input terminal (VIN), and the other end is connected to the drains of both the high-side transistor (HSD) and the low-side transistor (LSD). The source of the low-side transistor (LSD) is connected to ground (GND). The gate of the high-side transistor (HSD) is connected to the voltage input terminal (VIN), and the source of the high-side transistor (HSD) serves as the voltage output terminal (VOUT) of the Boost circuit. Figure 1 In the Boost circuit shown, in buck mode, after the Boost circuit completes the first stage of energy storage, the low-side transistor LSD is turned off. At this time, since the voltage input at the voltage input terminal VIN is higher than the voltage output at the voltage output terminal VOUT, in order to ensure that the parasitic diode DHSD of the high-side transistor HSD does not conduct, the substrate selection circuit 10 needs to turn on the switch on the side with the higher voltage between the switching node SW and the voltage output terminal VOUT. Therefore, the current direction of the inductor L cannot change abruptly, and the current in the inductor L will charge the parasitic capacitance of the switching node SW. When the voltage of the switching node SW exceeds the threshold voltage V of the high-side transistor HSD... TH Then, the high-side transistor HSD turns on, charging the voltage output terminal VOUT. At this time, the voltage difference across the inductor L is the threshold voltage V. TH Furthermore, the slope of the current in inductor L is negative, which ensures that the current in inductor L does not continuously increase while providing energy to the voltage output terminal VOUT, thereby maintaining the overall stability of the circuit system and satisfying the volt-second balance.

[0004] However, in this case, regardless of the load, the voltage drop across the inductor L remains constant at the threshold voltage V. TH Only then can a negative current slope be formed, making it unable to adapt to the load and resulting in high circuit power consumption. Summary of the Invention

[0005] This application provides a boost circuit, a gate voltage regulation method, a chip, and an electronic device to solve the problem in the related art that the voltage drop across the inductor in buck mode is fixed at the threshold voltage at which the high-side transistor is turned on, which cannot adapt to the load and results in high power consumption.

[0006] In a first aspect, this application provides a boost circuit, including a voltage input terminal, a voltage output terminal, a high-side transistor, a low-side transistor, an inductor, and a gate voltage regulation module; The voltage input terminal, the inductor, and the drain of the low-side transistor are connected in sequence, and the source of the low-side transistor is grounded; the drain of the high-side transistor is connected to the drain of the low-side transistor to form a switching node, and the source of the high-side transistor is connected to the voltage output terminal; the first input terminal of the gate voltage regulation module is connected to the current sampling point on the energy release path formed by the inductor and the high-side transistor, the second input terminal of the gate voltage regulation module is connected to the voltage input terminal, the third input terminal of the gate voltage regulation module is connected to the switching node, and the output terminal of the gate voltage regulation module is connected to the gate of the high-side transistor; The gate voltage regulation module is used to, when the boost circuit is operating in buck mode, collect the current of the energy release path from the current sampling point, determine the target voltage compensation amount based on the current and the current on-resistance of the high-side transistor, and adjust the on-resistance of the high-side transistor based on the target voltage compensation amount, the voltage at the voltage input terminal, and the voltage at the switching node, so that the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount; wherein, the target voltage compensation amount is a positive voltage.

[0007] In one optional implementation, the gate voltage adjustment module is specifically used for: If the voltage difference between the voltage at the switching node and the voltage at the voltage input terminal is less than the target voltage compensation amount, the gate voltage of the high-side transistor is increased to increase the on-resistance of the high-side transistor until the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount. If the voltage difference between the voltage at the switching node and the voltage at the voltage input terminal is greater than the target voltage compensation amount, the gate voltage of the high-side transistor is reduced to reduce the on-resistance of the high-side transistor until the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount.

[0008] In one alternative implementation, the target voltage compensation is the product of the current and the current on-resistance of the high-side transistor.

[0009] In one optional implementation, the gate voltage regulation module includes a voltage compensation generation circuit and a voltage regulation circuit. The input terminal of the voltage compensation generation circuit is connected to the current sampling point as the first input terminal of the gate voltage adjustment module. The output terminal of the voltage compensation generation circuit is connected to the first input terminal of the voltage regulation circuit. The second input terminal of the voltage regulation circuit is connected to the voltage input terminal as the second input terminal of the gate voltage adjustment module. The third input terminal of the voltage regulation circuit is connected to the switching node as the third input terminal of the gate voltage adjustment module. The output terminal of the voltage regulation circuit is connected to the gate of the high-side transistor as the output terminal of the gate voltage adjustment module. The voltage compensation generation circuit is used to generate the target voltage compensation based on the current and the current on-resistance of the high-side transistor. The voltage regulation circuit is used to compare the voltage of the switching node with the sum of the target voltage compensation amount and the voltage of the voltage input terminal, and adjust the on-resistance of the high-side transistor according to the comparison result so that the voltage of the switching node is equal to the sum of the voltage of the voltage input terminal and the target voltage compensation amount.

[0010] In one alternative implementation, the voltage regulation circuit includes an adder and an error amplifier; The first input terminal of the adder is connected to the output terminal of the voltage compensation generation circuit as the first input terminal of the voltage regulation circuit. The second input terminal of the adder is connected to the voltage input terminal as the second input terminal of the voltage regulation circuit. The output terminal of the adder is connected to the positive input terminal of the error amplifier. The negative input terminal of the error amplifier is connected to the switching node as the third input terminal of the voltage regulation circuit. The output terminal of the error amplifier is connected to the gate of the high-side transistor as the output terminal of the voltage regulation circuit. The adder is used to sum the target voltage compensation amount generated by the voltage compensation amount generation circuit and the voltage at the voltage input terminal to obtain the target voltage; The error amplifier is used to compare the voltage of the switching node with the target voltage. If the voltage of the switching node is less than the target voltage, the gate voltage of the high-side transistor is increased based on the voltage difference between the voltage of the switching node and the target voltage. If the voltage of the switching node is greater than the target voltage, the gate voltage of the high-side transistor is decreased based on the voltage difference between the voltage of the switching node and the target voltage.

[0011] Secondly, this application provides a gate voltage regulation method, applied to the gate voltage regulation module in the boost circuit as described in any of the first aspects above; the gate voltage regulation method includes: When the boost circuit is operating in buck mode, the current of the energy release path is collected from the current sampling point; The target voltage compensation amount is determined based on the current and the current on-resistance of the high-side transistor; wherein the target voltage compensation amount is a positive voltage. The on-resistance of the high-side transistor is adjusted based on the target voltage compensation amount, the voltage at the voltage input terminal, and the voltage at the switching node, so that the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount.

[0012] In one alternative implementation, determining the target voltage compensation amount based on the current and the current on-resistance of the high-side transistor includes: The product of the current and the current on-resistance of the high-side transistor is determined as the target voltage compensation amount.

[0013] In one optional implementation, adjusting the on-resistance of the high-side transistor based on the target voltage compensation amount, the voltage at the voltage input terminal, and the voltage at the switching node, so that the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount, includes: If the voltage difference between the voltage at the switching node and the voltage at the voltage input terminal is less than the target voltage compensation amount, the gate voltage of the high-side transistor is increased to increase the on-resistance of the high-side transistor until the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount. If the voltage difference between the voltage at the switching node and the voltage at the voltage input terminal is greater than the target voltage compensation amount, the gate voltage of the high-side transistor is reduced to reduce the on-resistance of the high-side transistor until the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount.

[0014] Thirdly, this application provides a chip including a boost circuit as described in any of the first aspects above.

[0015] Fourthly, this application provides an electronic device including a boost circuit as described in any of the first aspects above, or including a chip as described in the third aspect above.

[0016] The boost circuit, gate voltage regulation method, chip, and electronic device provided in this application include a voltage input terminal, a voltage output terminal, a high-side transistor, a low-side transistor, an inductor, and a gate voltage regulation module. The drains of the voltage input terminal, inductor, and low-side transistor are connected sequentially, and the source of the low-side transistor is grounded. The drains of the high-side transistor and the low-side transistor are connected to form a switching node, and the source of the high-side transistor is connected to the voltage output terminal. The first input terminal of the gate voltage regulation module is connected to the current sampling point on the energy release path formed by the inductor and the high-side transistor, and the second input terminal of the gate voltage regulation module is connected to the voltage input terminal. The third input terminal of the module is connected to the switching node, and the output terminal of the gate voltage regulation module is connected to the gate of the high-side transistor. The gate voltage regulation module, when the boost circuit operates in buck mode, samples the current in the energy release path from the current sampling point, determines the target voltage compensation amount based on the current and the current on-resistance of the high-side transistor, and adjusts the on-resistance of the high-side transistor based on the target voltage compensation amount, the voltage at the voltage input terminal, and the voltage at the switching node, so that the voltage at the switching node equals the sum of the voltage at the voltage input terminal and the target voltage compensation amount; where the target voltage compensation amount is a positive voltage. Thus, in buck mode, while ensuring the inductor current slope is negative, by dynamically adjusting the on-resistance of the high-side transistor by acquiring the current in the energy release path in real time, the voltage at the switching node can be controlled at the target voltage compensation amount. This target voltage compensation amount corresponds to the incomplete conduction state of the high-side transistor and is much smaller than the threshold voltage when the high-side transistor is fully conduction, thereby effectively reducing the power loss of the circuit and enabling load adaptation. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the Boost circuit in related technologies; Figure 2 This is one of the schematic diagrams of the Boost circuit provided in the embodiments of this application; Figure 3 This is a second schematic diagram of the Boost circuit provided in the embodiments of this application; Figure 4 This is the third schematic diagram of the Boost circuit provided in the embodiments of this application; Figure 5 This is a schematic flowchart of the gate voltage adjustment method provided in the embodiments of this application. Detailed Implementation

[0018] In this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can mean: A alone, A and B simultaneously, or B alone. A and B can be singular or plural. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c alone can mean: a alone, b alone, c alone, a combination of a and b, a combination of a and c, a combination of b and c, or a, b, and c. a, b, and c can be single or multiple. Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0019] The terms “center,” “longitudinal,” “lateral,” “up,” “down,” “left,” “right,” “front,” and “rear,” etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0020] The terms "connected" and "connected" should be interpreted broadly. For example, in circuit structures, "connected" or "connected" can refer not only to physical connections but also to electrical or signal connections. This could be a direct connection (physical connection) or an indirect connection via at least one intermediate component, as long as the circuit is connected. It could also refer to the internal connection between two components. Similarly, a signal connection can refer to a connection via a circuit or a medium, such as radio waves. Those skilled in the art will understand the specific meaning of these terms in this application based on the specific circumstances.

[0021] Reference Figure 1The Boost circuit shown uses a P-type Metal-Oxide-Semiconductor Field-Effect Transistor (MOS) for the high-side transistor HSD and an N-type MOS for the low-side transistor LSD. To ensure the Boost circuit operates in buck mode while providing current to the external circuit, the current in inductor L is prevented from continuously increasing. In this case, the gate of the high-side transistor HSD is connected to the voltage input terminal VIN. During the energy storage phase, the low-side transistor LSD is turned on and the high-side transistor HSD is turned off. The voltage input terminal VIN charges the inductor L, storing energy in it. After the energy storage phase ends, the low-side transistor LSD is turned off. Since the voltage input at the voltage input terminal VIN is higher than the voltage output at the voltage output terminal VOUT in buck mode, in order to ensure that the parasitic diode DHSD of the high-side transistor HSD does not conduct, the substrate selection circuit 10 needs to turn on the switch on the side with the higher voltage between the switching node SW and the voltage output terminal VOUT. For example, if the voltage of the switching node SW is greater than the voltage of the voltage output terminal VOUT, then the first switch S1 connected to the switching node SW will be turned on. At this time, the current direction of the inductor L cannot change abruptly, and the current of the inductor L will charge the parasitic capacitance of the switching node SW.

[0022] Based on the characteristics of MOSFETs, their source and drain can be interchanged. When the voltage at the switching node SW exceeds a threshold voltage V of the high-side transistor HSD, the switching voltage will be swapped. TH (That is, the on-state voltage drop V) TH After that, the high-side transistor HSD turns on, and at this time, current flows through the channel of the high-side transistor HSD to charge the voltage output terminal VOUT. At this time, the voltage V at the switching node SW is... SW It will remain at V IN +V TH , where V IN If the voltage at the input terminal VIN is given, then the voltage drop across the inductor L can be expressed as Vin. IN -(V IN +V TH )=-V TH At this point, the slope of the current in inductor L is negative, which ensures that the current in inductor L does not continue to increase while providing energy to the voltage output terminal VOUT, thereby maintaining the overall stability of the circuit system and satisfying the volt-second balance.

[0023] However, in this case, the inductor L must withstand a threshold voltage V. TH Only a voltage drop of a certain magnitude can create a negative current slope, which leads to significant losses in inductor L. For Boost circuits, the conduction loss P... Loss It can be expressed as the following formula (1): (1) Among them, R L R represents the DC resistance of inductor L. ON Indicates other impedances along the discharge path.

[0024] According to formula (1), the efficiency loss of the circuit will be more obvious under medium and heavy load conditions.

[0025] Furthermore, due to the on-state voltage drop V of the high-side HSD tube... TH It is fixed; regardless of the load, the voltage drop is always the threshold voltage V. TH It cannot adapt to the load, and the fixed voltage drop will result in high power consumption and easy overheating of the circuit.

[0026] Based on this, embodiments of this application provide a node precision control scheme based on "energy conservation" or "charge balance" to reduce the voltage drop across inductor L, thereby reducing the fixed on-state voltage drop V. TH The improvement was made to achieve the reversal of the current slope of inductor L by minimizing the necessary voltage drop, thereby improving the efficiency of the entire Boost circuit.

[0027] Specifically, when the Boost circuit operates in buck mode, after the energy storage phase is completed and the low-side transistor (LSD) is turned off, the current in the inductor L and the energy release path of the LSD is collected. Based on this current and the current on-resistance of the high-side transistor (HSD), the target voltage compensation amount is determined. Then, based on the target voltage compensation amount, the voltage at the input terminal VIN, and the voltage at the switching node SW, the on-resistance of the high-side transistor (HSD) is adjusted so that the voltage at the switching node SW equals the sum of the voltage at the input terminal VIN and the target voltage compensation amount. This allows the voltage drop across the inductor to be controlled at the target voltage compensation amount, which corresponds to the incomplete conduction state of the high-side transistor (HSD) and is much smaller than the threshold voltage when the high-side transistor is fully on. This effectively reduces the power loss of the circuit and allows for load adaptation.

[0028] The following is combined Figures 2-4 The Boost circuit provided in the embodiments of this application will be described in detail.

[0029] Figure 2 This paper shows a schematic diagram of one of the Boost circuits provided in an embodiment of the present application. (Refer to...) Figure 2As shown, the Boost circuit may include a voltage input terminal VIN, a voltage output terminal VOUT, a high-side transistor HSD, a low-side transistor LSD, an inductor L, and a gate voltage regulation module 20. The voltage input terminal VIN, the inductor L, and the drain of the low-side transistor LSD are connected in sequence, and the source of the low-side transistor LSD is connected to ground GND. The drain of the high-side transistor HSD is connected to the drain of the low-side transistor LSD, and the connection node can be referred to as the switch node SW. The source of the high-side transistor HSD is connected to the voltage output terminal VOUT. The first input terminal of the gate voltage regulation module 20 is connected to the current sampling point E on the energy release path formed by the inductor L and the high-side transistor HSD. The second input terminal of the gate voltage regulation module 20 is connected to the voltage input terminal VIN. The third input terminal of the gate voltage regulation module 20 is connected to the switch node SW. The output terminal of the gate voltage regulation module 20 is connected to the gate of the high-side transistor HSD.

[0030] Among them, the high-side transistor HSD is a P-type MOSFET, and the low-side transistor LSD is an N-type MOSFET.

[0031] The gate voltage regulation module 20 can be used to collect the current of the energy release path from the current sampling point E when the boost circuit is operating in buck mode, determine the target voltage compensation amount based on the collected current and the current on-resistance of the high-side transistor HSD, and adjust the on-resistance of the high-side transistor HSD based on the target voltage compensation amount, the voltage of the voltage input terminal VIN and the voltage of the switching node SW, so that the voltage of the switching node SW is equal to the sum of the voltage of the voltage input terminal VIN and the target voltage compensation amount; wherein, the target voltage compensation amount is a positive voltage.

[0032] For example, the gate voltage adjustment module 20 can be implemented by hardware circuitry or by software methods.

[0033] Understandable Figure 2 The current sampling point E shown is for illustration only and is not intended to be the sole constraint on the location of the current sampling point. In practical applications, the current sampling point E can be any current sampling point on the energy release path.

[0034] according to Figure 2 In the Boost circuit shown, in buck mode, after the energy storage phase is completed and the low-side transistor LSD is turned off, the current in inductor L enters the decreasing phase. At this time, the voltage drop across inductor L can be expressed as V. IN -I×(R L +R HSD )-V SW , where V IN R represents the voltage at the voltage input terminal VIN, I represents the current in the energy release path formed by the voltage input terminal VIN, inductor L, high-side transistor HSD, and voltage output terminal VOUT, and R represents the voltage at the voltage input terminal VIN. L R represents the DC resistance of inductor L. HSDV represents the on-resistance of the high-side transistor HSD. SW Let represent the voltage at the switching node SW. Then, the factors affecting the current slope of inductor L are I×(R). L +R HSD )+V SW As long as I×(R) L +R HSD )+V SW The voltage V is greater than the voltage input terminal VIN. IN This ensures that the current slope of inductor L is negative during the energy release phase.

[0035] In this embodiment of the application, V can be set first. SW =V IN +Vx, combined Figure 2 As shown, the voltage drop across inductor L at this time can be expressed as V IN -I×(R L +R HSD )-(V IN +Vx)=-[I×(R L +R HSD If Vx is positive, then as long as Vx is positive, the current slope of the inductor L can be guaranteed to be negative.

[0036] Furthermore, the voltage drop across the high-side HSD tube can be expressed as V SW -I×R HSD -V OUT =V IN +Vx-I×R HSD -V OUT , where V OUT This represents the voltage at the output terminal VOUT. It can be seen that the larger Vx is, the larger the voltage drop across the high-side transistor HSD, and therefore the greater the conduction loss of the high-side transistor HSD. Simultaneously, considering V... IN =V OUT In the extreme case, Vx > I×R HSD Since the on-resistance of the high-side transistor HSD is fixed, the minimum value of Vx can be determined by the current I of the inductor L and the current on-resistance R of the high-side transistor HSD. HSD Sure.

[0037] In this way, the current I flowing through the inductor L can be collected in real time, and the current I and the current on-resistance R of the high-side transistor HSD can be compared. HSD To determine Vx, Vx depends on the voltage drop across the impedance on the energy release path under load conditions. In this case, the voltage drop across inductor L becomes Vx, which is much smaller than the threshold voltage V0 corresponding to when the high-side transistor HSD is fully turned on. TH This can greatly reduce the efficiency loss caused by the on-resistance at this time and improve the efficiency of the entire Boost circuit.

[0038] Based on this, in this embodiment, Vx is defined as the target voltage compensation amount. This target voltage compensation amount Vx is used to adjust the gate voltage of the high-side transistor HSD, thereby adjusting the on-resistance of HSD. This ensures that the voltage at the switching node SW is equal to the sum of the voltage at the voltage input terminal VIN and the target voltage compensation amount Vx. This allows the voltage at the switching node SW to be minimized while maintaining a negative current slope for the inductor L, thus reducing the circuit's conduction losses. Simultaneously, by real-time acquisition of the current I flowing through the inductor L, the value of Vx can be dynamically adjusted, achieving a minimum Vx under different load conditions and significantly improving the efficiency of the Boost circuit in buck mode.

[0039] Based on this, in the embodiments of this application, the target voltage compensation amount can be the current I of the energy release path and the current on-resistance R of the high-side transistor HSD. HSD The product of, i.e., Vx = I × R HSD Alternatively, the target voltage compensation can be slightly greater than the current I and the current on-resistance R of the high-side transistor HSD. HSD The product of these can be expressed as, for example, Vx = I × R. HSD +ΔV, where ΔV is a small offset that can be set as needed.

[0040] Accordingly, in one embodiment, the gate voltage adjustment module 20 can be specifically used to: increase the gate voltage of the high-side transistor HSD to increase the on-resistance of the high-side transistor HSD when the voltage difference between the voltage of the switching node SW and the voltage of the voltage input terminal VIN is less than the target voltage compensation amount, until the voltage of the switching node SW is equal to the sum of the voltage of the voltage input terminal VIN and the target voltage compensation amount; and decrease the gate voltage of the high-side transistor HSD to decrease the on-resistance of the high-side transistor HSD when the voltage difference between the voltage of the switching node SW and the voltage of the voltage input terminal VIN is greater than the target voltage compensation amount, until the voltage of the switching node SW is equal to the sum of the voltage of the voltage input terminal VIN and the target voltage compensation amount.

[0041] In this way, the current slope of inductor L can be guaranteed to be negative, and the voltage drop across inductor L can be reduced, thereby reducing circuit losses.

[0042] The boost circuit provided in this application includes a voltage input terminal VIN, a voltage output terminal VOUT, a high-side transistor HSD, a low-side transistor LSD, an inductor L, and a gate voltage regulation module. The drains of the voltage input terminal VIN, the inductor L, and the low-side transistor LSD are connected in sequence, and the source of the low-side transistor LSD is grounded. The drains of the high-side transistor HSD and the low-side transistor LSD are connected to form a switching node SW, and the source of the high-side transistor HSD is connected to the voltage output terminal VOUT. The first input terminal of the gate voltage regulation module is connected to the current sampling point E on the energy release path formed by the inductor L and the high-side transistor HSD, and the second input terminal of the gate voltage regulation module is connected to the voltage input terminal VIN. The third input terminal of the gate voltage regulation module is connected to the switching node SW, and the output terminal of the gate voltage regulation module is connected to the gate of the high-side transistor HSD. The gate voltage regulation module is used to sample the current of the energy release path from the current sampling point E when the boost circuit is operating in buck mode. Based on the current and the current on-resistance of the high-side transistor HSD, it determines the target voltage compensation amount. Based on the target voltage compensation amount, the voltage at the voltage input terminal VIN, and the voltage at the switching node SW, it adjusts the on-resistance of the high-side transistor HSD so that the voltage at the switching node SW is equal to the sum of the voltage at the voltage input terminal VIN and the target voltage compensation amount. The target voltage compensation amount is a positive voltage. In this way, under buck mode, while ensuring that the current slope of the inductor is negative, the on-resistance of the high-side transistor HSD is dynamically adjusted by acquiring the current of the energy release path in real time. This makes the voltage of the switching node SW equal to the sum of the voltage of the voltage input terminal VIN and the target voltage compensation amount. The voltage drop across the inductor L can be controlled at the target voltage compensation amount. This target voltage compensation amount corresponds to the incomplete conduction state of the high-side transistor HSD and is much smaller than the threshold voltage when the high-side transistor is fully conduction. This can effectively reduce the power loss of the circuit and adapt to the load.

[0043] based on Figure 2 In one embodiment of this application, the Boost circuit corresponding to the embodiments is... Figure 3 This is a second schematic diagram of the Boost circuit provided in an embodiment of this application, with reference to... Figure 3As shown, the Boost circuit may include a voltage input terminal VIN, a voltage output terminal VOUT, a high-side transistor HSD, a low-side transistor LSD, an inductor L, and a gate voltage regulation module 20. The gate voltage regulation module 20 may include a voltage compensation generation circuit 21 and a voltage regulation circuit 22. The input terminal of the voltage compensation generation circuit 21 serves as the first input terminal of the gate voltage regulation module 20 and is connected to the current sampling point E. The output terminal of the voltage compensation generation circuit 21 is connected to the first input terminal of the voltage regulation circuit 22. The second input terminal of the voltage regulation circuit 22 serves as the second input terminal of the gate voltage regulation module 20 and is connected to the voltage input terminal VIN. The third input terminal of the voltage regulation circuit 22 serves as the third input terminal of the gate voltage regulation module 20 and is connected to the switching node SW. The output terminal of the voltage regulation circuit 22 serves as the output terminal of the gate voltage regulation module 20 and is connected to the gate of the high-side transistor HSD.

[0044] The voltage compensation generation circuit 21 is used to generate a target voltage compensation amount based on the current sampled from the current sampling point E and the current on-resistance of the high-side transistor HSD.

[0045] For example, the current I collected from the current sampling point E and the current on-resistance R of the high-side transistor HSD can be used as a reference. HSD The target voltage compensation amount is obtained by performing a product operation. Accordingly, the voltage compensation amount generation circuit 21 can be implemented using a multiplier.

[0046] Alternatively, the current I and the on-resistance R can be used. HSD After performing the product operation, a small offset ΔV is added to obtain the target voltage compensation amount. Accordingly, the voltage compensation amount generation circuit 21 can be implemented using a multiplier and an adder.

[0047] The voltage regulation circuit 22 can be used to compare the voltage at the switching node SW with the sum of the target voltage compensation amount generated by the voltage compensation amount generation circuit 21 and the voltage at the voltage input terminal VIN, and adjust the on-resistance of the high-side transistor HSD according to the comparison result so that the voltage at the switching node SW is equal to the voltage V at the voltage input terminal VIN. IN The sum of the target voltage compensation amount.

[0048] Specifically, the voltage regulation circuit 22 can regulate the voltage V at the switching node SW. SW The target voltage compensation amount Vx generated by the voltage compensation amount generation circuit 21 and the voltage V at the voltage input terminal VIN are related to the voltage compensation amount generation circuit 21. IN The sum of Vx + V IN Comparison, when V SW >Vx+V IN When the target voltage compensation amount Vx is too large, it indicates that the gate voltage of the high-side transistor HSD is reduced, thereby reducing the on-resistance of the high-side transistor HSD and thus reducing the voltage V at the switching node SW. SWTo Vx+V IN Closer. When V SW <Vx+V IN When the target voltage compensation amount Vx is too small, it indicates that the gate voltage of the high-side transistor HSD is increased, thereby increasing the on-resistance of the high-side transistor HSD and causing the voltage V at the switching node SW to be lowered. SW To Vx+V IN near.

[0049] In this way, through continuous feedback adjustment, the voltage at the switching node SW can be adjusted and stabilized to the minimum while ensuring that the current slope of the inductor L is negative.

[0050] based on Figure 3 In one embodiment of this application, the Boost circuit corresponding to the embodiments is... Figure 4 The third schematic diagram of the Boost circuit provided in this application is shown below. (Refer to...) Figure 4 As shown, the Boost circuit may include a voltage input terminal VIN, a voltage output terminal VOUT, a high-side transistor HSD, a low-side transistor LSD, an inductor L, and a gate voltage regulation module 20. The gate voltage regulation module 20 may include a voltage compensation generation circuit 21 and a voltage regulation circuit 22. The voltage regulation circuit 22 may include an adder 221 and an error amplifier A1. The first input terminal of the adder 221 is connected to the output terminal of the voltage compensation generation circuit 21, serving as the first input terminal of the voltage regulation circuit 22. The second input terminal of the adder 221 is connected to the voltage input terminal VIN, serving as the second input terminal of the voltage regulation circuit 22. The output terminal of the adder 221 is connected to the positive input terminal of the error amplifier A1. The negative input terminal of the error amplifier A1 is connected to the switching node SW, serving as the third input terminal of the voltage regulation circuit 22. The output terminal of the error amplifier A1 is connected to the gate of the high-side transistor HSD, serving as the output terminal of the voltage regulation circuit 22.

[0051] The adder 221 can be used to sum the target voltage compensation amount generated by the voltage compensation amount generation circuit 21 and the voltage at the voltage input terminal VIN to obtain the target voltage; the error amplifier A1 can be used to compare the voltage of the switching node SW with the target voltage obtained by the adder 221. If the voltage of the switching node SW is less than the target voltage, the gate voltage of the high-side transistor HSD is increased based on the voltage difference between the voltage of the switching node SW and the target voltage; if the voltage of the switching node SW is greater than the target voltage, the gate voltage of the high-side transistor HSD is decreased based on the voltage difference between the voltage of the switching node SW and the target voltage.

[0052] It is understandable that the voltage difference between the switching node SW and the target voltage can determine the amount of adjustment of the gate voltage of the high-side transistor HSD; the greater the voltage difference, the greater the adjustment.

[0053] Specifically, adder 221 can adjust the target voltage compensation amount Vx generated by voltage compensation generation circuit 21 and the voltage V at voltage input terminal VIN. IN Summing these values ​​yields the target voltage Vx+V. IN Error amplifier A1 can input the voltage V of the switching node SW at its negative input terminal. SW The target voltage Vx+V input to its negative input terminal IN Comparison, in V SW >Vx+V IN In this case, it indicates that the target voltage compensation amount Vx is too large, which can be determined based on V... SW With Vx+V IN The voltage difference reduces the gate voltage of the high-side transistor HSD, thereby reducing the on-resistance of HSD and lowering the voltage V at the switching node SW. SW To Vx+V IN Closer. In V SW <Vx+V IN In this case, it indicates that the target voltage compensation amount Vx is too small, which can be determined based on V... SW With Vx+V IN The voltage difference increases the gate voltage of the high-side transistor HSD, thereby increasing the on-resistance of the high-side transistor HSD and causing the voltage V at the switching node SW to rise. SW To Vx+V IN near.

[0054] In this way, through operational amplifier closed-loop control, the voltage at the switching node SW can be adjusted and stabilized to a minimum while ensuring that the current slope of inductor L is negative. This minimizes the voltage drop across inductor L, controlling it to the target voltage compensation value Vx. This target voltage compensation value Vx corresponds to the incomplete conduction state of the high-side transistor HSD, and is much smaller than the threshold voltage V when the high-side transistor HSD is fully turned on. TH This effectively reduces power loss in the circuit. Simultaneously, by real-time monitoring of the current I flowing through the inductor L, the value of Vx can be dynamically adjusted, achieving a minimum Vx under different load conditions. This significantly improves the efficiency of the Boost circuit in buck mode and enables it to adapt to various loads.

[0055] In the first aspect, when the Boost circuit is operating in buck mode, after the energy storage phase is completed and the low-side transistor LSD is turned off, the voltage at the switching node SW is controlled to V by dynamically adjusting the gate voltage of the high-side transistor HSD. IN +Vx, where Vx is much smaller than the threshold voltage V when the high-side transistor HSD is fully turned on. THFirst, it effectively reduces the voltage drop across inductor L and the on-state voltage drop of the high-side transistor HSD, thus significantly improving the efficiency of the Boost circuit in buck mode, reducing circuit power consumption and heat loss. Circuit losses can be reduced by 30% to 80%, improving circuit reliability. Second, by real-time acquisition of the current I in the energy release path, i.e., the load current I, and generating the minimum necessary voltage drop Vx based on the load current I and the current on-resistance of the high-side transistor HSD, optimal efficiency is achieved while ensuring that the current slope of inductor L is negative. Furthermore, the voltage drop Vx across inductor L can adaptively adjust with the load; Vx is smaller under light loads and adapts to the current I under heavy loads, achieving high efficiency across the entire load range. Third, it only requires adding a simple gate voltage regulation module to the existing Boost circuit architecture, without the need for high-power components, resulting in a simple circuit structure, small area, and easy integration. Fourth, even after adding the gate voltage regulation module, the circuit still maintains volt-second balance, the current slope of inductor L is controllable, and the system stability is not affected. Fifthly, it can be applied to all Boost control architectures operating in buck mode, including but not limited to: fixed-frequency pulse width modulation (PWM) control, constant on-time (COT) control, peak current mode control, valley current mode control, and multi-mode switching DC-DC control.

[0056] Based on the same inventive concept, this application also provides a gate voltage adjustment method, which can be applied to the gate voltage adjustment module 20 in the Boost circuit provided in any of the above embodiments. Figure 5 A schematic flowchart of the gate voltage adjustment method provided in an embodiment of this application is shown. (Refer to...) Figure 5 As shown, the gate voltage adjustment method may include the following steps 510-530.

[0057] Step 510: When the boost circuit is operating in buck mode, sample the current of the energy release path from the current sampling point.

[0058] Combination Figure 2-4 In any Boost circuit, when the Boost circuit is operating in buck mode, after the energy storage phase is completed and the low-side transistor LSD is turned off, the current of the inductor L enters the decreasing phase. At this time, the gate voltage regulation module 20 can collect the current I of the energy release path formed by the voltage input terminal VIN, the inductor L, the high-side transistor HSD and the voltage output terminal VOUT from the current sampling point E.

[0059] Step 520: Determine the target voltage compensation amount based on the current and the current on-resistance of the high-side transistor.

[0060] The target voltage compensation is a positive voltage.

[0061] After the gate voltage regulation module 20 acquires the current I, it can determine the target voltage compensation amount by multiplying the current I and the current on-resistance of the high-side transistor HSD. Alternatively, it can determine the target voltage compensation amount by multiplying the current I and the current on-resistance of the high-side transistor HSD and summing this product with a preset offset ΔV. The preset offset ΔV is a small, pre-set compensation amount.

[0062] Step 530: Adjust the on-resistance of the high-side transistor based on the target voltage compensation amount, the voltage at the voltage input terminal, and the voltage at the switching node, so that the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount.

[0063] Specifically, the gate voltage regulation module 20 can increase the gate voltage of the high-side transistor HSD to increase the on-resistance of the high-side transistor HSD when the voltage difference between the voltage of the switching node SW and the voltage of the voltage input terminal VIN is less than the target voltage compensation amount, until the voltage of the switching node SW is equal to the sum of the voltage of the voltage input terminal VIN and the target voltage compensation amount; and decrease the gate voltage of the high-side transistor HSD to decrease the on-resistance of the high-side transistor HSD when the voltage difference between the voltage of the switching node SW and the voltage of the voltage input terminal VIN is greater than the target voltage compensation amount, until the voltage of the switching node SW is equal to the sum of the voltage of the voltage input terminal VIN and the target voltage compensation amount.

[0064] In this way, the current slope of inductor L can be guaranteed to be negative, and the voltage drop across inductor L can be reduced, thereby reducing circuit losses.

[0065] The gate voltage regulation method provided in this application, when the boost circuit is operating in buck mode, collects the current of the energy release path from the current sampling point, determines the target voltage compensation amount based on the current and the current on-resistance of the high-side transistor, and then adjusts the on-resistance of the high-side transistor based on the target voltage compensation amount, the voltage at the voltage input terminal, and the voltage at the switching node, so that the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount. In buck mode, while ensuring that the current slope of the inductor is negative, the on-resistance of the high-side transistor is dynamically adjusted by acquiring the current of the energy release path in real time, so that the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount. The voltage drop across the inductor can be controlled at the target voltage compensation amount, which corresponds to the incomplete conduction state of the high-side transistor and is much smaller than the threshold voltage when the high-side transistor is fully conduction, thereby effectively reducing the power loss of the circuit and being able to adapt to the load.

[0066] This application also provides a chip that includes a boost circuit as provided in any of the above embodiments. This chip can achieve the functions and beneficial effects of the boost circuits provided in any of the above embodiments, which will not be elaborated further here. By integrating the boost circuits described in any of the above embodiments into a chip, the boost circuit occupies less space inside the electronic device, which is beneficial for product integration and miniaturization, and can be applied to various electronic devices.

[0067] This application also provides an electronic device, which includes a boost circuit as provided in any of the above embodiments, or includes a chip as described in the above embodiments. This electronic device can achieve the functions and beneficial effects of the boost circuit as provided in any of the above embodiments, which will not be elaborated further here. The electronic device provided in this application may include at least one of the following: mobile phone, computer, vehicle terminal, tablet computer, wearable device, smart home device, augmented reality (AR) device, virtual reality (VR) device, etc., but is not limited thereto. It is understood that the electronic device provided in this application has the function of charging external devices.

[0068] In one embodiment of this application, the electronic device may include a processor, an external memory interface, internal memory, a Universal Serial Bus (USB) interface, a charging management module, a power management module, a battery, an antenna, a mobile communication module, a wireless communication module, an audio module, a speaker, a microphone, a headphone jack, a sensor module, buttons, a motor, an indicator, a camera, a display screen, and a Subscriber Identification Module (SIM) card interface, etc. The sensor module may include motion sensors and gyroscopes, etc.

[0069] It is understood that the structures illustrated in the embodiments of this application do not constitute a specific limitation on the electronic device. In other embodiments of this application, the electronic device may include more or fewer components, or combine some components, or split some components, or have different component arrangements. These components may be implemented in hardware, software, or a combination of software and hardware.

[0070] The processor may include one or more processing units, such as, but not limited to, an application processor (AP), a modem processor, a graphics processing unit (GPU), an image signal processor (ISP), a controller, a video codec, a digital signal processor (DSP), a baseband processor, and a neural network processing unit (NPU). Different processing units may be independent devices or integrated into one or more processors. The controller can generate operation control signals based on instruction opcodes and timing signals to control instruction fetching and execution. The processor may also include memory for storing instructions and data. In some embodiments, the memory in the processor may be a cache memory. This memory can store instructions or data that the processor has just used or that are used repeatedly. If the processor needs to reuse the instruction or data, it can retrieve it from memory. This avoids repeated accesses, reduces processor waiting time, and thus improves system efficiency.

[0071] The charging management module receives charging signals from the charger. The charger may include a wireless charger or a wired charger. In some wired charging embodiments, the charging management module receives charging input from the wired charger via a USB interface. In some wireless charging embodiments, the charging management module receives wireless charging input via the wireless charging coil of the electronic device. While charging the battery, the charging management module can also supply power to the electronic device via the power management module.

[0072] The power management module connects the battery, the charging management module, and the processor. It receives input from the battery and / or the charging management module to power the processor, internal memory, display screen, camera, and wireless communication module. The power management module can also monitor parameters such as battery capacity, battery cycle count, and battery health status (leakage current, impedance). In some embodiments, the power management module may be located within the processor. In other embodiments, the power management module and the charging management module may be located in the same device.

[0073] Wireless communication functionality in electronic devices can be implemented through antennas, mobile communication modules, wireless communication modules, modem processors, and baseband processors. Antennas are used to transmit and receive electromagnetic wave signals. Mobile communication modules can provide solutions for wireless communication applications in electronic devices, including 2G / 3G / 4G / 5G. In some embodiments, at least some functional modules of the mobile communication module can be housed in the same device as at least some modules of the processor.

[0074] Wireless communication modules can provide solutions for at least one of the following wireless communication technologies used in electronic devices: Wireless Local Area Networks (WLANs) (such as Wireless Fidelity (Wi-Fi) networks), Bluetooth (BT), Global Navigation Satellite System (GNSS), Frequency Modulation (FM), Near Field Communication (NFC), and Infrared (IR), but are not limited to these. A wireless communication module can be one or more devices integrating at least one communication processing module. The wireless communication module receives electromagnetic waves via an antenna, modulates and filters the electromagnetic wave signal, and sends the processed signal to a processor. The wireless communication module can also receive signals to be transmitted from the processor, modulate and amplify them, and then radiate them as electromagnetic waves via the antenna.

[0075] Other embodiments of this application will readily occur to those skilled in the art upon consideration of the specification and practice of the disclosure herein. This application is intended to cover any variations, uses, or adaptations thereof that follow the general principles of this application and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this application are indicated by the claims.

Claims

1. A boost circuit, characterized in that, Includes voltage input terminal, voltage output terminal, high-side transistor, low-side transistor, inductor, and gate voltage regulation module; The voltage input terminal, the inductor, and the drain of the low-side transistor are connected in sequence, and the source of the low-side transistor is grounded; the drain of the high-side transistor is connected to the drain of the low-side transistor to form a switching node, and the source of the high-side transistor is connected to the voltage output terminal; the first input terminal of the gate voltage regulation module is connected to the current sampling point on the energy release path formed by the inductor and the high-side transistor, the second input terminal of the gate voltage regulation module is connected to the voltage input terminal, the third input terminal of the gate voltage regulation module is connected to the switching node, and the output terminal of the gate voltage regulation module is connected to the gate of the high-side transistor; The gate voltage regulation module is used to, when the boost circuit is operating in buck mode, collect the current of the energy release path from the current sampling point, determine the target voltage compensation amount based on the current and the current on-resistance of the high-side transistor, and adjust the on-resistance of the high-side transistor based on the target voltage compensation amount, the voltage at the voltage input terminal, and the voltage at the switching node, so that the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount; wherein, the target voltage compensation amount is a positive voltage.

2. The boost circuit according to claim 1, characterized in that, The gate voltage adjustment module is specifically used for: If the voltage difference between the voltage at the switching node and the voltage at the voltage input terminal is less than the target voltage compensation amount, the gate voltage of the high-side transistor is increased to increase the on-resistance of the high-side transistor until the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount. If the voltage difference between the voltage at the switching node and the voltage at the voltage input terminal is greater than the target voltage compensation amount, the gate voltage of the high-side transistor is reduced to reduce the on-resistance of the high-side transistor until the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount.

3. The boost circuit according to claim 1, characterized in that, The target voltage compensation is the product of the current and the current on-resistance of the high-side transistor.

4. The boost circuit according to any one of claims 1 to 3, characterized in that, The gate voltage regulation module includes a voltage compensation generation circuit and a voltage regulation circuit; The input terminal of the voltage compensation generation circuit is connected to the current sampling point as the first input terminal of the gate voltage adjustment module. The output terminal of the voltage compensation generation circuit is connected to the first input terminal of the voltage regulation circuit. The second input terminal of the voltage regulation circuit is connected to the voltage input terminal as the second input terminal of the gate voltage adjustment module. The third input terminal of the voltage regulation circuit is connected to the switching node as the third input terminal of the gate voltage adjustment module. The output terminal of the voltage regulation circuit is connected to the gate of the high-side transistor as the output terminal of the gate voltage adjustment module. The voltage compensation generation circuit is used to generate the target voltage compensation based on the current and the current on-resistance of the high-side transistor. The voltage regulation circuit is used to compare the voltage of the switching node with the sum of the target voltage compensation amount and the voltage of the voltage input terminal, and adjust the on-resistance of the high-side transistor according to the comparison result so that the voltage of the switching node is equal to the sum of the voltage of the voltage input terminal and the target voltage compensation amount.

5. The boost circuit according to claim 4, characterized in that, The voltage regulation circuit includes an adder and an error amplifier; The first input terminal of the adder is connected to the output terminal of the voltage compensation generation circuit as the first input terminal of the voltage regulation circuit. The second input terminal of the adder is connected to the voltage input terminal as the second input terminal of the voltage regulation circuit. The output terminal of the adder is connected to the positive input terminal of the error amplifier. The negative input terminal of the error amplifier is connected to the switching node as the third input terminal of the voltage regulation circuit. The output terminal of the error amplifier is connected to the gate of the high-side transistor as the output terminal of the voltage regulation circuit. The adder is used to sum the target voltage compensation amount generated by the voltage compensation amount generation circuit and the voltage at the voltage input terminal to obtain the target voltage; The error amplifier is used to compare the voltage of the switching node with the target voltage, and when the voltage of the switching node is less than the target voltage, to increase the gate voltage of the high-side transistor based on the voltage difference between the voltage of the switching node and the target voltage. When the voltage of the switching node is greater than the target voltage, the gate voltage of the high-side transistor is reduced based on the voltage difference between the voltage of the switching node and the target voltage.

6. A method for adjusting gate voltage, characterized in that, The gate voltage regulation module is applied in the boost circuit as described in any one of claims 1 to 5; the gate voltage regulation method includes: When the boost circuit is operating in buck mode, the current of the energy release path is collected from the current sampling point; The target voltage compensation amount is determined based on the current and the current on-resistance of the high-side transistor; wherein the target voltage compensation amount is a positive voltage. The on-resistance of the high-side transistor is adjusted based on the target voltage compensation amount, the voltage at the voltage input terminal, and the voltage at the switching node, so that the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount.

7. The gate voltage adjustment method according to claim 6, characterized in that, Determining the target voltage compensation amount based on the current and the current on-resistance of the high-side transistor includes: The product of the current and the current on-resistance of the high-side transistor is determined as the target voltage compensation amount.

8. The gate voltage adjustment method according to claim 6, characterized in that, The step of adjusting the on-resistance of the high-side transistor based on the target voltage compensation amount, the voltage at the voltage input terminal, and the voltage at the switching node, so that the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount, includes: If the voltage difference between the voltage at the switching node and the voltage at the voltage input terminal is less than the target voltage compensation amount, the gate voltage of the high-side transistor is increased to increase the on-resistance of the high-side transistor until the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount. If the voltage difference between the voltage at the switching node and the voltage at the voltage input terminal is greater than the target voltage compensation amount, the gate voltage of the high-side transistor is reduced to reduce the on-resistance of the high-side transistor until the voltage at the switching node is equal to the sum of the voltage at the voltage input terminal and the target voltage compensation amount.

9. A chip, characterized in that, Includes the boost circuit as described in any one of claims 1 to 5.

10. An electronic device, characterized in that, It includes the boost circuit as described in any one of claims 1 to 5, or the chip as described in claim 9.

Images