power device

CN122932403APending Publication Date: 2026-10-16WUXI CHIPOWN MICROELECTRONICS
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Patent Information

Application Number
CN202611307466.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-08-26
Publication Date
2026-10-16

AI Technical Summary

Technical Problem

[0003]现有Smart MOS器件的启动绕组采用螺旋式绕线方式,使得终端区上电势分布不均匀,影响与浮空金属场板的适配,器件耐压、可靠性受限,同时绕阻值调整不灵活,不利于启动管绕阻设计

Benefits of technology

[0019] In the power device of this application embodiment, the start-up winding is electrically connected between the gate and drain terminals of the start-up transistor. Each turn of the start-up winding is configured to close around the periphery of the start-up transistor, which optimizes the start-up winding design. This not only makes the winding value adjustment more flexible, but also ensures that the winding layout in all directions around the start-up transistor remains consistent. This can optimize the uniformity of the potential distribution in the peripheral area, weaken the phenomenon of local electric field concentration, and adapt to the symmetrically distributed floating metal field plate, thereby improving the device's withstand voltage stability and reliability.

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Abstract

The application discloses a power device, which comprises a starting tube and a starting winding. The starting winding comprises at least one annular winding, and each annular winding is arranged in a closed loop around the periphery of the starting tube. The starting winding is connected between a drain terminal and a starting tube gate, the outer side of the starting winding is electrically connected to the drain terminal, and the inner side of the starting winding is electrically connected to the starting tube gate. The power device optimizes the design of the starting winding. Each annular winding of the starting winding is arranged in a closed loop around the periphery of the starting tube, which not only makes the winding value adjustment more flexible, but also makes the winding layout in each direction of the periphery of the starting tube consistent. In this way, the potential distribution uniformity of the periphery area can be optimized, the local electric field concentration phenomenon is weakened, the symmetrically distributed floating metal field plate is adapted, and the device voltage resistance stability and reliability are improved.
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Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and more particularly to a power device. Background Technology

[0002] Smart metal-oxide-semiconductor (Smart MOS) is an enhanced device structure that integrates additional startup / detection functions on the basis of power metal-oxide-semiconductor field-effect transistor (MOSFET). Its core goal is to improve system-level reliability, simplify peripheral circuit design, and support autonomous sensing and response to critical states.

[0003] The startup winding of existing Smart MOS devices uses a spiral winding method, which results in uneven potential distribution in the terminal area, affecting the compatibility with floating metal field plates, limiting the device's withstand voltage and reliability. At the same time, the winding resistance value is not flexible, which is not conducive to the design of the startup tube winding. Summary of the Invention

[0004] This application provides a power device to at least partially solve the above-mentioned technical problems.

[0005] This application provides a power device, including: a start-up transistor; a start-up winding including at least one annular winding, each annular winding being configured to close around the periphery of the start-up transistor; wherein, the start-up winding is connected between the drain terminal and the gate of the start-up transistor, the outer side of the start-up winding is electrically connected to the drain terminal, and the inner side of the start-up winding is electrically connected to the gate of the start-up transistor.

[0006] In some embodiments, the start-up winding further includes: a first connecting line connected between the gate of the start-up transistor and the inner side of the start-up winding; and a second connecting line connected between the drain terminal and the outer side of the start-up winding.

[0007] In some embodiments, the starting winding includes multiple turns of the annular winding that are parallel to each other and spaced apart, with adjacent turns of the annular winding being electrically connected.

[0008] In some embodiments, the starting winding further includes a third connecting line, with adjacent two turns of the annular winding connected by a third connecting line; the third connecting line connected to the outermost annular winding is offset from the second connecting line in the circumferential direction of the annular winding; the third connecting line connected to the innermost annular winding is offset from the first connecting line in the circumferential direction; and the two third connecting lines connected to the middle annular winding are offset in the circumferential direction.

[0009] In some embodiments, each turn of the annular winding includes two parallel resistance wires, and the two resistance wires in at least one turn of the annular winding are of equal length.

[0010] In some embodiments, the starting winding includes a first winding group, a second winding group, and a plurality of third connecting lines. The first winding group includes at least one turn of the annular winding, and the second winding group includes at least one turn of the annular winding. The power device further includes at least one back-to-back diode located between the first winding group and the second winding group. The at least one back-to-back diode is connected to the first winding group and to the second winding group respectively via one of the third connecting lines.

[0011] In some embodiments, one of the back-to-back diodes includes two second conductivity type doped structures and a first conductivity type doped structure located between the two second conductivity type doped structures.

[0012] In some embodiments, a plurality of back-to-back diodes are connected in series between the first winding group and the second winding group to form a diode group, and two adjacent back-to-back diodes connected in series share a second conductivity type doped structure.

[0013] In some embodiments, the number of diode groups is one, and both the first conductivity type doped structure and the second conductivity type doped structure are ring-shaped and arranged parallel to the ring winding.

[0014] In some embodiments, there are multiple diode groups, which are connected in parallel between the first winding group and the second winding group and are spaced apart along the annular interval between the first winding group and the second winding group.

[0015] In some embodiments, multiple second conductivity type doped structures in multiple diode groups are connected to form a ring structure; multiple first conductivity type doped structures in multiple diode groups are arranged along the ring interval between two adjacent ring structures.

[0016] In some embodiments, the annular winding, the first conductivity type doped structure, and the second conductivity type doped structure are all polycrystalline silicon windings; the doping concentration of the first conductivity type doped structure and the second conductivity type doped structure is greater than the doping concentration of the annular winding.

[0017] In some embodiments, the power device further includes: an active region and a terminal region surrounding the active region, wherein the start-up winding and the back-to-back diode are both located on the terminal region; and a floating metal field plate, wherein the floating metal field plate at least covers the gap between the polysilicon windings and overlaps with the edge of the polysilicon windings.

[0018] In some embodiments, a power transistor and a sampling transistor are further included, wherein the power transistor is used for power conversion and the sampling transistor is used for sampling the current flowing through the power transistor.

[0019] In the power device of this application embodiment, the start-up winding is electrically connected between the gate and drain terminals of the start-up transistor. Each turn of the start-up winding is configured to close around the periphery of the start-up transistor, which optimizes the start-up winding design. This not only makes the winding value adjustment more flexible, but also ensures that the winding layout in all directions around the start-up transistor remains consistent. This can optimize the uniformity of the potential distribution in the peripheral area, weaken the phenomenon of local electric field concentration, and adapt to the symmetrically distributed floating metal field plate, thereby improving the device's withstand voltage stability and reliability.

[0020] Other features and advantages of this application will be described in detail in the following detailed description section. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0022] To gain a more complete understanding of this application and its beneficial effects, the following description will be provided in conjunction with the accompanying drawings, wherein the same reference numerals in the following description denote the same parts.

[0023] Figure 1 This is a top view of the start-up transistor in a traditional power device. Figure 2 This is a top view schematic diagram of the power device provided in some embodiments of this application. Figure 1 ; Figure 3 yes Figure 2 Equivalent circuit diagram of medium power devices; Figure 4 This is a top view schematic diagram of the power device provided in some embodiments of this application. Figure 2 ; Figure 5 yes Figure 4 Equivalent circuit diagram of medium power devices; Figure 6This is a top view schematic diagram of the power device provided in some embodiments of this application. Figure 3 ; Figure 7 yes Figure 6 Equivalent circuit diagram of medium power devices; Figure 8 This is a top view schematic diagram of the power device provided in some embodiments of this application. Figure 4 ; Figure 9 yes Figure 8 Equivalent circuit diagram of medium power devices; Figure 10 This is a top view schematic diagram of the power device provided in some embodiments of this application. Figure 5 ; Figure 11 This is a top view schematic diagram of the power device provided in some embodiments of this application. Figure 6 ; Figure 12 This is an equivalent circuit diagram of a power device provided in some embodiments of this application.

[0024] Explanation of reference numerals in the attached figures: 100. Power devices; 101. Active region; 102. Termination region; 10. Start-up transistor; G1, gate of start-up transistor; S1, source of start-up transistor; D1, drain of start-up transistor; 20. Starting winding; 21. Circular winding; 21R. Resistance wire; 22. First connecting wire; 23. Second connecting wire; 24. Third connecting wire; 20a. First winding group; 20b. Second winding group; 20c. Circular interval area; D. Leakage to extremes; 30. Back-to-back diode; 30A. Diode group; 31. First conductivity type doped structure; 32. Second conductivity type doped structure; 32a. Ring structure; 32b. Ring region; 40. Floating metal field plate; 50. Power transistor; G2. Power transistor gate; S2. Power transistor source; D2. Power transistor drain; 60. Sampling tube; G3. Gate of sampling tube; S3. Source of sampling tube; D3. Drain of sampling tube. Detailed Implementation

[0025] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the protection scope of this application.

[0026] Please see Figure 1 , Figure 1 This is a top view of the start-up transistor in a traditional power device.

[0027] The power device includes a start-up transistor 10, a start-up winding 20, and a drain terminal D. The start-up transistor 10 includes a start-up gate G1 and a start-up source S1. The start-up winding 20 is electrically connected between the start-up gate G1 and the drain terminal D, thereby establishing a start-up path from the drain terminal D to the start-up gate G1. When the device is powered on, a high-voltage signal can provide a stable bias voltage to the start-up gate G1 through the start-up winding 20, realizing the start-up function of the start-up transistor 10. It can be understood that the gate and source of the transistor shown in the top view provided in the embodiments of this application can be directly regarded as the gate pad and the source pad, so the connection relationship between the start-up winding and the start-up gate can be clearly seen in the top view.

[0028] The power device includes an active region 101 and a terminal region 102 surrounding the active region 101. The existing starting winding 20 adopts a spiral winding method on the terminal region 102 (or peripheral region) of the device, which makes the layout of the four directions on the terminal region 102 different, which can easily lead to uneven potential distribution, affecting the compatibility with the floating metal field plate, and limiting the device's withstand voltage and reliability.

[0029] Based on this, this application provides a power device, including: a start-up transistor; a start-up winding including at least one annular winding, each annular winding being configured to close around the periphery of the start-up transistor; the start-up winding is connected between the drain terminal and the gate of the start-up transistor, the outer side of the start-up winding is electrically connected to the drain terminal, and the inner side of the start-up winding is electrically connected to the gate of the start-up transistor.

[0030] In the power device of this application embodiment, the start-up winding is electrically connected between the gate and drain terminals of the start-up transistor to realize the start-up function of the start-up transistor. Each turn of the start-up winding is configured to close around the periphery of the start-up transistor, which optimizes the start-up winding design. This not only makes the winding value adjustment more flexible, but also ensures that the winding layout in all directions around the start-up transistor is consistent. This optimizes the uniformity of the potential distribution in the peripheral region, weakens the phenomenon of local electric field concentration, and adapts to the symmetrically distributed floating metal field plate, thereby improving the device's withstand voltage stability and reliability.

[0031] The structure of the power device provided in the embodiments of this application will be illustrated below with reference to the accompanying drawings.

[0032] Please see Figure 2 , Figure 2 This is a top view schematic diagram of the power device provided in some embodiments of this application. Figure 1 It should be noted that, Figure 2The illustrated embodiment uses the starting winding 20, which includes a closed loop of winding 21, as an example for explanation.

[0033] The power device 100 includes a start-up transistor 10 and a start-up winding 20. The start-up winding 20 includes at least one turn of annular winding 21, each turn of annular winding 21 being configured to close around the periphery of the start-up transistor 10. The start-up winding 20 is connected between the drain terminal D and the gate G1 of the start-up transistor, with the outer side of the start-up winding 20 connected to the drain terminal D and the inner side of the start-up winding 20 connected to the gate G1 of the start-up transistor.

[0034] The power device 100 may include an active region 101 and a terminal region 102 surrounding the active region 101. The startup transistor 10 is an auxiliary transistor unit integrated into the active region 101 of the device and is a key functional unit for power-on startup of the device. The gate G1 of the startup transistor is the voltage control terminal of the startup transistor 10, used to receive an external voltage division signal to regulate the on and off states of the startup transistor 10.

[0035] It should be noted that the "inner side" described in this article refers to the side closer to the active region 101, and the "outer side" refers to the side away from the active region 101.

[0036] The starting winding 20 is located on the terminal area 102 and can be constructed from polysilicon windings. (Distinct from...) Figure 1 The embodiment features a spiral asymmetrical winding structure, employing a closed-loop racetrack-style winding layout. Each loop of the loop 21 is a complete closed structure. This symmetrical layout ensures consistent winding arrangement in all four directions of the terminal region 102, thereby improving the uniformity of potential distribution on the surface of the terminal region 102. Furthermore, the size and number of loops of the loop 21 can be flexibly configured according to the power device size and target winding resistance parameters. If a lower required winding resistance is desired, P-type or N-type ion doping can be performed on the polysilicon winding to improve conductivity and reduce the resistance.

[0037] The drain terminal D is the high-voltage input terminal of the device, located on the outermost terminal area 102 of the entire start-up winding 20. It serves as the port structure for electrical connection between the device and the external high-voltage circuit, and can stably receive the high-voltage signal input from the system. The outermost annular winding 21 of the start-up winding 20 is connected to the drain terminal D, and the innermost annular winding 21 of the start-up winding 20 is connected to the start-up gate G1 of the start-up transistor 10, thus constructing a start-up path from the drain terminal D to the start-up gate G1. When the device is powered on, the high-voltage signal can provide a stable bias voltage to the start-up gate G1 through the start-up winding 20, enabling the start-up transistor 10 to start and providing initial operating power to the external control circuit.

[0038] In some embodiments, the starting winding 20 further includes a first connecting line 22 and a second connecting line 23. The first connecting line 22 connects between the gate of the starting transistor G1 and the inner side of the starting winding 20, and the second connecting line 23 connects between the drain terminal D and the outer side of the starting winding 20. By adding conductive connecting lines, stable electrical connections are achieved between the inner side of the starting winding 20 and the gate of the starting transistor G1, and between the outer side of the starting winding 20 and the drain terminal D, respectively. This also provides conditions for the symmetrical layout of the closed-loop winding 21 in this embodiment.

[0039] In some examples, the materials of the first connection line 22 and the second connection line 23 can be the same as the material of the toroidal winding 21, for example, both being polysilicon. In this way, the first connection line 22, the second connection line 23, and the toroidal winding 21 can be integrally formed in the layout process, and the material consistency and resistance uniformity of the overall circuit between the drain terminal D and the gate G1 of the power-on transistor can be effectively improved.

[0040] Please see Figure 2 and Figure 3 , Figure 3 yes Figure 2 Equivalent circuit diagram of medium power devices.

[0041] like Figure 2 As shown, the current enters from the drain terminal D, flows through the second connecting line 23, and then flows into the first connecting line 22 in both clockwise and counterclockwise directions from the annular winding 21, finally reaching the gate G1 of the start-up transistor. Therefore, as... Figure 3 As shown, one loop of the annular winding 21 is equivalent to two parallel resistance lines 21R, with both ends of the two resistance lines 21R connected between the first connecting line 22 and the second connecting line 23. By adjusting the relative position of the drain terminal D and the gate G1 of the start-up transistor, the positions of the first connecting line 22 and the second connecting line 23 can be adaptively adjusted to adjust the length of the two resistance lines 21R, or to adjust the doping concentration of the annular winding 21, thereby adjusting the total resistance value of one loop of the annular winding 21 to adapt to different start-up current parameters.

[0042] Please see Figure 4 and Figure 5 , Figure 4 This is a top view schematic diagram of the power device provided in some embodiments of this application. Figure 2 , Figure 5 yes Figure 4 Equivalent circuit diagram of a medium-power device. It should be noted that... Figure 4 The embodiment shown is illustrated using the starting winding 20, which includes a multi-turn closed annular winding 21 as an example.

[0043] In some embodiments, the starting winding 20 includes multiple turns of the annular winding 21 that are parallel to each other and spaced apart, with adjacent turns of the annular winding 21 being electrically connected.

[0044] like Figure 5 As shown, the parallel resistors in the 4-turn toroidal winding 21 are connected in series to form an overall winding circuit. By adjusting the winding resistivity, number of turns, number and position of connecting wires, the starting winding 20 with different resistance requirements can be flexibly adapted, thus broadening the range of device parameter adaptation.

[0045] In some embodiments, the starting winding 20 further includes a third connecting line 24, which connects adjacent turns of the annular winding 21. The third connecting line 24 connected to the outermost annular winding 21 is offset from the second connecting line 23 in the circumferential direction of the annular winding 21; the third connecting line 24 connected to the innermost annular winding 21 is offset from the first connecting line 22 in the circumferential direction; and the two third connecting lines 24 connected to the middle annular winding 21 are offset in the circumferential direction of the annular winding 21.

[0046] like Figure 4 As shown, the starting winding 20 consists of two or more toroidal windings 21. Each toroidal winding 21 is considered as a racetrack, and the racetrack outline and size specifications of all toroidal windings 21 can be kept consistent, forming a concentric ring arrangement. A uniform insulation gap can be reserved between adjacent toroidal windings 21 to maintain electrical isolation between each toroidal winding 21 in the initial state, reducing the risk of short circuits.

[0047] The third connecting line 24 is a cross-turn conductive connection structure, which can also be made of polycrystalline silicon. It is connected across the gap between two adjacent inner and outer ring windings 21, connecting the isolated multiple ring windings 21 in series to form a complete multi-stage starting circuit. The multi-turn segmented winding structure allows for flexible adjustment of the resistance range of the starting winding 20 to adapt to the starting current requirements of devices with different power levels. The third connecting line 24, as a cross-turn conductive connection structure, simplifies the winding layout and improves the convenience of adjusting the resistance of the ring windings 21.

[0048] It should be noted that "misalignment" means that the connecting lines connecting the inner and outer sides of a loop of winding 21 are in different positions in the circumferential direction of the loop of winding 21. If these two connecting lines are aligned perpendicular to the circumferential direction, they belong to the same position.

[0049] This embodiment optimizes the layout of all conductive connections by employing a staggered arrangement to reduce the likelihood of circumferential alignment. This minimizes the possibility of current directly passing through the inner and outer sides of the toroidal winding 21 without passing through its effective resistance path, ensuring the effectiveness of the winding voltage divider circuit and optimizing the device's withstand voltage performance and long-term operational stability. Furthermore, it reduces the electric field and current concentration issues caused by concentrated connection placement, further optimizing the terminal electric field distribution of the power device and improving its long-term operational reliability.

[0050] In some embodiments, each turn of the annular winding 21 includes two parallel resistance lines 21R, and the two resistance lines 21R in at least one turn of the annular winding 21 have equal lengths, that is, the resistance values ​​of the two parallel resistors in one turn of the annular winding 21 are equal. Specifically, by adjusting the positions of the two connecting lines on one turn of the annular winding 21 to be symmetrical about the center of the active region 101, the lengths and resistance values ​​of the two resistance lines 21R can be made equal. In this way, the equal-length dual-branch parallel structure can balance the branch current distribution of a single turn of the winding, weakening the local heating problem caused by uneven current distribution.

[0051] For example, Figure 4 In the illustrated embodiment, the connecting lines on both sides of the outer three annular windings 21 are symmetrically arranged about the center of the active region 101. Specifically, from the inside to the outside, the two third connecting lines 24 connecting the inner and outer sides of the second annular winding 21 are symmetrical, so the lengths of its two resistance lines 21R are equal; the two third connecting lines 24 connecting the inner and outer sides of the third annular winding 21 are symmetrical, so the lengths of its two resistance lines 21R are equal; the third connecting lines 24 connecting the inner and outer sides of the fourth annular winding 21 and the second connecting line 23 are symmetrical, so the lengths of its two resistance lines 21R are equal.

[0052] Please see Figure 6 and Figure 7 , Figure 6 This is a top view schematic diagram of the power device provided in some embodiments of this application. Figure 3 , Figure 7 yes Figure 6 Equivalent circuit diagram of medium power devices.

[0053] In some embodiments, the start-up winding 20 includes a first winding group 20a, a second winding group 20b, and a plurality of third connecting lines 24. The first winding group 20a includes at least one turn of the annular winding 21, and the second winding group 20b includes at least one turn of the annular winding 21. The power device 100 further includes at least one back-to-back diode 30, which is located between the first winding group 20a and the second winding group 20b. The at least one back-to-back diode 30 is connected to the first winding group 20a and to the second winding group 20b respectively via a third connecting line 24. The third connecting lines 24 form a series conduction loop between the first winding group 20a, the back-to-back diode 30, and the second winding group 20b, allowing the back-to-back diode 30 to be connected to the main circuit of the start-up winding 20. Thus, while retaining the start-up winding 20, the back-to-back diode enhances the device's soft-start capability. The desired total winding resistance can be obtained by flexibly adjusting the number, area, or doping concentration of the back-to-back diodes 30. The back-to-back diodes 30 are preferably heavily doped.

[0054] It is understandable that the back-to-back diode 30 includes a forward diode and a reverse diode connected in series. It mainly introduces a delay time through carrier injection to suppress the inrush current and realize the soft start of the start-up transistor 10.

[0055] In some examples, an annular gap region 20c is reserved between the two sets of windings to provide an integration location for the back-to-back diode 30. The routing direction of the back-to-back diode 30 can be kept parallel to the annular winding 21. The back-to-back diode 30 can be co-layered with the start-up winding 20, and then the heavily doped back-to-back diode 30 can be fabricated by polysilicon selective ion implantation without the need for additional thin film deposition processes.

[0056] like Figure 6 As shown, a back-to-back diode 30 includes two second conductivity type doped structures 32 and a first conductivity type doped structure 31 located between the two second conductivity type doped structures 32. Taking a second conductivity type of P-type and a first conductivity type of N-type as an example, a back-to-back diode 30 can be represented as PNP. Optionally, taking an N-type second conductivity type and a P-type first conductivity type as an example, a back-to-back diode 30 can be represented as NPN.

[0057] This embodiment lists a plurality of back-to-back diodes 30, which are connected in series between the first winding group 20a and the second winding group 20b to form a diode group 30A, and two adjacent back-to-back diodes 30 connected in series share a second conductivity type doped structure 32.

[0058] Figure 6 and Figure 7 The example illustrates a diode group of 30A. Figure 6 Between the first winding group 20a and the second winding group 20b, a second conductivity type doped structure 32, a first conductivity type doped structure 31, a second conductivity type doped structure 32, a first conductivity type doped structure 31, a second conductivity type doped structure 32, a first conductivity type doped structure 31, a second conductivity type doped structure 32, a first conductivity type doped structure 31, a second conductivity type doped structure 32, are arranged sequentially, which can be represented as PNPNPNP. A PNP structure forms a back-to-back diode 30, and three back-to-back diodes 30 are connected in series (e.g., ...). Figure 7 As shown in the figure, the two back-to-back diodes 30 connected in series share a single P-type diode. This shared doped structure simplifies the photolithography pattern, reduces ion implantation steps, and optimizes process costs.

[0059] In some embodiments, the number of diode groups 30A is one (e.g., Figure 6 and Figure 7 As shown, both the first conductivity type doped structure 31 and the second conductivity type doped structure 32 are ring-shaped and arranged parallel to the ring winding 21. This allows the diode doped structure to fit the overall layout of the ring winding 21, adapting to the integrated polycrystalline silicon fabrication process.

[0060] In some embodiments, the annular winding 21, the first conductivity type doped structure 31, and the second conductivity type doped structure 32 are all polysilicon windings. Therefore, the two types of doped structures, the annular winding 21 and the back-to-back diode 30, can be fabricated using the same polysilicon thin film. The doping type and concentration can be distinguished only by selective ion implantation, without the need for additional thin film deposition and photolithography processes, resulting in excellent process compatibility.

[0061] In some examples, the doping concentration of the toroidal winding 21 is lower than that of the first conductivity type doped structure 31 and the second conductivity type doped structure 32. That is, regardless of the conductivity type of ions doped in the toroidal winding 21, the doping structure of the back-to-back diode 30 uses a relatively high doping concentration to ensure that sufficient start-up current can still be generated under low voltage conditions.

[0062] Please see Figure 8 and Figure 9 , Figure 8 This is a top view schematic diagram of the power device provided in some embodiments of this application. Figure 4 , Figure 9 yes Figure 8 Equivalent circuit diagram of medium power devices.

[0063] The diode groups 30A are multiple, and are connected in parallel between the first winding group 20a and the second winding group 20b, and are spaced apart along the annular interval 20c between the first winding group 20a and the second winding group 20b. This forms multiple independent adjustment branches, which can further widen the winding resistance adjustment range and adapt to diverse starting current design requirements.

[0064] In some embodiments, the plurality of second conductivity type doped structures 32 in the plurality of diode groups 30A are all connected to form a ring structure 32a, so that the potentials at both ends of all parallel branches are kept uniform. The plurality of first conductivity type doped structures 31 in the plurality of diode groups 30A are arranged at intervals along the ring region 32b between two adjacent ring structures 32a, and the first conductivity type doped structures 31 of different branches are disconnected from each other and not connected to each other, so as to form a plurality of diode groups 30A in parallel.

[0065] It should be noted that, Figure 8 The example shows four 30A diode groups connected in parallel. Figure 9 Only two 30A diode groups connected in parallel are shown, and Figure 9 The number of series back-to-back diodes in diode group 30A has been simplified. The number of series back-to-back diodes 30 in each diode group 30A can be referred to... Figure 7 .

[0066] In some embodiments, since Figure 6 and Figure 8 In the embodiments, the second conductivity type doped structures 32 are all ring structures 32a and are evenly spaced between the ring windings 21. Therefore, when the doping type of the ring windings 21 is the second conductivity type, all the ring structures 32a and the ring windings 21 can use the same type of doping ions to optimize the doping process. Only the doping concentration of the ring structures 32a needs to be increased.

[0067] Please see Figure 10 and Figure 11 , Figure 10 This is a top view schematic diagram of the power device provided in some embodiments of this application. Figure 5 , Figure 11 This is a top view schematic diagram of the power device provided in some embodiments of this application. Figure 6 .

[0068] The power device 100 further includes a floating metal field plate 40, which at least completely covers the gaps between the polysilicon windings and overlaps with the edges of the polysilicon windings. The floating metal field plate 40 is used to optimize the electric field shielding capability of the termination region 102, improving the device's withstand voltage and long-term reliability. For example, the floating metal field plate 40 is used to shield electric field spikes caused by positive charges introduced by the upper molding layer, etc.

[0069] The floating metal field plate 40 is a suspended metal thin film structure without potential connection. It is laid on the surface of the insulating dielectric layer above the polycrystalline silicon winding, completely covering the interval area between adjacent polycrystalline silicon windings. The metal edge and the edge of the polycrystalline silicon winding form a moderate overlap and coverage, achieving full-area shielding.

[0070] Figure 10 The illustrated embodiment is in Figure 6 Based on the embodiment, a floating metal field plate 40 is added. The polysilicon windings are all in the shape of rings. Correspondingly, the spacer area between the corresponding rings of the floating metal field plate 40 is also set as a ring to weaken the electric field concentration phenomenon in the spacer area, so that the electric field distribution in the whole area is more uniform and effectively improves the device's withstand voltage performance and long-term working stability.

[0071] Figure 11 The illustrated embodiment is in Figure 8 Based on this, a floating metal field plate 40 is added. The polysilicon winding is mostly ring-shaped, with some segments (such as the first conductivity type doped structure 31). The floating metal field plate 40 is also set in the interval region between the polysilicon windings. In other words, the layout structure of the floating metal field plate 40 is adapted to the layout structure of the polysilicon winding, which can effectively shield the electric field spikes caused by positive charges introduced by the molding layer, etc.

[0072] Understandably, in Figure 1 In the embodiments, due to the asymmetry of the spiral polysilicon winding, the designed floating metal field plate is difficult to adapt to the spiral winding, limiting the complete coverage of the polysilicon edge by the floating metal field plate, thus further restricting device reliability. In other embodiments provided in this application (such as...) Figure 10 and Figure 11 As shown in the figure, the symmetrically arranged polysilicon windings are adapted to the symmetrically distributed floating metal field plates 40, so that the floating metal field plates 40 uniformly cover the edges of the polysilicon to improve device reliability.

[0073] Please see Figure 12 , Figure 12 This is an equivalent circuit diagram of a power device provided in some embodiments of this application.

[0074] The power device 100 also includes a power transistor 50 and a sampling transistor 60. The power transistor 50 is used for power conversion, and the sampling transistor 60 is used for sampling the current flowing through the power transistor 50. The drains of the power transistor (D2), the sampling transistor (D3), and the start-up transistor (D1) are interconnected and uniformly connected to the drain terminal D of the device, achieving a shared drain potential. The sources of the power transistor (S2), the sampling transistor (S3), and the start-up transistor (S1) are independent, zoned, and individually led out, forming independent current branches that do not interfere with each other. The start-up winding 20 is connected between the drain terminal D and the start-up transistor gate G1, and the sampling transistor gate G3 is electrically connected to the power transistor gate G2.

[0075] The entire control process includes three stages: power-on startup, oscillation drive, and normal operation. The specific control logic is as follows: During power-on, a high-voltage input voltage is connected to the drain terminal D of the device. This high voltage provides a drive voltage to the gate G1 of the startup transistor via the startup winding 20, causing the startup transistor 10 to conduct first. The turned-on startup transistor 10 provides the initial power supply voltage to the VCC pin of the external control circuit, waking up the internal control logic of the external control circuit and putting it into operation. During oscillation, the awakened external control circuit outputs a pulse width modulation (PWM) drive signal, controlling the gate G2 of the power transistor to turn on, and the circuit enters an open-loop oscillation state. During normal operation, the transformer auxiliary winding establishes a stable power supply voltage, continuously supplying power to the VCC of the external control circuit. At this time, the startup transistor 10 completes its power-on mission and turns off. The gate G2 of the power transistor continuously switches at high frequency to achieve energy transfer between electrical and magnetic energy. Simultaneously, the sampling transistor 60 samples the main circuit operating current in real time and feeds the sampling signal back to the external control circuit to adjust the PWM signal of the gate G2 of the power transistor.

[0076] In the description of this application, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include one or more features. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0077] In the above embodiments, the descriptions of each embodiment have different focuses. For parts not described in detail in a certain embodiment, please refer to the relevant descriptions in other embodiments.

[0078] The embodiments, implementation methods, and related technical features of this application can be combined and substituted for each other without conflict.

[0079] The above are merely preferred embodiments of this application and are not intended to limit this application in any way. Any simple modifications, equivalent changes, and alterations made to the above embodiments based on the technical essence of this application without departing from the scope of the technical solution of this application shall still fall within the scope of the technical solution of this application.

Claims

1. A power device (100), characterized in that, include: Start-up tube (10); The starting winding (20) includes at least one turn of annular winding (21), each turn of said annular winding (21) being configured to close around the periphery of the starting tube (10); The starting winding (20) is connected between the drain terminal (D) and the gate of the starting transistor (G1). The outer side of the starting winding (20) is electrically connected to the drain terminal (D), and the inner side of the starting winding (20) is electrically connected to the gate of the starting transistor (G1).

2. The power device (100) according to claim 1, characterized in that, The starting winding (20) also includes: The first connecting line (22) is connected between the gate of the starting tube (G1) and the inner side of the starting winding (20); The second connecting line (23) is connected between the drain end (D) and the outside of the starting winding (20).

3. The power device (100) according to claim 2, characterized in that, The starting winding (20) includes multiple turns of the annular winding (21) arranged parallel to each other and spaced apart, with adjacent turns of the annular winding (21) electrically connected.

4. The power device (100) according to claim 3, characterized in that, The starting winding (20) also includes at least one third connecting line (24), and two adjacent turns of the annular winding (21) are connected by one of the third connecting lines (24); The third connecting line (24) connected to the outermost annular winding (21) is offset from the second connecting line (23) in the circumferential direction of the annular winding (21); the third connecting line (24) connected to the innermost annular winding (21) is offset from the first connecting line (22) in the circumferential direction; the two third connecting lines (24) connected to the middle annular winding (21) are offset in the circumferential direction.

5. The power device (100) according to any one of claims 1 to 4, characterized in that, Each turn of the annular winding (21) includes two parallel resistance wires (21R), and the two resistance wires (21R) in at least one turn of the annular winding (21) are of equal length.

6. The power device (100) according to claim 3, characterized in that, The starting winding (20) includes a first winding group (20a), a second winding group (20b), and a plurality of third connecting wires (24). The first winding group (20a) includes at least one turn of the annular winding (21), and the second winding group (20b) includes at least one turn of the annular winding (21). The power device (100) further includes: At least one back-to-back diode (30) is located between the first winding group (20a) and the second winding group (20b); The at least one back-to-back diode (30) is connected to the first winding group (20a) and the at least one back-to-back diode (30) is connected to the second winding group (20b) respectively via a third connecting line (24).

7. The power device (100) according to claim 6, characterized in that, One of the back-to-back diodes (30) includes two second conductivity type doped structures (32) and a first conductivity type doped structure (31) located between the two second conductivity type doped structures (32).

8. The power device (100) according to claim 7, characterized in that, Multiple back-to-back diodes (30) are connected in series between the first winding group (20a) and the second winding group (20b) to form a diode group (30A), and two adjacent back-to-back diodes (30) connected in series share a second conductivity type doped structure (32).

9. The power device (100) according to claim 8, characterized in that, The number of diode groups (30A) is one. The first conductivity type doped structure (31) and the second conductivity type doped structure (32) are both ring-shaped and arranged parallel to the ring winding (21).

10. The power device (100) according to claim 8, characterized in that, The number of diode groups (30A) is multiple, and the multiple diode groups (30A) are connected in parallel between the first winding group (20a) and the second winding group (20b), and are spaced apart along the annular interval (20c) between the first winding group (20a) and the second winding group (20b).

11. The power device (100) according to claim 10, characterized in that, The multiple second conductivity type doped structures (32) in the multiple diode groups (30A) are all connected to form a ring structure (32a); the multiple first conductivity type doped structures (31) in the multiple diode groups (30A) are arranged at intervals along the ring region (32b) between two adjacent ring structures (32a).

12. The power device (100) according to claim 7, characterized in that, The annular winding (21), the first conductivity type doped structure (31), and the second conductivity type doped structure (32) are all polycrystalline silicon windings; the doping concentration of the first conductivity type doped structure (31) and the second conductivity type doped structure (32) is greater than the doping concentration of the annular winding (21).

13. The power device (100) according to claim 12, characterized in that, The power device (100) also includes: The active region (101) and the terminal region (102) surrounding the active region (101) are located on the terminal region (102); the starting winding (20) and the back-to-back diode (30) are both located on the terminal region (102); A floating metal field plate (40) is provided, which at least covers the gap between the polysilicon windings and overlaps with the edges of the polysilicon windings.

14. The power device (100) according to claim 13, characterized in that, It also includes a power transistor (50) and a sampling transistor (60), the power transistor (50) being used for power conversion and the sampling transistor (60) being used for sampling the current flowing through the power transistor (50).