Current-limiting and current-sharing control circuit and method, and direct current converter system

Abstract

The application provides a current-limiting and current-sharing control circuit and method, and a direct-current converter system. A current sampling module collects a sampling current flowing through an inductor direct-current resistor; a temperature compensation circuit senses a current temperature of the inductor in real time and generates a temperature compensation voltage, and a dynamic upper clamping circuit dynamically adjusts an upper clamping voltage of an error voltage output by an error amplifier according to the temperature compensation voltage; a current-sharing correction circuit obtains a slope compensation current, and converts the error voltage clamped by the upper clamping voltage into an error current; a PWM comparator circuit outputs a PWM control signal to determine an off time of duty cycle modulation according to the sampling current, the slope compensation current and the error current; and the upper clamping voltage is adjusted by the dynamic upper clamping circuit according to the temperature compensation voltage, so that a temperature variation slope of the upper clamping voltage is consistent with a temperature slope of the direct-current resistor, the temperature characteristics of the direct-current resistor are adaptively tracked, and the system current limit can be maintained stable in a full temperature range.

Description

Technical Field

[0001] This application belongs to the field of integrated circuit technology, and particularly relates to a current limiting and current sharing control circuit and a current limiting and current sharing control method, and a DC-DC converter system. Background Technology

[0002] The direct current resistance (DCR) of an inductor has been widely used in various power supply applications due to its characteristics of lossless power delivery and no sampling blanking time. However, because the temperature drift of the inductor's DCR varies greatly with temperature, and because DCR sampling is widely used in high-current power supply applications, new requirements are placed on current limiting control strategies.

[0003] Taking the traditional peak current mode architecture as an example, the clamping voltage of a conventional error amplifier (EA) remains largely unchanged with temperature. Even with built-in temperature compensation, significant fluctuations occur due to manufacturing process variations and mismatches. Its temperature compensation curve cannot adaptively track the temperature characteristics of the inductor's DC resistance, making it difficult to adapt to the temperature characteristics of different types of power inductors. In multi-channel parallel applications, the DCR sampling of the inductor is affected by process variations, mismatches, and factors such as different batches of wafers and devices, package support, and package parasitics, impacting the consistency of current sharing across multiple parallel channels. Summary of the Invention

[0004] The purpose of this application is to provide a current limiting and current sharing control circuit and a current limiting and current sharing control method, as well as a DC-DC converter system, in order to solve the problem that traditional current limiting and current sharing control schemes cannot adaptively track the temperature characteristics of the DC resistance of the inductor.

[0005] The first aspect of this application provides a current limiting and current sharing control circuit, which is used for current limiting and current sharing control of the inductor current of any channel in a DC-DC converter system. The current limiting and current sharing control circuit includes: The current sampling module is used to sample the current flowing through the DC resistor of the inductor to obtain the sampled current; A temperature compensation circuit is used to determine a multi-bit temperature compensation control signal based on the current temperature of the inductor, and to compensate for the temperature voltage based on the multi-bit temperature compensation control signal. The current sharing correction circuit is used to provide slope compensation current according to the preset slope compensation voltage; A dynamic upper clamping circuit, connected to the temperature compensation circuit and the current sharing correction circuit, is used to perform temperature compensation on the ramp compensation current based on the temperature compensation voltage, generate a dynamic clamping voltage related to the duty cycle, and determine the upper clamping voltage based on the dynamic clamping voltage; the current sharing correction circuit is also connected to the dynamic clamping circuit, and is used to convert the error voltage clamped by the upper clamping voltage into an error current. The PWM comparator circuit is connected to the current sharing correction circuit and the current sampling module. The PWM comparator circuit is used to perform comparison operations based on the sampled current, the ramp compensation current, and the error current, and output a PWM control signal to determine the off-time of the duty cycle modulation.

[0006] In some embodiments of this application, the current sharing correction circuit includes: a first conversion module for converting the slope compensation voltage into the original slope compensation current; a zero-adjustment current module for generating a zero-adjustment current based on the zero-load initial operating point voltage; an adder connected to the first conversion module and the zero-adjustment current module for calculating the sum of the original slope compensation current and the zero-adjustment current to obtain the slope compensation current; and a second conversion module for converting the error voltage into the error current; wherein the conversion gain of the first conversion module and the second conversion module is adjustable.

[0007] In some embodiments of this application, the temperature compensation circuit includes: a numerical multiplier for calculating a compensation value based on the product of the temperature coefficient of the DC resistance, the DC resistance value at a preset temperature, the system current limit, the current sharing correction coefficient, and the current temperature; a temperature compensation lookup table module connected to the numerical multiplier for looking up a temperature compensation lookup table based on the compensation value to obtain a multi-bit temperature compensation control signal; and a voltage stepping circuit connected to the dynamic upper clamping circuit and the temperature compensation lookup table module for outputting the temperature compensation voltage based on the multi-bit temperature compensation control signal.

[0008] In some embodiments of this application, the voltage stepping circuit includes: a first resistor connected between a first node and a second node, the first node being a clamping reference voltage node connected to the dynamic upper clamping circuit; a resistor divider chain connected between the second node and ground, consisting of multiple second resistors connected in series and then connected in series with a third resistor to ground, the equivalent impedance at the second node being the resistance value of the second resistor; multiple sets of switch branches, each set of switch branches including a branch resistor and a complementary switch; one end of the branch resistor is connected to any end of any second resistor, the other end of the branch resistor is connected to the common terminal of the complementary switch, and the two ends of the complementary switch group are respectively connected to ground and the supply voltage; wherein, the equivalent resistance between the first node and ground is configured as the sum of the first resistor and the second resistor, and the supply voltage is configured as the minimum resolution of the compensation value and (2) N The product of -1), where N is the number of switch branches.

[0009] In some embodiments of this application, the current limiting and current sharing control circuit further includes a logic control circuit connected to the output of the PWM comparator circuit; the logic control circuit is used to receive a clock signal and a PWM control signal, and to turn on the channel where the inductor is located when the clock signal is valid, and to turn off the channel where the inductor is located when the PWM control signal is valid.

[0010] A second aspect of this application provides a current limiting and current sharing control method applied to the aforementioned current limiting and current sharing control circuit. The method includes: sampling the current flowing through the DC resistance of an inductor to obtain a sampled current; acquiring the current temperature of the inductor, determining a multi-bit temperature compensation control signal based on the current temperature and the DC resistance parameters of the inductor, and acquiring a temperature compensation voltage based on the multi-bit temperature compensation control signal; acquiring a ramp compensation current based on a preset ramp compensation voltage, and performing temperature compensation on the ramp compensation current based on the temperature compensation voltage to generate a dynamic clamping voltage related to the duty cycle; determining an upper clamping voltage based on the dynamic clamping voltage to clamp the error voltage, and converting the clamped error voltage into an error current; performing a comparison operation based on the sampled current, the ramp compensation current, and the error current, and outputting a PWM control signal to determine the duty cycle modulation off-time.

[0011] In some embodiments of this application, determining a multi-position temperature compensation control signal based on the current temperature and the DC resistance parameters of the inductor, and obtaining a temperature compensation voltage based on the multi-position temperature compensation control signal, includes: calculating a compensation value based on the current temperature and the DC resistance parameters of the inductor; searching a temperature compensation lookup table based on the compensation value to obtain the multi-position temperature compensation control signal; and obtaining the temperature compensation voltage based on the multi-position temperature compensation control signal while keeping the equivalent impedance of the clamping reference voltage node unchanged.

[0012] In some embodiments of this application, before determining a multi-bit temperature compensation control signal based on the current temperature and the DC resistance parameter of the inductor, and before obtaining the temperature compensation voltage based on the multi-bit temperature compensation control signal, the method includes: constructing a temperature compensation lookup table, specifically including: dividing the entire temperature range into 2... N Each segmented interval corresponds to a switch code value. Any of the switch code values ​​is used to indicate a multi-bit temperature compensation control signal, where N is an integer greater than or equal to 1. For any segmented interval, the product of the system current limit, the current sharing correction coefficient, and the equivalent sampling resistance at the corresponding temperature is calculated to obtain the compensation value corresponding to the segmented interval. A temperature compensation lookup table is generated based on the segmented interval, the switch code value, and the compensation value.

[0013] In some embodiments of this application, the method further includes: sequentially correcting multiple parameters in the current limiting and current sharing control circuit to make the linear functional relationship between the error voltage and the load current more consistent, specifically including: detecting whether the slope compensation slope meets the preset requirements; if not, correcting the conversion gain of the first conversion module; detecting whether the equivalent sampling resistance meets the preset requirements; if not, correcting the sampling gain of the PWM comparator circuit; detecting whether the zero-load initial operating point voltage meets the preset requirements; if not, correcting the zero-adjustment current output by the zero-adjustment current module; detecting whether the DC resistance of the inductor meets the preset requirements; if not, correcting the current sharing correction coefficient of the temperature compensation lookup table module.

[0014] A third aspect of this application provides a DC-DC converter system, comprising: multiple DC output channels and multiple current limiting and current sharing control circuits connected one-to-one with each channel, wherein each channel includes a first switching element, a second switching element, and an inductor; the first switching element and the second switching element are connected in series between the input terminal and ground, and the current limiting and current sharing control circuit is connected to the control terminals of the first switching element and the second switching element; one end of the inductor is connected between the first switching element and the second switching element, and the other end is the output terminal.

[0015] The beneficial effects of this invention embodiment compared with the prior art are as follows: The above-mentioned current limiting and current sharing control circuit includes: a current sampling module, a temperature compensation circuit, a dynamic upper clamping circuit, a current sharing correction circuit, and a PWM comparator circuit; the current sampling module collects the sampling current flowing through the DC resistance of the inductor; the temperature compensation circuit senses the current temperature of the inductor in real time and determines the multi-bit temperature compensation control signal, and obtains the temperature compensation voltage according to the multi-bit temperature compensation control signal; the dynamic upper clamping circuit dynamically adjusts the upper clamping voltage of the error voltage output by the error amplifier accordingly, so that the temperature change slope of the upper clamping voltage is consistent with the temperature slope of the DC resistance of the inductor, thereby maintaining the stability of the system current limit across the entire temperature range; the current sharing correction circuit corrects the control parameters of each channel through adjustable conversion gain and zero-adjustment current, ensuring the consistency of current sharing when multiple channels are connected in parallel, and the modules work together to form a complete peak current mode control closed loop. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the structure of a DC-DC converter system provided in an embodiment of this application; Figure 2 This is a schematic diagram of the current limiting and current sharing control circuit provided in an embodiment of this application; Figure 3 A schematic diagram of the current limiting and current sharing control circuit provided in another embodiment of this application; Figure 4 for Figure 3 The circuit diagram of the dynamic upper clamping circuit in the current limiting and current sharing control circuit shown; Figure 5 for Figure 3 The circuit diagram of the temperature compensation circuit in the current limiting and current sharing control circuit shown. Figure 6 A detailed flowchart of a current limiting and current sharing control method provided in an embodiment of this application; Figure 7 This is a schematic diagram comparing the current limiting using a DC resistor with and without N-position temperature compensation. Figure 8 for Figure 3 The flowchart shown is a detailed process for adjusting and correcting the parameters of the current limiting and current sharing control circuit. Detailed Implementation

[0017] To make the technical problems, technical solutions, and beneficial effects to be solved by this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and are not intended to limit the scope of this application.

[0018] It should be noted that when a component is referred to as being "fixed to" or "set on" another component, it can be directly on or indirectly on that other component. When a component is referred to as being "connected to" another component, it can be directly connected to or indirectly connected to that other component.

[0019] It should be understood that the terms "length", "width", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0020] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of this application, "multiple" means two or more, unless otherwise explicitly specified.

[0021] The DC resistance (DCR) of an inductor has been widely used in various power supply applications due to its lossless power delivery and lack of sampling blanking time. However, because the DC resistance of an inductor exhibits significant temperature drift with temperature variations, and DC sampling is widely used in high-current power supplies, new requirements are placed on current limiting control strategies. In particular, in scenarios where power inductors utilize bracket packaging or inductor packaging with significant differences in parasitic impedance, it is necessary to compensate for differences in current limiting and current sharing control caused by environmental and manufacturing factors.

[0022] Taking the traditional peak current mode architecture as an example, peak current mode is widely used due to its advantages such as simple structure, fast transient response, and loop compensation. The output voltage of a traditional error amplifier (EA) operational amplifier, coupled with a clamping operational amplifier, means that the clamping operational amplifier voltage remains largely unchanged with temperature or cannot adapt to the temperature coefficient of the DCR (Distributed Current Regulator). This leads to drastic changes in the system's current limiting with temperature, restricting the system's extreme operating conditions. Even with built-in temperature compensation, significant fluctuations still occur due to process variations and mismatches in actual manufacturing. Furthermore, its temperature compensation curve is difficult to adapt to different types of power inductors, limiting its application.

[0023] Inductor DCR sampling, due to its lossless nature, is often used in multi-channel parallel connection in scenarios with high current output. However, due to process deviations, mismatches, and factors such as package brackets and package parasitics from different batches of wafers and devices, the current sharing consistency of multi-channel parallel connection in the system is affected.

[0024] Figure 1 A schematic diagram of a DC-DC converter system provided in an embodiment of this application is shown. The current-limiting and current-sharing control circuit in this embodiment is used for current-limiting and current-sharing control of the inductor current in any channel of the DC-DC converter system. The DC-DC converter system can be a boost DC-DC converter system, a buck DC-DC converter system, or a boost-buck DC-DC converter system. See also... Figure 1 The DC-DC converter system may include multiple DC output channels 00 and multiple current limiting and current sharing control circuits 10 connected one-to-one with each channel. Each channel 00 uses a corresponding current limiting and current sharing control circuit 10 for current regulation. Channel 00 includes: a first switching element S H Second switching element S L And inductor L. First switching element S H Second switching element S L The current limiting and current sharing control circuit 10 is connected in series between the input terminal and ground, and the first switching element S H Second switching element S L The control terminal is connected; one end of the inductor L is connected to the first switching element S. H Second switching element S L The first end connects to node SW, and the second end is the output terminal, used to output the output voltage V of this channel. OUT The inductor L has a parasitic DC resistance R. DCR Output capacitor C is connected in parallel at the output terminal. OUT First switching element S H Second switching element S L It can be a semiconductor switching transistor, for example, the first switching element S. H Second switching element S L It is a MOSFET.

[0025] At the same time, the first switching element S H Second switching element S L Only one of them can be turned on; both cannot be turned on simultaneously. The input terminal provides an input voltage V. IN The current limiting and current sharing control circuit 10 controls the first switching element S. H When turned on, the input voltage V IN The input is fed into inductor L, which stores energy and outputs the corresponding output voltage V. OUTTo drive the load. The current limiting and current sharing control circuit 10 controls the first switching element S. H When the circuit is turned on, the inductor L reduces its stored energy. This is achieved by controlling the first switching element S. H Second switching element S L The on and off times of the switch can be adjusted to regulate the current in the channel. For example, adding a second switching element S... L The turn-off time, i.e., the increase of the first switching element S H The conduction time of the second switching element S can increase the current in the channel; conversely, it reduces the conduction time of the second switching element S. L The turn-off time, i.e., reducing the first switching element S H The conduction time can reduce the current in the channel.

[0026] The current limiting and current sharing control circuit 10 controls the DC resistance R flowing through the inductor L. DCR The current is sampled to obtain the sampled current, and the current temperature T of the DC-DC converter system is obtained. Based on the current temperature T and the DC resistance parameters of the inductor L, a multi-position temperature compensation control signal is determined, and a temperature compensation voltage is obtained based on the multi-position temperature compensation control signal. Simultaneously, a ramp compensation current is obtained based on a preset ramp compensation voltage. Then, temperature compensation is performed on the ramp compensation current based on the temperature compensation voltage to generate a dynamic clamping voltage related to the duty cycle. The upper clamping voltage V of the error voltage of any channel is determined based on the dynamic clamping voltage. EACLAMP To clamp the error voltage, the clamped error voltage V EA Converted to error current I EA According to the sampling current, the slope compensation current, and the error current I EA A comparison operation is performed, and the output PWM control signal determines the off-time of the duty cycle modulation. The error voltage is the output voltage V of the applied error amplifier for this channel. OUT The error voltage is the amplified difference from the reference voltage. The current limiting and current sharing control circuit 10 controls the first switching element S by outputting a PWM control signal. H Second switching element S L The switching on and off of the circuit enables the transfer and regulation of energy from the input end to the output end.

[0027] See Figure 2 The current limiting and current sharing control circuit 10 includes: a current sampling module 100, a temperature compensation circuit 101, a dynamic upper clamping circuit 102, a current sharing correction circuit 103, and a PWM comparator circuit 104. The dynamic upper clamping circuit 102 is connected to the temperature compensation circuit 101; the current sharing correction circuit 103 is connected to the dynamic upper clamping circuit 102; and the PWM comparator circuit 104 is connected to the current sharing correction circuit 103 and the current sampling module 100.

[0028] The current sampling module 100 is used to sample the current flowing through the inductor and the DC resistance R. DCR The current is sampled to obtain the sampled current; the temperature compensation circuit 101 is used to determine the multi-bit temperature compensation control signal based on the current temperature of the inductor, and to obtain the temperature compensation voltage based on the multi-bit temperature compensation control signal; the current sharing correction circuit 103 is used to obtain the temperature compensation voltage based on the preset ramp compensation voltage V. SLOPE The slope compensation current is obtained; the dynamic upper clamping circuit 102 is used to perform temperature compensation on the slope compensation current based on the temperature compensation voltage, and generate a dynamic clamping voltage V related to the duty cycle. A And determine the upper clamping voltage V based on the dynamic clamping voltage. EACLAMP The current sharing correction circuit 103 is also used to convert the clamped voltage V EACLAMP Error voltage V after clamping EA Converted to error current I EA The PWM comparator circuit 104 is used to calculate the sampling current, slope compensation current, and error current I. EA Perform a comparison operation and output a PWM control signal to determine the off-time of the duty cycle modulation.

[0029] It is understood that the current sampling module 100 may include a comparator, the input of which is connected to the inductor-DC resistor R. DCR The two ends of the inductor and the DC resistor R are connected by a comparator. DCR The voltage across the terminals is converted into current and amplified to obtain the sampling current.

[0030] The PWM comparator circuit 104 calculates the sum of the sampling current and the slope compensation current, and subtracts the error current I. EA The signal is then amplified to obtain the PWM control signal.

[0031] Through the coordinated operation of the above modules, the temperature compensation circuit 101 senses the current temperature of the inductor in real time and generates a temperature compensation voltage. The dynamic clamping circuit 102 dynamically adjusts the clamping voltage of the error voltage accordingly, so that the temperature change slope of the clamping voltage is consistent with the temperature slope of the DC resistance of the inductor, thereby maintaining the stability of the system current limit across the entire temperature range and ensuring the consistency of current sharing when multiple channels are connected in parallel.

[0032] The current limiting and current sharing control circuit 10 includes an error amplifier 105, used to convert the output voltage V of the channel into voltage. OUT The error voltage between the reference voltage and the output voltage is amplified for subsequent current limiting and current sharing adjustments.

[0033] In some embodiments of this application, see Figure 3 The current sharing correction circuit 103 includes: a first conversion module 1031, a zero-current module 1032, an adder 1033, and a second conversion module 1034.

[0034] The first conversion module 1031 is used to convert the slope compensation voltage V SLOPE Converted to the original slope compensation current I SLOPE The zero-current adjustment module 1032 is used to adjust the zero-load initial operating point voltage V. EA0 Generate zero-adjustment current I B Adder 1033 is connected to the first conversion module 1031 and the zero-adjustment current module 1032, and is used to calculate the slope compensation current I. SLOPE With zero-adjustment current I B The sum of these values ​​yields the slope compensation current; the second conversion module 1034 is used to convert the error voltage V... EA Converted to error current I EA The first conversion module 1031 and the second conversion module 1034 have the same conversion gain 1 / Rea, and are adjustable. The first conversion module 1031 and the second conversion module 1034 implement the voltage-to-current function, sending the obtained current to the PWM comparator circuit 104, and the ramp compensation current to the PWM comparator circuit 104 and the dynamic upper clamping circuit 102.

[0035] By adjusting the conversion gain of the first conversion module 1031 and the second conversion module 1032, the inconsistency of the slope compensation slope caused by process deviation between different channels can be corrected; by correcting the zero-load initial operating point voltage by adjusting the zero current module 1033, the difference in the initial bias of the error voltage of each channel can be eliminated, so that the linear function relationship between the error voltage of each channel and the load current tends to be consistent.

[0036] In some embodiments of this application, see Figure 4 The dynamic clamping circuit 102 includes: a first switch PM1, a second switch PM2, a third switch NM2, a fourth switch NM3, a fifth switch NM1, a first current mirror I1, and a second current mirror I2.

[0037] The first terminal of the third switching transistor NM2 is connected to the temperature compensation circuit 101 and the current sharing correction circuit 103 to receive the dynamic clamping voltage V. AThe second terminal of the third switch NM2 is connected to the first terminals of the first switch PM1 and PM1, and the first terminal of the first switch PM1 is connected to the first terminal of the second switch PM2. The first terminal of the fifth switch NM1 is connected to the second terminal of the second switch PM2, and the second terminal of the fifth switch NM1 is connected to the third terminal of the first switch PM1 and the third terminal of the second switch PM2. The first terminal of the fourth switch NM3 is connected to the third terminal of the fifth switch NM1 and the positive terminal of the second current mirror I2. The third terminals of the third switch NM2 and the third terminals of the fourth switch NM3 are connected to the positive terminal of the first current mirror I1, and the negative terminals of the first current mirror I1 and the second current mirror I2 are grounded. The first terminal of the fourth switch NM3 outputs an upper clamping voltage V. EACLAMP .

[0038] It should be noted that the first switch PM1 and the second switch PM2 are preferably PMOS transistors, and the third switch NM2, the fourth switch NM3 and the fifth switch NM1 are preferably NMOS transistors. The first terminal of each switch is the gate, the second terminal is the drain, and the third terminal is the source.

[0039] Original slope compensation current I SLOPE It will be detected cycle by cycle to obtain a current related to the duty cycle D. After passing through the dynamic upper clamping circuit 102, the resulting upper clamping voltage V is obtained. EACLAMP It will change with the duty cycle D. The second current mirror I2 has a very small leakage current when it is working normally, ensuring that it can recover normally when the duty cycle changes from large to small.

[0040] The current limiting and current sharing control circuit 10 includes a compensation network 106, which includes a first compensation resistor Rz and a first compensation capacitor Cc. One end of the first compensation resistor Rz is connected to the first terminal of the fourth switching transistor NM3, and the other end of the first compensation resistor Rz is grounded through the compensation capacitor Cc. The first compensation resistor Rz and the first compensation resistor Cc are connected in series to clamp the voltage V. EACLAMP Perform zero-pole compensation. The upper clamping voltage V after zero-pole compensation. EACLAMP Determine the error voltage V EA The highest voltage limit. In the current mode, it can be determined based on the error voltage V. EA The maximum voltage limit determines the maximum current limit. After introducing the ramp current signal, the error voltage V... EA The maximum voltage limit will be determined by the duty cycle D and the maximum load current. After passing through the dynamic upper clamping circuit 102, the error voltage V can be achieved. EA The maximum voltage limit is determined solely by the maximum load current.

[0041] Dynamic clamping voltage V A The upper clamping voltage V obtained after passing through the dynamic upper clamping circuit 102EACLAMP Its voltage value increases with the increase of the duty cycle D, and the upper clamping voltage V EACLAMP It possesses information to dynamically maintain the maximum duty cycle D, and when the duty cycle D does not increase for a relatively long period of time, or no longer continues to increase, the upper clamping voltage V... EACLAMP It can naturally discharge to the maximum voltage value required for the current duty cycle D.

[0042] It should be noted that, please continue to refer to Figure 4 The dynamic clamping voltage V input to the traditional dynamic upper clamping circuit A equals (I) B +I SLOPE Re, which does not change with temperature, cannot adapt to the DC resistance R of the inductor L. DCR The temperature coefficient of the system will cause the current limiting of the system to change drastically with temperature, thus limiting the system's extreme adaptability to operating conditions.

[0043] In order to make the dynamic clamping voltage V A The DC resistance R of the inductor L is adaptive. DCR In some embodiments of this application, the temperature coefficient can be adjusted by the temperature compensation circuit 101 to control the dynamic clamping voltage V. A See also Figure 5 The temperature compensation circuit 101 includes: a numerical multiplier 111, a temperature compensation lookup table module 112, and a voltage stepping circuit 113.

[0044] The numerical multiplier 111 is used to calculate the DC resistance value R based on the temperature coefficient Tc of the DC resistance and the preset temperature. DCR System current limit Ioc, current sharing correction factor K DCR The product of the current temperature T and the compensation value OUT is obtained. The temperature compensation lookup table module 112 is connected to the numerical multiplier 111 and is used to look up the temperature compensation lookup table based on the compensation value OUT to obtain the multi-bit temperature compensation control signal s. i The voltage stepping circuit 113 is connected to the dynamic upper clamping circuit 102 and the temperature compensation lookup table module 112, and is used to adjust the voltage based on the multi-bit temperature compensation control signal s. i Output temperature-compensated voltage to compensate for dynamic clamping voltage V. A Multi-bit temperature compensation is performed. Here, i = 0, ..., N, where N is an integer greater than or equal to 1, representing the number of bits used for temperature compensation. This application uses N = 4 as an example for illustration.

[0045] It should be explained that the preset temperature can be the ambient temperature of the inductor L, preferably 27°C. This is related to the temperature coefficient Tc of the DC resistance, the system current limit Ioc, and the current sharing correction factor K. DCR and the DC resistance R at the preset temperature DCRAmong the four input parameters, the system current limit Ioc and the current sharing correction coefficient K are... DCR DC resistance value R at the preset temperature DCR Given in the initial state of the system, the compensation value OUT satisfies the following relationship:

[0046] Wherein, the flow equalization correction coefficient K DCR The typical value is 1. For a given channel, the temperature coefficient Tc of the DC resistance, the system current limit Ioc, and the DC resistance R at the preset temperature are... DCR It is a constant value, and the compensation value OUT can be approximated as a function of the current system temperature T. Temperature compensation lookup table 112 is used to match the compensation value OUT with the value OUT in the temperature compensation lookup table. 0-i After comparison, obtain the multi-bit temperature compensation control signal s0-s i Voltage stepping circuit 113 multi-bit temperature compensation control signals s0-s i The control voltage stepping circuit 113 controls the opening and closing of each switch to output the corresponding segmented temperature compensation voltage, thereby achieving multi-step voltage linear rise without changing the equivalent impedance of the output node A of the temperature compensation circuit 101, and enabling multi-position segmented fitting compensation for the entire temperature range.

[0047] The temperature compensation circuit uses a multiplier to calculate the compensation value, which includes the temperature coefficient of the DC resistance, in real time. This value is then converted into a multi-bit control signal via a temperature compensation lookup table. This signal drives the voltage stepping circuit to perform N-bit segmented linear adjustment on the dynamic clamping reference voltage. This ensures that the temperature change slope of the clamping voltage on the error amplifier is consistent with the temperature slope of the inductor's DC resistance. This eliminates the problem of the system current limit shifting significantly with the temperature drift of the DC resistance across the entire temperature range, achieving consistent current limiting control across the entire temperature range. Compared to the traditional fixed clamping voltage scheme, the current limit deviation across the entire temperature range is reduced to the residual within a single segment interval, resulting in significantly improved temperature consistency.

[0048] In some embodiments of this application, see also [the following text is missing]. Figure 5 The voltage stepping circuit 113 includes: a first resistor R0, a resistor divider chain 1131, and multiple sets of switch branches 1132. The first resistor R0 is connected between the first node A and the second node B. The first node A is the clamping reference voltage node, serving as the output node A of the temperature compensation circuit 101, and is connected to the dynamic upper clamping circuit 102. The resistor divider chain 1131 is connected between the second node B and ground, and is composed of multiple second resistors R1 connected in series, followed by a third resistor connected in series to ground. The equivalent impedance at the second node B is the resistance value of the second resistor R1. Each set of switch branches 1132 includes a branch resistor and a complementary switch s0-s iOne end of the branch resistor is connected to either end of any second resistor R1, and the other end of the branch resistor is connected to the complementary switch s0-s. i The common terminal of the complementary switch group is connected to ground and the supply voltage V, respectively. CM The equivalent resistance between the first node A and ground is configured as the sum of the first and second resistances, i.e., Re = R0 + R1. Supply voltage V CM The minimum resolution configured as the compensation value and (2 N The product of -1), where N is the number of switch branches and represents the number of bits for temperature compensation.

[0049] The resistance values ​​of the branch resistor and the third resistor are 2*R1. Through the circuit structure of the voltage stepping circuit 113 described above, the equivalent impedance at the second node B remains constant regardless of the state of the complementary switch, thus ensuring that the equivalent impedance of the clamping reference voltage node A (i.e., the sum of the first and second resistors) remains constant during switch switching, avoiding additional errors introduced by impedance changes, and ensuring the linearity accuracy of the segmented temperature compensation voltage.

[0050] Figure 5 The voltage stepping circuit 113 in the example is based on N=4. The first resistor R0 connects the first node A and the second node B. At the second node B, three second resistors R1 are connected in series, followed by a third resistor 2*R1 connected in series to ground. At each node where a second resistor R1 is connected in series with its adjacent resistor, a branch resistor 2*R1 is connected. The other end of each branch resistor is connected to a set of switches S. i For each pair of complementary switches, i = 0, 1, 2, 3, the states of each pair are opposite; that is, if one switch in a pair is closed, the other switch is open. The common point of each pair of complementary switches is connected to a branch resistor 2*R1, and the other end is connected to ground and the power supply voltage V, respectively. CM .

[0051] In the voltage stepping circuit 113, the impedance seen at the second node B is fixed as R1. The value of R1 after being connected in series with R0 should be equal to the equivalent impedance Re at the first node A, ensuring that the output voltage of the subsequent dynamic clamping stage does not change with the switch s. 0-3 The on or off state changes. Supply voltage V CM Using the reference voltage, determine the maximum and minimum values ​​of the step voltage.

[0052] Based on multi-position temperature compensation control signal s i The temperature compensation voltage is obtained by controlling the opening and closing of each complementary switch in the voltage stepping circuit 113. satisfy: .

[0053] Dynamic clamping voltage V after multi-level temperature compensation A satisfy: .

[0054] The dynamic clamping voltage V after multi-temperature compensation A The input is processed by the dynamic upper clamping circuit 102, and the output is the upper clamping voltage V. EACLAMP To determine the error voltage V EA The maximum voltage limit. Based on the upper clamping voltage V. EACLAMP The error voltage output from the error amplifier is clamped to obtain the final error voltage V. EA The error voltage V EA The error current I is converted by the second conversion module 1034. EA The input PWM comparator circuit 104 performs a comparison operation by combining the sampled current and the ramp compensation current, and outputs a PWM control signal to determine the off time of the duty cycle modulation.

[0055] By using the complementary switch and branch resistor design in the voltage stepping circuit, the equivalent impedance at the second node remains constant at the value of the second resistor under any switching state. This ensures that the total equivalent impedance of the clamping reference voltage node (i.e., the sum of the first and second resistors) remains constant when the temperature compensation control signal is switched. This avoids interference from node impedance changes on the output characteristics of the dynamic clamping circuit, guarantees the linearity of the segmented temperature compensation voltage stepping, and overcomes the defect of traditional resistor networks that introduce additional clamping errors due to impedance fluctuations during switching.

[0056] In some embodiments of this application, see also [the following text is missing]. Figure 2 and Figure 3 The current limiting and current sharing control circuit 10 also includes a logic control circuit 107, which is connected to the output of the PWM comparator circuit 104. The logic control circuit 107 is used to receive the clock signal CLK and the PWM control signal, and to turn on the channel where the inductor L is located when the clock signal CLK is valid, and to turn off the channel where the inductor L is located when the PWM control signal is valid.

[0057] joint Figure 1 It can be seen that the function of the logic control circuit 107 is to turn off the second switching element S when the clock signal CLK is reached, that is, when the clock signal CLK is valid. L Simultaneously, the first switching element S is activated. H Open the corresponding channel to realize energy from V IN To V OUT Transmission. When the PWM control signal arrives, the first switching element S is turned off. H Simultaneously activate the second switching element S LClose the corresponding channel and interrupt the energy flow from V. IN To V OUT The transmission of the signal allows the determination of the duty cycle modulation off-time based on the PWM control signal, thereby enabling the regulation of the channel current.

[0058] It should be noted that the first switching element S H Second switching element S L The switching transistors can be of the same semiconductor type or different semiconductor types. If the first switching element S... H Second switching element S L Different types of semiconductor switching transistors are used to control the second switching element S. L The low-side control signal and the signal used to control the first switching element S H The high-side control signal is the same. If the first switching element S H Second switching element S L If the switching transistors are of the same semiconductor type, they are used to control the second switching element S. L The low-side control signal and the signal used to control the first switching element S H The high-side control signals are complementary.

[0059] The logic control circuit 107 responds to the clock signal and the PWM control signal to control the first switching element S in the channel. H Second switching element S L The timing control completes the peak current mode modulation closed loop.

[0060] The current limiting and current sharing control circuit in this embodiment senses the current temperature of the inductor in real time through a temperature compensation circuit and generates a temperature compensation voltage. The dynamic clamping circuit dynamically adjusts the clamping voltage of the error voltage accordingly, so that the temperature change slope of the clamping voltage is consistent with the temperature slope of the DC resistance of the inductor. Through the coordinated cooperation of each module, the system current limit is kept stable throughout the entire temperature range. At the same time, the current sharing correction circuit corrects the channel control parameters through adjustable conversion gain and zero-adjustment current to ensure the consistency of current sharing when multiple channels are connected in parallel.

[0061] This application also provides a current limiting and current sharing control method, applied to the aforementioned current limiting and current sharing control circuit. See also... Figure 6 Current limiting and current sharing control methods include: Step S11: Sample the current flowing through the DC resistor of the inductor to obtain the sampled current.

[0062] The sampling current is obtained by collecting the current flowing through the inductor and DC resistor in the channel through the current sampling module 100.

[0063] Step S12: Obtain the current temperature of the inductor, determine the multi-position temperature compensation control signal based on the current temperature and the DC resistance parameter of the inductor, and obtain the temperature compensation voltage based on the multi-position temperature compensation control signal.

[0064] A temperature sensor can be used to detect the current temperature of the inductor. The multiplier 111 calculates the DC resistance value R based on the temperature coefficient Tc of the DC resistance and the preset temperature. DCR System current limit Ioc, current sharing correction factor K DCR The product of the current temperature T and the calculated value OUT is used to obtain the compensation value. Then, based on the compensation value OUT, a preset temperature compensation lookup table is consulted to obtain the multi-bit temperature compensation control signal. The preset temperature compensation lookup table divides the entire temperature range into 2... N Each segmented interval corresponds to a compensation value OUT. 0-i A switch code value is given, and each switch code value corresponds to a set of N-bit temperature compensation control signals. Then, based on the multi-bit temperature compensation control signals, a temperature compensation voltage is output to compensate for the DC resistance R. DCR Multi-stage temperature compensation enables subsequent dynamic clamping voltage V A The DC resistance R of the inductor L is adaptive. DCR Temperature coefficient.

[0065] Step S13: Obtain the slope compensation current according to the preset slope compensation voltage, and perform temperature compensation on the slope compensation current based on the temperature compensation voltage to generate a dynamic clamping voltage related to the duty cycle.

[0066] The preset slope compensation voltage V is converted by the first conversion module 1031. SLOPE Converted to the original slope compensation current I SLOPE Then, based on the zero-load initial operating point voltage V EA0 The generated zero-adjustment current I B Summing yields the slope compensation current. Based on the previously obtained temperature compensation voltage, N-position temperature compensation is applied to the slope compensation current to generate a dynamic clamping voltage V related to the duty cycle. A The dynamic clamping voltage V after N-bit temperature compensation A The DC resistance R of the inductor L is adaptive. DCR Temperature coefficient.

[0067] Step S14: Determine the upper clamping voltage based on the dynamic clamping voltage to clamp the error voltage, and convert the clamped error voltage into an error current.

[0068] The upper clamping voltage V of any channel's error voltage is determined by the dynamic upper clamping circuit 102 based on the dynamic clamping voltage. EACLAMP Therefore, based on the upper clamping voltage V EACLAMPThe error voltage is clamped. Specifically, if the error voltage output by the error amplifier is greater than the upper clamping voltage V... EACLAMP Then the error voltage input to the second conversion module 1034 is limited to the upper clamping voltage V. EACLAMP If the error voltage output by the error amplifier is less than or equal to the upper clamping voltage V EACLAMP The error voltage output from the error amplifier is then input to the second conversion module 1034. The second conversion module 1034 then converts the input error voltage V... EA Converted to error current I EA .

[0069] Step S15: Perform a comparison operation based on the sampled current, slope compensation current, and error current, and output a PWM control signal to determine the off-time of the duty cycle modulation.

[0070] The PWM comparator circuit 104 performs comparison operations on the sampling current, slope compensation current, and error current. Specifically, it calculates the sum of the sampling current and the slope compensation current, and subtracts the error current I. EA The signal is then amplified to obtain the PWM control signal.

[0071] The dynamic clamping reference voltage is subjected to N-bit piecewise linear adjustment to make the clamping voltage V on the error amplifier... EACLAMP The temperature change slope is consistent with the temperature slope of the inductor and DC resistance, thus eliminating the problem of significant deviation of the system current limit due to DC resistance temperature drift across the entire temperature range, achieving consistent current limiting control across the entire temperature range; compared with the traditional fixed clamping voltage scheme, the current limit deviation across the entire temperature range is reduced from orders of magnitude. Reducing residuals to a single segment interval significantly improves temperature consistency.

[0072] In some embodiments of this application, when determining a multi-bit temperature compensation control signal based on the current temperature and the DC resistance parameters of the inductor, and obtaining the temperature compensation voltage based on the multi-bit temperature compensation control signal, the compensation value OUT can be calculated based on the current temperature and the DC resistance parameters of the inductor. (1) Then, based on the compensation value OUT, the temperature compensation lookup table is consulted to obtain the multi-bit temperature compensation control signal. The temperature compensation voltage is then obtained based on the multi-bit temperature compensation control signal while maintaining the equivalent impedance of the clamping reference voltage node. By keeping the equivalent impedance of the clamping reference voltage node constant, the output characteristics of the dynamic clamping circuit are ensured not to change due to the switching of the temperature compensation control signal, thus guaranteeing the linear accuracy of the temperature compensation step.

[0073] In some embodiments of this application, before determining a multi-bit temperature compensation control signal based on the current temperature and the DC resistance parameters of the inductor, and before obtaining the temperature compensation voltage based on the multi-bit temperature compensation control signal, a temperature compensation lookup table can be constructed. Specifically, this includes dividing the entire temperature range into 2... N Each segmented interval corresponds to a switch code value. Any switch code value is used to indicate a multi-bit temperature compensation control signal, where N is an integer greater than or equal to 1, representing the number of bits for temperature compensation. For any segmented interval, the product of the system current limit, the current sharing correction coefficient, and the equivalent sampling resistance at the corresponding temperature is calculated to obtain the compensation value corresponding to that segmented interval. A temperature compensation lookup table is generated based on the segmented interval, the switch code value, and the compensation value.

[0074] Divide the full temperature range applicable to the DC-DC converter system into 2 N The compensation value OUT for any segmented interval. 0-i The equivalent sampling resistance of the channel in the DC-DC converter system is related to the loop parameters of the corresponding channel. To satisfy: (2) in, Equivalent sampling resistor amplification factor, , These are the conversion gains of the first conversion module 1031 and the PWM comparator circuit 104, respectively. Equivalent sampling resistance. The value of directly determines the selection of the temperature boundary line. Combined equivalent sampling resistance. By combining the formula with the previous formula for calculating the compensation value OUT, we can obtain the compensation value OUT. 0-i satisfy: (3) When at the equivalent sampling resistance After correction, the flow equalization correction factor K needs to be used. DCR Correct the above formula back to the design typical value. The minimum resolution (Least Significant Bit, LSB) of the lookup table satisfies the formula: (4) In the voltage stepping circuit 113, at the second node B, the internal resistance is R1, which, according to Thevenin equivalent, does not change with the complementary switch s. 0-i It changes with the changes. A voltage source V is formed at the second node B. D satisfy: (5) Voltage source V D That is, multi-position temperature compensation voltage Then the voltage at the first node A satisfies: (6) Since Re = R0 + R1, an N-step linear voltage rise can be achieved without changing the equivalent impedance of the first node A. (Supply voltage) The choice satisfies: (7) It is evident that the specific value of the temperature compensation voltage for the DC resistor is affected by multiple factors, including device temperature rise, power consumption, and voltage margin. By dividing the entire temperature range into 2... N By dividing the system into segments and pre-building lookup tables, the compensation control signal corresponding to the current temperature can be quickly obtained during system operation, thereby achieving piecewise linear fitting compensation of the temperature characteristics of the inductor's DC resistance.

[0075] The following example demonstrates an application across the entire temperature range of 225℃. A 4-bit temperature compensation method can be used, which divides the 225℃ range into 2... 4 The next temperature compensation voltage is given every 15°C within a range. If the DC-DC converter system is concerned with a full temperature range of -65°C to 160°C, then the DC resistance R at room temperature (27°C) is... DCR Equal to 1mΩ, R i It equals 20mΩ, and its temperature coefficient is 0.0039℃ / mΩ. OC Equal to 40A, 0A corresponds to V EA0 =1090mV.

[0076] Given Tmin = -65℃ and Tmax = 160℃, the temperature range is divided into 16 intervals, each segmented by 15℃. The boundary of the compensation value for each interval satisfies the formula:

[0077] For example, the dividing line for the compensation value of the lowest temperature segment interval is:

[0078] The compensation values ​​for each segment interval were calculated, and the results are shown in Table 1 below.

[0079] Table 1 4-bit Temperature Compensation Lookup Table

[0080] According to formulas (4) and (7), we can obtain:

[0081] As shown in Table 1 above, in this embodiment, the corresponding switch code value at room temperature is 0111. Within each small segment interval, the load capacity is slightly higher, but good temperature consistency can be achieved across the entire temperature range. Its actual maximum load capacity is approximately 1 higher than the ideal maximum load capacity. OC *R DCR *(1+(Tmax-Tmin) / (2 i -1)). Over the entire temperature range, the upper clamping voltage follows the temperature change trend of the DC resistance in a stepwise manner, so that the system current limit maintains good consistency over the entire temperature range.

[0082] Figure 7 The image shows a comparison of current limiting for a DC resistor without N-bit temperature compensation and current limiting for a DC resistor with N-bit temperature compensation. See also... Figure 7 In the scheme without DC resistance temperature compensation, the clamping voltage V on the error amplifier EACLAMP The equivalent sampling resistance is a fixed value and does not change with temperature, while the equivalent sampling resistance increases with increasing temperature. At low temperatures, the equivalent sampling resistance... The value is too small, resulting in a larger maximum current limit Imax; at the high-temperature end, the equivalent sampling resistor... The value is too high, corresponding to a lower maximum current limit Imax. The deviation of the current limit over the entire temperature range is on the order of the system current limit and the DC resistance R. DCR The product of resistance, temperature coefficient, and the entire temperature range. After using N-bit segmented temperature compensation, the upper clamping voltage V... EACLAMP The temperature of the equivalent sampling resistance is dynamically tracked in a stepwise manner, and a clamping voltage V is applied within each segment interval. EACLAMP The step size between each segment interval is basically constant, and the equivalent sampling resistance is also constant. The variation within the corresponding temperature range is matched. After N-bit segmented compensation, the deviation of the current limit across the entire temperature range is limited to the residual range within a single segmented interval. Compared with the fixed clamping voltage scheme, temperature consistency is significantly improved. After N-bit temperature compensation, temperature consistency across the entire temperature range can be achieved.

[0083] When a DC-DC converter system is used in parallel with multiple channels, consistent current sharing across all channels is necessary for better current limiting and load balancing. In a current-mode DC-DC converter system, the error voltage V... EA It is the load current I L A function of the duty cycle D. From Figure 3 It can be seen that the conversion gain of the first conversion module 1031 should be consistent with the conversion gain of the second conversion module to ensure that the slope of its slope compensation does not change with the change of conversion gain 1 / Rea. After adding slope compensation to the DC-DC converter system, the error voltage V EA Will not be affected by load current IL It varies with the duty cycle D to ensure the error voltage V EA To ensure load consistency during current limiting, a dynamic clamping circuit is required. After applying the dynamic clamping circuit, the error voltage V can be controlled. EA Only the load current I L The function. The slope of this function is R. i The initial point is V EA0 See also Figure 3 The conversion gain of the first conversion module 1031 and the second conversion module 1034, 1 / Rea, and the zero-adjustment current I output by the zero-adjustment current module 1032. B The parameters Rs of the PWM comparator circuit 104 are all equipped with adjustment and correction functions. Based on this, in some embodiments of this application, multiple parameters in the current limiting and current sharing control circuit can be sequentially corrected to make the linear functional relationship between the error voltage and the load current more consistent. Specifically, this includes: detecting whether the slope compensation slope meets the preset requirements; if not, correcting the conversion gain of the first conversion module; detecting whether the equivalent sampling resistance meets the preset requirements; if not, correcting the sampling gain of the PWM comparator circuit; detecting whether the zero-load initial operating point voltage meets the preset requirements; if not, correcting the zero-adjustment current output by the zero-adjustment current module; and detecting whether the DC resistance of the inductor meets the preset requirements; if not, correcting the current sharing correction coefficient of the temperature compensation lookup table module. The specific adjustment and correction methods for each parameter are as follows: Figure 8 As shown, it includes: Step 200: Initiate multi-channel current sharing correction.

[0084] When it is determined that the current in the current channel of the DC-DC converter system is unbalanced with the current in other channels, multi-channel current sharing correction can be initiated for the current channel.

[0085] Step 201: Determine V SLOPE Does the compensation slope meet the requirements? If yes, proceed to step 203; otherwise, proceed to step 202.

[0086] Determine the preset slope compensation voltage V of the current channel. SLOPE Is the compensation slope the preset compensation slope? The preset compensation slope can be set as needed and is not specifically limited here. If the slope compensation voltage V... SLOPE If the compensation slope is the preset compensation slope, then the slope compensation voltage V is determined. SLOPE The compensation slope meets the requirements; otherwise, determine the slope compensation voltage V. SLOPE The compensation slope does not meet the requirements.

[0087] Step 202: Correction 1 / Rea.

[0088] Determine the slope compensation voltage VSLOPE When the compensation slope does not meet the requirements, the conversion gain 1 / Rea of ​​the first and second conversion modules is corrected. By correcting the conversion gain 1 / Rea, the slope compensation amount between different channels can be corrected, with the goal of achieving the error voltage V. EA Only the load current I L The function.

[0089] Step 203: Determine R i Does the requirement meet? If yes, proceed to step 205; otherwise, proceed to step 204.

[0090] Determine the equivalent sampling resistance of the current channel Is it a preset equivalent resistance? The preset equivalent resistance can be set as needed; no specific restrictions are imposed here. If the equivalent sampling resistance of the current channel... If it is a preset equivalent resistance, then the equivalent sampling resistance of the current channel is determined. The requirements are met; otherwise, determine the equivalent sampling resistance of the current channel. The requirements are not met.

[0091] Step 204: Correct Rs of the PWM comparator circuit.

[0092] Determine the equivalent sampling resistance of the current channel. If the requirements are not met, the Rs of the PWM comparator circuit is corrected, that is, the gain 1 / Rs of the PWM comparator circuit is corrected. By correcting Rs, the error voltage V can be achieved. EA With load current I L The slope of the function is R i Correction.

[0093] Step 205: Determine V EA0 Does the requirement meet? If yes, proceed to step 207; otherwise, proceed to step 206.

[0094] Determine the zero-load initial operating point voltage V of the current channel. EA0 Is it the preset zero-load operating voltage? The preset zero-load operating voltage can be set as needed and is not specifically limited here. If the current channel's initial zero-load operating point voltage V... EA0 If the voltage is a preset zero-load operating voltage, then the initial zero-load operating point voltage V of the current channel is determined. EA0 If the requirements are met; otherwise, determine the zero-load initial operating point voltage V for the current channel. EA0 The requirements are not met.

[0095] Step 206: Correction I B .

[0096] Determine the zero-load initial operating point voltage V of the current channel. EA0 If the requirements are not met, the zero-adjustment current I output by the zero-adjustment current module 1032 can be corrected. B For the zero-adjustment current I B The correction can achieve error voltage V EA With load current I L The zero-load initial operating point voltage V in the linear function between EA0 Correction. Zero-load initial operating point voltage V EA0 Error voltage V when load current is 0A EA .

[0097] Step 207: Determine R DCR Does the requirement meet? If yes, proceed to step 203; otherwise, proceed to step 208.

[0098] Determine the DC resistance R of the inductor in the current channel. DCR Is it a preset resistance value? The preset resistance value can be set as needed and is not specifically limited here. If the DC resistance R of the inductor in the current channel... DCR If the resistance value is preset, then the DC resistance R of the inductor in the current channel is determined. DCR The requirements are met; otherwise, determine the DC resistance R of the inductor in the current channel. DCR The requirements are not met.

[0099] Step 208: Correct the flow equalization correction coefficient K DCR .

[0100] Determine the DC resistance R of the inductor in the current channel. DCR When the requirements are not met, the current equalization correction coefficient K of the temperature compensation lookup module is adjusted. DCR Correction is required.

[0101] Step 209: End.

[0102] After the corrections described in steps 200 to 209, the dispersion of the slope compensation slope, equivalent sampling resistance slope, zero-load initial operating point, and DC resistance compensation coefficient between channels is eliminated sequentially, thus reducing the error voltage V between different channels. EA The linear functional relationship between the load current and the current is approximately consistent with the functional relationship, thereby achieving consistent current sharing and current limiting control when multiple channels are connected in parallel.

[0103] The current limiting and current sharing control method of this application embodiment uses the adjustable conversion gain of the first and second conversion modules, the adjustable zero current of the zero-current adjustment module, and the adjustable current sharing correction coefficient of the temperature compensation lookup table module in the current sharing correction circuit to perform four-step correction in the order of slope compensation slope, equivalent sampling resistance, zero-load initial operating point, and DC resistance compensation coefficient. This makes the slope and intercept of the linear function between the error voltage and the load current of each channel tend to be consistent, eliminating the problem of inconsistent current sharing in multi-channel parallel connection caused by wafer batch differences, process deviations, mismatches, and package parasitic impedance differences, and realizing consistent current limiting and current sharing control when multiple channels are connected in parallel.

[0104] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this application.

[0105] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0106] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0107] The above-described embodiments are only used to illustrate the technical solutions of this application, and are not intended to limit them. Although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this application, and should all be included within the protection scope of this application.

Claims

1. A current limiting and current sharing control circuit, characterized in that, The current limiting and current sharing control circuit includes: The current sampling module is used to sample the current flowing through the DC resistor of the inductor to obtain the sampled current; A temperature compensation circuit is used to determine a multi-bit temperature compensation control signal based on the current temperature of the inductor, and to obtain a temperature compensation voltage based on the multi-bit temperature compensation control signal. The current sharing correction circuit is used to provide slope compensation current according to the preset slope compensation voltage; A dynamic upper clamping circuit, connected to the temperature compensation circuit and the current sharing correction circuit, is used to perform temperature compensation on the ramp compensation current based on the temperature compensation voltage, generate a dynamic clamping voltage related to the duty cycle, and determine the upper clamping voltage based on the dynamic clamping voltage; the current sharing correction circuit is also connected to the dynamic clamping circuit, and is used to convert the error voltage clamped by the upper clamping voltage into an error current. The PWM comparator circuit is connected to the current sharing correction circuit and the current sampling module. The PWM comparator circuit is used to perform comparison operations based on the sampled current, the ramp compensation current, and the error current, and output a PWM control signal to determine the off-time of the duty cycle modulation.

2. The current limiting and current sharing control circuit according to claim 1, characterized in that, The current equalization correction circuit includes: The first conversion module is used to convert the slope compensation voltage into the original slope compensation current. The zero-adjustment current module is used to generate a zero-adjustment current based on the initial operating point voltage under zero load. An adder, connected to the first conversion module and the zero-adjustment current module, is used to calculate the sum of the original slope compensation current and the zero-adjustment current to obtain the slope compensation current; The second conversion module is used to convert the error voltage into the error current; The conversion gain of the first conversion module and the second conversion module is adjustable.

3. The current limiting and current sharing control circuit according to claim 1, characterized in that, The temperature compensation circuit includes: The numerical multiplier is used to calculate the compensation value by multiplying the temperature coefficient of the DC resistance, the DC resistance value at the preset temperature, the system current limit, the current sharing correction factor, and the current temperature. A temperature compensation lookup table module, connected to the numerical multiplier, is used to look up the temperature compensation lookup table based on the compensation value and obtain the multi-bit temperature compensation control signal. A voltage stepping circuit, connected to the dynamic upper clamping circuit and the temperature compensation lookup table module, is used to output the temperature compensation voltage according to the multi-bit temperature compensation control signal.

4. The current limiting and current sharing control circuit according to claim 3, characterized in that, The voltage stepping circuit includes: A first resistor is connected between a first node and a second node. The first node is a clamping reference voltage node and is connected to the dynamic upper clamping circuit. A resistor voltage divider chain is connected between the second node and ground. It is composed of multiple second resistors connected in series and then connected in series with a third resistor to ground. The equivalent impedance at the second node is the resistance value of the second resistor. Multiple sets of switch branches, each set of switch branches includes a branch resistor and a complementary switch; one end of the branch resistor is connected to any end of any second resistor, the other end of the branch resistor is connected to the common terminal of the complementary switch, and the two ends of the complementary switch set are respectively connected to ground and the power supply voltage; Wherein, the equivalent resistance between the first node and ground is configured as the sum of the first resistance and the second resistance, and the supply voltage is configured as the minimum resolution of the compensation value plus (2) N The product of -1), where N is the number of switch branches.

5. The current limiting and current sharing control circuit according to claim 1, characterized in that, The current limiting and current sharing control circuit further includes a logic control circuit connected to the output of the PWM comparator circuit; the logic control circuit is used to receive a clock signal and a PWM control signal, and to turn on the channel where the inductor is located when the clock signal is valid, and to turn off the channel where the inductor is located when the PWM control signal is valid.

6. A current limiting and current sharing control method, applied to the current limiting and current sharing control circuit as described in any one of claims 1-5, characterized in that, The current limiting and current sharing control method includes: The current flowing through the DC resistor of the inductor is sampled to obtain the sampled current; The current temperature of the inductor is obtained, and a multi-bit temperature compensation control signal is determined based on the current temperature and the DC resistance parameter of the inductor. The temperature compensation voltage is obtained based on the multi-bit temperature compensation control signal. The slope compensation current is obtained according to the preset slope compensation voltage, and the slope compensation current is temperature compensated based on the temperature compensation voltage to generate a dynamic clamping voltage related to the duty cycle. The upper clamping voltage is determined based on the dynamic clamping voltage to clamp the error voltage, and the clamped error voltage is converted into error current. A comparison operation is performed based on the sampled current, the ramp compensation current, and the error current to output a PWM control signal to determine the off-time of the duty cycle modulation.

7. The current limiting and current sharing control method according to claim 6, characterized in that, The step of determining a multi-position temperature compensation control signal based on the current temperature and the DC resistance parameter of the inductor, and obtaining a temperature compensation voltage based on the multi-position temperature compensation control signal, includes: The compensation value is calculated based on the current temperature and the DC resistance parameter of the inductor; Based on the compensation value, the temperature compensation lookup table is searched to obtain the multi-bit temperature compensation control signal; The temperature compensation voltage is obtained by using the multi-bit temperature compensation control signal while keeping the equivalent impedance of the clamping reference voltage node unchanged.

8. The current limiting and current sharing control method according to claim 7, characterized in that, Before determining the multi-bit temperature compensation control signal based on the current temperature and the DC resistance parameters of the inductor, and before obtaining the temperature compensation voltage based on the multi-bit temperature compensation control signal, the process includes: constructing a temperature compensation lookup table, specifically including: The entire temperature range is divided into 2 N Each segmented interval corresponds to a switch code value. Any of the switch code values ​​is used to indicate a multi-bit temperature compensation control signal, where N is an integer greater than or equal to 1. For any segmented interval, calculate the product of the system current limit, the current sharing correction coefficient, and the equivalent sampling resistance at the corresponding temperature to obtain the compensation value corresponding to the segmented interval; A temperature compensation lookup table is generated based on the segmented intervals, the switch code values, and the compensation values.

9. The current limiting and current sharing control method according to claim 6, characterized in that, The method further includes: sequentially correcting multiple parameters in the current limiting and current sharing control circuit to make the linear functional relationship between the error voltage and the load current more consistent, specifically including: Check whether the slope compensation slope meets the preset requirements; if not, correct the conversion gain of the first conversion module. Check whether the equivalent sampling resistance meets the preset requirements; if not, correct the sampling gain of the PWM comparator circuit. Check whether the initial operating point voltage under zero load meets the preset requirements. If not, correct the zero-adjustment current output by the zero-adjustment current module. Check if the DC resistance of the inductor meets the preset requirements. If not, correct the current sharing correction coefficient of the temperature compensation lookup table module.

10. A DC-DC converter system, characterized in that, include: Multiple DC output channels and multiple current limiting and current sharing control circuits as described in any one of claims 1-5 connected one-to-one with each channel, each channel including a first switching element, a second switching element and an inductor; the first switching element and the second switching element are connected in series between the input terminal and ground, and the current limiting and current sharing control circuit is connected to the control terminals of the first switching element and the second switching element; One end of the inductor is connected between the first switching element and the second switching element, and the other end is the output terminal.

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