Inductor current simulation circuit of multi-stage switching conversion circuit and simulation control method thereof

Abstract

An inductor current simulation circuit of a multi-stage switching conversion circuit and a simulation control method thereof. The inductor current simulation circuit is used to simulate the inductor current of the multi-stage switching conversion circuit. The multi-stage switching conversion circuit periodically switches a capacitor and an inductor between a plurality of electrical connection states according to a plurality of switching signals, thereby performing power conversion between a first voltage and a second voltage. The inductor current simulation circuit includes a selection circuit for selecting a plurality of candidate voltages according to a plurality of state signals to generate a first simulation signal, and a filter circuit for generating a second simulation signal according to the difference between the first simulation signal and a bias voltage value to simulate the inductor current. The plurality of state signals are related to the plurality of switching signals, and each of the plurality of state signals corresponds to each of the plurality of electrical connection states, respectively. The plurality of candidate voltages are related to the linear superposition of the first voltage, the second voltage, a ground potential, and combinations thereof.

Description

Technical Field

[0001] This invention relates to an inductor current simulation circuit, and more particularly to an inductor current simulation circuit for multi-stage switching circuits. This invention also relates to a control method for controlling the aforementioned inductor current simulation circuit. Background Technology

[0002] Figure 1 This illustrates a prior art third-order boost switching converter circuit. For example... Figure 1 As shown, this third-order boost switching converter circuit includes four switches Q1, Q2, Q3, and Q4, which are switched according to multiple switching signals SQ1 to SQ4, causing the inductor L and capacitor CFLY to switch between different electrical connection states, thereby realizing the power conversion between the input voltage VIN and the output voltage VOUT. In this architecture, the switching node LX will switch between multiple voltages, such as the voltage of capacitor CFLY, the output voltage VOUT, and the ground potential.

[0003] In existing third-order boost switching circuits, since the power stage includes four switches, to sense the inductor current on inductor L1, it is usually necessary to sense the current of each switch individually and then combine these measured current signals into the inductor current. For example... Figure 1 As shown, the current sensing circuit 90 generates a current sensing signal VCS by synthesizing the switch current signals CS1~CS4 generated by sensing the current of each switch. However, this sensing method has some problems. For example, the current sensing of different switches may have different gains and offsets, resulting in inaccurate synthesized inductor current. In addition, since the current transmission paths of different switches are different, the synthesized current signal may be affected by circuit parasitic effects, which limits the sensing accuracy of the inductor current.

[0004] Furthermore, existing third-order boost converter circuits typically employ conventional current sensing circuits, such as a series shunt resistor in the switching path or current sensing using an inductor's DCR (DC resistance). However, the shunt resistor method incurs additional power losses, while the DCR current sensing method is limited by the inductor's DCR value and requires additional calibration circuitry to improve sensing accuracy. Therefore, these methods have certain limitations and cannot simultaneously meet the requirements of accuracy and low power consumption.

[0005] In view of the above, to overcome the shortcomings of the prior art, this invention proposes an inductor current simulation circuit. Unlike traditional current detection methods, this invention does not require direct measurement of the current of each switch. Instead, a selection circuit selects a corresponding candidate voltage based on multiple state signals to generate a simulated voltage signal, which is further filtered to generate a simulated inductor current signal. This inductor current simulation circuit avoids the influence of differences in measurement gain between different switch currents and reduces the impact of power loss and parasitic effects, making the inductor current sensing of multi-stage switching circuits more accurate and reliable. Summary of the Invention

[0006] In one viewpoint, the present invention provides an inductor current simulation circuit for simulating an inductor current in a multi-stage switching converter circuit, wherein the multi-stage switching converter circuit periodically switches a capacitor and an inductor between multiple electrical connection states based on a duty cycle according to multiple switching signals, thereby performing a power conversion between a first voltage and a second voltage; the inductor current simulation circuit includes: a selection circuit for selecting multiple candidate voltages according to multiple state signals to generate a first simulation signal; and a filtering circuit for generating a second simulation signal according to the difference between the first simulation signal and a bias voltage value to simulate the inductor current; wherein the difference between the first simulation signal and the bias voltage value is positively correlated with an inductor voltage corresponding to the multiple electrical connection states; wherein the multiple state signals are related to the multiple switching signals, each of the multiple state signals corresponding to each of the multiple electrical connection states, and wherein the multiple candidate voltages are related to a linear superposition of the first voltage, the second voltage, a ground potential, and combinations thereof.

[0007] In a preferred embodiment, the bias voltage value is positively correlated with an average voltage value of the second simulated signal.

[0008] In a preferred embodiment, the average voltage value of the second simulated signal is positively correlated with the second voltage.

[0009] In a preferred embodiment, the plurality of state signals include a first state signal, a second state signal, a third state signal, a fourth state signal, and a fifth state signal, each corresponding to one of the following states: (1) when the first state signal is enabled, the first simulated signal is positively correlated with the first voltage; (2) when the second state signal is enabled, the first simulated signal is positively correlated with the difference between the first voltage and the second voltage; (3) when the third state signal is enabled, the first simulated signal is positively correlated with the difference between the first voltage and half of the second voltage; (4) when the fourth state signal is enabled, the first simulated signal is positively correlated with the difference between the first voltage and half of the second voltage; or (5) when the fifth state signal is enabled, the first simulated signal is positively correlated with the ground potential.

[0010] In a preferred embodiment, the electrical connection states of the capacitor and the inductor correspond to one of the following: (1) when the first state signal is enabled, the inductor is electrically connected between the first voltage and the ground potential, and the upper end and the lower end of the capacitor are respectively floating and electrically connected to the ground potential; (2) when the second state signal is enabled, the inductor is electrically connected between the first voltage and the second voltage, and the upper end and the lower end of the capacitor are respectively electrically connected to the second voltage and floating; (3) when the third state signal is enabled, the inductor and the capacitor are connected in series between the first voltage and the ground potential; (4) when the fourth state signal is enabled, the inductor and the capacitor are connected in series between the first voltage and the second voltage; or (5) when the fifth state signal is enabled, the inductor is electrically connected between the first voltage and floating, and the capacitor is floating.

[0011] In a preferred embodiment, the first simulated signal has a first simulated voltage value during an enable period of the first state signal, a second simulated voltage value during an enable period of the second state signal, and a third simulated voltage value during an enable period of the third state signal or the fourth state signal, wherein the average voltage value of the second simulated signal is determined according to one of the following: when the duty cycle is greater than half, the average voltage value is determined according to the first simulated voltage value, the third simulated voltage value, and the corresponding duty cycle; or when the duty cycle is less than half, the average voltage value is determined according to the second simulated voltage value, the third simulated voltage value, and the corresponding duty cycle.

[0012] In a preferred embodiment, the filtering circuit includes: a voltage-to-current conversion circuit for generating a filtered current based on the difference between the average voltage values ​​of the first simulated signal and the second simulated signal, thereby simulating the inductor voltage; and an integrating capacitor for generating the second simulated signal based on the integration of the filtered current, thereby simulating the inductor current.

[0013] In a preferred embodiment, the voltage-to-current conversion circuit includes a filter resistor for generating the filter current, wherein one end of the filter resistor receives the first simulated signal to generate the second simulated signal at the other end of the filter resistor, and the other end of the filter resistor is coupled to the integrating capacitor.

[0014] In a preferred embodiment, the selection circuit includes a plurality of selection switches, comprising a first group of selection switches, a second group of selection switches, and a third group of selection switches, wherein the plurality of candidate voltages includes first to fifth candidate voltages; wherein the plurality of selection switches operate as follows: the first group of selection switches selects the first candidate voltage when the second state signal is enabled, and selects the second candidate voltage when the first state signal, the third state signal, and the fourth state signal are enabled, to generate a first sub-simulation signal; the second group of selection switches selects the first candidate voltage when the first state signal, the third state signal, and the fourth state signal are enabled, based on the plurality of state signals; When the first simulation signal is enabled, the third candidate voltage is selected, and when the second, third, and fourth state signals are enabled, the fourth candidate voltage is selected to generate a second sub-simulation signal; and the third set of selection switches selects the fifth candidate voltage when the fifth state signal is enabled, based on the plurality of state signals; wherein the first simulation signal is generated based on the voltage division of the first and second sub-simulation signals when the first, second, third, and fourth state signals are enabled, and the first simulation signal is generated based on the fifth candidate voltage when the fifth state signal is enabled.

[0015] In a preferred embodiment, the selection circuit further includes a logic circuit for generating a plurality of control signals based on the plurality of status signals to control the switching of the plurality of selection switches, thereby selecting the plurality of candidate voltages.

[0016] From another perspective, the present invention provides a simulation control method for simulating an inductor current in a multi-stage switching converter circuit, wherein the multi-stage switching converter circuit periodically switches a capacitor and an inductor between multiple electrical connection states based on a duty cycle according to multiple switching signals, thereby performing a power conversion between a first voltage and a second voltage; the simulation control method includes: selecting multiple candidate voltages according to multiple state signals to generate a first simulation signal; and generating a second simulation signal according to the difference between the first simulation signal and a bias voltage value to simulate the inductor current; wherein the difference between the first simulation signal and the bias voltage value is positively correlated with an inductor voltage on the inductor corresponding to the multiple electrical connection states; wherein the multiple state signals are related to the multiple switching signals, each of the multiple state signals corresponding to each of the multiple electrical connection states, and wherein the multiple candidate voltages are related to a linear superposition of the first voltage, the second voltage, a ground potential, and combinations thereof.

[0017] The following detailed description through specific embodiments will make it easier to understand the purpose, technical content, features and effects achieved by the present invention. Attached Figure Description

[0018] Figure 1 This invention illustrates a prior art third-order boost switching converter circuit.

[0019] Figure 2 This shows a block diagram of a multi-stage switching conversion circuit and an inductor current simulation circuit in one embodiment of the present invention.

[0020] Figure 3 This diagram shows a schematic of an inductor current simulation circuit according to an embodiment of the present invention.

[0021] Figure 4 This diagram shows a schematic of an inductor current simulation circuit in a specific embodiment of the present invention.

[0022] Figure 5 This diagram shows a schematic of a logic circuit in a specific embodiment of the present invention.

[0023] Figure 6A This invention presents a table showing the analogy of inductor current simulation signals under different switching states of a multi-stage switching circuit, according to one embodiment of the present invention.

[0024] Figure 6B This invention presents a numerical comparison table of simulated inductor current related signals under different switching states of a multi-stage switching circuit, according to a specific embodiment of the invention.

[0025] Figure 7 This diagram shows the operation waveforms of the multi-stage switching conversion circuit and the inductor current simulation circuit in one embodiment of the present invention.

[0026] Explanation of symbols in the diagram

[0027] 31: First group of selector switches

[0028] 32: Second group of selector switches

[0029] 33: Third group selection switch

[0030] 41: Voltage-to-current conversion circuit

[0031] 42: Single-stage amplifier

[0032] 51, 52: OR gate

[0033] 53: NOR gate

[0034] 300, 310, 320: Selection circuit

[0035] 400, 410, 420: Filtering circuits

[0036] 500, 510: Logic circuits

[0037] 1000: Multi-stage switching conversion circuit

[0038] 2000, 2003, 2004: Inductor Current Simulation Circuit

[0039] CFLY: Capacitor

[0040] Cr: Integrating capacitor

[0041] D: Duty Cycle

[0042] GND: Grounding potential

[0043] IL: Inductor current

[0044] Ir: Filter current

[0045] L: Inductor

[0046] LX: Switch Node

[0047] Q1, Q2, Q3, Q4: Switches

[0048] Rd1, Rd2: Resistors

[0049] Rr: Filter resistor

[0050] S12: First state signal

[0051] S13: Third state signal

[0052] S24: Fourth State Signal

[0053] S34: Second state signal

[0054] SC1, SC2, SC3, SC4, SC5: Control signals

[0055] SG: Multiple state signals

[0056] SQ1, SQ2, SQ3, SQ4: Switching signals

[0057] SW1, SW2, SW3, SW4, SW5: Selector switches

[0058] Szc: Fifth state signal

[0059] Ts: Switching cycle

[0060] V1: First voltage

[0061] V2: Second voltage

[0062] VB: Bias voltage value

[0063] VCA1: First candidate voltage

[0064] VCA2: Second candidate voltage

[0065] VCA3: Third candidate voltage

[0066] VCA4: Fourth candidate voltage

[0067] VCA5: Fifth candidate voltage

[0068] VCAG: Multiple candidate voltages

[0069] VIC: Second Simulation Signal

[0070] VIC1: First sub-simulation signal

[0071] VIC2: Second Sub-Simulation Signal

[0072] VICX: First Simulation Signal

[0073] VICX': Buffer the first simulation signal

[0074] VICX(1): Voltage value of the first simulated signal in state 1

[0075] VICX(2): Voltage value of the first simulated signal in state 2

[0076] VICX (34): Voltage value of the first simulation signal in state 3 or 4

[0077] VICavg: Average voltage value of the second simulated signal

[0078] VL: Inductor voltage Detailed Implementation

[0079] The accompanying drawings in this invention are schematic and are primarily intended to illustrate the coupling relationships between circuits and the relationships between signal waveforms. The circuits, signal waveforms, and frequencies are not drawn to scale. For clarity, many practical details will be described in the following description, but this is not intended to limit the scope of the patent application.

[0080] Figure 2 This diagram shows a block diagram of a multi-stage switching conversion circuit and an inductor current simulation circuit according to an embodiment of the present invention. In one embodiment, the inductor current simulation circuit 2000 is used to simulate the inductor current IL of the multi-stage switching conversion circuit 1000. The multi-stage switching conversion circuit 1000 includes multiple switching switches Q1~Q4, which are used to periodically switch the capacitor CFLY and the inductor L between multiple electrical connection states based on a duty cycle according to multiple switching signals SQ1~SQ4, thereby performing power conversion between a first voltage V1 and a second voltage V2.

[0081] In one embodiment, one end (switching node LX) of the inductor L in the multi-stage switching converter circuit switches between multiple voltages. In this embodiment, the multi-stage switching converter circuit 1000 is a third-stage switching converter circuit. Specifically, the switching node LX switches between the voltage across capacitor CFLY, the second voltage V2, and the ground potential. In a specific embodiment, the first voltage V1 is the input voltage, and the second voltage V2 is the output voltage. Thus, the multi-stage switching converter circuit 1000 is a boost-type switching converter circuit. The following embodiments are all described using a third-stage boost-type switching converter circuit as an example, but this is not intended to limit the scope of the invention. The inductor current simulation circuit of the present invention can also be applied to, for example, buck-type or other types of multi-stage switching converter circuits.

[0082] In one embodiment, the inductor current simulation circuit 2000 includes a selection circuit 300 and a filter circuit 400. In one embodiment, the selection circuit 300 is used to select multiple candidate voltages VCAG based on multiple state signals SG to generate a first simulation signal VICX. The filter circuit 400 is used to generate a second simulation signal VIC based on the difference between the first simulation signal VICX and a bias voltage value VB to simulate the inductor current IL.

[0083] In one embodiment, the difference between the first simulated signal VICX and the bias voltage value VB is positively correlated with the inductor voltage VL on the inductor L corresponding to multiple electrical connection states. Specifically, the first simulated signal VICX is positively correlated with the inductor voltage VL on the inductor L under different electrical connection states, and therefore can be further filtered to simulate the inductor current IL.

[0084] In one embodiment, multiple state signals SG are associated with multiple switching signals SQ1~SQ4, wherein each of the multiple state signals SG corresponds to one of multiple electrical connection states. In other words, each of the multiple state signals SG can correspond to one electrical connection state between capacitor CFLY and inductor L, thereby ensuring that the inductor current simulation circuit 2000 can generate corresponding current simulation signals according to the multiple switching switches Q1~Q4 in different switching states. In one embodiment, multiple candidate voltages VCAG are associated with a linear superposition of a first voltage V1, a second voltage V2, ground potential, and combinations thereof. Specifically, according to the different switching states of the multiple switching switches Q1~Q4, the selection circuit 300 selects one of the corresponding multiple candidate voltages VCAG, as detailed below.

[0085] Figure 3 This diagram shows a schematic of an inductor current simulation circuit according to an embodiment of the present invention. Figure 3 The inductor current simulation circuit 2003 is Figure 2 An embodiment of the inductor current simulation circuit 2000. For example... Figure 3 As shown, in one embodiment, the selection circuit 310 includes a voltage divider circuit 34 and a plurality of selection switches, including a first set of selection switches 31, a second set of selection switches 32, and a third set of selection switches 33. In one embodiment, the filter circuit 410 includes a voltage-to-current conversion circuit 41 and an integrating capacitor Cr. In this embodiment, the voltage divider circuit 34 includes resistors Rd1 and Rd2, used to generate a first simulation signal VICX based on the voltage division of the first sub-simulation signal VIC1 and the second sub-simulation signal VIC2.

[0086] In one embodiment, the plurality of state signals SG include a first state signal S12, a second state signal S34, a third state signal S13, a fourth state signal S24, and a fifth state signal Szc. In one embodiment, the plurality of candidate voltages VCAG include first to fifth candidate voltages VCA1 to VCA5. In one embodiment, the first set of selection switches 31 and the second set of selection switches 32, based on the plurality of state signals SG, select at least one candidate voltage from the plurality of candidate voltages VCAG under different electrical connection states of capacitor CFLY and inductor L, respectively, to generate a first sub-simulation signal VIC1 and a second sub-simulation signal VIC2. In this embodiment, the third set of selection switches 33, based on the plurality of state signals SG, selects at least one candidate voltage from the plurality of candidate voltages VCAG as the first simulation signal VICX under one electrical connection state of capacitor CFLY and inductor L.

[0087] In one embodiment, the voltage-to-current conversion circuit 41 generates a filter current Ir based on the difference between the average voltage value VICavg of the first simulated signal VICX and the second simulated signal, thereby simulating the inductor voltage VL. In one embodiment, the integrating capacitor Cr generates a second simulated signal VIC based on the integral of the filter current Ir, thereby simulating the inductor current IL. In one embodiment, the filter current Ir may also be an electrical characteristic other than current.

[0088] Figure 4 This diagram shows a schematic of an inductor current simulation circuit in a specific embodiment of the present invention. Figure 4 The inductor current simulation circuit 2004 is Figure 3 A specific embodiment of the inductor current simulation circuit 2003. For example... Figure 4 As shown, in one embodiment, the selection circuit 320 further includes a logic circuit 500. In a specific embodiment, the first set of selection switches 31 includes selection switches SW1 and SW2, the second set of selection switches 32 includes selection switches SW3 and SW4, and the third set of selection switches 33 includes selection switch SW5. In one embodiment, the logic circuit 500 is used to generate multiple control signals SC1~SC5 based on multiple state signals SG (i.e., the first state signal S12, the second state signal S34, the third state signal S13, the fourth state signal S24, and the fifth state signal Szc) to control the switching of the multiple selection switches (SW1~SW5), thereby selecting multiple candidate voltages VCAG.

[0089] like Figure 4 As shown, in one specific embodiment, the filter circuit 420 further includes a single-stage amplifier 42, and the voltage-to-current conversion circuit includes a filter resistor Rr. In one embodiment, the single-stage amplifier 42 is used to generate a buffered first simulated signal VICX' based on a first simulated signal VICX. The buffered first simulated signal VICX' is positively correlated with the first simulated signal VICX. Specifically, in this embodiment, the buffered first simulated signal VICX' is buffered at an equal multiple of the first simulated signal VICX. In one embodiment, the filter resistor Rr is used to generate a filter current Ir, and one end of the filter resistor Rr receives the buffered first simulated signal VICX' to generate a second simulated signal VIC at the other end of the filter resistor Rr, wherein the other end of the filter resistor Rr is coupled to an integrating capacitor Cr. From one viewpoint, in this embodiment, the filter resistor Rr is used to generate a filter current Ir based on the difference between the average voltage value VICavg of the buffered first simulated signal VICX' and the second simulated signal, thereby simulating the inductor voltage VL. From another viewpoint, the voltage across the filter resistor Rr is used to simulate the inductor voltage VL. In one embodiment, the integrating capacitor Cr integrates the filtered current Ir to generate a second simulation signal VIC to simulate the inductor current IL.

[0090] Please also refer to Figure 2 ,exist Figure 2 In this embodiment, the second simulation signal VIC is generated based on the difference between the first simulation signal VICX and a bias voltage value VB. Figure 4 In a specific embodiment, the bias voltage value VB corresponds to the average voltage value VICavg of the second simulated signal.

[0091] Figure 5 This diagram shows a schematic of a logic circuit according to a specific embodiment of the present invention. In one specific embodiment, as shown... Figure 5 As shown, the logic circuit 510 includes OR gates 51 and 52, and NOR gate 53. In one embodiment, OR gate 51 generates a control signal SC2 based on a first state signal S12, a third state signal S13, and a fourth state signal S24; OR gate 52 generates a control signal SC4 based on a second state signal S34, a third state signal S13, and a fourth state signal S24; and NOR gate 53 generates a control signal SC5 based on the first state signal S12, a second state signal S34, a third state signal S13, and a fourth state signal S24. In one embodiment, control signal SC3 corresponds to the first state signal S12, and control signal SC1 corresponds to the second state signal S34.

[0092] Please also refer to Figure 4 and Figure 5 In one specific embodiment, selector switch SW1 is turned on when the second state signal S34 is enabled, under the control of control signal SC1, to select the first candidate voltage VCA1. Selector switch SW2 is turned on when the first state signal S12, the third state signal S13, and the fourth state signal S24 are enabled, under the control of control signal SC2, to select the second candidate voltage VCA2. Thus, the first sub-simulation signal VIC1 is generated based on either the first candidate voltage VCA1 or the second candidate voltage VCA2. Selector switch SW3 is turned on when the first state signal S12 is enabled, under the control of control signal SC3, to select the third candidate voltage VCA3. Selector switch SW4 is turned on when the second state signal S34, the third state signal S13, and the fourth state signal S24 are enabled, under the control of control signal SC4, to select the fourth candidate voltage VCA4. Thus, the second sub-simulation signal VIC2 is generated based on either the third candidate voltage VCA3 or the fourth candidate voltage VCA4. Selector switch SW5 is turned on when the fifth state signal Szc is enabled, under the control of control signal SC5, to select the fifth candidate voltage VCA5 as the first simulation signal VICX.

[0093] Please also refer to Figure 2 , Figure 4 , Figure 6A and Figure 6B . Figure 6AThis invention presents a table showing the analogy of inductor current simulation signals under different switching states of a multi-stage switching circuit, according to one embodiment of the present invention. Figure 6B This table shows a numerical comparison of simulated inductor current related signals under different switching states of a multi-stage switching circuit, according to a specific embodiment of the present invention. In one embodiment, multiple state signals SG correspond to one of the following states:

[0094] (1) State 1: When both switching signals SQ1 and SQ2 are enabled to control the switching switches Q1 and Q2 to be turned on respectively, the inductor L is electrically connected between the first voltage V1 and the ground potential, and the upper and lower ends of the capacitor CFLY are floating and electrically connected to the ground potential respectively. At this time, the first state signal S12 is enabled, and the first simulation signal VICX is positively correlated with the first voltage V1.

[0095] (2) State 2: When both switching signals SQ3 and SQ4 are enabled to control the switching switches Q3 and Q4 to be turned on respectively, the inductor L is electrically connected between the first voltage V1 and the second voltage V2, and the upper and lower ends of the capacitor CFLY are electrically connected to the second voltage and floating respectively. At this time, the second state signal S34 is enabled, and the first simulation signal VICX is positively correlated with the difference between the first voltage V1 and the second voltage V2.

[0096] (3) State 3: When both switching signals SQ1 and SQ3 are enabled to control the switching switches Q1 and Q3 to be turned on respectively, the inductor L and the capacitor CFLY are connected in series between the first voltage V1 and the ground potential GND. At this time, the third state signal S13 is enabled, and the first simulation signal VICX is positively correlated with the difference between the first voltage V1 and half of the second voltage V2.

[0097] (4) State 4: When both switching signals SQ2 and SQ4 are enabled to control the switching switches Q2 and Q4 to turn on respectively, the inductor L and the capacitor CFLY are connected in series between the first voltage V1 and the second voltage V2. At this time, the fourth state signal S24 is enabled, and the first simulation signal VICX is positively correlated with the difference between the first voltage V1 and half of the second voltage V2.

[0098] (5) State 5: When multiple switching signals SQ1~SQ4 are all disabled to control multiple switching switches Q1~Q4 to not be turned on, the inductor L is electrically connected between the first voltage and the floating connection, and the upper and lower ends of the capacitor CFLY are floating. At this time, the fifth state signal Szc is enabled, and the first simulation signal VICX is positively correlated with the ground potential GND.

[0099] In one embodiment, during a switching cycle, the multi-stage switching circuit 1000 sequentially switches between states 1, 3, 1, and 4 to operate in either Continuous Conduction Mode (CCM) or Boundary Conduction Mode (BCM). In this embodiment, V1 > (1 / 2 V2), and the duty cycle is greater than 1 / 2. In another embodiment, during a switching cycle, the multi-stage switching circuit 1000 sequentially switches between the above-mentioned states 3, 2, 4, and 2 to operate in continuous conduction mode or boundary conduction mode. In this embodiment, V1 < (1 / 2) V2), and the duty cycle is less than 1 / 2.

[0100] In another embodiment, when the multi-stage switching conversion circuit 1000 operates in discontinuous conduction mode (DCM), between the aforementioned switching cycles, the multi-stage switching conversion circuit 1000 also switches to state 5. It should be noted that within the same switching cycle operation of the multi-stage switching conversion circuit, states 3 and 4 must be included simultaneously, allowing the capacitor CFLY to be electrically connected between the first voltage V1 and the ground potential GND, or electrically connected between the first voltage V1 and the second voltage V2, through switching between different states. Thus, the voltage across the capacitor CFLY in steady state is equal to half of the second voltage (1 / 2). V2), to maintain the power conversion between the first voltage V1 and the second voltage V2.

[0101] In one specific embodiment, such as Figure 4 and Figure 6B As shown, the fourth candidate voltage VCA4 corresponds to the ground potential GND. The first candidate voltage VCA1, the second candidate voltage VCA2, the third candidate voltage VCA3, and the fifth candidate voltage VCA5 can be represented by the following equations (I) to (IV):

[0102] VCA1=0.1 V1-0.05 V2 type (I)

[0103] VCA2=0.1 V1 (II)

[0104] VCA3=0.05 V2 type (III)

[0105] VCA5=0.05 / 2 V2 (IV)

[0106] In one embodiment, the first simulation signal VICX is generated based on the voltage division of the first sub-simulation signal VIC1 and the second sub-simulation signal VIC2 when the first state signal S12, the second state signal S34, the third state signal S13 and the fourth state signal S24 are enabled, and the first simulation signal VICX is generated based on the fifth candidate voltage VCA5 when the fifth state signal Szc is enabled.

[0107] In one embodiment, the first simulation signal VICX has a first simulation voltage value VICX (1) during the enable period of the first state signal S12, a second simulation voltage value VICX (2) during the enable period of the second state signal S34, and a third simulation voltage value VICX (34) during the enable period of the third state signal S13 or the fourth state signal S24.

[0108] In one embodiment, the average voltage value VICavg of the second simulated signal is determined according to one of the following: when the duty cycle is greater than half, the average voltage value VICavg is determined according to the first simulated voltage value VICX (1), the third simulated voltage value VICX (34), and the corresponding duty cycle; or when the duty cycle is less than half, the average voltage value VICavg is determined according to the second simulated voltage value VICX (2), the third simulated voltage value VICX (34), and the corresponding duty cycle. In a specific embodiment, when the duty cycle is greater than half, the average voltage value VICavg of the second simulated signal can be represented by the following equation (v), and when the duty cycle is less than half, the average voltage value VICavg of the second simulated signal can be represented by the following equation (vi).

[0109] Formula (5)

[0110] Formula (VI)

[0111] In equations (v) and (vi), Ts is the switching period of the multi-stage switching conversion circuit 1000, and D is the duty cycle. In a specific embodiment, as follows... Figure 6B As shown, the average voltage value VICavg of the second simulated signal is equal to 0.025 according to the calculation results of equations (V) and (VI). V2. As can be seen from equations (V) and (VI) and the above description, the average voltage value VICavg is positively correlated with the second voltage V2. More specifically, in this embodiment, the average voltage value VICavg is positively correlated with the voltage across capacitor CFLY.

[0112] It should be noted that, in one embodiment, as Figure 6BAs shown, the difference between the average voltage values ​​VICavg of the first simulated signal VICX and the second simulated signal is positively correlated with the inductor voltage VL. In other words, the difference between the average voltage values ​​VICavg of the first simulated signal VICX and the second simulated signal is positively correlated with the slope of the inductor current IL. In an embodiment of the present invention, the filter current Ir can be represented by the following equation (vii):

[0113] Ir = (VICX - VICavg) / Rr (Equation 7)

[0114] As can be seen from equation (VII), in one embodiment, the second simulation signal VIC generated by integrating the filtering current Ir with the integrating capacitor Cr can be used to simulate the inductor current IL.

[0115] Please also refer to Figure 6B and Figure 7 . Figure 7 This diagram shows the operation waveforms of the multi-stage switching conversion circuit and the inductor current simulation circuit in one embodiment of the present invention. Figure 7 As shown, in one embodiment, switching signals SQ1 and SQ4 are inverted, and switching signals SQ2 and SQ3 are inverted. In this embodiment, when the multi-stage switching conversion circuit 1000 operates in continuous conduction mode or boundary conduction mode, during the switching period Ts, the multi-stage switching conversion circuit 1000 sequentially switches to state 1, state 3, state 1, and state 4, and then enters the next switching period. In this embodiment, since the first sub-simulation signal VIC1 is a fixed value (0.1) in states 1, 3, and 4... V1), therefore its waveform has no high or low changes. The second sub-simulation signal VIC2 is ground potential GND in states 3 and 4, and is 0.05 in state 1. V2, therefore its waveform is a square wave.

[0116] It is worth noting that, in Figure 4 and Figure 7 In this embodiment, the first simulated signal VICX is a square wave (VICX' is the same), while the second simulated signal VIC should theoretically exhibit a shape close to a triangular wave. However, in this embodiment, the square wave amplitude of the first simulated signal VICX is much larger than the triangular wave amplitude exhibited by the second simulated signal VIC. Therefore, the voltage difference generated across the filter resistor Rr, i.e., the voltage difference between the first simulated signal VICX and the second simulated signal VIC, is still approximately a square wave, or approximately the average voltage value VICavg of the first simulated signal VICX minus the second simulated signal. Furthermore, after this voltage difference is integrated by the integrating capacitor Cr, the final second simulated signal VIC still roughly exhibits a triangular wave shape. Thus, this invention achieves accurate simulation of the inductor current IL using only a simple circuit structure.

[0117] It should be noted that, in one embodiment, the multi-stage switching circuit 1000 may also sequentially switch between state 3, state 2, state 4, and state 2 within a switching cycle. In one embodiment, when the multi-stage switching circuit 1000 operates in discontinuous conduction mode, at the end of each switching cycle (e.g., Figure 7 At the end of each state 4, the system enters state 5, in which all switching signals SQ1~SQ4 are disabled. The above operational details can be found in [the documentation / source]. Figure 7 This can be inferred from the embodiments.

[0118] It should also be noted that the inductor current IL is positively correlated with the inductor voltage VL, and the inductor voltage VL is positively correlated with the linear superposition of the first voltage V1, the second voltage V2, the ground potential, and their combinations. In one embodiment, the present invention selects multiple candidate voltages VCAG corresponding to different switching states of multiple switches Q1~Q4 through a selection circuit to generate a first simulation signal VICX. The difference between the average voltage value VICavg of the first simulation signal VICX and the second simulation signal is used to generate a filter current Ir. Finally, the filter current Ir is integrated to generate a second simulation signal VIC. Since the multiple candidate voltages VCAG are also related to the linear superposition of the first voltage V1, the second voltage V2, the ground potential, and their combinations, the present invention can simulate the inductor current IL in the above manner without having to separately detect the currents of multiple switches Q1~Q4 and combine them to form the inductor current IL. Therefore, the inductor current simulation circuit of the present invention can avoid the problem of gain difference caused by current detection of different switches.

[0119] The present invention has been described above with reference to preferred embodiments. However, the above description is only intended to facilitate understanding of the invention by those skilled in the art and is not intended to limit the scope of the invention. The described embodiments are not limited to individual application and can also be used in combination. For example, two or more embodiments can be used in combination, and some components of one embodiment can be used to replace corresponding components in another embodiment. Furthermore, within the same spirit of the invention, those skilled in the art can conceive of various equivalent changes and combinations. For example, the phrase "processing or calculating based on a signal or generating an output result" in the present invention is not limited to the signal itself, but also includes, when necessary, performing voltage-to-current conversion, current-to-voltage conversion, and / or proportional conversion on the signal, and then processing or calculating based on the converted signal to generate an output result. Therefore, within the same spirit of the invention, those skilled in the art can conceive of various equivalent changes and combinations, and there are many ways to combine them, which will not be listed here. Therefore, the scope of the present invention should cover the above and all other equivalent changes.

Claims

1. An inductor current simulation circuit for simulating an inductor current in a multi-stage switching converter circuit, wherein the multi-stage switching converter circuit periodically switches a capacitor and an inductor between multiple electrical connection states based on a duty cycle according to multiple switching signals, thereby performing a power conversion between a first voltage and a second voltage; the inductor current simulation circuit includes: A selection circuit is used to select multiple candidate voltages based on multiple state signals to generate a first simulation signal; as well as A filter circuit is used to generate a second simulation signal based on the difference between the first simulation signal and a bias voltage value to simulate the inductor current. The difference between the first simulated signal and the bias voltage value is positively correlated with the inductor voltage on the inductor corresponding to the multiple electrical connection states. The plurality of state signals are related to the plurality of switching signals, each of the plurality of state signals corresponds to each of the plurality of electrical connection states, and the plurality of candidate voltages are related to the linear superposition of the first voltage, the second voltage, a ground potential, and combinations thereof.

2. The inductor current simulation circuit as described in claim 1, wherein, The bias voltage value is positively correlated with an average voltage value of the second simulated signal.

3. The inductor current simulation circuit as described in claim 2, wherein, The average voltage value of the second simulated signal is positively correlated with the second voltage.

4. The inductor current simulation circuit as described in claim 1, wherein, The plurality of state signals includes a first state signal, a second state signal, a third state signal, a fourth state signal, and a fifth state signal, each corresponding to one of the following states: (1) When the first state signal is enabled, the first simulated signal is positively correlated with the first voltage; (2) When the second state signal is enabled, the first simulation signal is positively correlated with the difference between the first voltage and the second voltage; (3) When the third state signal is enabled, the first simulation signal is positively correlated with the difference between the first voltage and half of the second voltage; (4) When the fourth state signal is enabled, the first simulation signal is positively correlated with the difference between the first voltage and half of the second voltage; or (5) When the fifth state signal is enabled, the first simulation signal is positively correlated with the ground potential.

5. The inductor current simulation circuit as described in claim 4, wherein, The electrical connection states of the capacitor and the inductor correspond to one of the following: (1) When the first state signal is enabled, the inductor is electrically connected between the first voltage and the ground potential, and the upper end and lower end of the capacitor are floating and electrically connected to the ground potential, respectively. (2) When the second state signal is enabled, the inductor is electrically connected between the first voltage and the second voltage, and the upper and lower ends of the capacitor are electrically connected to the second voltage and floating respectively; (3) When the third state signal is enabled, the inductor and the capacitor are connected in series between the first voltage and the ground potential; (4) When the fourth state signal is enabled, the inductor and the capacitor are connected in series between the first voltage and the second voltage; or (5) When the fifth state signal is enabled, the inductor is electrically connected between the first voltage and the floating connection, and the capacitor is floating.

6. The inductor current simulation circuit as described in claim 2, wherein, The first simulated signal has a first simulated voltage value during an enable period of the first state signal, a second simulated voltage value during an enable period of the second state signal, and a third simulated voltage value during an enable period of the third or fourth state signal, wherein the average voltage value of the second simulated signal is determined according to one of the following: When the duty cycle is greater than one-half, the average voltage value is determined based on the first simulated voltage value, the third simulated voltage value, and the corresponding duty cycle; or When the duty cycle is less than half, the average voltage value is determined based on the second simulated voltage value, the third simulated voltage value, and the corresponding duty cycle.

7. The inductor current simulation circuit as described in any one of claims 1 or 3, wherein, The filter circuit includes: A voltage-to-current conversion circuit is used to generate a filtered current based on the difference between the average voltage values ​​of the first simulated signal and the second simulated signal, thereby simulating the inductor voltage; and An integrating capacitor is used to generate the second simulation signal based on the integral of the filtered current, thereby simulating the inductor current.

8. The inductor current simulation circuit as described in claim 7, wherein, The voltage-to-current conversion circuit includes a filter resistor for generating the filter current, wherein one end of the filter resistor receives the first simulated signal to generate the second simulated signal at the other end of the filter resistor, and the other end of the filter resistor is coupled to the integrating capacitor.

9. The inductor current simulation circuit as described in claim 4, wherein, The selection circuit includes multiple selection switches, comprising a first group of selection switches, a second group of selection switches, and a third group of selection switches, wherein the multiple candidate voltages include first to fifth candidate voltages; and the multiple selection switches operate as follows: The first set of selection switches selects the first candidate voltage when the second state signal is enabled, and selects the second candidate voltage when the first state signal, the third state signal and the fourth state signal are enabled, so as to generate a first sub-simulation signal. The second set of selection switches selects the third candidate voltage when the first state signal is enabled, and selects the fourth candidate voltage when the second state signal, the third state signal and the fourth state signal are enabled, so as to generate a second sub-simulation signal. as well as The third set of selection switches selects the fifth candidate voltage based on the multiple state signals when the fifth state signal is enabled; The first simulation signal is generated based on the voltage division of the first sub-simulation signal and the second sub-simulation signal when the first state signal, the second state signal, the third state signal and the fourth state signal are enabled, and the first simulation signal is generated based on the fifth candidate voltage when the fifth state signal is enabled.

10. The inductor current simulation circuit as described in claim 9, wherein, The selection circuit also includes a logic circuit for generating multiple control signals based on the multiple status signals to control the switching of the multiple selection switches, thereby selecting the multiple candidate voltages.

11. A simulation control method for simulating an inductor current in a multi-stage switching converter circuit, wherein the multi-stage switching converter circuit periodically switches a capacitor and an inductor between multiple electrical connection states based on a duty cycle according to multiple switching signals, thereby performing a power conversion between a first voltage and a second voltage; the simulation control method includes: Multiple candidate voltages are selected based on multiple state signals to generate a first simulation signal; as well as A second simulation signal is generated based on the difference between the first simulation signal and a bias voltage value to simulate the inductor current. The difference between the first simulated signal and the bias voltage value is positively correlated with the inductor voltage on the inductor corresponding to the multiple electrical connection states. The plurality of state signals are related to the plurality of switching signals, each of the plurality of state signals corresponds to each of the plurality of electrical connection states, and the plurality of candidate voltages are related to the linear superposition of the first voltage, the second voltage, a ground potential, and combinations thereof.

12. The simulation control method as described in claim 11, wherein, The bias voltage value is positively correlated with an average voltage value of the second simulated signal.

13. The simulation control method as described in claim 12, wherein, The average voltage value of the second simulated signal is positively correlated with the second voltage.

14. The simulation control method as described in claim 11, wherein, The plurality of state signals includes a first state signal, a second state signal, a third state signal, a fourth state signal, and a fifth state signal, each corresponding to one of the following states: (1) When the first state signal is enabled, the first simulated signal is positively correlated with the first voltage; (2) When the second state signal is enabled, the first simulation signal is positively correlated with the difference between the first voltage and the second voltage; (3) When the third state signal is enabled, the first simulation signal is positively correlated with the difference between the first voltage and half of the second voltage; (4) When the fourth state signal is enabled, the first simulation signal is positively correlated with the difference between the first voltage and half of the second voltage; or (5) When the fifth state signal is enabled, the first simulation signal is positively correlated with the ground potential.

15. The simulation control method as described in claim 14, wherein, The electrical connection states of the capacitor and the inductor correspond to one of the following: (1) When the first state signal is enabled, the inductor is electrically connected between the first voltage and the ground potential, and the upper end and lower end of the capacitor are floating and electrically connected to the ground potential, respectively. (2) When the second state signal is enabled, the inductor is electrically connected between the first voltage and the second voltage, and the upper and lower ends of the capacitor are electrically connected to the second voltage and floating respectively; (3) When the third state signal is enabled, the inductor and the capacitor are connected in series between the first voltage and the ground potential; (4) When the fourth state signal is enabled, the inductor and the capacitor are connected in series between the first voltage and the second voltage; or (5) When the fifth state signal is enabled, the inductor is electrically connected between the first voltage and the floating connection, and the capacitor is floating.

16. The simulation control method as described in claim 12, wherein, The first simulated signal has a first simulated voltage value during an enable period of the first state signal, a second simulated voltage value during an enable period of the second state signal, and a third simulated voltage value during an enable period of the third state signal or the fourth state signal. The steps for determining the average voltage value of the second simulated signal include one of the following: When the duty cycle is greater than one-half, the average voltage value is determined based on the first simulated voltage value, the third simulated voltage value, and the corresponding duty cycle. or When the duty cycle is less than half, the average voltage value is determined based on the second simulated voltage value, the third simulated voltage value, and the corresponding duty cycle.

17. The simulation control method according to any one of claim 11 or claim 13, wherein, The steps for generating the second simulated signal include: A filtered signal is generated based on the difference between the average voltage values ​​of the first simulated signal and the second simulated signal, thereby simulating the inductor voltage; and The second simulation signal is generated based on the integral of the filtered signal, thereby simulating the inductor current.

18. The simulation control method as described in claim 14, wherein, The steps for selecting these candidate voltages include: Based on the multiple state signals, the first candidate voltage is selected when the second state signal is enabled, and the second candidate voltage is selected when the first state signal, the third state signal, and the fourth state signal are enabled, so as to generate a first sub-simulation signal. Based on the multiple state signals, the third candidate voltage is selected when the first state signal is enabled, and the fourth candidate voltage is selected when the second, third, and fourth state signals are enabled, to generate a second sub-simulation signal; and Based on the multiple state signals, the fifth candidate voltage is selected when the fifth state signal is enabled.

19. The simulation control method as described in claim 18, wherein, The steps for generating the first simulated signal include: When the first state signal, the second state signal, the third state signal, and the fourth state signal are enabled, the first simulation signal is generated based on the voltage division of the first sub-simulation signal and the second sub-simulation signal; and When the fifth state signal is enabled, the first simulation signal is generated based on the fifth candidate voltage.

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