A power management circuit, chip and electronic device

Abstract

The embodiment of the application provides a power management circuit, a chip and an electronic device, relates to the technical field of electronics, and is used for improving transient response performance. The power management circuit comprises an error amplifier, a compensation network, a first power stage, and a feedback network and an adaptive transient optimization (ATI) network. The error amplifier is coupled with the first power stage through the compensation network, the first power stage is coupled with the error amplifier through the feedback network, and the ATI network is coupled with at least one of the error amplifier, the compensation network and the first power stage. The ATI network is used for outputting a first control signal, and the first control signal is used for controlling the error amplifier, the compensation network or the first power stage.

Description

Technical Field

[0001] This application relates to the field of electronic technology, and in particular to a power management circuit, chip, and electronic device. Background Technology

[0002] Power management circuits are crucial components in any device, converting unstable power supplies into stable output voltages to power multiple components within the device. With the rapid development of various application scenarios such as mobile devices, intelligent connected vehicles, communication equipment, data centers, and medical devices, the performance requirements for power management circuits are becoming increasingly demanding.

[0003] Peak current mode (PCM) based switching power supplies, as a type of power management circuit, are widely used in mobile devices and intelligent connected vehicles due to their advantages such as constant switching frequency and ease of power noise filter design. A PCM-based switching power supply mainly consists of two parts: a power conversion circuit that performs power conversion, and a control loop that controls the peak current. This control loop controls the output voltage of the power conversion circuit based on the peak current of the inductor in the power conversion circuit to ensure its stability.

[0004] Although the aforementioned PCM-based switching power supply can maintain a constant switching frequency and has low electromagnetic interference (EMI) throughout the entire operation, it has a certain delay in the recovery of the output voltage when faced with sudden load changes, resulting in insufficient dynamic response capability. Summary of the Invention

[0005] This application provides a power management circuit, chip, and electronic device for improving the dynamic response performance of the power management circuit.

[0006] To achieve the above objectives, the embodiments of this application adopt the following technical solutions:

[0007] In a first aspect, a power management circuit is provided, which can be a switching power supply. The power management circuit includes: an error amplifier, a compensation network, a first power stage, a feedback network, and an adaptive transient optimization (ATI) network. The error amplifier is coupled to the first power stage through the compensation network, and the first power stage is coupled to the error amplifier through the feedback network. The ATI network is coupled to at least one of the error amplifier, the compensation network, and the first power stage. The ATI network outputs a first control signal, which controls the error amplifier, the compensation network, or the first power stage. The first control signal is related to fluctuations in the output voltage. Optionally, the ATI network can be used to detect fluctuations in the output voltage, for example, directly or indirectly.

[0008] In the above technical solution, an ATI network is introduced into the power management circuit. This ATI network can be used to detect fluctuations in the output voltage of the power management circuit and output control signals. These control signals dynamically control the error amplifier, the compensation network, or the first power stage to accelerate the adjustment speed of the output voltage, thereby improving the dynamic response performance of the power management circuit. Furthermore, the ATI network has adaptive characteristics, which can effectively improve the transient response under different load scenarios, enabling the power management circuit to have low static power consumption, low EMI interference, and good transient response.

[0009] In one possible implementation of the first aspect, when the output voltage fluctuation is less than or equal to a first preset threshold, the ATI network is in a closed state, for example, when the power management circuit is in a sleep state, the ATI network is closed; when the output voltage fluctuation is greater than the first preset threshold, the ATI network is in an active state, for example, when the power management circuit is in a wake-up state, the ATI network is active. In the above possible implementation, when the output voltage fluctuation is small, the ATI network is in a closed state to reduce static power consumption; when the output voltage fluctuation is large, the ATI network is in an active state to quickly restore the output voltage stability, thereby improving the transient response of the power management circuit.

[0010] In one possible implementation of the first aspect, the ATI network includes a first gain control circuit, and the compensation network includes a second gain control circuit, wherein the gain of the first gain control circuit is greater than the gain of the second gain control circuit. The power management circuit further includes an adder circuit, the first gain control circuit is coupled to the error amplifier, and the second gain control circuit and the first gain control circuit are coupled to a first power stage through the adder circuit. In the above possible implementation, the ATI network can be used to detect the error signal output by the error amplifier and control the first power stage through the error signal to accelerate the adjustment speed of the first power stage, thereby improving the dynamic response performance of the power management circuit.

[0011] In one possible implementation of the first aspect, a first gain control circuit is used to output a first control signal based on a first error signal; a second gain control circuit is used to output a second control signal based on the first error signal; and the adder circuit is used to output a target control signal based on the first and second control signals, the target control signal being used to control a first power stage. In the above possible implementation, the ATI network can be used to detect the error signal output by the error amplifier and control the first power stage through the error signal to accelerate the adjustment speed of the first power stage, thereby improving the dynamic response performance of the power management circuit.

[0012] In one possible implementation of the first aspect, the ATI network includes a coupled first transconductance circuit and a current-squared circuit, and the error amplifier includes a second transconductance circuit; wherein the first transconductance circuit is coupled to the feedback network, the current-squared circuit is coupled to the compensation network, and the second transconductance circuit is coupled to both the feedback network and the compensation network. In the above possible implementation, the ATI network can be used to detect the error signal output by the error amplifier and control the compensation network through the error signal to accelerate the adjustment speed of the output voltage, thereby improving the dynamic response performance of the power management circuit.

[0013] In one possible implementation of the first aspect, a first transconductance circuit is used to output a first error signal based on a feedback voltage and a reference voltage; the current squaring circuit is used to output an error squared signal based on the first error signal; a second transconductance circuit is used to output a second error signal based on the feedback voltage and the reference voltage; the compensation network is further used to output a target control signal based on the error squared signal and the second error signal, the target control signal being used to control the first power stage. In the above possible implementation, the ATI network can be used to detect the error signal output by the error amplifier and control the compensation network through the error signal to accelerate the adjustment speed of the output voltage, thereby improving the dynamic response performance of the power management circuit.

[0014] In one possible implementation of the first aspect, the ATI network includes a current-squaring circuit, and the error amplifier includes a second transconductance circuit; wherein the second transconductance circuit is coupled to the compensation network, and the second transconductance circuit is also coupled to the compensation network through the current-squaring circuit. In the above possible implementation, the ATI network can be used to detect the error signal output by the error amplifier and control the output of the error amplifier through the error signal to accelerate the adjustment speed of the output voltage, thereby improving the dynamic response performance of the power management circuit.

[0015] In one possible implementation of the first aspect, the feedback network is used to output a feedback voltage based on the output voltage; the error amplifier is used to output a first error signal based on the feedback voltage and the reference voltage; the compensation network is used to output a second control signal or a target control signal based on the first error signal, the target control signal including the second control signal; and the first power stage is used to output the output voltage based on the target control signal. In the above possible implementation, the error amplifier amplifies the error between the feedback voltage and the reference voltage to obtain the first error signal, the compensation network receives and processes the first error signal and outputs the second control signal, and the second control signal controls the first power stage to output the output voltage.

[0016] In one possible implementation of the first aspect, the power management circuit further includes a second power stage coupled to the ATI network; the ATI network is also used to output a third control signal; the second power stage is used to adjust the output voltage according to the third control signal. In the above possible implementation, when the output voltage fluctuates such as drops or surges, the ATI network outputs multiple control signals based on a first error signal output by the error amplifier. A portion of the control signals, superimposed with the control signals output by the compensation network, acts on the first power stage, thereby accelerating the loop regulation speed; another portion of the control signals acts on the second power stage to directly regulate the output voltage, thereby enabling the output voltage to recover quickly.

[0017] In one possible implementation of the first aspect, the second power stage includes a third and a fourth transducer coupled in series between a power supply terminal and a ground terminal; wherein the coupling point of the third and fourth transducers is used to regulate the output voltage, and the input terminals of both the third and fourth transducers are coupled to the ATI network. In the above possible implementation, the second power stage can accelerate the regulation speed of the output voltage, thereby improving the dynamic response performance of the power management circuit.

[0018] In one possible implementation of the first aspect, the ATI network has at least one transfer function that satisfies one or more of the following conditions: positively correlated with the error when the error is greater than or equal to a first error threshold; positively correlated with the square of the error when the error is greater than or equal to a second error threshold and less than the first error threshold; negatively correlated with the square of the error when the error is greater than or equal to a third error threshold and less than the second error threshold; negatively correlated with the error when the error is less than the third error threshold; positively correlated with the square of the error when the error is greater than or equal to the second error threshold; negatively correlated with the square of the error when the error is less than the second error threshold; and linearly correlated with the error.

[0019] In a second aspect, a power management circuit is provided, comprising: an error amplifier, a compensation network, a first power stage, a feedback network, an adaptive transient optimization (ATI) network, and a second power stage; wherein the error amplifier is coupled to the first power stage through the compensation network, the first power stage is coupled to the error amplifier through the feedback network, and the ATI network is coupled to the second power stage; the ATI network is used to output a third control signal; and the second power stage is used to adjust the output voltage of the power management circuit according to the third control signal.

[0020] In one possible implementation of the second aspect, the second power stage includes a third and a fourth transconductor connected in series between a power supply terminal and a ground terminal; wherein the coupling point of the third and fourth transconductors is used to regulate the output voltage, and the input terminals of the third and fourth transconductors are both coupled to the ATI network.

[0021] Thirdly, a power management chip is provided, the power management chip comprising: a circuit board, and a power management circuit disposed on the circuit board; the power management circuit may be a power management circuit provided by the first aspect or any possible implementation of the first aspect, or a power management circuit provided by the second aspect or any possible implementation of the second aspect.

[0022] Fourthly, an electronic device is provided, comprising: a load, and a power management circuit for supplying power to the load; the power management circuit may be a power management circuit provided in the first aspect or any possible implementation thereof, or a power management circuit provided in the second aspect or any possible implementation thereof.

[0023] Understandably, the beneficial effects achieved by any of the power management chips and electronic devices provided above can be referred to in the power management circuits provided above, and will not be repeated here. Attached Figure Description

[0024] Figure 1 A schematic diagram of a PCM-based switching power supply provided for an embodiment of this application;

[0025] Figure 2 Waveform diagrams of multiple signals in a switching power supply provided in an embodiment of this application;

[0026] Figure 3 A dynamic response diagram of the output voltage in a switching power supply provided in an embodiment of this application;

[0027] Figure 4 A system block diagram of a power management circuit provided in an embodiment of this application;

[0028] Figure 5 A schematic diagram of the structure of a vehicle provided in an embodiment of this application;

[0029] Figure 6 This is a schematic diagram of a power management circuit provided in an embodiment of this application;

[0030] Figure 7 This is a schematic diagram of another power management circuit provided in an embodiment of this application;

[0031] Figure 8 A schematic diagram of a transfer function provided in an embodiment of this application;

[0032] Figure 9 This is a schematic diagram of another power management circuit provided in an embodiment of this application;

[0033] Figure 10 This is a schematic diagram of another power management circuit provided in an embodiment of this application;

[0034] Figure 11 This is a schematic diagram of another power management circuit provided in an embodiment of this application;

[0035] Figure 12 This is a schematic diagram of another power management circuit provided in an embodiment of this application;

[0036] Figure 13 This is a schematic diagram of the structure of an electronic device provided in an embodiment of this application. Detailed Implementation

[0037] The technical solutions in the embodiments of this application will be described below with reference to the accompanying drawings. In this application, "at least one" means one or more, and "more than one" means two or more. "And / or" describes the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, or B exists alone, where A and B can be singular or plural. The character " / " generally indicates that the related objects before and after are in an "or" relationship. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one of a, b, or c can mean: a, b, c, a and b, a and c, b and c, a, b, and c; where a, b, and c can be single or multiple.

[0038] The embodiments of this application use terms such as "first" and "second" to distinguish objects with similar names, functions, or effects. Those skilled in the art will understand that the terms "first" and "second" do not limit the quantity or order of execution. The term "coupling" is used to indicate an electrical connection, including direct connection via wires or terminals or indirect connection via other devices. Therefore, "coupling" should be considered as a broad type of electronic communication connection.

[0039] In this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or illustration. Any embodiment or design described as "exemplary" or "for example" in this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.

[0040] Before introducing the embodiments of this application, the application scenarios involved in this application will be described first.

[0041] DC-DC converters and low-dropout regulators (LDOs) are crucial components in electronic devices. They convert the voltage of unstable power sources such as uninterruptible power supplies (UPS), batteries, and lithium-ion batteries into stable output voltages to power multiple devices within the equipment. With the rapid development of applications in mobile devices, connected cars, communication equipment, data centers, and medical devices, the performance requirements for power management circuits are becoming increasingly stringent. For example, power management circuits are required to have low quiescent power consumption, low noise, and good transient response. Furthermore, as electronic devices continue to shrink in size, a power management circuit that simultaneously possesses high integration, low noise, low EMI interference, low quiescent power consumption, and good dynamic response (or transient response) can significantly enhance the product competitiveness of electronic devices.

[0042] PCM-based switching power supplies, as a type of power management circuit, are widely used in mobile devices and intelligent connected vehicles due to their characteristics such as constant switching frequency and ease of power noise filter design. A PCM-based switching power supply mainly consists of two parts: a power conversion circuit that performs power conversion, and a control loop that controls the peak current. This control loop controls the output voltage of the power conversion circuit based on the peak current of the inductor in the power conversion circuit to ensure its stability.

[0043] For example, such as Figure 1 As shown, the power conversion circuit may include switching transistors M1 and M2, inductor L, capacitor C0, and resistor R0. The control loop may include a feedback network (resistors R11 and R12), an error amplifier EA1, an RC compensation network (resistors R21, capacitors C21 and C22), an adder circuit AD, a current-to-voltage network (i.e., the IV network), a comparator COM, an RS flip-flop TRI, and a driver circuit DRV. M1 and M2 are series-coupled between the power supply terminal VIN and the ground terminal. M1 and M2 alternately conduct, generating an output voltage Vo through inductor L, capacitor C0, and resistor R0. This output voltage Vo generates a feedback voltage Vfb through resistors R11 and R12. The error amplifier EA1 compares the feedback voltage Vfb with the reference voltage Vref to generate an error signal and amplifies it. The amplified error signal passes through the RC compensation network to generate a control signal Vctr. The current sampling network SI collects the inductor current I. L The inductor current I L The ramp current Iramp is superimposed by the adder circuit AD and converted into a voltage signal Vcs by the IV network. When the control signal Vctr and the voltage signal Vcs are equal, the comparator COM resets the RS flip-flop TRI, so that the PWM signal output by the drive circuit DRV controls M1 to turn off and M2 to turn on, and the inductor current I... L The clock signal CLK triggers the RS flip-flop with a constant period, causing the PWM signal output by the drive circuit DRV to control M1 to turn on and M2 to turn off, thus controlling the inductor current I. L The voltage increases until the control signal Vctr and the voltage signal Vcs are equal again, and this cycle repeats. Figure 2 The waveforms of several signals in this switching power supply are shown, including the clock signal CLK, the load current Io, and the inductor current I. L The control signal Vctr, the voltage signal Vcs, and the PWM signal.

[0044] While the aforementioned switching power supply maintains a constant switching frequency and exhibits low EMI throughout operation, it suffers from a certain delay in the recovery of the output voltage Vo when faced with sudden load changes, resulting in insufficient dynamic response capability. For example, ... Figure 3 As shown, when the load current Io suddenly increases, the output voltage Vo drops. The output voltage Vo drops to its lowest value at time t1, while the control signal Vctr reaches its maximum value at time t2 after a delay of time Tdelay. Thus, the output voltage Vo begins to recover rapidly at time t2.

[0045] Based on this, this application provides a power management circuit that incorporates an adaptive transient improvement (ATI) network. This ATI network can detect fluctuations in the output voltage of the power management circuit and output control signals based on these fluctuations. The control signals dynamically control the main loop in the power management circuit, exhibiting adaptive characteristics. This effectively improves the transient response under different load scenarios, resulting in a power management circuit with low static power consumption, low EMI interference, and good transient response.

[0046] For example, Figure 4 A system block diagram of a typical power management circuit is shown. This power management circuit includes an error amplifier 11, a compensation network 12, and a power stage 13 coupled in sequence, and a feedback network 14 coupled between the power stage 13 and the error amplifier 11. The error amplifier 11, the compensation network 12, the power stage 13, and the feedback network 14 can form a main loop. Optionally, the error amplifier 11, the compensation network 12, and the power stage 13 can be powered by an input power supply 15. In this embodiment, an ATI network can be introduced into the power management circuit. The ATI1 network can be coupled to at least one of the error amplifier 11, the compensation network 12, and the power stage 13 to improve transient response under different load scenarios. Furthermore, the power management circuit provided in this embodiment can also include a power stage coupled between the ATI network and the output terminal of the power management circuit. This power stage can be called an auxiliary power stage. The ATI1 network can also control the auxiliary power stage to achieve rapid stabilization of the output voltage through adjustment of the auxiliary power stage.

[0047] The technical solution of this application can be applied to various electronic devices with power management circuits. Optionally, the electronic device may include, but is not limited to: mobile phone, tablet computer, laptop computer, PDA, mobile internet device (MID), camera, wearable device, audio equipment, audio and video player, set-top box, game console, printer, mouse, keyboard, in-vehicle equipment, virtual reality (VR) device, augmented reality (AR) device, wireless terminal in industrial control, smart home device, smart robot, workshop equipment, wireless terminal in self-driving, wireless terminal in remote medical surgery, wireless terminal in smart grid, wireless terminal in transportation safety, wireless terminal in smart city, or wireless terminal in smart home, flight equipment, etc. For example, wearable devices include smartwatches, smart bracelets, pedometers, etc.; in-vehicle devices include equipment on vehicles such as cars, airplanes, ships, trains, and high-speed trains; smart home devices include refrigerators, televisions, air conditioners, electricity meters, etc.; and flying devices include intelligent robots, hot air balloons, drones, airplanes, etc. The following example uses a mobile phone to illustrate the structure of this electronic device.

[0048] The structure of this electronic device will be illustrated below using a vehicle as an example.

[0049] Figure 5 This is a structural diagram of a vehicle provided in an embodiment of this application, which may have autonomous driving capabilities. In one possible embodiment, the vehicle is configured in a fully or partially autonomous driving mode. For example, while in autonomous driving mode, the vehicle controls itself and can determine the current state of the vehicle and its surrounding environment through human intervention, determine the possible behaviors of at least one other vehicle in the surrounding environment, and determine the confidence level corresponding to the probability of that other vehicle performing the possible behavior, and control the vehicle based on the determined information. When the vehicle is in autonomous driving mode, it can be set to operate without human interaction. In another embodiment, the vehicle may be a vehicle with a disabled P-gear locking mechanism and / or a vehicle supporting remote parking assist (RPB) functionality.

[0050] The vehicle may include various subsystems, such as a mobility system 102, a sensor system 104, a control system 106, one or more peripheral devices 108, a power supply 110, a computer system 112, and a user interface 116. Optionally, the vehicle may include more or fewer subsystems, and each subsystem may include multiple components. Furthermore, each subsystem and component of the vehicle may be interconnected via wired or wireless means.

[0051] The propulsion system 102 may include components that provide powered motion to the vehicle. In one embodiment, the propulsion system 102 may include an engine 118, an energy source 119, a transmission 120, and wheels 121 (or tires). The engine 118 may be an internal combustion engine, an electric motor, an air-compressed engine, or other types of engine combinations, such as a hybrid engine consisting of a gasoline engine and an electric motor, or a hybrid engine consisting of an internal combustion engine and an air-compressed engine. The engine 118 converts the energy source 119 into mechanical energy.

[0052] Examples of energy sources 119 include gasoline, diesel, other petroleum-based fuels, propane, other compressed gas-based fuels, ethanol, solar panels, batteries, and other sources of electricity. Energy source 119 can also provide energy to other systems in the vehicle.

[0053] The transmission 120 can transmit mechanical power from the engine 118 to the wheels 121. The transmission 120 may include a gearbox, a differential, and a drive shaft. In some embodiments, the transmission 120 may also include other components, such as a clutch. The drive shaft may include one or more axles that can be coupled to one or more wheels 121.

[0054] Sensor system 104 may include several sensors for sensing information about the vehicle's surrounding environment. For example, sensor system 104 may include a positioning system 122 (which may be a Global Positioning System (GPS), BeiDou Navigation Satellite System, or another positioning system), an inertial measurement unit (IMU) 124, radar 126, a laser rangefinder 128, and a camera 130. Sensor system 104 may also include sensors for the monitored vehicle's internal systems (e.g., in-vehicle air quality monitor, fuel gauge, oil temperature gauge, etc.). Sensor data from one or more of these sensors can be used to detect objects and their corresponding characteristics (position, shape, orientation, speed, etc.). This detection and identification is a key function for the safe operation of autonomous vehicles.

[0055] The positioning system 122 can be used to estimate the vehicle's geographical location. The IMU 124 is used to sense changes in the vehicle's position and orientation based on inertial acceleration. In some embodiments, the IMU 124 can be a combination of an accelerometer and a gyroscope.

[0056] Radar 126 can use radio signals to sense objects in the vehicle's surrounding environment. In some embodiments, in addition to sensing objects, radar 126 can also be used to sense the speed and / or direction of travel of objects.

[0057] The laser rangefinder 128 can use lasers to sense objects in the environment in which the vehicle is located. In some embodiments, the laser rangefinder 128 may include one or more laser sources, a laser scanner, and one or more detectors, as well as other system components.

[0058] Camera 130 can be used to capture multiple images of the vehicle's surrounding environment. Camera 130 can be a still camera or a video camera.

[0059] The control system 106 controls the operation of the vehicle and its components. The control system 106 may include various elements, including a steering system 132, a throttle 134, a braking system 136, a sensor fusion algorithm 138, a computer vision system 140, a route control system 142, and an obstacle avoidance system 144.

[0060] The steering system 132 is operable for adjusting the vehicle's forward direction. For example, in one embodiment, the steering system 132 may be a steering wheel system.

[0061] Throttle 134 is used to control the operating speed of engine 118 and thus the speed of the vehicle.

[0062] The braking system 136 is used to apply a certain braking force to the wheels 121, thereby forcibly braking them to a certain extent. The braking system 136 functions to forcibly decelerate or even stop a moving vehicle as required by the driver or controller, or to stably park a stopped vehicle under various road conditions (e.g., on a slope), or to maintain a stable speed for a vehicle traveling downhill. In one embodiment, the braking system 136 may use friction to slow down the wheels 121. In other embodiments, the braking system 136 may convert the kinetic energy of the wheels 121 into electrical current, or it may employ other methods to slow down the rotational speed of the wheels 121 to control the vehicle's speed.

[0063] The computer vision system 140 is operable to process and analyze images captured by the camera 130 to identify objects and / or features in the vehicle's surrounding environment. The objects and / or features may include traffic signals, road boundaries, and obstacles. The computer vision system 140 may use object recognition algorithms, structure from motion (SFM) algorithms, video tracking, and other computer vision techniques. In some embodiments, the computer vision system 140 may be used to map the environment, track objects, estimate object velocities, and so on.

[0064] The route control system 142 is used to determine the driving route of the vehicle. In some embodiments, the route control system 142 may combine data from sensor 138, GPS 122 and one or more predetermined maps to determine the driving route for the vehicle.

[0065] The obstacle avoidance system 144 is used to identify, assess, and avoid or otherwise traverse potential obstacles in the vehicle's environment.

[0066] Of course, in one instance, the control system 106 may include additional or alternative components besides those shown and described. Alternatively, some of the components shown above may be reduced.

[0067] The vehicle interacts with external sensors, other vehicles, other computer systems, or users via peripheral device 108. Peripheral device 108 may include wireless communication system 146, on-board computer 148, microphone 150, and / or speaker 152.

[0068] In some embodiments, peripheral device 108 provides a means for a vehicle user to interact with user interface 116. For example, on-board computer 148 may provide information to the vehicle user. User interface 116 may also operate on-board computer 148 to receive user input. On-board computer 148 may be operated via a touchscreen. In other cases, peripheral device 108 may provide a means for the vehicle to communicate with other devices located within the vehicle. For example, microphone 150 may receive audio (e.g., voice commands or other audio input) from a vehicle user. Similarly, speaker 152 may output audio to a vehicle user.

[0069] The wireless communication system 146 can communicate wirelessly with one or more devices directly or via a communication network. For example, the wireless communication system 146 can use 3G cellular communication, such as code division multiple access (CDMA), EVDO, Global System for Mobile Communications (GSM) / General Packet Radio Service (GPRS), or 4G cellular communication, such as long term evolution (LTE), or 5G cellular communication. The wireless communication system 146 can communicate using WiFi and a wireless local area network (WLAN). In some embodiments, the wireless communication system 146 can communicate directly with devices using an infrared link, Bluetooth, or ZigBee. Other wireless protocols, such as various vehicle communication systems, are also possible. For example, the wireless communication system 146 may include one or more dedicated short range communications (DSRC) devices that can enable public and / or private data communication between vehicles and / or roadside stations.

[0070] Power source 110 can provide power to various components of the vehicle. In one embodiment, power source 110 can be a rechargeable lithium-ion or lead-acid battery. One or more such battery packs can be configured to provide power to various components of the vehicle. In some embodiments, power source 110 and energy source 119 can be implemented together, as in some all-electric vehicles. In embodiments of this application, power source 110 can include a switching power supply, which can also be a flyback power supply; in one example, the switching power supply can be used to power a gate driver in some system or component of the vehicle, which can also be referred to as a gate driver chip.

[0071] Some or all of the vehicle's functions are controlled by computer system 112. Computer system 112 may include at least one processor 113, which executes instructions 115 stored in a non-transitory computer-readable medium such as memory 114. Computer system 112 may also be multiple computing devices that control individual components or subsystems of the vehicle in a distributed manner.

[0072] Processor 113 can be any conventional processor, such as a central processing unit (CPU). Alternatively, the processor can be a dedicated device such as an application-specific integrated circuit (ASIC) or other hardware-based processor. Although the processor, memory, and other components of the computer in the same block are functionally illustrated in the figures, those skilled in the art will understand that the processor, computer, or memory may actually include multiple processors, computers, or memories that may or may not be stored in the same physical housing. For example, memory may be a hard disk drive or other storage media located in a housing different from that of the computer. Therefore, references to processors or computers will be understood to include references to a collection of processors or computers or memories that may or may not operate in parallel. Unlike using a single processor to perform the steps described herein, some components, such as the steering assembly and deceleration assembly, may each have their own processor that performs calculations only related to the component's specific function.

[0073] In the various aspects described herein, the processor may be located remotely from the vehicle and communicate wirelessly with the vehicle. In other aspects, some of the processes described herein are executed on a processor located within the vehicle, while others are executed by a remote processor, including taking the necessary steps to perform a single operation.

[0074] In some embodiments, memory 114 may contain instructions 115 (e.g., program logic) that can be executed by processor 113 to perform various functions of the vehicle, including those described above. Memory 114 may also contain additional instructions, including instructions for transmitting data, receiving data from, interacting with, and / or controlling one or more of the mobility system 102, sensor system 104, control system 106, and peripheral devices 108.

[0075] In addition to instruction 115, memory 114 may also store data such as road maps, route information, vehicle position, direction, speed, and other such vehicle data, as well as other information. This information can be used by the vehicle and computer system 112 during vehicle operation in autonomous, semi-autonomous, and / or manual modes.

[0076] User interface 116 is used to provide information to or receive information from users of the vehicle. Optionally, user interface 116 may include one or more input / output devices within a set of peripheral devices 108, such as wireless communication system 146, on-board computer 148, microphone 150, and speaker 152.

[0077] Computer system 112 can control vehicle functions based on input received from various subsystems (e.g., driving system 102, sensor system 104, and control system 106) and from user interface 116. For example, computer system 112 can utilize input from control system 106 to control steering system 132 to avoid obstacles detected by sensor system 104 and obstacle avoidance system 144. In some embodiments, computer system 112 is operable to provide control over many aspects of the vehicle and its subsystems.

[0078] Alternatively, one or more of these components may be installed separately from or associated with the vehicle. For example, the memory 114 may exist partially or completely separately from the vehicle. The components may be communicatively coupled together in a wired and / or wireless manner.

[0079] Optionally, the above components are just examples. In actual applications, the components in the above modules may be added or deleted according to actual needs. The above examples should not be construed as limiting the embodiments of this application.

[0080] Autonomous vehicles traveling on roads, such as the one described above, can identify objects in their surroundings to determine adjustments to their current speed. These objects can be other vehicles, traffic control equipment, or other types of objects. In some examples, each identified object can be considered independently, and based on the object's individual characteristics, such as its current speed, acceleration, and distance from the vehicle, the speed adjustment to be made by the autonomous vehicle can be determined.

[0081] Optionally, the autonomous vehicle or its associated computing devices (e.g., computer system 112, computer vision system 140, memory 114) can predict the behavior of the identified objects based on the characteristics of the identified objects and the state of the surrounding environment (e.g., traffic, rain, ice on the road, etc.). Optionally, each identified object depends on the behavior of the others, so all identified objects can also be considered together to predict the behavior of a single identified object. The vehicle can adjust its speed based on the predicted behavior of the identified objects. In other words, the autonomous vehicle can determine what steady state the vehicle will need to adjust to (e.g., accelerate, decelerate, or stop) based on the predicted behavior of the objects. In this process, other factors can also be considered in determining the vehicle's speed, such as the vehicle's lateral position on the road, the curvature of the road, the proximity of static and dynamic objects, etc.

[0082] In addition to providing instructions to adjust the speed of the autonomous vehicle, the computing device can also provide instructions to modify the vehicle's steering angle so that the autonomous vehicle follows a given trajectory and / or maintains a safe lateral and longitudinal distance from objects near the autonomous vehicle (e.g., cars in adjacent lanes on the road).

[0083] Understandable Figure 5 The structure of the vehicle shown in the figure does not constitute a limitation on the vehicle and may include more or fewer parts than shown, or combine certain parts, or have different arrangements of parts.

[0084] After introducing the structure of the electronic device, the technical solutions of the embodiments of this application will be described in detail below.

[0085] Figure 6 This application provides a schematic diagram of a power management circuit, which includes an error amplifier 31, a compensation network 32, a first power stage 33, a feedback network 34, and an ATI network 35. The error amplifier 31 is coupled to the first power stage 33 via the compensation network 32, and the first power stage 33 is coupled to the error amplifier 31 via the feedback network 34. For example, the output of the error amplifier 31 is coupled to the input of the compensation network 32, the output of the compensation network 32 is coupled to the control terminal of the first power stage 33, the output of the first power stage 33 is coupled to the input of the feedback network 34, and the output of the feedback network 34 is coupled to the input of the error amplifier 31. The ATI network 35 is coupled to the main loop of the power management circuit; for example, the ATI network 35 is coupled to at least one of the error amplifier 31, the compensation network 32, and the first power stage 33. For example, the output of the ATI network 35 is coupled to the output of the error amplifier 31, or the output of the ATI network 35 is coupled to the input of the compensation network 32, or the output of the ATI network 35 is coupled to the control terminal of the first power stage 33.

[0086] In this power management circuit, the ATI network 35 outputs a first control signal Vctr1, which is related to the fluctuation of the output voltage Vo. The first control signal Vctr1 controls the error amplifier 31, the compensation network 32, or the first power stage 33. For example, the first control signal Vctr1 can be used to control the error amplifier 31; or, the first control signal Vctr1 can be used to control the compensation network 32; or, the first control signal Vctr1 can be used to control the first power stage 33. Optionally, the feedback network 34 can output a feedback voltage Vfb based on the output voltage Vo of the power management circuit; the error amplifier 31 can output a first error signal Verr based on the feedback voltage Vfb and the reference voltage Vref; the compensation network 32 can output a second control signal Vctr2 or a target control signal Vc based on the first error signal Verr, where the target control signal Vc includes the second control signal Vctr2; and the first power stage 33 outputs the output voltage Vo based on the target control signal Vc.

[0087] Optionally, the ATI network 35 can be used to detect fluctuations in the output voltage Vo and output a first control signal Vctr1 based on these fluctuations. In practical applications, the ATI network 35 can be used to directly detect fluctuations in the output voltage Vo, or indirectly. For example, the ATI network 35 can detect the feedback voltage Vfb output by the feedback network 34 to detect fluctuations in the output voltage Vo; or, the ATI network 35 can detect the first error signal Verr output by the error amplifier 31 to detect fluctuations in the output voltage Vo.

[0088] Optionally, when the fluctuation of the output voltage Vo is less than or equal to a first preset threshold, the ATI network 35 is in a turned-off state, for example, when the power management circuit is in a sleep state, the ATI network 35 is turned off; when the fluctuation of the output voltage Vo is greater than the first preset threshold, the ATI network 35 is in an active state, for example, when the power management circuit is in a wake-up state, the ATI network 35 is active. That is, when the fluctuation of the output voltage Vo is small, the ATI network 35 can be in a turned-off state to reduce static power consumption; when the fluctuation of the output voltage Vo is large, the ATI network 35 is in an active state to quickly restore the stability of the output voltage Vo, thereby improving the transient response of the power management circuit.

[0089] The aforementioned first preset threshold can be set in advance. Specifically, it can be determined in various ways, such as application requirements, actual testing, theoretical calculation, and experience. For example, the first preset threshold can be 40mV, 50mV, 55mV, or 60mV, etc. This application embodiment does not impose specific limitations on this.

[0090] Optionally, the ATI network 35 may have at least one transfer function that satisfies one or more of the following conditions: positively correlated with the error when the error is greater than or equal to a first error threshold; positively correlated with the square of the error when the error is greater than or equal to a second error threshold and less than the first error threshold; negatively correlated with the square of the error when the error is greater than or equal to a third error threshold and less than the second error threshold; linearly negatively correlated with the error when the error is less than the third error threshold; positively correlated with the square of the error when the error is greater than or equal to the second error threshold; negatively correlated with the square of the error when the error is less than the second error threshold; and linearly correlated with the error. Here, the error may refer to the output error of the output voltage Vo. Optionally, the error may be represented by a first error signal Verr.

[0091] The first error threshold is greater than the second error threshold, and the second error threshold is greater than the third error threshold. The first, second, and third error thresholds can be preset and can be determined in various ways, such as application requirements, actual testing, theoretical calculations, and experience. For example, the first error threshold can be 50mV, the second error threshold can be 0mV, and the third error threshold can be -50mV. This application embodiment does not impose specific limitations on this.

[0092] Optionally, the at least one transfer function may have a transfer function that satisfies the following conditions: when the error is small, the transfer function has a slope close to 0 so that the loop gain provided by the ATI network 35 is close to 0 and does not affect the stability of the main loop; when the error is large, the slope of the transfer function is limited to prevent the ATI network 35 from being too strong, which would cause the power management circuit to oscillate significantly.

[0093] Furthermore, the ATI network 35 can be connected to different devices in the error amplifier 31, the compensation network 32, or the first power stage 33 to generate the first control signal Vctr1 in different ways. The first control signal Vctr1 can be used to control different devices to adjust the output voltage Vo. Examples are given below.

[0094] In one possible embodiment, such as Figure 7As shown, when the ATI network 35 operates on the first power stage 33, the ATI network 35 includes a first gain control circuit GC1, and the compensation network 32 includes a second gain control circuit GC2. The gain of the first gain control circuit GC1 is greater than the gain of the second gain control circuit GC2. The power management circuit also includes an adder circuit 36. The input terminal of the first gain control circuit GC1 is coupled to the output terminal of the error amplifier 31. The second gain control circuit GC2 and the first gain control circuit GC1 are coupled to the first power stage 33 through the adder circuit. For example, the output terminals of the first gain control circuit GC1 and the second gain control circuit GC2 are coupled to the two input terminals of the adder circuit 36, respectively. The output terminal of the adder circuit 36 ​​is coupled to the control terminal of the first power stage 33. In this embodiment, the ATI network 35 is coupled to the error amplifier 31 and the first power stage 33 to control the first power stage 33 according to the output of the error amplifier.

[0095] The first gain control circuit GC1 can be used to receive the first error signal Verr and output the first control signal Vctr1 according to the first error signal Verr; the second gain control circuit GC2 can be used to receive the first error signal Verr and output the second control signal Vctr2 according to the first error signal Verr; the adder circuit 36 ​​is used to add the first control signal Vctr1 and the second control signal Vctr2 to output the target control signal Vc.

[0096] In this power management circuit, for the main loop, the error amplifier 31 amplifies the error between the feedback voltage Vfb and the reference voltage Vref to obtain a first error signal Verr. The second gain control circuit GC2 serves as the compensation network 32 in the main loop. GC2 receives and processes the first error signal Verr and outputs a second control signal Vctr2. The second control signal Vctr2 controls the first power stage 33 to output the output voltage Vo. When a load change occurs, the first gain control circuit GC1 receives the first error signal Verr output by the error amplifier 31 and outputs a first control signal Vctr1. The first control signal Vctr1 and the second control signal Vctr2 are combined by the adder circuit 36 ​​to generate a target control signal Vc. The target control signal Vc is used to adjust the first power stage 33. That is, the first control signal Vctr1 and the second control signal Vctr2 are used together to adjust the first power stage 33, thereby accelerating the loop adjustment speed and thus accelerating the transient response speed of the output voltage Vo.

[0097] Optionally, the first gain control circuit GC1 has at least one transfer function, which may include one or more of a first transfer function f1, a second transfer function f2, and a third transfer function f3. For example, the first transfer function f1 satisfies the following: when the first error signal Verr is greater than or equal to a second error threshold, it is positively correlated with the square of the first error signal Verr; when the first error signal Verr is less than the second error threshold, it is negatively correlated with the square of the first error signal Verr. The second transfer function f2 satisfies the following: when the first error signal Verr is greater than or equal to the first error threshold, it is linearly positively correlated with the first error signal Verr; when the first error signal Verr is greater than or equal to the second error threshold and less than the first error threshold, it is positively correlated with the square of the first error signal Verr; when the first error signal Verr is greater than or equal to a third error threshold and less than the second error threshold, it is negatively correlated with the square of the first error signal Verr; when the first error signal Verr is less than the third error threshold, it is linearly negatively correlated with the first error signal Verr. The third transfer function f3 satisfies the following: it is linearly correlated with the first error signal Verr.

[0098] For example, when the first error threshold is 50mV, the second error threshold is 0mV, and the third error threshold is -50mV, the expressions for the first transfer function f1, the second transfer function f2, and the third transfer function f3 can be given by formulas (1)-(3), and the curves corresponding to the first transfer function f1, the second transfer function f2, and the third transfer function f3 can be given by formulas (1)-(3). Figure 8 As shown, the horizontal axis of the curve represents the error corresponding to the first error signal Verr, and the unit of the error is mV. The vertical axis of the curve represents the output of the AIT network 35, and the unit of the output is V.

[0099]

[0100] The above descriptions of the first transfer function f1, the second transfer function f2, and the third transfer function f3 are merely exemplary. In practical applications, other transfer functions or different error thresholds may also be used. The above examples do not constitute a limitation on the embodiments of this application.

[0101] Optionally, the first power stage 33 may include: transistors M1 and M2, inductor L, and resistor R1, wherein resistor R1 can be a parasitic resistor. Transistors M1 and M2 are coupled in series at the power supply terminal VIN and the ground terminal. The inductor L is coupled at the series coupling point and one end of resistor R1. This series coupling point is the coupling point between transistors M1 and M2. The other end of resistor R1 can serve as the output terminal of the power management circuit.

[0102] Optionally, the feedback network 34 may include feedback resistors Rf1 and Rf1, which are connected in series between the output terminal and the ground terminal of the power management circuit. The coupling point of the feedback resistors Rf1 and Rf1 serves as the output terminal of the feedback network 34, used to output the feedback voltage Vfb.

[0103] Optionally, the power management circuit may also include output-related capacitors and resistors, such as capacitor C0 and resistor R0, which are both coupled between the output terminal and the ground terminal of the power management circuit.

[0104] The above description of the structure of the first power stage 33, the feedback network 34, and the output network in the power management circuit is merely exemplary. In practical applications, the above-mentioned multiple circuit modules may include more or fewer electronic components, or have other different structures, or at least two circuit modules may be integrated into one circuit module, etc. The embodiments of this application do not impose specific limitations in this regard. For example, the structure of the first power stage 33 may also be the structure described in the embodiments below.

[0105] In another possible embodiment, such as Figure 9 As shown, when the ATI network 35 operates on the compensation network 32, the ATI network 35 includes a coupled first transconductance circuit 351 and a current squaring circuit 352. The error amplifier 31 includes a second transconductance circuit 311. One input terminal of the first transconductance circuit 351 is coupled to the output terminal of the feedback network 34, the output terminal of the current squaring circuit 352 is coupled to the compensation network 32, and the output terminal of the second transconductance circuit 311 is coupled to the compensation network 32. In this embodiment, the ATI network 35 is coupled to the feedback network 34 and the compensation network 32 to control the compensation network 32 according to the output of the feedback network 34.

[0106] The two input terminals of the first transconductance circuit 351 can be used to receive the feedback voltage Vfb and the reference voltage Vref, and output an error signal in the form of current based on the feedback voltage Vfb and the reference voltage Vref; the current squaring circuit 352 outputs an error squared signal g based on the error signal in the form of current. m1 Verr 2 The two input terminals of the second transconductance circuit 311 can be used to receive the feedback voltage Vfb and the reference voltage Vref, and output an error signal g in the form of current based on the feedback voltage Vfb and the reference voltage Vref. m2 Verr. The compensation network 32 is based on the squared error signal g. m1 Verr 2 and the error signal g m2Verr outputs the target control signal Vc.

[0107] Optionally, the first power stage 33 may include transistors M1 and M2, inductor L, resistor R1, signal generator 331, RS flip-flop 332, inverter 333, inductor current sensing network 334, and comparator 335. Transistors M11 and M2 are coupled in series at the power supply terminal VIN and the ground terminal. The inductor L is coupled at the series coupling point and one end of the resistor R1. This series coupling point is the coupling point between transistors M1 and M2. The other end of the resistor R1 can serve as the output terminal of the power management circuit. The two output terminals of the signal generator 331 are coupled to the input terminal S of the RS flip-flop 332 and one input terminal of the comparator 335, respectively; the output terminal Q of the RS flip-flop 332 is coupled to the gate of transistor M1 and to the gate of transistor M2 through the inverter 333; one end of the inductor current detection network 334 is coupled to the inductor L, the other end of the inductor current detection network 334 is coupled to the other input terminal of the comparator 335, and the output terminal of the comparator 335 is coupled to the input terminal R of the RS flip-flop 332.

[0108] For example, in the first power stage 33, the signal generator 331 can be used to provide a clock signal CLK and a ramp signal Vslope. The rising edge of the clock signal CLK controls the RS flip-flop 332 to turn on, thereby controlling the transistor M1 to turn on and the transistor M2 to turn off, resulting in an increase in the output current. Further, the inductor current detection network 334 is used to detect the current of the inductor L to output a sampled voltage Vcs. The sampled voltage Vcs, the target control signal Vc, and the ramp signal Vslope act on the comparator 335. The comparison result output by the comparator 335 controls the RS flip-flop 332 to turn off, thereby controlling the transistor M1 to turn off and the transistor M2 to turn on, resulting in a decrease in the output current. Optionally, the signal generator 331 may include an oscillator and a ramp signal generator. The oscillator can be used to output the clock signal CLK, and the ramp signal generator can be used to output the ramp signal Vslope.

[0109] In this power management circuit, the ATI network 35 includes a first transconductance circuit 351 and a current squaring circuit 352, outputting an error square signal g. m2 Verr 2 The compensation network 32 is used to generate the target control signal Vc, thereby accelerating the loop regulation speed and improving the output transient response performance. The operating frequency of the power management circuit is determined by the signal generator 331, so the ATI network 35 does not affect the operating frequency of the power management circuit, resulting in a stable switching frequency and better EMI noise performance.

[0110] Optionally, the compensation network 32 may include a resistor Rc and a capacitor Cc, with one end of the resistor Rc coupled to one end of the capacitor Cc, and the other end of the capacitor coupled to ground. The other end of the resistor Rc may be used to couple with the second transconductance circuit 311 and the current square circuit 352.

[0111] In yet another possible embodiment, such as Figure 10 As shown, when the ATI network 35 operates on the error amplifier 31, the ATI network 35 includes a current squaring circuit 352, and the error amplifier 31 includes a second transconductance circuit 311. The output of the second transconductance circuit 311 is coupled to the compensation network 32, and the output of the second transconductance circuit 311 is also coupled to the compensation network 32 through the current squaring circuit 352. In this embodiment, the ATI network 35 is coupled to the error amplifier 31 and the compensation network 32 to control the compensation network 32 according to the output of the error amplifier 31.

[0112] The two input terminals of the second transconductance circuit 311 can be used to receive the feedback voltage Vfb and the reference voltage Vref, and output an error signal in the form of current based on the feedback voltage Vfb and the reference voltage Vref. This error signal can be expressed as g. m2 Verr. The current square circuit 352 can be used to receive the error signal g. m2 Verr outputs the squared error signal, which is the error signal g. m2 Verr 2 The error signal g m2 Verr and the squared error signal g m2 Verr 2 The superimposed signal is applied to the compensation network 32 so that the compensation network 32 outputs the target control signal Vc based on the superimposed signal.

[0113] The above Figure 10 The operation process and related structure of the provided power management circuit are related to Figure 9 The provided power management circuit operates similarly to other circuits and has a similar structure, the difference being... Figure 10 The ATI network 35 in this paper omits the first transconductance circuit 351. The specific working process and related structure can be found in the description above, and will not be repeated here in the embodiments of this application.

[0114] Furthermore, in combination Figure 6As shown, the power management circuit also includes a second power stage 37, to which the ATI network 35 is coupled. For example, one output terminal of the ATI network 35 is coupled to the input terminal of the second power stage 37, and the output terminal of the second power stage 37 is coupled to the output terminal of the power management circuit. In this power management circuit, the ATI network 35 is also used to output a third control signal based on a first error signal Verr, and the second power stage 37 is used to adjust the output voltage Vo according to the third control signal to maintain the stability of the output voltage Vo.

[0115] In one possible embodiment, such as Figure 11 As shown, the second power stage 37 includes a third transducer 371 and a fourth transducer 372 connected in series between the power supply terminal VIN and the ground terminal. The coupling points of the third transducer 371 and the fourth transducer 372 are coupled to the output terminal of the power management circuit for adjusting the output voltage Vo; the input terminals of both the third transducer 371 and the fourth transducer 372 are coupled to the ATI network 35. For example, the compensation network 32 includes a second gain control circuit GC2; the ATI network 35 has multiple transfer functions, such as Kp1, Kp2, and Kp3; when the ATI network 35 outputs to the adder circuit 36, it can use transfer functions Kp1 and Kp2 to process the first error signal Verr, and when the ATI network 35 outputs to the second power stage 37, it can use transfer function Kp3 to process the first error signal Verr.

[0116] In this embodiment, when the output voltage Vo fluctuates, such as dropping or surging, the ATI network 35 can output multiple control signals based on the first error signal Verr output by the error amplifier 11. A portion of these control signals, superimposed with the control signal output by GC2, acts on the first power stage 33, thereby accelerating the loop regulation speed. Another portion of the control signals acts on the second power stage 37 to directly regulate the output voltage Vo, enabling Vo to recover quickly. Optionally, the ATI network 35 in this power management circuit can also be used solely to control the second power stage 37, thereby regulating the output voltage Vo and achieving rapid recovery. This power management circuit achieves ultra-low static power consumption, low EMI noise, and fast transient response, while avoiding the switching frequency limitation of the first power stage 33. In other words, this solution can resolve the problem of large system oscillations caused by the overly dominant ATI network 35.

[0117] Optionally, this power management circuit can be applied to different types of switching power supplies and low dropout regulators (LDOs). For example, the switching power supply can be a DC-DC switching power supply, such as, but not limited to: buck converters, boost converters, buck-boost converters, single-ended primary inductor converters (SEPICs), or isolated power devices. The isolated power device can include optocoupler-isolated flyback devices or non-optocoupler-isolated flyback devices. For example, the LDO can include current-source LDOs and voltage-source LDOs.

[0118] In one possible example, such as Figure 12 As shown, the power management circuit is an LDO, which includes an error amplifier 31, a first power stage 33, a feedback network 34, an ATI network 35, an output capacitor C0, and an output resistor R0. The error amplifier 31 and the ATI network 35 are both coupled to the feedback network 34 and the first power stage 33. The feedback network 34 is coupled to the first power stage 33. The output capacitor C0 and the output resistor R0 are both coupled between the output terminal of the first power stage 33 and the ground terminal. Specifically, the error amplifier 31 includes a second transconductance circuit 311; the feedback network 34 includes resistors Rf1 and Rf2 connected in series; the ATI network 35 includes a coupled first transconductance circuit 351 and a current square circuit 352; the first power stage 33 includes a transistor M and a capacitor Cg, which can be a parasitic capacitance.

[0119] In this example, when the output voltage Vo 1408 rises, the feedback voltage Vfb output by the feedback network 34 rises accordingly. The second transconductance circuit 311 in the main loop amplifies the error between the reference voltage Vref and the feedback voltage Vfb to output an error signal. This error acts on the capacitor Cg, generating a control signal Vc that rises, thereby reducing the on-current of the transistor M and causing the output voltage Vo to drop, thus maintaining the stability of the output voltage Vo. The ATI network 35 includes a first transconductance circuit 351 and a current squaring circuit 352, which assists in controlling the control signal Vc of the main loop, thereby accelerating the adjustment of the output voltage Vo and improving transient response performance. Furthermore, when the reference voltage Vref and the feedback voltage Vfb are close, the ATI network 35 is in a turned-off state, thereby achieving ultra-low power consumption while avoiding the impact on the stability of the main loop.

[0120] In this embodiment, an ATI network 35 is introduced into the power management circuit. The ATI network 35 can detect fluctuations in the output voltage of the power management circuit and output control signals based on these fluctuations. These control signals dynamically control the error amplifier 31, the compensation network 32, or the first power stage 33, exhibiting adaptive characteristics and effectively improving transient response under different load scenarios. Furthermore, when the output voltage Vo fluctuates significantly, the ATI network 35 is in an active state; when the output voltage Vo fluctuates slightly, the ATI network 35 can be in a closed state, thereby reducing static power consumption. When the ATI network 35 is used to control the error amplifier 31, the compensation network 32, or the first power stage 33, it does not affect the operating frequency of the main loop in the power management circuit, thus exhibiting good EMI noise performance.

[0121] In other words, this power management circuit features low quiescent power consumption, low EMI interference, and excellent transient response. Furthermore, the circuit architecture in this embodiment is relatively simple, with diverse implementation methods, a wide range of applications, and is easily integrated into power devices with different architectures. Secondly, this embodiment supports an ultra-low power architecture, making it widely applicable in mobile scenarios, including handheld mobile devices and automotive electronic systems. For switching DC-DC scenarios, a fixed frequency can be used, exhibiting excellent EMI performance while significantly improving transient response characteristics. This meets the high requirements of products with demanding power management devices, such as mobile devices, high-precision industrial equipment, and automotive electronic devices, greatly enhancing product competitiveness.

[0122] Based on this, embodiments of this application also provide a power management chip, which includes: a circuit board and a power management circuit disposed on the circuit board. The power management circuit can be any of the power management circuits provided above. Optionally, the power management chip can include analog and digital control power management chips; wherein, the digital control method can more conveniently implement different types of transfer functions in ATI networks, and the implementation methods include, but are not limited to, lookup table methods and piecewise linear functions.

[0123] In another embodiment of this application, such as Figure 13 As shown, an electronic device is also provided, which may include a load and any of the power management circuits provided above, the power management circuits being used to supply power to the load. Optionally, the load may be a processor, memory, or display screen, etc., and the embodiments of this application do not impose specific limitations on this.

[0124] It is understood that the above detailed description of the power management circuit can be applied to the embodiments of the power management chip and the embodiments of the electronic device, and the embodiments of this application will not be repeated here.

[0125] Finally, it should be noted that the above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions within the technical scope disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.

Claims

1. A power management circuit, characterized in that, The power management circuit includes: an error amplifier, a compensation network, a first power stage, a feedback network, and an adaptive transient optimization (ATI) network; wherein, the error amplifier is coupled to the first power stage through the compensation network, the first power stage is coupled to the error amplifier through the feedback network, and the ATI network is coupled to at least one of the error amplifier, the compensation network, and the first power stage; The ATI network is used to output a first control signal, which is used to control the error amplifier, the compensation network, or the first power stage.

2. The power management circuit according to claim 1, characterized in that, When the fluctuation of the output voltage is less than or equal to a first preset threshold, the ATI network is in a closed state; when the fluctuation of the output voltage is greater than the first preset threshold, the ATI network is in a working state.

3. The power management circuit according to claim 1 or 2, characterized in that, The ATI network includes a first gain control circuit, and the compensation network includes a second gain control circuit, wherein the gain of the first gain control circuit is greater than the gain of the second gain control circuit. The power management circuit further includes an adder circuit, the first gain control circuit is coupled to the error amplifier, and the second gain control circuit and the first gain control circuit are coupled to the first power stage through the adder circuit.

4. The power management circuit according to claim 3, characterized in that, The first gain control circuit is used to output the first control signal according to the first error signal; The second gain control circuit is used to output a second control signal based on the first error signal; The adder circuit is used to output a target control signal based on the first control signal and the second control signal, and the target control signal is used to control the first power stage.

5. The power management circuit according to claim 1 or 2, characterized in that, The ATI network includes a coupled first transconductance circuit and a current square circuit, and the error amplifier includes a second transconductance circuit; wherein the first transconductance circuit is coupled to the feedback network, and the current square circuit is coupled to the compensation network.

6. The power management circuit according to claim 5, characterized in that, The first transconducting circuit is used to output a first error signal based on the feedback voltage and the reference voltage; The current squaring circuit is used to output an error squaring signal based on the first error signal. The second transconducting circuit is used to output a second error signal based on the feedback voltage and the reference voltage; The compensation network is further configured to output a target control signal based on the squared error signal and the second error signal, the target control signal being used to control the first power stage.

7. The power management circuit according to claim 1 or 2, characterized in that, The ATI network includes a current squaring circuit, and the error amplifier includes a second transconducting circuit; wherein the second transconducting circuit is coupled to the compensation network, and the second transconducting circuit is also coupled to the compensation network through the current squaring circuit.

8. The power management circuit according to any one of claims 1-7, characterized in that, The feedback network is used to output a feedback voltage based on the output voltage; The error amplifier is used to output a first error signal based on the feedback voltage and the reference voltage; The compensation network is used to output a second control signal or a target control signal according to the first error signal, wherein the target control signal includes the second control signal; The first power stage is used to output the output voltage according to the target control signal.

9. The power management circuit according to any one of claims 1-8, characterized in that, The power management circuit further includes a second power stage, which is coupled to the ATI network. The ATI network is also used to output a third control signal; The second power stage is used to adjust the output voltage according to the third control signal.

10. The power management circuit according to claim 9, characterized in that, The second power stage includes a third transducer and a fourth transducer coupled in series between the power supply terminal and the ground terminal; wherein the coupling point of the third transducer and the fourth transducer is used to adjust the output voltage, and the input terminals of the third transducer and the fourth transducer are both coupled to the ATI network.

11. The power management circuit according to any one of claims 1-10, characterized in that, The ATI network has at least one transmission function, which satisfies one or more of the following conditions: When the error is greater than or equal to the first error threshold, it is positively correlated with the error. When the error is greater than or equal to the second error threshold and less than the first error threshold, it is positively correlated with the square of the error; When the error is greater than or equal to the third error threshold and less than the second error threshold, it is negatively correlated with the square of the error; When the error is less than the third error threshold, it is negatively correlated with the error. When the error is greater than or equal to the second error threshold, it is positively correlated with the square of the error; When the error is less than the second error threshold, it is negatively correlated with the square of the error; It is linearly correlated with the error.

12. A power management circuit, characterized in that, The power management circuit includes: an error amplifier, a compensation network, a first power stage, a feedback network, an adaptive transient optimization (ATI) network, and a second power stage; wherein, the error amplifier is coupled to the first power stage through the compensation network, the first power stage is coupled to the error amplifier through the feedback network, and the ATI network is coupled to the second power stage; The ATI network is used to output a third control signal; The second power stage is used to adjust the output voltage of the power management circuit according to the third control signal.

13. The power management circuit according to claim 12, characterized in that, The second power stage includes a third transducer and a fourth transducer coupled in series between the power supply terminal and the ground terminal; wherein the coupling point of the third transducer and the fourth transducer is used to adjust the output voltage, and the input terminals of the third transducer and the fourth transducer are both coupled to the ATI network.

14. A power management chip, characterized in that, The power management chip includes: a circuit board, and a power management circuit as described in any one of claims 1-13 disposed on the circuit board.

15. An electronic device, characterized in that, The electronic device includes: a load, and a power management circuit as described in any one of claims 1-13, the power management circuit being used to supply power to the load.

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