Direct current component suppression circuit, method, air conditioning apparatus, and storage medium

Abstract

The application relates to a direct current component suppression circuit, a method, air conditioning equipment and a storage medium. The direct current component suppression circuit detects a real-time output voltage of a converter, outputs a voltage adjustment signal according to an absolute value difference between an upper limit value and a lower limit value of the output voltage, controls a charge-discharge state of an energy storage capacitor in a capacitor discharge circuit on the direct current bus side, forces the upper limit value and the lower limit value of the output voltage to reach a balance state, and reduces a direct current component of a grid-connected output current. The software output voltage adjustment signal is combined with hardware capacitor suppression of the direct current component, and a software and hardware combination scheme is used, so that detection and control errors caused by pure software can be accurately suppressed, the direct current component is better controlled, and better power quality is injected into the power grid.

Description

Technical Field

[0001] This application relates to the field of DC component suppression, and more particularly to a DC component suppression circuit, method, air conditioning device, and storage medium. Background Technology

[0002] In the inverter design of photovoltaic air conditioners, a common single-phase grid-connected architecture consists of four full-bridge switches and a filter circuit. Its working principle is as follows: a modulated wave is generated by controlling the grid-connected current through a closed loop. This wave is then converted into a high-frequency switching drive signal via SPWM (Pulse Width Modulation) to produce a high-frequency current. This current passes through an LC filter circuit to remove harmonic components, ultimately outputting high-quality AC power to the grid. Theoretically, the grid-connected output should be a complete and distortion-free AC power. However, in reality, factors such as zero-point drift of the sampling elements, on-state voltage drop and dead-time deviation of power devices, and inconsistent drive signals of the switches can cause asymmetry in the positive and negative waveforms of the output PWM wave. This results in a voltage shift in the inverter bridge arm output voltage of the inverter, ultimately leading to a DC component in the output AC current. This DC component in the output current can affect grid safety and equipment lifespan. Summary of the Invention

[0003] This application provides a DC component suppression circuit, method, air conditioning device, and storage medium to suppress the DC component in the grid-connected output current.

[0004] In a first aspect, this application provides a DC component suppression circuit, the DC component suppression circuit comprising: Voltage acquisition circuit, used to acquire the output voltage of the converter; A control circuit, connected to the voltage acquisition circuit, is used to determine the absolute value difference between the upper voltage limit and the lower voltage limit based on the output voltage, and to output a voltage adjustment signal based on the absolute value difference, wherein the absolute value difference is used to indicate the magnitude of the DC component; A capacitor discharge circuit is connected between the control circuit and the converter. It is used to control the charging and discharging state of the energy storage capacitor in the capacitor discharge circuit according to the voltage regulation signal, so as to reduce the absolute value difference between the upper voltage limit and the lower voltage limit.

[0005] Optionally, the capacitor discharge circuit includes: The first charging and discharging branch is used to control the first energy storage capacitor to be in a discharging state when the voltage regulation signal is the first regulation signal, so as to reduce the upper limit of the voltage. The control circuit outputs the first regulation signal as the voltage regulation signal when the absolute value difference is greater than zero. The second charging / discharging branch is used to control the second energy storage capacitor to be in a discharging state when the voltage regulation signal is the second regulation signal, so as to reduce the lower voltage limit value. The control circuit outputs the second regulation signal as the voltage regulation signal when the absolute value difference is less than zero.

[0006] Optionally, the first charging and discharging branch includes a first switching transistor, a first resistor, and a first energy storage capacitor. The gate of the first switching transistor is connected to the output terminal of the control circuit. The drain of the first switching transistor is connected to the first terminal of the first energy storage capacitor via the first resistor. The source of the first switching transistor is connected to the second terminal of the first energy storage capacitor via the third resistor. The source of the first switching transistor is also connected to the second charging and discharging branch. The first terminal of the first energy storage capacitor is also connected to the converter. When the voltage regulation signal is the first regulation signal, the first switch is turned on, controlling the first energy storage capacitor to be in a discharging state, so as to reduce the upper limit of the voltage.

[0007] Optionally, the second charging and discharging branch includes a second switching transistor, a second resistor, and a second energy storage capacitor. The gate of the second switching transistor is connected to the output terminal of the control circuit. The drain of the second switching transistor is connected to the source of the first switching transistor and the first terminal of the third resistor. The source of the second switching transistor is connected to the first terminal of the second energy storage capacitor via the second resistor. The second terminal of the second energy storage capacitor is connected to the third resistor and the second terminal of the first energy storage capacitor. When the voltage regulation signal is the second regulation signal, the second switch is turned on, controlling the second energy storage capacitor to be in a discharging state, so as to reduce the lower voltage limit.

[0008] Optionally, the control circuit includes at least one linear regulator.

[0009] Secondly, this application provides a DC component suppression method, applied to the DC component suppression circuit described above, the DC component suppression method comprising: Obtain the output voltage of the converter; Based on the output voltage, determine the absolute difference between the upper voltage limit and the lower voltage limit; A voltage adjustment signal is output based on the absolute value difference, wherein the voltage adjustment signal is used to control the charging and discharging state of the energy storage capacitor in order to reduce the absolute value difference between the upper voltage limit and the lower voltage limit.

[0010] Optionally, the step of outputting a voltage adjustment signal based on the absolute value difference includes: The signal duty cycle and voltage regulation signal are determined based on the absolute value difference. The voltage regulation signal is output according to the duty cycle of the signal.

[0011] Optionally, determining the voltage regulation signal based on the absolute value difference includes: When the absolute difference is greater than zero, the first adjustment signal is used as the voltage adjustment signal, wherein the first adjustment signal is used to control the first energy storage capacitor to be in a discharging state in order to reduce the upper limit of the voltage. When the absolute value difference is less than zero, the second adjustment signal is used as the voltage adjustment signal, wherein the second adjustment signal is used to control the second energy storage capacitor to be in a discharging state in order to reduce the lower voltage limit. When the absolute difference is equal to zero, the current signal will be maintained as the voltage regulation signal.

[0012] Thirdly, this application provides an air conditioning device, which includes the DC component suppression circuit described above.

[0013] Fourthly, this application also provides a computer storage medium storing computer-executable instructions for performing the above-described DC component suppression method.

[0014] Compared with the prior art, the above-mentioned technical solution provided in this application embodiment has the following advantages: The DC component suppression circuit provided in this application embodiment includes a voltage acquisition circuit for acquiring the output voltage of the converter; a control circuit connected to the voltage acquisition circuit for determining the absolute value difference between the upper voltage limit and the lower voltage limit based on the output voltage, and outputting a voltage adjustment signal based on the absolute value difference, wherein the absolute value difference is used to indicate the magnitude of the DC component; and a capacitor discharge circuit connected between the control circuit and the converter for controlling the charging and discharging state of the energy storage capacitor in the capacitor discharge circuit based on the voltage adjustment signal, so as to reduce the absolute value difference between the upper voltage limit and the lower voltage limit.

[0015] By detecting the real-time output voltage of the converter and calculating the absolute difference between the upper and lower voltage limits, a voltage regulation signal is output. This controls the charging and discharging state of the energy storage capacitors in the DC bus side capacitor discharge circuit, forcing the upper and lower voltage limits to reach a balanced state and reducing the DC component of the grid-connected output current. By relying on software-generated voltage regulation signals combined with hardware capacitor suppression of the DC component, this hardware-software integrated approach accurately suppresses detection and control errors introduced by purely software-based methods, better controlling the DC component and injecting better power quality into the grid. Attached Figure Description

[0016] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with the invention and, together with the description, serve to explain the principles of the invention.

[0017] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] One or more embodiments are illustrated by way of example with reference numerals in the accompanying drawings. These illustrations do not constitute a limitation on the embodiments. Elements with the same reference numerals in the drawings are denoted as similar elements. Unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0019] Figure 1 This is a schematic diagram of a DC component suppression circuit provided in an embodiment of this application; Figure 2 This is a schematic diagram illustrating the effect of a DC component suppression method provided in an embodiment of this application; Figure 3 This is a schematic diagram of the structure of a control circuit provided in an embodiment of this application; Figure 4 A schematic flowchart of another DC component suppression method provided in an embodiment of this application; Figure 5 This is a schematic diagram of the internal structure of an air conditioning device provided in an embodiment of this application. Detailed Implementation

[0020] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0021] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of the invention. Furthermore, reference numerals and / or letters may be repeated in different examples. Such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed.

[0022] Figure 1This is a diagram illustrating the application environment of the DC component suppression circuit in one embodiment. (Refer to...) Figure 1 The DC component suppression circuit includes a converter 140, a voltage acquisition circuit 110, a control circuit 120, and a capacitor discharge circuit 130. The converter 140 performs AC-DC conversion using an H-bridge circuit, converting DC power into AC power to feed into the power grid. The voltage acquisition circuit 110 is connected to the output terminal of the converter 140 and is used to acquire the output voltage of the converter 140. The control circuit 120 is connected to the voltage acquisition circuit 110 and is used to determine the absolute difference between the upper and lower voltage limits based on the output voltage, and output a voltage adjustment signal based on the absolute difference. The capacitor discharge circuit 130 is connected between the control circuit 120 and the converter 140 and is used to control the charging and discharging state of the energy storage capacitor according to the voltage adjustment signal, thereby reducing the absolute difference between the upper and lower voltage limits.

[0023] The H-bridge circuit includes four power switching transistors used to convert the DC power output from the photovoltaic panel into AC power, and output... A high-frequency PWM pulse is followed by an LC filter (including inductor L1, inductor L2, and capacitor C3) to filter out the high frequency, resulting in a 50Hz sinusoidal AC current that is fed into the power grid. Four power switching transistors are divided into two bridge arms, shaped like the letter H. The left bridge arm includes the upper left and lower left transistors, and the right bridge arm includes the upper right and lower right transistors. Two terminals, A and B, are led out from the middle of the two bridge arms. The voltage between points A and B is the output voltage of the H-bridge. The DC input of the H-bridge circuit is connected to the capacitor discharge circuit 130, i.e., the capacitor discharge circuit 130 is connected to the DC input side of the converter 140.

[0024] This circuit structure can dynamically adjust the depth of charge and discharge according to the magnitude of the DC component of the output voltage, and can accurately control the amplitude of the DC component fed into the grid, which is far below the grid connection standard requirements. At the same time, it avoids the problems of capacitance decay and impedance increase that occur when large-capacity DC blocking capacitors are working for a long time. It can maintain a stable DC component suppression effect throughout the entire working life cycle. Based on real-time output voltage dynamic and fast suppression of DC component, this circuit can quickly track changes in output power to complete DC component correction. It does not have the problem of short-term DC component exceeding the standard caused by response lag in traditional suppression schemes. It effectively improves the quality of grid-connected power, reduces the problems of transformer bias, heat generation and accelerated aging caused by DC component injection into the grid, and improves the operational stability of grid-related equipment.

[0025] In one embodiment, refer to Figure 1 The capacitor discharge circuit 130 includes: a first charging and discharging branch, configured to control a first energy storage capacitor C1 to be in a discharging state when the voltage adjustment signal is a first adjustment signal, so as to reduce the upper voltage limit, wherein the control circuit 120 outputs the first adjustment signal as the voltage adjustment signal when the absolute difference value is greater than zero; a second charging and discharging branch, configured to control a second energy storage capacitor C2 to be in a discharging state when the voltage adjustment signal is a second adjustment signal, so as to reduce the lower voltage limit, wherein the control circuit 120 outputs the second adjustment signal as the voltage adjustment signal when the absolute difference value is less than zero.

[0026] Specifically, the ideal output voltage is a high-frequency PWM waveform, and the absolute value X1 of the upper voltage limit is equal to the absolute value X2 of the lower voltage limit, that is, X1=X2, at this time, the theoretical DC component is equal to 0. The first charging and discharging branch and the second charging and discharging branch are respectively used to adjust the upper voltage limit and the lower voltage limit, so that the absolute difference between the upper voltage limit and the lower voltage limit approaches 0, thereby eliminating the DC component.

[0027] However, in the entire circuit structure, factors such as characteristic deviation of the switching tube, zero drift of the sampling element, acquisition and conversion delay of software, and error of the control algorithm will all affect the output voltage waveform, resulting in a deviation between the absolute value X1 of the upper voltage limit and the absolute value X2 of the lower voltage limit, which brings about a DC component.

[0028] Referring to Figure 2 , by collecting the output voltage of the converter 140 in real time , detecting the absolute value X1 of the upper voltage limit and the absolute value X2 of the lower voltage limit, and sending X1 and X2 to the control circuit 120, the control circuit 120 outputs the first adjustment signal or the second adjustment signal based on the difference between X1 and X2. Specifically, when X1>X2, the first adjustment signal is output to control the first energy storage capacitor C1 in the first charging and discharging branch to discharge, thereby reducing X1 to decrease the absolute difference between X1 and X2; when X1<X2, the second adjustment signal is output to control the second energy storage capacitor C2 in the second charging and discharging branch to discharge, thereby reducing X2 to decrease the absolute difference between X1 and X2, that is, making the distance from the upper voltage limit to the midline as equal as possible to the distance from the lower voltage limit to the midline, where the midline is the dividing line between the upper voltage limit and the lower voltage limit.

[0029] By performing targeted discharge adjustments on the first energy storage capacitor C1 and the second energy storage capacitor C2 through the two charging and discharging branches mentioned above, the deviation between the absolute value of the upper voltage limit X1 and the absolute value of the lower voltage limit X2 can be quickly compressed to an extremely low range. This correction process does not change the duty cycle and carrier frequency of the PWM waveform, and does not introduce additional harmonic interference. The accuracy of DC component elimination can be improved by more than an order of magnitude. At the same time, the correction response speed is fast, and DC component correction can be completed within 1 to 2 output waveform cycles. It can adapt to the dynamic DC component elimination requirements in high-frequency PWM output scenarios, effectively solving the technical problems of correction lag and large residual deviation in traditional correction schemes in high-frequency output scenarios. It suppresses the DC component in the output voltage of the converter 140 and meets the technical indicators of scenarios with strict requirements for DC component, such as high-precision induction heating and grid-connected power generation.

[0030] In one embodiment, refer to Figure 1 The first charging and discharging branch includes a first switching transistor VT1, a first resistor R1, and a first energy storage capacitor C1. The gate of the first switching transistor VT1 is connected to the output terminal of the control circuit 120. The drain of the first switching transistor VT1 is connected to the first terminal of the first energy storage capacitor C1 through the first resistor R1. The source of the first switching transistor VT1 is connected to the second terminal of the first energy storage capacitor C1 through the third resistor R3. The source of the first switching transistor VT1 is also connected to the second charging and discharging branch. The first terminal of the first energy storage capacitor C1 is also connected to the converter 140. When the voltage regulation signal is the first regulation signal, the first switch VT1 is turned on, controlling the first energy storage capacitor C1 to be in a discharging state, so as to reduce the upper limit of the voltage.

[0031] Specifically, the DC input side of the H-bridge circuit is connected to the first energy storage capacitor C1 in the first charging / discharging branch and the second energy storage capacitor C2 in the second charging / discharging branch. The first energy storage capacitor C1 and the second energy storage capacitor C2 are connected in series. The upper end of the first energy storage capacitor C1 is positive, and the lower end of the second energy storage capacitor C2 is negative. The connection point of the first energy storage capacitor C1 and the second energy storage capacitor C2 is the DC midpoint. When the upper left arm and the lower right arm of the H-bridge circuit are conducting... The corresponding positive pulse indicates the absolute value X1 of the upper voltage limit; when the lower left arm and upper right arm of the H-bridge circuit are conducting, The corresponding negative pulse indicates the absolute value of the lower voltage limit, X2. These two states are repeatedly switched at high frequency. A series of alternating positive and negative high-frequency PWM pulse waveforms are output. The LC filter filters out the high-frequency pulses and retains the average value of the pulses to obtain a 50Hz sinusoidal AC voltage that is supplied to the power grid.

[0032] The first resistor R1 is a current-limiting resistor, used to prevent the capacitor discharge current from being too large and burning out the first switching transistor VT1 when it is turned on, that is, to limit the magnitude of the discharge current.

[0033] The first switching transistor VT1 is used to control the charging and discharging state of the first energy storage capacitor C1. That is, when the first switching transistor VT1 is in the conducting state, the first energy storage capacitor C1 is in the discharging state, thereby reducing the... This reduces the absolute value of the upper voltage limit X1, thereby decreasing the absolute value difference between X1 and X2.

[0034] In one embodiment, refer to Figure 1 The second charging and discharging branch includes a second switch VT2, a second resistor R2, and a second energy storage capacitor C2. The gate of the second switch VT2 is connected to the output terminal of the control circuit 120. The drain of the second switch VT2 is connected to the source of the first switch VT1 and the first terminal of the third resistor R3. The source of the second switch VT2 is connected to the first terminal of the second energy storage capacitor C2 via the second resistor R2. The second terminal of the second energy storage capacitor C2 is connected to the second terminal of the third resistor R3 and the second terminal of the first energy storage capacitor C1. When the voltage regulation signal is the second regulation signal, the second switch VT2 is turned on, controlling the second energy storage capacitor C2 to be in a discharging state, so as to reduce the lower voltage limit.

[0035] Specifically, the second resistor R2 is a current-limiting resistor, used to prevent the capacitor discharge current from being too large and burning out the second switch VT2 when it is turned on, i.e., limiting the magnitude of the discharge current. The third resistor R3 is an auxiliary resistor for the first switch VT1 and the second switch VT2, serving to balance and discharge static residual charge.

[0036] The second switch VT2 is used to control the charging and discharging state of the second energy storage capacitor C2. That is, when the second switch VT2 is in the conducting state, the second energy storage capacitor C2 is in the discharging state, thereby reducing the... This lowers the absolute value of the lower voltage limit X2, thereby reducing the absolute difference between X1 and X2. By adjusting the pulse duty cycle, the average discharge charge is controlled, achieving fine-tuning of the voltage without completely discharging the capacitor.

[0037] This segmented capacitor charging and discharging combined with duty cycle fine-tuning scheme results in a smaller voltage adjustment step, which improves voltage adjustment accuracy. At the same time, the design of current limiting by the second resistor R2 and residual charge discharge by the third resistor R3 reduces the instantaneous inrush current on the second switching transistor VT2, effectively extending the operating life of the switching transistor and reducing the failure rate of the circuit during long-term operation. Furthermore, it can suppress the fluctuation amplitude of the output voltage during multiple voltage regulation cycles, meeting the application requirements of high-precision DC voltage output.

[0038] In one embodiment, the control circuit 120 includes at least one linear regulator.

[0039] Specifically, refer to Figure 3 The control circuit 120 consists of at least one linear regulator (PI regulator). Its implementation process is as follows: First, the difference between X1 and X2 is detected as the feedback value of the PI regulator. Then, the set value of the PI regulator is 0V. The set value and the feedback value are subtracted and sent to the input port of the PI regulator for software calculation. The corresponding adjustment value is obtained by the feedback difference after subtracting the set value and the feedback value. The duty cycle that has a mapping relationship with the adjustment value is used as the target duty cycle to output a high-frequency pulse signal (i.e., voltage adjustment signal) to control the first switch VT1 and the second switch VT2, thereby controlling the first energy storage capacitor C1 and the second energy storage capacitor C2 to discharge, thereby dynamically adjusting the upper and lower limits of the output voltage to suppress the DC component.

[0040] If the absolute value of the upper voltage limit X1 is equal to the absolute value of the lower voltage limit X2, the PI regulator outputs the current signal to maintain the current output voltage output mode and maintain the grid-connected output current with zero DC component.

[0041] The linear regulation scheme based on the PI regulator can achieve higher precision DC component suppression, controlling the DC component deviation under steady state, which is far lower than the steady-state deviation level of hysteresis control. At the same time, the integral part of the PI regulator can completely eliminate static deviation, avoiding the small output voltage oscillation problem inherent in hysteresis control, thus improving the waveform quality of the output voltage. In scenarios with dynamic load fluctuations, it improves the DC component suppression response speed, enabling DC component correction to be completed within one power frequency cycle. This avoids problems such as circuit transformer saturation and abnormal device heating caused by long-term DC component accumulation, effectively improving the operational stability and service life of the entire power conversion system.

[0042] In one embodiment, Figure 4 This is a flowchart illustrating a DC component suppression method in one embodiment, with reference to... Figure 4A method for suppressing DC components is provided. This method is applied to the control circuit 120 in the aforementioned DC component suppression circuit, and specifically includes the following steps: Step S210: Obtain the output voltage of converter 140.

[0043] Specifically, when the photovoltaic air conditioner inverter 140 is normally connected to the grid, it performs AC-DC conversion through an H-bridge circuit. The output voltage is acquired at the output terminal of the inverter 140 via the voltage acquisition circuit 110. Ideally, the output voltage is a high-frequency PWM waveform, and the absolute value of the upper voltage limit X1 equals the absolute value of the lower voltage limit X2; at this point, the theoretical DC component is zero.

[0044] Step S220: Determine the absolute value difference between the upper voltage limit and the lower voltage limit based on the output voltage.

[0045] Specifically, factors such as the characteristic deviation of the switching transistors, the zero-point drift of the sampling elements, the acquisition and conversion delay of the software, and the error of the control algorithm all affect the waveform of the output voltage, resulting in a deviation between the upper and lower limits of the output voltage, thus introducing a DC component. By acquiring the output voltage in real time and detecting the upper and lower limits, the absolute difference between the two is calculated, and this absolute difference is used to indicate the magnitude of the DC component.

[0046] Step S230: Output a voltage adjustment signal based on the absolute value difference, wherein the voltage adjustment signal is used to control the charging and discharging state of the energy storage capacitor to reduce the absolute value difference between the upper voltage limit and the lower voltage limit.

[0047] Specifically, the absolute difference between the detected upper and lower voltage limits is sent to the control circuit 120. The control circuit 120 outputs a voltage adjustment signal based on the absolute difference. The voltage adjustment signal is used to control the charging and discharging state of the energy storage capacitor to reduce the absolute difference between the upper and lower voltage limits.

[0048] The circuit dynamically adjusts the depth of charge and discharge based on the magnitude of the DC component of the output voltage, precisely controlling the amplitude of the DC component fed into the grid, which is far below the grid connection standard requirements. It also avoids the capacitance decay and impedance increase problems that occur with large-capacity DC blocking capacitors under long-term operation, maintaining a stable DC component suppression effect throughout its entire operating life. Based on real-time output voltage dynamic and rapid suppression of the DC component, the circuit can quickly track changes in output power to complete DC component correction, avoiding the short-term DC component exceeding the standard problem caused by the response lag of traditional suppression schemes. This effectively improves the quality of grid-connected power, reduces transformer bias, overheating, and accelerated aging caused by DC component injection into the grid, and enhances the operational stability of grid-related equipment.

[0049] In one embodiment, the step of outputting a voltage adjustment signal based on the absolute value difference includes: The signal duty cycle and voltage regulation signal are determined based on the absolute value difference. The voltage regulation signal is output according to the duty cycle of the signal.

[0050] Specifically, the implementation process of the PI regulator in the control circuit 120 is as follows: First, the difference between X1 and X2 is detected as the feedback value of the PI regulator. Then, the set value of the PI regulator is 0V. The set value and the feedback value are subtracted and sent to the input port of the PI regulator for software calculation. The corresponding adjustment value is obtained by the feedback difference after subtracting the set value and the feedback value. The duty cycle that has a mapping relationship with the adjustment value is used as the target duty cycle to output a high-frequency pulse signal (i.e., voltage adjustment signal) to control the first switch VT1 and the second switch VT2, thereby controlling the first energy storage capacitor C1 and the second energy storage capacitor C2 to discharge, thereby dynamically adjusting the upper and lower limits of the output voltage to suppress the DC component.

[0051] Based on the mapping relationship between the regulation value and the duty cycle, the duty cycle corresponding to the regulation value output by the PI regulator is looked up as the target duty cycle. By adjusting the pulse duty cycle, the average discharge charge is controlled, achieving fine-tuning of the voltage without fully discharging the capacitor. Compared with traditional fixed-duration discharge regulation, this method can improve voltage regulation accuracy and DC component suppression, while avoiding large voltage fluctuations caused by the complete discharge and recharge of the capacitor. This improves the stability of the output voltage, making it suitable for power output scenarios with higher precision requirements. Moreover, the high-frequency pulse regulation has a faster response speed, which can quickly correct DC component deviations and match the dynamic changes of the output load in real time, effectively reducing the impact damage of excessive DC components to downstream electrical equipment.

[0052] In one embodiment, determining the voltage regulation signal based on the absolute value difference includes: When the absolute difference is greater than zero, the first adjustment signal is used as the voltage adjustment signal, wherein the first adjustment signal is used to control the first energy storage capacitor C1 to be in a discharging state in order to reduce the upper limit of the voltage. When the absolute value difference is less than zero, the second adjustment signal is used as the voltage adjustment signal, wherein the second adjustment signal is used to control the second energy storage capacitor C2 to be in a discharging state in order to reduce the lower voltage limit. When the absolute difference is equal to zero, the current signal will be maintained as the voltage regulation signal.

[0053] Specifically, when X1>X2, a first adjustment signal is output to control the first energy storage capacitor C1 in the first charging and discharging branch to perform high-frequency discharging, so that the upper voltage limit decreases until the upper voltage limit is equal to the lower voltage limit, ensuring the balance of the output voltage and reducing the DC component; when X1<X2, a second adjustment signal is output to control the second energy storage capacitor C2 in the second charging and discharging branch to perform high-frequency discharging, so that the lower voltage limit decreases until the lower voltage limit is equal to the upper voltage limit, ensuring the balance of the output voltage and reducing the DC component.

[0054] For example, if X1-X2=5V and the duty cycle corresponding to the adjustment value output by the PI regulator is 0.5, the corresponding first adjustment signal is output at a duty cycle of 0.5 to drive the first switching tube VT1 to be turned on, and the first switching tube VT1 is in the on state for half of each control cycle, so as to control the first energy storage capacitor C1 to discharge to reduce the upper voltage limit.

[0055] Assuming that X1-X2=3V and the duty cycle corresponding to the adjustment value output by the PI regulator is 0.3, the corresponding first adjustment signal is output at a duty cycle of 0.3 to drive the first switching tube VT1 to be turned on, so as to control the first energy storage capacitor C1 to discharge to reduce the upper voltage limit.

[0056] When the upper voltage limit is equal to the lower voltage limit (that is, the absolute difference is equal to zero), the PI adjustment process is not performed, so as to avoid switching losses.

[0057] Performing targeted discharge adjustment on the first energy storage capacitor C1 and the second energy storage capacitor C2 respectively can quickly compress the deviation between the absolute value X1 of the upper voltage limit and the absolute value X2 of the lower voltage limit to an extremely low range. This correction process will not change the duty cycle and carrier frequency of the PWM waveform, will not introduce additional harmonic interference, and the elimination accuracy of the DC component can be improved by more than an order of magnitude; at the same time, the correction response speed is fast, the DC component correction can be completed within 1 to 2 output waveform cycles, which can adapt to the dynamic DC component elimination requirement in the high-frequency PWM output scenario, effectively solve the technical problems of correction lag and large residual deviation of the traditional correction scheme in the high-frequency output scenario, suppress the DC component in the output voltage of the converter 140, and meet the technical indicators of scenarios with strict requirements for DC components such as high-precision induction heating and grid-connected power generation.

[0058] Figure 4 is a schematic flowchart of a DC component suppression method in an embodiment. It should be understood that although Figure 4 the respective steps in the flowchart are sequentially displayed according to the indication of the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict sequence limitation on the execution of these steps, and these steps may be executed in other orders. Moreover, Figure 4 At least some of the steps in the process may include multiple sub-steps or multiple stages. These sub-steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these sub-steps or stages is not necessarily sequential, but can be executed in turn or alternately with other steps or at least some of the sub-steps or stages of other steps.

[0059] It should be noted that the examples and application scenarios implemented by the above modules and corresponding steps are the same, but are not limited to the content disclosed in the above embodiments. It should also be noted that the above modules, as part of a device, can operate in environments such as... Figure 1 The hardware environment shown can be implemented either through software or through hardware.

[0060] like Figure 5 As shown, this application embodiment provides an air conditioning device, including a processor 711, a communication interface 712, a memory 713, and a communication bus 714. The processor 711, the communication interface 712, and the memory 713 communicate with each other through the communication bus 714. The memory 713 is used to store computer programs. When the processor 711 executes the program stored in the memory 713, it implements the DC component suppression method provided in any of the aforementioned method embodiments.

[0061] The memory and processor in the aforementioned electronic devices communicate with each other via a communication bus and a communication interface. The communication bus can be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus, etc. This communication bus can be divided into an address bus, a data bus, a control bus, etc.

[0062] The memory may include random access memory (RAM) or non-volatile memory, such as at least one disk storage device. Optionally, the memory may also be at least one storage device located remotely from the aforementioned processor.

[0063] The processors mentioned above can be general-purpose processors, including central processing units (CPUs), network processors (NPs), etc.; they can also be digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components.

[0064] Those skilled in the art will understand that Figure 5 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the air conditioning equipment to which the present application is applied. Specific air conditioning equipment may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0065] According to another aspect of the embodiments of this application, a computer program product or computer program is also provided, which includes computer instructions stored in a computer-readable storage medium. A processor of an air conditioning device reads the computer instructions from the computer-readable storage medium and executes the computer instructions, causing the air conditioning device to perform the steps of any of the above embodiments.

[0066] In one embodiment, the control circuit 120 provided in this application can be implemented as a computer program, and the computer program can be implemented as follows: Figure 5 The air conditioning unit shown operates on the circuit. The memory of the air conditioning unit can store various program modules that make up the control circuit 120. The computer program composed of these program modules causes the processor to execute the DC component suppression methods of the various embodiments of this application described in this specification.

[0067] Figure 5 The air conditioning equipment shown can be used as follows Figure 1 The control circuit 120 shown executes steps S210-S230.

[0068] This application also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the DC component suppression method as provided in any of the foregoing method embodiments.

[0069] Optionally, in embodiments of this application, the computer-readable medium is configured to store program code for the processor to perform the following steps: Obtain the output voltage of converter 140.

[0070] Based on the output voltage, determine the absolute difference between the upper voltage limit and the lower voltage limit.

[0071] A voltage adjustment signal is output based on the absolute value difference, wherein the voltage adjustment signal is used to control the charging and discharging state of the energy storage capacitor in order to reduce the absolute value difference between the upper voltage limit and the lower voltage limit.

[0072] Optionally, specific examples in this embodiment can refer to the examples described in the above embodiments, and will not be repeated here.

[0073] It is understood that the embodiments described herein can be implemented in hardware, software, firmware, middleware, microcode, or a combination thereof. For hardware implementation, the processing unit can be implemented in one or more application-specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field-programmable gate arrays (FPGAs), general-purpose processors, controllers, microcontrollers, microprocessors, other electronic units for performing the functions described herein, or combinations thereof.

[0074] For software implementation, the techniques described herein can be implemented by units that perform the functions described herein. The software code can be stored in memory and executed by a processor. The memory can be implemented in the processor or external to the processor.

[0075] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0076] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0077] In the embodiments provided in this application, it should be understood that the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of modules is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple modules or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be an indirect coupling or communication connection through some interfaces, devices, or units, and may be electrical, mechanical, or other forms.

[0078] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0079] In addition, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0080] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented using software plus a general-purpose hardware platform, or of course, using hardware. Based on this understanding, the above technical solutions, in essence or the parts that contribute to the related technology, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as a USB flash drive, mobile hard drive, ROM, RAM, magnetic disk, or optical disk, or other media capable of storing program code, including several instructions to cause an air conditioning device (which may be a personal computer, server, or network device, etc.) to execute the methods described in the various embodiments or some parts of the embodiments.

[0081] It should be understood that the terminology used herein is for the purpose of describing particular exemplary embodiments only and is not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms “a,” “an,” and “described” as used herein may also mean including the plural forms. The terms “comprising,” “including,” “containing,” and “having” are inclusive and therefore indicate the presence of the stated features, steps, operations, elements, and / or components, but do not exclude the presence or addition of one or more other features, steps, operations, elements, components, and / or combinations thereof. The method steps, processes, and operations described herein are not construed as requiring them to be performed in a particular order described or illustrated unless the order of performance is explicitly indicated. It should also be understood that alternatives or substitutions may be used.

[0082] The above description is merely a specific embodiment of the present invention, enabling those skilled in the art to understand or implement the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the present invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A DC component suppression circuit, characterized in that, The DC component suppression circuit includes: Voltage acquisition circuit, used to acquire the output voltage of the converter; A control circuit, connected to the voltage acquisition circuit, is used to determine the absolute value difference between the upper voltage limit and the lower voltage limit based on the output voltage, and to output a voltage adjustment signal based on the absolute value difference, wherein the absolute value difference is used to indicate the magnitude of the DC component; A capacitor discharge circuit is connected between the control circuit and the converter. It is used to control the charging and discharging state of the energy storage capacitor in the capacitor discharge circuit according to the voltage regulation signal, so as to reduce the absolute value difference between the upper voltage limit and the lower voltage limit.

2. The DC component suppression circuit according to claim 1, characterized in that, The capacitor discharge circuit includes: The first charging and discharging branch is used to control the first energy storage capacitor to be in a discharging state when the voltage regulation signal is the first regulation signal, so as to reduce the upper limit of the voltage. The control circuit outputs the first regulation signal as the voltage regulation signal when the absolute value difference is greater than zero. The second charging / discharging branch is used to control the second energy storage capacitor to be in a discharging state when the voltage regulation signal is the second regulation signal, so as to reduce the lower voltage limit value. The control circuit outputs the second regulation signal as the voltage regulation signal when the absolute value difference is less than zero.

3. The DC component suppression circuit according to claim 2, characterized in that, The first charging and discharging branch includes a first switching transistor, a first resistor, and a first energy storage capacitor. The gate of the first switching transistor is connected to the output terminal of the control circuit. The drain of the first switching transistor is connected to the first terminal of the first energy storage capacitor via the first resistor. The source of the first switching transistor is connected to the second terminal of the first energy storage capacitor via a third resistor. The source of the first switching transistor is also connected to the second charging and discharging branch. The first terminal of the first energy storage capacitor is also connected to the converter. When the voltage regulation signal is the first regulation signal, the first switch is turned on, controlling the first energy storage capacitor to be in a discharging state, so as to reduce the upper limit of the voltage.

4. The DC component suppression circuit according to claim 3, characterized in that, The second charging and discharging branch includes a second switching transistor, a second resistor, and a second energy storage capacitor. The gate of the second switching transistor is connected to the output terminal of the control circuit. The drain of the second switching transistor is connected to the source of the first switching transistor and the first terminal of the third resistor. The source of the second switching transistor is connected to the first terminal of the second energy storage capacitor via the second resistor. The second terminal of the second energy storage capacitor is connected to the third resistor and the second terminal of the first energy storage capacitor. When the voltage regulation signal is the second regulation signal, the second switch is turned on, controlling the second energy storage capacitor to be in a discharging state, so as to reduce the lower voltage limit.

5. The DC component suppression circuit according to claim 1, characterized in that, The control circuit includes at least one linear regulator.

6. A method for suppressing DC component, characterized in that, The DC component suppression method, applied to the DC component suppression circuit as described in claim 1, comprises: Obtain the output voltage of the converter; Based on the output voltage, determine the absolute difference between the upper voltage limit and the lower voltage limit; A voltage adjustment signal is output based on the absolute value difference, wherein the voltage adjustment signal is used to control the charging and discharging state of the energy storage capacitor in order to reduce the absolute value difference between the upper voltage limit and the lower voltage limit.

7. The method according to claim 6, characterized in that, The step of outputting a voltage adjustment signal based on the absolute value difference includes: The signal duty cycle and voltage regulation signal are determined based on the absolute value difference. The voltage regulation signal is output according to the duty cycle of the signal.

8. The method according to claim 7, characterized in that, Determining the voltage regulation signal based on the absolute value difference includes: When the absolute difference is greater than zero, the first adjustment signal is used as the voltage adjustment signal, wherein the first adjustment signal is used to control the first energy storage capacitor to be in a discharging state in order to reduce the upper limit of the voltage. When the absolute value difference is less than zero, the second adjustment signal is used as the voltage adjustment signal, wherein the second adjustment signal is used to control the second energy storage capacitor to be in a discharging state in order to reduce the lower voltage limit. When the absolute difference is equal to zero, the current signal will be maintained as the voltage regulation signal.

9. An air conditioning device, characterized in that, The air conditioning equipment includes the DC component suppression circuit as described in claim 1.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method of any one of claims 6 to 8.

Images