Power amplifier, power amplifier chip and electronic device
Patent Information
- Application Number
- CN202510413195.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-04-02
- Publication Date
- 2026-10-16
AI Technical Summary
[0003]然而,现有的功率放大器设计还存在以下问题:一、传统的匹配网络设计采用电感或传输线等无源器件,这将导致芯片面积和匹配网络的损耗增大,使功放性能降低
[0007] In a third aspect, an electronic device is provided, which includes the aforementioned power amplifier chip.
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Figure CN122932622A_ABST
Abstract
Description
Technical Field
[0001] This disclosure relates to the field of wireless communication, and more specifically to a power amplifier, a power amplifier chip, and an electronic device. Background Technology
[0002] Power amplifiers are key components in the radio frequency (RF) front-end, enabling signal power amplification. With the development of wireless communication technology, communication signal bandwidth is increasing. Wireless communication systems are evolving towards multi-application scenarios, making bandwidth expansion an important research direction for power amplifiers.
[0003] However, existing power amplifier designs still have the following problems: First, traditional matching network designs use passive components such as inductors or transmission lines, which increases chip area and matching network losses, thus reducing power amplifier performance. Second, most existing broadband power amplifiers are fixed-band designs, requiring a separate power amplifier design for each independent frequency band, which increases the overall chip area and lacks application flexibility. Third, for common broadband power amplifiers with fixed bias circuits, achieving optimal load matching over a wide bandwidth is challenging. Furthermore, due to the bandwidth limitations of the bias circuit itself, the efficiency of power amplifiers using broadband designs is often low. Summary of the Invention
[0004] Providing a mechanism to alleviate, reduce or eliminate at least one of the above problems would be beneficial.
[0005] In a first aspect, a power amplifier is provided, comprising: a reconfigurable input matching circuit for achieving input impedance matching of the power amplifier at different frequency bands; an amplification circuit connected to the reconfigurable input matching circuit; a reconfigurable output matching circuit connected to the amplification circuit for achieving output impedance matching of the power amplifier at different frequency bands; and at least one reconfigurable bias circuit connected to the amplification circuit for achieving impedance matching of the amplification circuit at different frequency bands.
[0006] In a second aspect, a power amplifier chip is provided, which includes the power amplifier described above.
[0007] In a third aspect, an electronic device is provided, which includes the aforementioned power amplifier chip.
[0008] It should be understood that the summary section is not intended to identify key or essential features of the embodiments of this disclosure, nor is it intended to limit the scope of this disclosure. Other features of this disclosure will become readily apparent from the following description. Attached Figure Description
[0009] The above and other objects, features, and advantages of this disclosure will become more apparent from the more detailed description of some embodiments thereof in the accompanying drawings, in which:
[0010] Figure 1 A simplified block diagram of a power amplifier according to an embodiment of the present disclosure is shown;
[0011] Figure 2 A schematic diagram of a power amplifier according to another embodiment of this disclosure is shown;
[0012] Figure 3 An exemplary circuit diagram of an amplifier circuit of a power amplifier according to an embodiment of the present disclosure is shown;
[0013] Figure 4 An exemplary circuit diagram of a power amplifier according to another embodiment of this disclosure is shown;
[0014] Figure 5 It shows Figure 4 Enlarged view of the driver stage and reconfigurable bias circuit in the illustrated embodiment;
[0015] Figure 6a An exemplary circuit diagram of a reconfigurable bias circuit for a power amplifier according to an embodiment of the present disclosure is shown; and
[0016] Figure 6b It shows Figure 6a The reconfigurable bias circuit of the power amplifier in the embodiment shown is connected to the equivalent bandpass circuit of the amplifier circuit. Detailed Implementation
[0017] The principles of this disclosure will now be described with reference to some embodiments. It should be understood that these embodiments are described for illustrative purposes only and to assist those skilled in the art in understanding and implementing this disclosure, and do not impose any limitation on the scope of this disclosure. The disclosure described herein may be implemented in ways other than those described below.
[0018] In the following description and claims, unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains.
[0019] References to "an embodiment," "embodiment," "exemplary embodiment," etc., in this disclosure indicate that the described embodiments may include specific features, structures, or characteristics, but not every embodiment needs to include specific features, structures, or characteristics. Furthermore, such phrases do not necessarily refer to the same embodiment. Moreover, when a specific feature, structure, or characteristic is described in connection with an exemplary embodiment, whether explicitly described or not, those skilled in the art will recognize that such a feature, structure, or characteristic affects its application to other embodiments.
[0020] It should be understood that while the terms “first” and “second”, etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. For example, without departing from the scope of the exemplary embodiments, a first element may be referred to as a second element, and similarly, a second element may be referred to as a first element. The term “and / or” as used herein includes any and all combinations of one or more of the listed terms.
[0021] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the exemplary embodiments. The singular forms “a,” “an,” and “the” used herein also include the plural forms unless the context clearly indicates otherwise. The terms “a group of elements” or “a collection of elements” as used herein are intended to include one or more elements. It should also be understood that the terms “comprising,” “including,” “having,” “possessing,” “including,” and / or “comprising,” when used herein, specify the presence of the stated features, elements, and / or components, but do not exclude the presence or addition of one or more other features, elements, components, and / or combinations thereof.
[0022] As used in this application, the term "circuit" may refer to one or more of the following:
[0023] (a) Implemented only in hardware circuitry (e.g., implemented only in analog and / or digital circuitry)
[0024] (b) A combination of hardware circuitry and software, such as (if applicable):
[0025] (i) a combination of analog and / or digital hardware circuitry with software / firmware; and
[0026] (ii) Any part of a hardware processor (including a digital signal processor), software, and memory that work together to enable a device such as a mobile phone or server to perform various functions, and
[0027] (c) Hardware circuitry and / or processors, such as microprocessors or a portion thereof, which require software (e.g., firmware) to operate, but may be absent when the software is not required to operate.
[0028] The definition of "circuit" applies to all uses of the term in this application, including in any claim. As another example, as used herein, the term "circuit" also includes implementations of hardware circuitry or processors (or processors in general) or a portion thereof and their accompanying software and / or firmware. The term "circuit" also includes, for example, baseband integrated circuits or processor integrated circuits for mobile devices, or similar integrated circuits in servers, cellular network devices, or other computing network devices, if applicable to a particular claim element.
[0029] Power amplifiers are key components in the radio frequency (RF) front-end, enabling signal power amplification. With the development of wireless communication technology, communication signal bandwidth is increasing. Wireless communication systems are evolving towards multi-application scenarios, making bandwidth expansion a crucial research direction for power amplifiers. Power amplifiers are an essential component of communication systems; employing broadband and multi-frequency power amplifier designs can reduce the number of components required, enabling miniaturization and multi-scenario applications. For broadband power amplifier design, the matching network is particularly important. In the power amplifier structure, the matching network design converts the load impedance into the optimal impedance required by the output stage transistors, maximizing the power output of the amplifier. Traditional matching approaches utilize passive components such as inductors or transmission lines. To enable wireless communication systems to operate in various application scenarios, different power amplifiers need to be designed internally to achieve power amplification in different frequency bands. Traditional design approaches involve using a large number of power amplification devices.
[0030] In the design of broadband power amplifiers in existing wireless communication systems, a low-loss matching network design is required to improve the output power and efficiency of the power amplifier. Traditional matching network designs use passive components such as inductors or transmission lines, which increases chip area and matching network losses, thus reducing power amplifier performance. Most existing broadband power amplifiers are designed for fixed frequency bands, requiring a separate power amplifier design for each independent frequency band, which increases the overall chip area and lacks application flexibility. Furthermore, for common broadband power amplifiers with fixed bias circuits, achieving optimal load matching over a wide bandwidth is challenging. Additionally, the bandwidth limitation of the bias circuit itself often results in lower efficiency when using broadband designs.
[0031] This disclosure proposes a power amplifier that achieves input impedance matching, output impedance matching, and impedance matching of the amplification circuit by designing a reconfigurable input matching circuit, a reconfigurable output matching circuit, and a reconfigurable bias circuit. This allows the power amplifier to operate flexibly in multiple frequency bands, improving its efficiency and enabling a high-efficiency broadband power amplifier design. The reconfigurable bias circuit employs a reconfigurable design, achieving impedance matching of the amplification circuit at different frequency bands and enabling optimal selection of power amplifier efficiency for the desired amplification frequency band, thus improving power amplifier efficiency. In some embodiments, using varactor diodes for the reconfigurable design can reduce the impact of increased chip area and matching circuit losses, as well as reduced power amplifier performance, caused by the use of passive components. Furthermore, in some embodiments, the amplification circuit employs a transformer-based broadband on-chip matching network design to achieve broadband matching of the power amplifier. Combined with the reconfigurable design of the reconfigurable input matching circuit and the reconfigurable output matching circuit, it is possible to achieve broadband inter-electrode matching while tuning the optimal amplification range of the power amplifier to the desired operating frequency band.
[0032] The following will refer to Figure 1 The principles and implementation of this disclosure are described in detail.
[0033] Figure 1 A simplified block diagram of a power amplifier 100 according to an embodiment of the present disclosure is shown. Figure 1 As shown, the power amplifier 100 includes a reconfigurable input matching circuit 110, an amplification circuit 120, a reconfigurable output matching circuit 140, and at least one reconfigurable bias circuit 130. The reconfigurable input matching circuit 110 is used to achieve input impedance matching of the power amplifier 100 at different frequency bands; the amplification circuit 120 is connected to the reconfigurable input matching circuit 110; the reconfigurable output matching circuit 140 is connected to the amplification circuit 120 and is used to achieve output impedance matching of the power amplifier 100 at different frequency bands; at least one reconfigurable bias circuit 130 is connected to the amplification circuit 120 and is used to achieve impedance matching of the amplification circuit 120 at different frequency bands.
[0034] In this embodiment, the reconfigurable input matching circuit 110, the reconfigurable bias circuit 130, and the reconfigurable output matching circuit 140 all adopt a reconfigurable design. This reconfigurable design allows the power amplifier 100 to achieve impedance matching at different frequency bands without changing its circuit configuration and form, satisfying the flexible tuning requirements of the power amplifier 100 when operating at different frequency bands and ensuring the reliability of the power amplifier performance. Furthermore, the reconfigurable bias circuit 130, by adopting a reconfigurable design, achieves impedance matching of the amplifier circuit 120 at different frequency bands, enabling optimal selection of the power amplifier efficiency for the required amplification frequency band, thus improving the power amplifier efficiency.
[0035] It should be understood that, such as Figure 1 As shown, the power amplifier 100 also includes an input terminal RFin and an output terminal RFout. A reconfigurable input matching circuit 110 is disposed at the input terminal RFin of the power amplifier 100, and a reconfigurable output matching circuit 140 is disposed at the output terminal RFout of the power amplifier 100.
[0036] The following will combine Figure 2 This section describes the circuit structure of the reconfigurable input matching circuit 110.
[0037] Figure 2 A schematic diagram of a power amplifier 200 according to another embodiment of this disclosure is shown. (As...) Figure 2 As shown, in some embodiments, the reconfigurable input matching circuit 110 includes a second varactor diode Cp2, and the reconfigurable input matching circuit 110 is configured to be reconfigurable by controlling the voltage across the second varactor diode Cp2.
[0038] In the above embodiments, by designing varactor diodes, the reconfigurable input matching circuit 110 achieves reconfigurable functionality and tunable matching design. Without changing the form of the matching circuit, multiple frequency bands are respectively in a matched state, enabling flexible frequency tuning and improving the reliability of the power amplifier performance.
[0039] Generally speaking, reconfigurability means that a system, device, software, or hardware component can be reconfigured, reprogrammed, or recombined to meet different needs or adapt to different environments.
[0040] In some embodiments of this disclosure, by adjusting the voltage across a varactor diode to change its capacitance, signals of different frequencies can selectively pass through, achieving a continuously adjustable operating frequency band—that is, a reconfigurable effect. A circuit with this effect is a reconfigurable circuit. Therefore, such reconfigurability also belongs to a frequency reconfigurable technology, namely, a technology that allows the operating frequency of a radio frequency device to be flexibly changed within a certain range by dynamically adjusting its structure or parameters.
[0041] The reconfigurable input matching circuit 110 is made reconfigurable by controlling the voltage across the second varactor diode Cp2. This is because there is a charge region on both sides of the PN junction of the varactor diode, and the bandwidth of this charge region changes with the external voltage. Therefore, the junction capacitance inside the varactor diode changes non-linearly with the external bias voltage. By controlling the applied voltage, the capacitance value of the varactor diode can be changed, thereby achieving circuit reconfigurability. Furthermore, using a varactor diode to achieve reconfigurability reduces the impact of increased chip area and matching circuit losses, as well as reduced power amplifier performance, caused by using passive components.
[0042] When the power amplifier 200 operates in different frequency bands, the capacitance value inside the second varactor diode Cp2 is changed by adjusting the voltage across Cp2. The change in the capacitance value of the second varactor diode Cp2 causes a change in the impedance characteristics of the reconfigurable input matching circuit 110, thereby achieving input impedance matching of the power amplifier 200.
[0043] like Figure 2 As shown, in some embodiments, the reconfigurable input matching circuit 110 further includes: a third varactor diode Cp3, a second inductor L2 and a third inductor L3, wherein the second inductor L2, the third varactor diode Cp3 and the third inductor L3 are connected in series, the first end of the second varactor diode Cp2 is connected between the third varactor diode Cp3 and the third inductor L3, and the second end of the second varactor diode Cp2 is grounded.
[0044] In the above embodiments, the reconfigurable input matching circuit 110 adopts a T-type matching network to match the reconfigurable input matching circuit 110 to the optimal load impedance in order to obtain the maximum output power and power-added efficiency of the power amplifier 200.
[0045] In some embodiments, the reconfigurable input matching circuit 110 may also employ other matching network designs, such as a π-type matching network.
[0046] like Figure 2 As shown, in some embodiments, the reconfigurable input matching circuit 110 uses two varactor diodes. This allows for better input impedance matching at different frequency bands, enabling the power amplifier to operate flexibly in multiple frequency bands and achieving continuously adjustable operating frequency bands to meet broadband operating requirements. To obtain different impedance characteristics of the reconfigurable input matching circuit 110 so that the power amplifier 200 can operate at different frequency bands, the second varactor diode Cp2 and the third varactor diode Cp3 can be configured with the same or different capacitance values under voltage control. For example, the second varactor diode Cp2 can be 0.1uF, and the third varactor diode Cp3 can be 0.1uF, corresponding to the band1 operating frequency band; the second varactor diode Cp2 can be 1uF, and the third varactor diode Cp3 can be 0.1uF, corresponding to the band2 operating frequency band. The ranges of the band1 and band2 operating frequency bands are set according to specific frequency band requirements.
[0047] like Figure 2 As shown, in some embodiments, one end of the second varactor diode Cp2 is grounded to provide a stable reference potential and ensure the operating voltage range of the device.
[0048] In some embodiments, depending on the actual impedance matching requirements or signal processing requirements, the reconfigurable input matching circuit 110 can use different numbers of varactor diodes, capacitors, inductors and other devices, and can be arranged in different ways.
[0049] In some embodiments, depending on actual needs, the second terminal of the second varactor diode Cp2 may not be grounded.
[0050] After passing through the reconfigurable input matching circuit 110, multiple frequency band signals enter the amplifier circuit 120 to amplify the multiple frequency band signals.
[0051] Figure 3 A circuit diagram of an amplifier circuit 120 of a power amplifier according to an embodiment of the present disclosure is shown. Figure 3 As shown, in some embodiments, the amplifier circuit 120 includes a first transformer matching network K1, a driver stage 121, a second transformer matching network K2, a power amplifier stage 122, and a third transformer matching network K3 connected in sequence.
[0052] In some embodiments, the first transformer matching network K1 is used to convert signals of different frequency bands from single-ended signals to differential signals; the second transformer matching network K2 is used for impedance matching between the driver stage 121 and the power amplifier stage 122; and the third transformer matching network K3 is used to convert the differential signal amplified by the driver stage 121 and the power amplifier stage 122 into a single-ended signal.
[0053] exist Figure 3 In the illustrated embodiment, this disclosure uses a transformer matching network as the matching network for the amplifier circuit. By rationally designing the transformer parameters, signal conversion and impedance matching are achieved. This disclosure uses a driver stage 121 and a power amplifier stage 122 to amplify signals in different frequency bands.
[0054] like Figure 3As shown, the first transformer matching network K1 includes transformers La1 / Lb1 and La2 / Lb2, located at the input terminal IN of amplifier circuit 120 and close to reconfigurable input matching circuit 110. It converts the signal from reconfigurable input matching circuit 110 from a single-ended signal to a differential signal, achieving signal balance and reducing signal errors caused by impedance mismatch. Furthermore, this design, by converting a single-ended signal to a differential signal, can reduce electromagnetic interference, improve signal integrity and stability, and thus enhance the overall circuit's driving capability. The second transformer matching network K2 includes transformers Lc1 / Ld1 and Lc2 / Ld2, located between driver stage 121 and power amplifier stage 122, to achieve impedance matching between driver stage 121 and power amplifier stage 122 when signals pass through at different frequency bands. The third transformer matching network K3 includes transformers Le1 / Lf1 and Le2 / Lf2, located at the output terminal OUT of amplifier circuit 120 and close to reconfigurable output matching circuit 140. The third transformer matching network K3 converts the differential signal amplified by the driver stage 121 and power amplifier stage 122 into a single-ended signal and outputs it to the reconfigurable output matching circuit 140. The driver stage 121 includes two common-source differential MOSFETs, transistors M1 and M2. The power amplifier stage 122 includes two common-source differential MOSFETs, transistors M3 and M4. The amplifier circuit 120 of this disclosure adopts a design combining common-source amplification structure and differential structure. The addition of a common-source amplification structure to the differential structure improves the gain and bandwidth of the overall power amplifier circuit.
[0055] In addition, such as Figure 3 As shown, the sources of transistors M1, M2, M3 and M4 are all grounded, and their gates are connected to the DC blocking capacitor and the DC power supply VDD in sequence.
[0056] It should be noted that this disclosure does not limit the specific types of transistors M1 to M4, which can be MOSFETs, BJTs, etc.
[0057] The amplifier circuit 120 is based on a wideband on-chip matching network design of a transformer to achieve wideband matching of the power amplifier. Combined with the reconfigurable design of the reconfigurable input matching circuit 110 and the reconfigurable output matching circuit 140, it can achieve wideband inter-pole matching between the driver stage 121 and the power amplifier stage 122 while tuning the optimal amplification range of the power amplifier to the required operating frequency band.
[0058] In some embodiments, the transistors in the amplifier circuit 120 are connected to the reconfigurable bias circuit 130 via their drains, so that the reconfigurable bias circuit 130 provides drain power to the amplifier circuit 120.
[0059] Figure 4 An exemplary circuit diagram of a power amplifier 400 according to another embodiment of the present disclosure is shown. Figure 5It shows Figure 4 Enlarged view of the driver stage and reconfigurable bias circuit in the illustrated embodiment. The following will be combined with... Figure 4 and Figure 5 The connection relationship between the amplifier circuit 120 and the reconfigurable bias circuit 130 of this disclosure will be further explained.
[0060] like Figure 4 and Figure 5 As shown, in some embodiments, the driver stage 121 includes a first transistor M1 and a second transistor M2, and the power amplifier stage 122 includes a third transistor M3 and a fourth transistor M4, wherein the first transistor M1 and the second transistor M2 share a common source, and the third transistor M3 and the fourth transistor M4 also share a common source. In this embodiment, the power amplifier 400 includes four reconfigurable bias circuits 130, and the drains of the first transistor M1, the second transistor M2, the third transistor M3, and the fourth transistor M4 are respectively connected to the four reconfigurable bias circuits 130 in a one-to-one correspondence.
[0061] like Figure 4 and Figure 5 As shown, in some embodiments, the reconfigurable bias circuit 130 can be connected to the drain of the corresponding transistor in the amplifier circuit 120. The power amplifier 400 uses a common-source differential architecture design, with each transistor connected to a reconfigurable bias circuit 130, so that each reconfigurable bias circuit 130 provides drain power to the corresponding amplifier circuit 120.
[0062] In some embodiments, depending on actual design needs, the reconfigurable bias circuit 130 can also be connected to the gate of the transistor in the amplifier circuit 120 to provide gate power to the amplifier circuit.
[0063] Figure 6a and Figure 6b A reconfigurable bias circuit 130 according to an embodiment of this disclosure is shown. Wherein, Figure 6a This is an exemplary circuit diagram of a reconfigurable bias circuit 130 for a power amplifier according to an embodiment of the present disclosure. Figure 6b for Figure 6a The equivalent bandpass circuit diagram of the power amplifier in the illustrated embodiment after the reconfigurable bias circuit 130 is connected to the amplifier circuit 120. (See diagram below.) Figure 6a As shown, in some embodiments, the reconfigurable bias circuit 130 includes a first varactor diode Cp1, and the reconfigurable bias circuit 130 is configured to be reconfigurable by controlling the voltage across the first varactor diode Cp1.
[0064] By designing the first varactor diode Cp1, the reconfigurable bias circuit 130 can optimally select the power amplifier efficiency for the required amplification operating frequency band, achieving high-efficiency design while satisfying reconfigurable design requirements.
[0065] Traditional power amplifier chips often employ on-chip inductor designs. However, when operating over a wide bandwidth, the choking effect of the bias circuit is not ideal, especially since the drain bias circuit needs to withstand sufficient DC current. Traditional fixed bias circuits also struggle to achieve optimal load matching. This disclosure applies frequency reconfigurable technology to the bias circuit design, incorporating a varactor diode Cp1 to realize the reconfigurable function of the reconfigurable bias circuit 130. By controlling the voltage across the first varactor diode Cp1, the load impedance of the transistor in the amplifier circuit 120 is optimized, achieving a better choking effect across the entire operating frequency band.
[0066] Generally speaking, when a power amplifier operates at different frequency bands, the impedance of the bias circuit has a corresponding optimal value to achieve the best efficiency of the power amplifier. Otherwise, if the impedance of the bias circuit is too low, the choking effect will be too poor, and the efficiency of the power amplifier will also be low.
[0067] Therefore, a reconfigurable design is used, allowing the impedance of the reconfigurable bias circuit 130 to correspond to an optimal efficiency value across multiple frequency bands, resulting in good load matching. This ensures that when the reconfigurable bias circuit 130 is connected to the amplifier circuit 120, the power amplifier operates within its optimal efficiency range.
[0068] In some embodiments, by changing the bias voltage, the reconfigurable bias circuit 130 can achieve impedance matching in different frequency bands, realizing continuous reconfigurability. With proper design, the reconfigurable bias circuit 130 can have good matching characteristics at the center frequency of different frequency bands. The frequency bands that the reconfigurable bias circuit 130 is allowed to pass through have overlapping portions, which can be equivalently considered as having good matching characteristics within a continuous frequency band. For example: when the bias voltage is equal to 0.1V, the center frequency of the matching range of this structure is 1GHz, and the matching bandwidth is 100MHz, that is, its matching range is 0.9GHz to 1.1GHz; when the bias voltage is equal to 0.15V, the center frequency of the matching range of this structure is 1.1GHz, and the matching bandwidth is 100MHz, that is, the matching range is 1GHz to 1.2GHz, which overlaps with the previous range. This can be understood as, by changing different bias voltage values, reconfiguration can be achieved within the continuous frequency band of 0.9GHz to 1.2GHz.
[0069] like Figure 6a As shown, in some embodiments, the reconfigurable bias circuit 130 further includes: a first inductor L1, a first resistor R1, and a second resistor R2; wherein, the first varactor diode Cp1 and the second resistor R2 are connected in parallel, and the first resistor R1 and the first inductor L1 are connected in series and then connected in parallel with the first varactor diode Cp1.
[0070] exist Figure 6a In the embodiment shown, the reconfigurable bias circuit 130 is a bandpass circuit design. Figure 6b It shows Figure 6a The reconfigurable bias circuit 130 in the illustrated embodiment is connected to the equivalent bandpass circuit of the amplifier circuit 120. For example... Figure 6b As shown, in some embodiments, when the reconfigurable bias circuit 130 is connected to the drain of the corresponding transistor in the amplifier circuit 120, the cutoff frequency of the reconfigurable bias circuit 130 is mainly determined by C. ds C pc and C p Decision. Among them, C ds For the parasitic capacitance of the transistor, C p For varactor diode Cp1 capacitor, C pc This is a drain phase compensation capacitor. When the reconfigurable bias circuit 130 is connected to the transistor drain, the overall trend of the influence of the impedance of the reconfigurable bias circuit 130 on the optimal characteristic impedance of the drain line remains consistent. Furthermore, Figure 6b Inductor L is also shown ci L ci It is an equivalent inductance of the reconfigurable bias circuit 130, and C p Together they form a bandpass filter, allowing signals within a specific frequency range to pass through.
[0071] like Figure 6a As shown, the reconfigurable bias circuit 130 also has two nodes, where Vbs1 is used to connect the bias voltage and Nb1 is used to connect the amplifier circuit 120.
[0072] Signals of different frequency bands are amplified by amplifier circuit 120 and then enter reconfigurable output matching circuit 140, and are output by reconfigurable output matching circuit 140.
[0073] like Figure 2 As shown, in some embodiments, the reconfigurable output matching circuit 140 includes a fourth varactor diode Cp4, and the reconfigurable output matching circuit 140 is configured to be reconfigurable by controlling the voltage across the fourth varactor diode Cp4.
[0074] In the above embodiments, by designing varactor diodes, the reconfigurable output matching circuit 140 achieves reconfigurable functionality and tunable matching design. Without changing the form of the matching circuit, multiple frequency bands are respectively in a matched state, enabling flexible frequency tuning and improving the reliability of the power amplifier performance.
[0075] Similarly, by adjusting the voltage across the fourth varactor diode Cp4, the capacitance value inside the fourth varactor diode Cp4 is changed. The change in the capacitance value of the fourth varactor diode Cp4 leads to a change in the impedance characteristics of the reconfigurable output matching circuit 140, thereby achieving output impedance matching of the power amplifier 200.
[0076] When the power amplifier 200 operates in different frequency bands, the output impedance matching can be achieved at different frequency bands by adjusting the voltage across the fourth varactor diode Cp4, thus realizing the continuous adjustment of the operating frequency band of the power amplifier 200.
[0077] like Figure 2 As shown, in some embodiments, the reconfigurable output matching circuit 140 further includes: a fourth inductor L4, a fifth inductor L5, a fifth varactor diode Cp5, and a first DC blocking capacitor C1, wherein the fourth inductor L4, the fifth inductor L5, and the first DC blocking capacitor C1 are connected in series, the first terminal of the fourth varactor diode Cp4 is connected to the first terminal of the fourth inductor L4, and the second terminal of the fourth varactor diode Cp4 is grounded; the first terminal of the fifth varactor diode Cp5 is connected to the second terminal of the fourth inductor L4, and the second terminal of the fifth varactor diode Cp5 is grounded.
[0078] Similarly, in this embodiment, the reconfigurable output matching circuit 140 also adopts a T-type matching network design to match the reconfigurable output matching circuit 140 to the optimal load impedance in order to obtain the maximum output power and power-added efficiency of the power amplifier 200.
[0079] In some embodiments, for a T-type matching network, the fourth varactor diode Cp4 and the fifth varactor diode Cp5 in the reconfigurable output matching circuit 140 can have the same impedance characteristic regulation capability. Therefore, the reconfigurable output matching circuit 140 can also be configured to achieve reconfigurability by controlling the voltage across the fifth varactor diode Cp5.
[0080] In some embodiments, the reconfigurable output matching circuit 140 may also employ other matching network designs, such as a π-type matching network.
[0081] like Figure 2As shown, similar to the reconfigurable input matching circuit 110, in some embodiments, the reconfigurable output matching circuit 140 uses two varactor diodes. This allows for better output impedance matching across different frequency bands, enabling continuously adjustable operating frequency bands for the power amplifier. In some embodiments, the second terminals of both the fourth varactor diode Cp4 and the fifth varactor diode Cp5 are grounded to provide a stable reference potential and ensure the device's operating voltage range. In some embodiments, depending on actual needs, the second terminals of the fourth varactor diode Cp4 and the fifth varactor diode Cp5 may not be grounded.
[0082] like Figure 2 As shown, in some embodiments, the first DC blocking capacitor C1 in the reconfigurable output matching circuit 140 is used to filter the output signal.
[0083] In some embodiments, depending on the actual impedance matching requirements or signal processing requirements, the reconfigurable output matching circuit 140 may use different numbers of varactor diodes, capacitors, inductors, and other devices, and may also be arranged in different ways.
[0084] The following combination Figure 4 The working principle of a power amplifier according to an embodiment of the present disclosure will be explained in general.
[0085] like Figure 4 As shown, when signals of different frequency bands enter the power amplifier 400, they first enter the reconfigurable input matching circuit 110. By controlling the voltage across varactor diodes Cp2 and Cp3 in the reconfigurable input matching circuit 110, the impedance characteristics of the reconfigurable input matching circuit are changed, allowing signals of different frequency bands to pass through before entering the amplifier circuit 120. By adjusting the voltage across varactor diode Cp1 in the reconfigurable bias circuit 130, the choking effect and dynamic optimization of the load impedance of transistors M1, M2, M3, and M4 in the amplifier circuit 120 can be achieved. After being amplified by the amplifier circuit 120, signals of different frequency bands enter the reconfigurable output matching circuit 140. By adjusting the values of varactor diodes Cp4 and Cp5 in the reconfigurable output matching circuit 140, output impedance matching is achieved. Overall, the power amplifier 400 can operate in any operating frequency band and can effectively achieve input-output matching of different operating frequency bands, improving amplification efficiency. The power amplifier 400 not only achieves broadband amplification but also has frequency tunability, which is of great significance for multi-scenario wireless communication system applications.
[0086] This disclosure also provides a power amplifier chip, including the power amplifier as described above. Furthermore, this disclosure also provides an electronic device, including the power amplifier chip as described above. Since both the power amplifier chip and the electronic device include the power amplifier as described above, they also possess the functions and beneficial effects that the power amplifier can achieve, and will not be described further.
[0087] While several specific implementation details are included in the foregoing discussion, these details should not be construed as limiting the scope of this disclosure, but rather as descriptions of features specific to particular embodiments. Certain features described in the context of individual embodiments may also be implemented in combination in a single embodiment. Conversely, various features described in the context of a single embodiment may also be implemented individually or in any suitable sub-combination in multiple embodiments.
[0088] Although this disclosure has been described in language specific to structural features and / or methodological behavior, it should be understood that this disclosure as defined in the appended claims is not necessarily limited to the specific features or behaviors described above. Rather, the specific features and actions described above are disclosed as exemplary forms for implementing the claims.
[0089] It should be fully understood that the use of personally identifiable information should comply with privacy policies and practices generally considered to meet or exceed industry or governmental requirements for protecting user privacy. In particular, personally identifiable information data should be managed and processed to minimize the risk of unintentional or unauthorized access or use, and the nature of authorized use should be clearly indicated to the user.
Claims
1. A power amplifier, characterized in that, include: A reconfigurable input matching circuit is used to achieve input impedance matching of the power amplifier at different frequency bands; An amplifier circuit is connected to the reconfigurable input matching circuit; A reconfigurable output matching circuit is connected to the amplifier circuit to achieve output impedance matching of the power amplifier in different frequency bands; At least one reconfigurable bias circuit is connected to the amplifier circuit to achieve impedance matching of the amplifier circuit at different frequency bands.
2. The power amplifier as described in claim 1, characterized in that, The reconfigurable bias circuit includes a first varactor diode, and the reconfigurable bias circuit is configured to be reconfigurable by controlling the voltage across the first varactor diode.
3. The power amplifier as described in claim 2, characterized in that, The reconfigurable bias circuit further includes: a first inductor, a first resistor, and a second resistor; wherein the first varactor diode and the second resistor are connected in parallel, and the first resistor and the first inductor are connected in series and then in parallel with the first varactor diode.
4. The power amplifier as described in any one of claims 1 to 3, characterized in that, The reconfigurable input matching circuit includes a second varactor diode, and the reconfigurable input matching circuit is configured to be reconfigurable by controlling the voltage across the second varactor diode.
5. The power amplifier as described in claim 4, characterized in that, The reconfigurable input matching circuit further includes a third varactor diode, a second inductor, and a third inductor, wherein the second inductor, the third varactor diode, and the third inductor are connected in series, the first end of the second varactor diode is connected between the third varactor diode and the third inductor, and the second end of the second varactor diode is grounded.
6. The power amplifier as described in any one of claims 1 to 3, characterized in that, The reconfigurable output matching circuit includes a fourth varactor diode, and the reconfigurable output matching circuit is configured to make the reconfigurable output matching circuit reconfigurable by controlling the voltage across the fourth varactor diode.
7. The power amplifier as described in claim 6, characterized in that, The reconfigurable output matching circuit further includes: a fourth inductor, a fifth inductor, a fifth varactor diode, and a first DC blocking capacitor. The fourth inductor, the fifth inductor, and the first DC blocking capacitor are connected in series. The first terminal of the fourth varactor diode is connected to the first terminal of the fourth inductor, and the second terminal of the fourth varactor diode is grounded. The first terminal of the fifth varactor diode is connected to the second terminal of the fourth inductor, and the second terminal of the fifth varactor diode is grounded.
8. The power amplifier as described in any one of claims 1 to 3, characterized in that, The amplifier circuit includes a first transformer matching network, a driver stage, a second transformer matching network, a power amplifier stage, and a third transformer matching network connected in sequence.
9. The power amplifier as described in claim 8, characterized in that, The first transformer matching network is used to convert signals of different frequency bands from single-ended signals to differential signals; the second transformer matching network is used for impedance matching between the driver stage and the power amplifier stage; the third transformer matching network is used to convert the differential signal amplified by the driver stage and the power amplifier stage into a single-ended signal.
10. The power amplifier as claimed in claim 9, characterized in that, The driving stage includes a first transistor and a second transistor, and the power amplification stage includes a third transistor and a fourth transistor, wherein the first transistor and the second transistor share a common source, and the third transistor and the fourth transistor share a common source; the power amplifier includes four reconfigurable bias circuits, and the drains of the first transistor, the second transistor, the third transistor, and the fourth transistor are connected to the four reconfigurable bias circuits in a one-to-one correspondence.
11. A power amplifier chip, characterized in that, Includes the power amplifier as described in any one of claims 1-10.
12. An electronic device, characterized in that, Includes the power amplifier chip as described in any one of claims 11.