Transimpedance amplification circuit and photoelectric receiver

Abstract

The embodiment of the application provides a trans-impedance amplification circuit and an optoelectronic receiver, the trans-impedance amplification circuit comprises a feedforward amplification circuit, the feedforward amplification circuit comprises at least three-stage feedforward amplification circuits, the at least three-stage feedforward amplification circuits comprise a first-stage feedforward amplification circuit, a second-stage feedforward amplification circuit and a third-stage feedforward amplification circuit connected in series; an active feedback circuit, the active feedback circuit comprises at least two active feedback circuits, the at least two active feedback circuits comprise a first active feedback circuit and a second active feedback circuit; and a feedback resistor, the feedback resistor is connected in parallel between an input end of the first-stage feedforward amplification circuit and an output end of the third-stage feedforward amplification circuit. Through the embodiment of the application, the problem that a conventional trans-impedance amplification circuit cannot guarantee a good data transmission rate while meeting circuit analog bandwidth requirements for an optoelectronic receiver for high-speed data transmission demand in the prior art can be solved.

Description

Technical Field

[0001] This application relates to the field of optical communication technology, and more specifically, to a transimpedance amplifier circuit and an optoelectronic receiver. Background Technology

[0002] The rapid development of cloud services and mobile computing has led to a demand for hyperscale data centers in the industry. In order to cope with the rapidly growing data volume, the interconnect bandwidth within servers also needs to increase accordingly.

[0003] In related technologies, electrical interconnects using conductors as the medium introduce significant channel loss in high-speed scenarios. Compensating for this loss requires complex equalization techniques, which incur prohibitive power consumption and area overhead. Therefore, electrical interconnects have shifted to optical interconnects, specifically optoelectronic co-packaging technology. This involves packaging optical transceiver chips and loads such as computing chips or switch chips onto the same substrate. The aim is to further shorten the path of electrical signal transmission between the transceiver and the load, achieving lower loss and latency. To support high-speed transmission rates from 800Gb / s to 1.6Tb / s, a single-channel data rate of 224Gb / s is required. Using traditional transimpedance amplifier circuits and non-return-to-zero (NRZ) modulation, with each symbol carrying 1 bit of information, a circuit analog bandwidth exceeding 150GHz is needed, which is difficult to achieve with current technology.

[0004] In summary, no effective solution has yet been proposed in the relevant technologies. Summary of the Invention

[0005] This application provides a transimpedance amplifier circuit and an optoelectronic receiver to at least solve the problem in the related art where optoelectronic receivers with high-speed data transmission requirements cannot guarantee a good data transmission rate while also meeting the circuit analog bandwidth requirements.

[0006] According to one embodiment of this application, a transimpedance amplifier circuit is provided, including a feedforward amplifier circuit, an active feedback circuit, and a feedback resistor. The feedforward amplifier circuit includes at least three stages of feedforward amplifier circuits, each stage comprising a first-stage feedforward amplifier circuit, a second-stage feedforward amplifier circuit, and a third-stage feedforward amplifier circuit connected in series. The input terminal of the first-stage feedforward amplifier circuit is connected to a power supply input terminal, and the output terminal of the third-stage feedforward amplifier circuit is connected to a voltage output terminal. The active feedback circuit includes at least two active feedback circuits, each comprising a first active feedback circuit and a second active feedback circuit. The first active feedback circuit is connected in parallel between the input terminal of the first-stage feedforward amplifier circuit and the output terminal of the second-stage feedforward amplifier circuit, and the second active feedback circuit is connected in parallel between the input terminal of the second-stage feedforward amplifier circuit and the output terminal of the third-stage feedforward amplifier circuit. The feedback resistor is connected in parallel between the input terminal of the first-stage feedforward amplifier circuit and the output terminal of the third-stage feedforward amplifier circuit.

[0007] According to another embodiment of this application, an optoelectronic receiver is provided, including the transimpedance amplifier circuit in the above embodiment.

[0008] The above embodiments of this application provide a transimpedance amplifier circuit, which employs a feedforward amplifier circuit, an active feedback circuit, and a feedback resistor to form a feedback network. The feedforward amplifier circuit includes at least three stages, comprising a first-stage feedforward amplifier circuit, a second-stage feedforward amplifier circuit, and a third-stage feedforward amplifier circuit connected in series. The input terminal of the first-stage feedforward amplifier circuit is connected to the power supply input terminal, and the output terminal of the third-stage feedforward amplifier circuit is connected to the voltage output terminal. The active feedback circuit includes at least two active feedback circuits, comprising a first active feedback circuit and a second active feedback circuit. The feedback circuit comprises a first active feedback circuit connected in parallel between the input of the first-stage feedforward amplifier and the output of the second-stage feedforward amplifier, a second active feedback circuit connected in parallel between the input of the second-stage feedforward amplifier and the output of the third-stage feedforward amplifier, and a feedback resistor connected in parallel between the input of the first-stage feedforward amplifier and the output of the third-stage feedforward amplifier. This converts the current into voltage through a transimpedance amplifier for subsequent signal processing and transmission. By employing feedforward amplifiers and interleaved active feedback circuitry, high-speed data transmission through a single channel is achieved, while simultaneously reducing the requirements for analog bandwidth. Therefore, this solution addresses the challenge in related technologies where conventional transimpedance amplifiers cannot guarantee a good data transmission rate while simultaneously meeting the analog bandwidth requirements of optoelectronic receivers demanding high-speed data transmission, thus achieving the desired high-speed data transmission capability. Attached Figure Description

[0009] Figure 1 This is a schematic diagram of a transimpedance amplifier circuit according to an embodiment of this application;

[0010] Figure 2 This is a schematic diagram of a single-stage feedforward amplifier circuit in a transimpedance amplifier circuit according to an embodiment of this application;

[0011] Figure 3 This is a schematic diagram of an inverter chain of an analog feedforward amplifier circuit according to an embodiment of this application;

[0012] Figure 4 This is a schematic diagram of a self-feedback inverter chain according to an embodiment of this application;

[0013] Figure 5 This is a schematic diagram of the connection of the series peaking inductors according to an embodiment of this application;

[0014] Figure 6 This is a schematic diagram of a portion of the small-signal equivalent circuit of a series peaking inductor circuit according to an embodiment of this application;

[0015] Figure 7 This is a schematic diagram of the active feedback circuit in the transimpedance amplifier circuit according to an embodiment of this application;

[0016] Figure 8 This is a schematic diagram of a portion of the small-signal equivalent circuit of the active feedback circuit according to an embodiment of this application. Figure 1 ;

[0017] Figure 9 This is a schematic diagram of a portion of the small-signal equivalent circuit of the active feedback circuit according to an embodiment of this application. Figure 2 ;

[0018] Figure 10 This is a loop block diagram of a transimpedance amplifier circuit according to an embodiment of this application. Detailed Implementation

[0019] The embodiments of this application will be described in detail below with reference to the accompanying drawings and examples.

[0020] It should be noted that the terms "first," "second," etc., in the specification, claims, and drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0021] In related technologies, non-return-to-zero (NRZ) modulation is usually used, with each symbol carrying 1 bit of information, enabling a single-channel data rate of 224 Gb / s. However, this places extremely high demands on the circuit analog bandwidth, requiring a circuit analog bandwidth of more than 150 GHz, which is difficult to achieve with current technology. It is difficult to ensure a good data transmission rate while also meeting the circuit analog bandwidth requirements.

[0022] Based on the above problems, this application proposes a transimpedance amplifier circuit for an optoelectronic receiver used in high-speed optical communication and optical interconnection. Figure 1 This is a schematic diagram of a transimpedance amplifier circuit according to an embodiment of this application, as shown below. Figure 1 As shown, the transimpedance amplifier circuit uses a feedback network consisting of a feedforward amplifier circuit, an active feedback circuit, and a feedback resistor to convert the output current of the photodetector into a voltage for subsequent processing. The photodetector uses a germanium-silicon photodiode, which has low-pass photoelectric conversion characteristics and high output impedance. The output current of the photodetector is converted into voltage through the transimpedance amplifier circuit. In this embodiment, a four-level pulse amplitude modulation (PAM-4) format is used, that is, four different signal levels are used for data transmission. Each symbol carries 2 bits of information. Therefore, while achieving data transmission of 224Gb / s, the symbol rate of the PAM-4 signal is only half that of NRZ, that is, 112Gsymbol / s, and the requirement for the analog bandwidth of the circuit is also reduced to 70GHz.

[0023] The transimpedance amplifier circuit of this embodiment specifically includes the following:

[0024] (1) A three-stage feedforward amplifier circuit is used to obtain the gain-bandwidth product;

[0025] Furthermore, each stage of the feedforward amplifier circuit consists of an inverter and a cascaded self-feedback inverter.

[0026] (2) Two active feedback circuits are used to extend the bandwidth of the three-stage feedforward amplifier circuit;

[0027] Furthermore, each active feedback circuit consists of an inverter, and the feedback signal flows unidirectionally from the input terminal to the output terminal of the active feedback circuit. The two active feedback circuits and the three-stage feedforward amplifier circuit together form two interleaved active feedback networks.

[0028] (3) Distributed series peaking inductor circuit, together with active feedback circuit, is used to increase the bandwidth of transimpedance amplifier circuit to over 70GHz;

[0029] Furthermore, the peaking inductor is connected in series between the inverter and the self-feedback inverter in each stage of the feedforward amplifier circuit.

[0030] (4) Feedback resistor;

[0031] Furthermore, a feedback resistor is connected in parallel between the input and output terminals of the three-stage feedforward amplifier circuit to form voltage-current feedback, resulting in low input impedance and low output impedance.

[0032] By using the aforementioned transimpedance amplifier circuit and employing a distributed series peaking inductor circuit and interleaved active feedback network technology, a flat amplitude-frequency characteristic within 70GHz is achieved to support a single-channel data rate of 224Gb / s.

[0033] In one embodiment, the transimpedance amplifier circuit includes a feedforward amplifier circuit, an active feedback circuit, and a feedback resistor; the feedforward amplifier circuit includes at least three stages of feedforward amplifier circuits, each stage consisting of a first-stage feedforward amplifier circuit, a second-stage feedforward amplifier circuit, and a third-stage feedforward amplifier circuit connected in series, wherein the input terminal of the first-stage feedforward amplifier circuit is connected to a power supply input terminal, and the output terminal of the third-stage feedforward amplifier circuit is connected to a voltage output terminal; the active feedback circuit includes at least two active feedback circuits, each consisting of a first active feedback circuit and a second active feedback circuit, wherein the first active feedback circuit is connected in parallel between the input terminal of the first-stage feedforward amplifier circuit and the output terminal of the second-stage feedforward amplifier circuit, and the second active feedback circuit is connected in parallel between the input terminal of the second-stage feedforward amplifier circuit and the output terminal of the third-stage feedforward amplifier circuit; the feedback resistor is connected in parallel between the input terminal of the first-stage feedforward amplifier circuit and the output terminal of the third-stage feedforward amplifier circuit.

[0034] In this embodiment, the transimpedance amplifier circuit consists of a three-stage feedforward amplifier circuit, two active feedback circuits, and a feedback resistor. To achieve a higher gain-bandwidth product than a single-stage inverter, the feedforward amplifier circuit is typically set to three stages, with a single-stage voltage gain of approximately 6dB. However, the number of stages in the feedforward amplifier circuit is not limited and can be designed according to specific requirements.

[0035] In this embodiment, Figure 2 This is a schematic diagram of a single-stage feedforward amplifier circuit in a transimpedance amplifier circuit according to an embodiment of this application, as shown below. Figure 2 As shown, the single-stage feedforward amplifier circuit is an inverter with a self-feedback inverter as the load. The self-feedback inverter is an inverter whose input and output terminals are directly connected. For the preceding stage circuit, the self-feedback inverter is equivalent to a low-impedance load. At the cost of sacrificing the single-stage gain, the impedance of the output node of the feedforward amplifier circuit is reduced to expand the gain bandwidth.

[0036] Furthermore, the specific values ​​for the number of stages in the feedforward amplifier circuit and the size of the self-feedback inverter in this embodiment are analyzed below:

[0037] one, Figure 3 This is a schematic diagram of the inverter chain of an analog feedforward amplifier circuit according to an embodiment of this application, as shown below. Figure 3 As shown, the inverters in the inverter chain can be used as feedforward inverters, mainly including the i-th stage feedforward inverter and the (i+1)-th stage feedforward inverter, where the output impedance of the i-th stage feedforward inverter is r. o,1 / / ro,2 That is, transistor M n,i With M p,i If the internal resistances are connected in parallel, then the first pole contributed by the output node of the i-th stage feedforward inverter is:

[0038]

[0039] Among them, C L,i It is represented as the load capacitance of the i-th stage feedforward inverter, which mainly consists of the drain-substrate diffusion capacitance of the current stage transistor and the gate input capacitance of the next stage transistor.

[0040] two, Figure 4 This is a schematic diagram of a self-feedback inverter chain according to an embodiment of this application, as shown below. Figure 4 As shown, if a transistor M is inserted between the i-th stage feedforward inverter and the (i+1)-th stage feedforward inverter... psf,i With M nsf,i The output node impedance of the i-th stage feedforward inverter, when composed of self-feedback inverters, decreases to approximately (1 / g). mpsf,i ) / / (1 / g mnsf,i This refers to the impedance of the output node of the self-feedback inverter to ground. Consequently, the impedance of the output node of the i-th stage feedforward inverter decreases to approximately 1 / μ of its original value, where μ is the intrinsic gain of the transistor. Therefore, the second pole contributed by the output node of the i-th stage feedforward inverter at this point is:

[0041]

[0042] Among them, C' L,i This is the total parasitic capacitance to ground of the output node after inserting the self-feedback inverter.

[0043] Assuming all inverters and self-feedback inverters in the inverter chain have the same size, then C' L,i ≈2C L,i When the intrinsic gain μ is greater than 2, the poles will shift to higher frequencies, and the gain bandwidth will be expanded.

[0044] For example, cascading a single-stage inverter with a single-stage self-feedback inverter is called a single-stage feedforward amplifier circuit. In this embodiment, a three-stage feedforward amplifier circuit is used. It should be noted that the self-feedback inverter reduces the load resistance of the feedforward inverter, resulting in a lower voltage gain. To ensure sufficient gain bandwidth, three identical feedforward amplifier circuits are typically cascaded. It is necessary to ensure that the cascaded gain-bandwidth product is greater than the single-stage gain-bandwidth product. The derivation process is as follows:

[0045] (1) Assume the voltage transfer function of each feedforward amplifier stage is:

[0046]

[0047] Where A0 represents the low-frequency gain of the feedforward amplifier, ω0 represents the angular frequency of the dominant pole of the feedforward amplifier, and s represents the complex frequency variable.

[0048] (2) The voltage transfer function of the n-stage cascaded feedforward amplifiers is:

[0049]

[0050] (3) Let s = jω, and let The cascaded -3dB bandwidth is obtained as follows:

[0051]

[0052] Where ω represents the angular frequency variable, and j represents the imaginary unit.

[0053] (4) For n=3, the gain-bandwidth product of a cascaded 3-stage feedforward amplifier is:

[0054] GBW3=A0 3 ω 3，-3db ≈A0 2 ·0.51ω0A0=0.51A0 2 GBW (6)

[0055] Where GBW is the gain-bandwidth product of a single-stage feedforward amplifier.

[0056] (5) Make the cascaded gain-bandwidth product greater than the single-stage gain-bandwidth product, let 0.51A0 2 >1 yields the minimum voltage gain A of a single stage. 0,min =2.92dB

[0057] The size of the self-feedback inverter needs to be half the size of the inverter to obtain a single-stage voltage gain of about 6dB.

[0058] In one embodiment, the first-stage feedforward amplifier circuit includes a first inverter, a first peaking inductor, and a first self-feedback inverter; the second-stage feedforward amplifier circuit includes a second inverter, a second peaking inductor, and a second self-feedback inverter; and the third-stage feedforward amplifier circuit includes a third inverter, a third peaking inductor, and a third self-feedback inverter.

[0059] In one embodiment, the first inverter, the first peaking inductor, and the first self-feedback inverter are connected in series, the second inverter, the second peaking inductor, and the second self-feedback inverter are connected in series, and the third inverter, the third peaking inductor, and the third self-feedback inverter are connected in series.

[0060] In this embodiment, a peaking inductor (e.g., the first inverter) is connected in series with a self-feedback inverter (e.g., the first self-feedback inverter) in each stage of the feedforward amplifier circuit. The three peaking inductors form a distributed series inductor peaking circuit. The value of the peaking inductor in this embodiment needs to take into account the values ​​of the equivalent capacitance, inductance and resistance of the inverters before and after the peaking inductor, so as to achieve a better balance between bandwidth expansion ratio and group delay variation.

[0061] In this embodiment, the specific value of the peaking inductor is analyzed as follows:

[0062] one, Figure 5 This is a schematic diagram of the connection of the series peaking inductor according to an embodiment of this application, as shown below. Figure 5 As shown, C1 is the self-load capacitor of the output node of the previous stage feedforward amplifier, C2 is the gate capacitor of the next stage feedforward amplifier, and L is the peaking inductor connected in series between the inverter and the self-feedback inverter.

[0063] two, Figure 6 This is a schematic diagram of a portion of the small-signal equivalent circuit of the series peaking inductor circuit according to an embodiment of this application, such as... Figure 6 As shown, R is the output impedance of the feedforward amplifier, C1 is the self-load capacitance of the output node of the previous stage feedforward amplifier, C2 is the gate capacitance of the next stage feedforward amplifier, and L is the peaking inductor connected in series between the inverter and the self-feedback inverter.

[0064] Specifically, the transfer function of the series peaked inductor circuit is defined. available:

[0065]

[0066] in,

[0067] m = L / R 2 (C1+C2) (8)

[0068] n = C2 / (C1 + C2) (9)

[0069] ω u =1 / R(C1+C2) (10)

[0070] For example, when n = 0.75, taking m as 0.5 can achieve a better balance between bandwidth expansion ratio and group delay variation. At this time, the gain bandwidth is increased to about 2.1 times compared to when there is no series peaking inductor. For R = 100Ω, C1 and C2 are taken as the number of fly-by or the number of fly-by, and the peaking inductor L is taken as the number of tens to hundreds of pichenries.

[0071] In one embodiment, the first-stage feedforward amplifier circuit further includes a first parasitic capacitor connected in series with the first peaking inductor; the second-stage feedforward amplifier circuit further includes a second parasitic capacitor connected in series with the second peaking inductor; and the third-stage feedforward amplifier circuit further includes a third parasitic capacitor connected in series with the third peaking inductor.

[0072] In one embodiment, the first parasitic capacitance and the first peaked inductor constitute a first resonant circuit, which is connected in series between the first inverter and the first self-feedback inverter; the second parasitic capacitance and the second peaked inductor constitute a second resonant circuit, which is connected in series between the second inverter and the second self-feedback inverter; the third parasitic capacitance and the third peaked inductor constitute a third resonant circuit, which is connected in series between the third inverter and the third self-feedback inverter.

[0073] In this embodiment, the peaking inductor (e.g., the first peaking inductor) and the parasitic capacitance of the field-effect transistor (e.g., the first parasitic capacitance) are connected in series to form a first resonant circuit to generate high-frequency resonance and expand the gain bandwidth.

[0074] In one embodiment, the first active feedback circuit is connected in parallel between the input terminal of the first-stage feedforward amplifier circuit and the output terminal of the second-stage feedforward amplifier circuit, comprising: a first terminal of the first active feedback circuit is connected to the input terminal of the first-stage feedforward amplifier circuit, and a second terminal of the first active feedback circuit is connected to the output terminal of the second-stage feedforward amplifier circuit, wherein the first active feedback circuit, the first-stage feedforward amplifier circuit, and the second-stage feedforward amplifier circuit constitute a first interleaved active feedback loop.

[0075] In one embodiment, the second active feedback circuit is connected in parallel between the input terminal of the second-stage feedforward amplifier circuit and the output terminal of the third-stage feedforward amplifier circuit, comprising: a first terminal of the second active feedback circuit connected to the input terminal of the second-stage feedforward amplifier circuit, and a second terminal of the second active feedback circuit connected to the output terminal of the third-stage feedforward amplifier circuit, wherein the second active feedback circuit, the second-stage feedforward amplifier circuit, and the third-stage feedforward amplifier circuit constitute a second interleaved active feedback loop.

[0076] In this embodiment, Figure 7 This is a schematic diagram of the active feedback circuit in the transimpedance amplifier circuit according to an embodiment of this application, as shown below. Figure 7 As shown, the first active feedback circuit, together with the first-stage feedforward amplifier circuit and the second-stage feedforward amplifier circuit, forms a first interleaved active feedback loop, and the second active feedback circuit, together with the second-stage feedforward amplifier circuit and the third-stage feedforward amplifier circuit, forms a second interleaved active feedback loop.

[0077] Furthermore, when determining the value of the feedback coefficient, it is necessary to determine it based on the transconductance and equivalent resistance of the active feedback circuit. Typically, a feedback coefficient of 0.14 can yield a relatively flat in-band amplitude-frequency characteristic and good stability.

[0078] For example, interleaved active feedback technology uses an active feedback circuit to construct conjugate poles, which can extend the circuit bandwidth when the damping coefficient of the conjugate poles is appropriate for the free oscillation frequency.

[0079] Figure 8 This is a schematic diagram of a portion of the small-signal equivalent circuit of the active feedback circuit according to an embodiment of this application. Figure 1 ,like Figure 8 As shown, g mff For the transconductance of the feedforward amplifier circuit, g mfb For the transconductance of the active feedback circuit, R o C is the output impedance of the feedforward amplifier circuit. is The interstage capacitance is composed of the self-load capacitance of the feedforward amplifier circuit and the input capacitance of the next stage feedforward amplifier circuit, etc., C in The input capacitor, R, is composed of the photodiode junction capacitance, chip pad capacitance, and input stage gate-source capacitance. f The equivalent resistance connected to account for the feedback resistance load effect, C L This is the output load capacitor.

[0080] To simplify the analysis, the series peaking inductor can be discarded, and the inverter size of the active feedback circuit is generally much smaller than that of the feedforward amplifier circuit. Therefore, the output impedance of the active feedback circuit can be regarded as infinite and the load effect can be ignored, making it an ideal transconductance amplifier.

[0081] To further simplify the analysis, the resistance and capacitance values ​​of each node can be assumed to be RC = R. o C is And reorganize all levels, Figure 9 This is a schematic diagram of a portion of the small-signal equivalent circuit of the active feedback circuit according to an embodiment of this application. Figure 2 ,like Figure 9 As shown, the transconductance of each stage of the feedforward amplifier circuit and the impedance of the previous stage's output node are collectively constructed into a transfer function H. ff (s) current amplifier circuit.

[0082] Furthermore, H fb (s) represents the frequency response characteristic of the signal as it travels from the output to the input of the feedforward amplifier circuit. The impedance at the output node of the feedforward amplifier circuit is separately constructed as H. z (s), the resulting loop block diagram of the transimpedance amplifier circuit is as follows: Figure 10As shown, the closed-loop transfer function is:

[0083]

[0084] Wherein, the feedback coefficient is β = H fb (0)H z (0)=g mfb Therefore, when β = 0.14, a relatively flat in-band amplitude-frequency characteristic and good stability can be achieved.

[0085] In one embodiment, the first active feedback circuit includes a fourth inverter, the first terminal of which is connected to the input terminal of the first-stage feedforward amplifier circuit, and the second terminal of which is connected to the output terminal of the second-stage feedforward amplifier circuit; the second active feedback circuit includes a fifth inverter, the first terminal of which is connected to the input terminal of the second-stage feedforward amplifier circuit, and the second terminal of which is connected to the output terminal of the third-stage feedforward amplifier circuit.

[0086] In this embodiment, the first active feedback circuit, together with the first-stage feedforward amplifier circuit and the second-stage feedforward amplifier circuit, forms a first interleaved active feedback loop; the second active feedback circuit, together with the second-stage feedforward amplifier circuit and the third-stage feedforward amplifier circuit, forms a second interleaved active feedback loop, wherein, as shown... Figure 1 As shown, the first active feedback circuit and the second active feedback circuit each include an inverter.

[0087] In one embodiment, the size of the transistor in the first self-feedback inverter is half the size of the transistor in the first inverter, the size of the transistor in the second self-feedback inverter is half the size of the transistor in the second inverter, and the size of the transistor in the third self-feedback inverter is half the size of the transistor in the third inverter.

[0088] In this embodiment, three identical cascaded feedforward amplifiers are typically used. The self-feedback inverter is half the size of the standard inverter, which effectively reduces output impedance, thereby reducing circuit distortion. Simultaneously, it controls the feedback coefficient of the circuit by reducing the intrinsic gain of the transistor, ensuring circuit stability. The selection of the transistor size for the self-feedback inverter is crucial for achieving a flat amplitude-frequency response; a smaller transistor size helps reduce signal delay and improve circuit response speed.

[0089] This embodiment employs a three-stage feedforward amplifier circuit, two active feedback circuits, and feedback resistors. This optimizes the gain-bandwidth product, linearity, noise performance, and bandwidth flatness. This is directly important for supporting PAM-4 modulation (four-level pulse amplitude modulation) format, achieving high-speed data transmission, and improving spectral efficiency. By using a three-stage feedforward amplifier circuit, inductor peaking circuit, and interleaved active feedback circuit technology, the performance requirements of the PAM-4 modulation format are met, increasing the amount of information carried by a single code and thus improving spectral efficiency. However, the number of stages in the feedforward amplifier circuit is not limited; multiple stages can be configured according to actual conditions.

[0090] The above embodiments of this application provide a transimpedance amplifier circuit, which employs a feedforward amplifier circuit, an active feedback circuit, and a feedback resistor to form a feedback network. The feedforward amplifier circuit includes at least three stages, comprising a first-stage feedforward amplifier circuit, a second-stage feedforward amplifier circuit, and a third-stage feedforward amplifier circuit connected in series. The input terminal of the first-stage feedforward amplifier circuit is connected to the power supply input terminal, and the output terminal of the third-stage feedforward amplifier circuit is connected to the voltage output terminal. The active feedback circuit includes at least two active feedback circuits, comprising a first active feedback circuit and a second active feedback circuit. The feedback circuit comprises a first active feedback circuit connected in parallel between the input of the first-stage feedforward amplifier and the output of the second-stage feedforward amplifier, a second active feedback circuit connected in parallel between the input of the second-stage feedforward amplifier and the output of the third-stage feedforward amplifier, and a feedback resistor connected in parallel between the input of the first-stage feedforward amplifier and the output of the third-stage feedforward amplifier. This converts the current into voltage through a transimpedance amplifier for subsequent signal processing and transmission. By employing feedforward amplifiers and interleaved active feedback circuitry, high-speed data transmission through a single channel is achieved, while simultaneously reducing the requirements for analog bandwidth. Therefore, this solution addresses the challenge in related technologies where conventional transimpedance amplifiers cannot guarantee a good data transmission rate while simultaneously meeting the analog bandwidth requirements of optoelectronic receivers demanding high-speed data transmission, thus achieving the desired high-speed data transmission capability.

[0091] In one embodiment, a photoelectric receiver is also provided, which is used to implement the above embodiments and preferred embodiments, and will not be repeated hereafter.

[0092] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Various modifications and variations can be made to this application by those skilled in the art. Any modifications, equivalent substitutions, improvements, etc., made within the principles of this application should be included within the protection scope of this application.

Claims

1. A transimpedance amplifier circuit, characterized in that, include: Feedforward amplifier circuit, active feedback circuit, feedback resistor; The feedforward amplifier circuit includes at least three stages of feedforward amplifier circuits, each stage comprising a first stage feedforward amplifier circuit, a second stage feedforward amplifier circuit, and a third stage feedforward amplifier circuit connected in series. The input terminal of the first stage feedforward amplifier circuit is connected to the power input terminal, and the output terminal of the third stage feedforward amplifier circuit is connected to the voltage output terminal. The active feedback circuit includes at least two active feedback circuits, including a first active feedback circuit and a second active feedback circuit. The first active feedback circuit is connected in parallel between the input terminal of the first-stage feedforward amplifier circuit and the output terminal of the second-stage feedforward amplifier circuit, and the second active feedback circuit is connected in parallel between the input terminal of the second-stage feedforward amplifier circuit and the output terminal of the third-stage feedforward amplifier circuit. The feedback resistor is connected in parallel between the input terminal of the first-stage feedforward amplifier circuit and the output terminal of the third-stage feedforward amplifier circuit.

2. The transimpedance amplifier circuit according to claim 1, characterized in that, in, The first-stage feedforward amplifier circuit includes a first inverter, a first peaking inductor, and a first self-feedback inverter; the second-stage feedforward amplifier circuit includes a second inverter, a second peaking inductor, and a second self-feedback inverter; and the third-stage feedforward amplifier circuit includes a third inverter, a third peaking inductor, and a third self-feedback inverter.

3. The transimpedance amplifier circuit according to claim 2, characterized in that, in, The first inverter, the first peaking inductor, and the first self-feedback inverter are connected in series in sequence; the second inverter, the second peaking inductor, and the second self-feedback inverter are connected in series in sequence ...

4. The transimpedance amplifier circuit according to claim 2, characterized in that, The first-stage feedforward amplifier circuit further includes a first parasitic capacitor, which is connected in series with the first peaking inductor. The second-stage feedforward amplifier circuit further includes a second parasitic capacitor, which is connected in series with the second peaking inductor. The third-stage feedforward amplifier circuit further includes a third parasitic capacitor, which is connected in series with the third peaking inductor.

5. The transimpedance amplifier circuit according to claim 4, characterized in that, The first parasitic capacitance and the first peaked inductor constitute a first resonant circuit, which is connected in series between the first inverter and the first self-feedback inverter; the second parasitic capacitance and the second peaked inductor constitute a second resonant circuit, which is connected in series between the second inverter and the second self-feedback inverter; the third parasitic capacitance and the third peaked inductor constitute a third resonant circuit, which is connected in series between the third inverter and the third self-feedback inverter.

6. The transimpedance amplifier circuit according to claim 1, characterized in that, The first active feedback circuit is connected in parallel between the input terminal of the first-stage feedforward amplifier circuit and the output terminal of the second-stage feedforward amplifier circuit, including: The first terminal of the first active feedback circuit is connected to the input terminal of the first-stage feedforward amplifier circuit, and the second terminal of the first active feedback circuit is connected to the output terminal of the second-stage feedforward amplifier circuit. The first active feedback circuit, the first-stage feedforward amplifier circuit, and the second-stage feedforward amplifier circuit constitute a first interleaved active feedback loop.

7. The transimpedance amplifier circuit according to claim 1, characterized in that, The second active feedback circuit is connected in parallel between the input terminal of the second-stage feedforward amplifier circuit and the output terminal of the third-stage feedforward amplifier circuit, and includes: The first terminal of the second active feedback circuit is connected to the input terminal of the second-stage feedforward amplifier circuit, and the second terminal of the second active feedback circuit is connected to the output terminal of the third-stage feedforward amplifier circuit. The second active feedback circuit, the second-stage feedforward amplifier circuit, and the third-stage feedforward amplifier circuit constitute a second interleaved active feedback loop.

8. The transimpedance amplifier circuit according to claim 1, characterized in that, in, The first active feedback circuit includes a fourth inverter, the first terminal of which is connected to the input terminal of the first stage feedforward amplifier circuit, and the second terminal of which is connected to the output terminal of the second stage feedforward amplifier circuit. The second active feedback circuit includes a fifth inverter, the first terminal of which is connected to the input terminal of the second-stage feedforward amplifier circuit, and the second terminal of which is connected to the output terminal of the third-stage feedforward amplifier circuit.

9. The transimpedance amplifier circuit according to claim 2, characterized in that, in, The size of the transistor in the first self-feedback inverter is half the size of the transistor in the first inverter, the size of the transistor in the second self-feedback inverter is half the size of the transistor in the second inverter, and the size of the transistor in the third self-feedback inverter is half the size of the transistor in the third inverter.

10. A photoelectric receiver, characterized in that, Includes the transimpedance amplifier circuit described in any one of claims 1-9 above.

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