A GaN device structure and applications thereof

Abstract

The application discloses a GaN device structure and application thereof, and relates to the technical field of semiconductor devices, in particular to a GaN device structure and application thereof. The structure comprises a first GaN field effect transistor, a second GaN field effect transistor and a shunt module; the drain of the first GaN field effect transistor is connected with the source of the second GaN field effect transistor, the source of the first GaN field effect transistor is connected with the gate of the second GaN field effect transistor, and the connecting point is grounded; the gate of the first GaN field effect transistor is connected with an external voltage; one end of the shunt module is connected with the drain of the first GaN field effect transistor and the source of the second GaN field effect transistor respectively, and the other end of the shunt module is connected with the source of the first GaN field effect transistor and the gate of the second GaN field effect transistor respectively. The application can improve the high-frequency and high-efficiency characteristics of the GaN device, enhance the reliability of the device, realize the system-level integration of wafer chips, and reduce the packaging cost.

Description

Technical Field

[0001] This invention relates to the field of power electronic device technology, and in particular to a GaN device structure and its applications. Background Technology

[0002] Currently, cascaded gallium nitride (GaN) devices primarily rely on independently designed and manufactured discrete components. These components are segmented after manufacturing and then cascaded to meet specific circuit requirements. However, this type of device has several significant problems: 1) Large parasitic inductance: Due to the need for multiple discrete components, the connections between them introduce a large number of wire bonds, resulting in significant parasitic inductance. In high-frequency applications, this parasitic inductance can cause severe oscillations in the signal waveform, requiring additional complex protection circuits to stabilize the signal; 2) Parasitic capacitance mismatch: The capacitances between discrete components are often difficult to match well. This mismatch leads to potential fluctuations between electrodes, thereby increasing the switching or driving losses of the entire device. This not only reduces the device's efficiency but may also affect the stability and reliability of the entire circuit. Summary of the Invention

[0003] This invention provides a GaN device structure and its application.

[0004] In a first aspect, the present invention provides a GaN device structure, comprising:

[0005] First GaN field-effect transistor, second GaN field-effect transistor, and shunt module;

[0006] The drain of the first GaN field-effect transistor is connected to the source of the second GaN field-effect transistor, the source of the first GaN field-effect transistor is connected to the gate of the second GaN field-effect transistor and the connection point is grounded, and the gate of the first GaN field-effect transistor is connected to an external voltage.

[0007] The first GaN field-effect transistor is configured to control the on / off state of the GaN device, and the second GaN field-effect transistor is configured to withstand the external voltage input via the gate of the first GaN field-effect transistor;

[0008] One end of the current shunt module is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively, and the other end of the current shunt module is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively.

[0009] The current shunting module is configured to shunt the drain-source voltage of the first GaN field-effect transistor when the sum of the drain-source capacitance and the gate-drain capacitance of the first GaN field-effect transistor is less than the sum of the drain-source capacitance and the gate-source capacitance of the second GaN field-effect transistor. The current shunting module is also configured to shunt the leakage current between the second GaN field-effect transistor and the first GaN field-effect transistor when the leakage current of the second GaN field-effect transistor is greater than the leakage current of the first GaN field-effect transistor.

[0010] Secondly, the present invention provides a method for fabricating a GaN device structure, comprising:

[0011] Provide substrate;

[0012] A channel layer is formed on the substrate;

[0013] A barrier layer is formed on the channel layer;

[0014] A P-GaN layer is formed on the barrier layer;

[0015] The P-GaN layer, the barrier layer, and the channel layer are etched to form isolation trenches;

[0016] The P-GaN layer at the isolation trench is etched away in a designated area to form a first passivation layer;

[0017] A first GaN field-effect transistor, a second GaN field-effect transistor, and a shunt module are formed in the first passivation layer;

[0018] A second passivation layer is formed on the first passivation layer, and the first GaN field-effect transistor, the second GaN field-effect transistor, and the shunt module are interconnected by electrodes in the second passivation layer;

[0019] In this configuration, the drain of the first GaN field-effect transistor is connected to the source of the second GaN field-effect transistor, the source of the first GaN field-effect transistor is connected to the gate of the second GaN field-effect transistor, and the connection point is grounded. The gate of the first GaN field-effect transistor is connected to an external voltage. One end of the shunt module is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively. The other end of the shunt module is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively.

[0020] Thirdly, the present invention provides a GaN device, comprising:

[0021] First GaN field-effect transistor, second GaN field-effect transistor, and shunt module;

[0022] The drain of the first GaN field-effect transistor is connected to the source of the second GaN field-effect transistor, the source of the first GaN field-effect transistor is connected to the gate of the second GaN field-effect transistor and the connection point is grounded, and the gate of the first GaN field-effect transistor is connected to an external voltage.

[0023] The first GaN field-effect transistor is configured to control the on / off state of the GaN device, and the second GaN field-effect transistor is configured to withstand the external voltage input via the gate of the first GaN field-effect transistor;

[0024] One end of the current shunt module is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively, and the other end of the current shunt module is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively.

[0025] The current shunting module is configured to shunt the drain-source voltage of the first GaN field-effect transistor when the sum of the drain-source capacitance and the gate-drain capacitance of the first GaN field-effect transistor is less than the sum of the drain-source capacitance and the gate-source capacitance of the second GaN field-effect transistor. The current shunting module is also configured to shunt the leakage current between the second GaN field-effect transistor and the first GaN field-effect transistor when the leakage current of the second GaN field-effect transistor is greater than the leakage current of the first GaN field-effect transistor.

[0026] Fourthly, the present invention provides a power supply device, comprising:

[0027] The GaN device described above.

[0028] Fifthly, the present invention provides an amplifier, comprising:

[0029] The GaN device described above. Attached Figure Description

[0030] Figure 1 This is a schematic diagram of a GaN device structure according to the present invention;

[0031] Figure 2 This is another schematic diagram of a GaN device structure according to the present invention;

[0032] Figure 3 This is another schematic diagram of a GaN device structure according to the present invention;

[0033] Figure 4 This is a schematic diagram of the structure of a power supply device according to the present invention;

[0034] Figure 5 This is a schematic diagram of the structure of an amplifier according to the present invention;

[0035] Figure label:

[0036] 1. First GaN field-effect transistor; 2. Second field-effect transistor; G, gate; D, drain; S, source; C1, first capacitor; C2, second capacitor; R1, first resistor; R2, second resistor; L, filter inductor; D1, first diode; D2, second diode; 460, power supply device; 461, high-voltage primary circuit; 462, low-voltage secondary circuit; 463, transformer; 464, AC power supply; 465, bridge rectifier circuit; 466, switching device; 467, single switching device; 468, switching device; 470, amplifier; 471, digital predistortion circuit; 472, mixer; 473, power amplifier; 474, directional coupler. Detailed Implementation

[0037] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings. The following content is for illustrative purposes only and is not intended to limit the scope of the invention.

[0038] In the description of this invention, it should be understood that the terms "first" and "second," etc., are used to distinguish different objects, rather than to describe a specific order.

[0039] In the description of this invention, it should be noted that, unless otherwise defined, all technical and scientific terms used in this invention have the same meaning as commonly understood by those skilled in the art. The terminology used in this specification is for descriptive purposes only and is not intended to limit the invention. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0040] like Figure 1 As shown, the present invention provides a GaN device structure, comprising:

[0041] The first GaN field-effect transistor 1, the second GaN field-effect transistor 2, and the shunt module.

[0042] The drain of the first GaN field-effect transistor is connected to the source of the second GaN field-effect transistor, the source of the first GaN field-effect transistor is connected to the gate of the second GaN field-effect transistor and the connection point is grounded, and the gate of the first GaN field-effect transistor is connected to an external voltage.

[0043] A first GaN field-effect transistor is configured to control the on / off state of a GaN device, and a second GaN field-effect transistor is configured to withstand an external voltage input via the gate of the first GaN field-effect transistor. The first GaN field-effect transistor is an enhancement-mode GaN field-effect transistor with a drain-source voltage less than a first threshold voltage; in some embodiments, the first threshold voltage is 50V, and the first GaN field-effect transistor is a low-voltage enhancement-mode GaN field-effect transistor with a drain-source voltage of 30V. The second GaN field-effect transistor is a depletion-mode GaN field-effect transistor with a drain-source voltage greater than a second threshold voltage; in some embodiments, the second threshold voltage is 600V, and the second GaN field-effect transistor is a high-voltage depletion-mode GaN field-effect transistor with a drain-source voltage of 650V.

[0044] The "on" or "off" of the conductive channel between the drain and source of the first GaN field-effect transistor is controlled by the "on" or "off" state of the conductive channel between the drain and source of the first GaN field-effect transistor, and the magnitude of the drain-source voltage during the turn-off process. Furthermore, the ratio of the linear region on-resistance of the first GaN field-effect transistor to the linear region on-resistance of the second GaN field-effect transistor does not exceed a third threshold. In some embodiments, the third threshold is 0.1, and the linear region on-resistance of the first GaN field-effect transistor is one-tenth or less of the linear region on-resistance of the second GaN field-effect transistor.

[0045] It should be noted that although cascading the first GaN field-effect transistor and the second GaN field-effect transistor can achieve the basic normally-off and high-voltage-resistant performance of GaN, leakage current and capacitance mismatch between the first and second GaN field-effect transistors leads to reliability issues during long-term switching dynamic operating cycles. Therefore, this invention designs a shunt module to overcome the defects of leakage current and capacitance mismatch.

[0046] One end of the shunt module is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively, and the other end of the shunt module is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively.

[0047] The current shunting module is configured to shunt the drain-source voltage of the first GaN field-effect transistor when the sum of the drain-source capacitance and the gate-drain capacitance of the first GaN field-effect transistor is less than the sum of the drain-source capacitance and the gate-source capacitance of the second GaN field-effect transistor. The current shunting module is also configured to shunt the leakage current between the second GaN field-effect transistor and the first GaN field-effect transistor when the leakage current of the second GaN field-effect transistor is greater than the leakage current of the first GaN field-effect transistor.

[0048] The current shunt module includes: a first capacitor C1 and a first resistor R1.

[0049] One end of the first capacitor is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively, and the other end of the first capacitor is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively.

[0050] The first capacitor is configured to shunt the drain-source voltage of the first GaN field-effect transistor (FET) when the sum of the drain-source capacitance and gate-drain capacitance of the first FET is less than the sum of the drain-source capacitance and gate-drain capacitance of the second FET. Without this first capacitor, when the sum of the drain-source capacitance and gate-drain capacitance of the first FET is less than the sum of the drain-source capacitance and gate-drain capacitance of the second FET, the drain-source capacitance and gate-drain capacitance of the first FET would continue to charge, causing the drain-source voltage of the first FET to exceed its breakdown voltage tolerance and fail.

[0051] One end of the first resistor is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively, and the other end of the first resistor is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively. That is, the first resistor is connected in parallel between the drain and source electrodes of the first GaN field-effect transistor or between the gate and source electrodes of the second GaN field-effect transistor.

[0052] The first resistor is configured to shunt the leakage current between the second GaN field-effect transistor and the first GaN field-effect transistor when the leakage current of the second GaN field-effect transistor is greater than the leakage current of the first GaN field-effect transistor, thereby preventing the first GaN field-effect transistor from prematurely breaking down and failing.

[0053] like Figure 2 As shown, in some embodiments, the GaN device structure also includes a filtering module.

[0054] The filtering module is connected in parallel between the gate and source of the first GaN field-effect transistor. Because the input external voltage is noisy, the filtering module is configured to perform noise filtering on the external voltage so that the noise-filtered external voltage is input to the gate of the first GaN field-effect transistor.

[0055] The filtering module includes a filter inductor L, a second capacitor C2, and a second resistor R2. One end of the filter inductor is connected to an external voltage, and the other end of the filter inductor is connected to the second capacitor and the second resistor, respectively, and also connected to the gate of a first GaN field-effect transistor. The second capacitor and the second resistor are both connected in parallel between the gate and source of the first GaN field-effect transistor. In some embodiments, the filter inductor, the second capacitor, and the second resistor all have high-frequency characteristics.

[0056] Because of the presence of an external input voltage, a certain current will be generated in the load (second resistor) circuit. Since the second resistor cannot filter this current, a filter inductor is configured to perform noise filtering on the current generated by the external voltage and the second resistor. Simultaneously, the second capacitor is configured to perform noise filtering on the external voltage. A basic oscillation circuit is formed through the L / R2 / C2 resonant mode, generating a stable AC voltage or current, which serves as the input voltage to the gate of the first GaN field-effect transistor, providing a normal and orderly signal waveform input to the gate of the first GaN field-effect transistor.

[0057] like Figure 3 As shown, in some embodiments, the GaN device structure also includes a protection module.

[0058] The protection module is connected in parallel between the gate and source of the first GaN field-effect transistor. The protection module is configured to limit the gate-source leakage current of the first GaN field-effect transistor to a preset level when the first GaN field-effect transistor is in a reverse bias state, and the protection module is configured to clamp the gate-source voltage of the first GaN field-effect transistor to a fixed voltage when the first GaN field-effect transistor is in an overcurrent state.

[0059] The protection module includes a first diode D1 and a second diode D2. The first diode and the second diode are connected in reverse series, i.e., the two diodes are a back-to-back diode pair. In some embodiments, both the first diode and the second diode are Schottky diodes. When the diodes are reverse biased, the back-to-back diodes have poor conduction capability, and the gate-source leakage current of the first GaN field-effect transistor is limited to a low level. When an overcurrent condition occurs in the diode, the diode will be voltage clamped to a fixed voltage. In some embodiments, the diode will be voltage clamped to a knee voltage of 0.7V. Since the gate-source electrode of the first GaN field-effect transistor is connected in parallel with the diode, the gate-source voltage of the first GaN field-effect transistor is also 0.7V, further protecting the gate-source electrode of the first GaN field-effect transistor.

[0060] This invention discloses a GaN device structure. By connecting a first capacitor and a first resistor in parallel between the drain of a first GaN field-effect transistor and the source of a second GaN field-effect transistor, the capacitance and leakage current between the first and second GaN field-effect transistors can be effectively matched, which is beneficial to improving the reliability of the GaN device. At the same time, the introduction of a filter module and a protection module with high-frequency characteristics is beneficial to enhancing the high-frequency and high-efficiency characteristics of the GaN device.

[0061] This invention provides a method for fabricating a GaN device structure, comprising the following steps:

[0062] 1) Provide a substrate;

[0063] 2) Form a channel layer on the substrate;

[0064] In some embodiments, a nucleation layer and a buffer layer are formed on a substrate, and a channel layer is formed on the buffer layer. The channel layer is made of GaN.

[0065] 3) A barrier layer is formed on the channel layer;

[0066] The barrier layer is made of AlGaN.

[0067] 4) Form a P-GaN layer on the barrier layer;

[0068] 5) Etch the P-GaN layer, barrier layer, and channel layer to form isolation trenches;

[0069] In some implementations, a photoresist process is performed on the surface of a semiconductor material. Selective pattern exposure and development are performed using a designated photomask to remove the photoresist in designated areas of the P-GaN layer, barrier layer, and channel layer. Then, a dry etching device is used to introduce Cl2 gas into the opened patterned window to block the two-dimensional electron gas between the components and form an isolation trench.

[0070] 6) The P-GaN layer at the isolation trench is etched to remove the specified area and form the first passivation layer;

[0071] In some embodiments, the P-GaN layer excluding the gate of the first GaN field-effect transistor is etched away to form a first passivation layer. The material of the first passivation layer is SiN.

[0072] 7) A first GaN field-effect transistor, a second GaN field-effect transistor, and a shunt module are formed in the first passivation layer;

[0073] In some implementations, in the first passivation layer, the designated area where the first passivation layer needs to open a window is etched out by CF4 gas through exposure and development with photoresist and a designated photomask. Then, the metal is evaporated or sputtered onto the wafer surface through an electron beam evaporation stage or a sputtering stage to form a first GaN field-effect transistor, a second GaN field-effect transistor, and a shunt module.

[0074] 8) A second passivation layer is formed on the first passivation layer, and the first GaN field-effect transistor, the second GaN field-effect transistor, and the shunt module are interconnected by electrodes in the second passivation layer.

[0075] The drain of the first GaN field-effect transistor is connected to the source of the second GaN field-effect transistor. The source of the first GaN field-effect transistor is connected to the gate of the second GaN field-effect transistor, and the connection point is grounded. The gate of the first GaN field-effect transistor is connected to an external voltage. One end of the shunt module is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively. The other end of the shunt module is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively.

[0076] The shunt module includes a first capacitor and a first resistor. A second passivation layer is formed on the first passivation layer, and electrodes of the first GaN field-effect transistor, the second GaN field-effect transistor, the first capacitor, and the first resistor are interconnected in the second passivation layer. One end of the first capacitor is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively, and the other end of the first capacitor is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively. One end of the first resistor is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively, and the other end of the first resistor is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively.

[0077] In some embodiments, the material of the second passivation layer is SiN. In the second passivation layer, by exposure and development with photoresist and a designated photomask, the designated area where the second passivation layer window needs to be opened is etched out with CF4 gas to form the first interconnect opening. Then, by electron beam evaporation or sputtering, metal is deposited or sputtered on the wafer surface to form the first interconnect metal, so as to interconnect the first GaN field-effect transistor, the second GaN field-effect transistor, the first capacitor, and the first resistor electrode.

[0078] A filter module is formed in the first passivation layer, and the first GaN field-effect transistor and the filter module are interconnected by electrodes in the second passivation layer. One end of the filter module is connected to the gate of the first GaN field-effect transistor, and the other end of the filter module is connected to the source of the first GaN field-effect transistor.

[0079] The filtering module includes a filter inductor, a second capacitor, and a second resistor. Electrode interconnects are formed between the first GaN field-effect transistor, the filter inductor, the second capacitor, and the second resistor within a second passivation layer. One end of the filter inductor is connected to an external voltage, and the other end is connected to both the second capacitor and the second resistor, and also connected to the gate of the first GaN field-effect transistor. One end of the second capacitor is connected to the gate of the first GaN field-effect transistor, and the other end is connected to the source of the first GaN field-effect transistor. One end of the second resistor is connected to the gate of the first GaN field-effect transistor, and the other end is connected to the source of the first GaN field-effect transistor.

[0080] In some implementations, in the second passivation layer, by exposure and development with photoresist and a designated photomask, the designated area where the second passivation layer needs to open a window is etched out with CF4 gas to form a second interconnect opening. Then, by electron beam evaporation or sputtering, metal is deposited or sputtered on the wafer surface to form a second interconnect metal, so that the first GaN field-effect transistor, the filter inductor, the second capacitor, and the second resistor electrode are interconnected.

[0081] A protection module is formed in the first passivation layer, and the first GaN field-effect transistor and the protection module are interconnected by electrodes in the second passivation layer. One end of the protection module is connected to the gate of the first GaN field-effect transistor, and the other end of the protection module is connected to the source of the first GaN field-effect transistor.

[0082] The protection module includes a first diode and a second diode. Electrode interconnections are formed between the first GaN field-effect transistor, the first diode, and the second diode within a second passivation layer. The anode of the first diode is connected to the anode of the second diode, the cathode of the first diode is connected to the gate of the first GaN field-effect transistor, and the cathode of the second diode is connected to the source of the first GaN field-effect transistor.

[0083] In some implementations, in the second passivation layer, by exposure and development with photoresist and a designated photomask, the designated area where the second passivation layer needs to open a window is etched out with CF4 gas to form a third interconnect opening. Then, by electron beam evaporation or sputtering, metal is deposited or sputtered on the wafer surface to form a third interconnect metal, so that the electrodes of the first GaN field-effect transistor, the first diode, and the second diode are interconnected.

[0084] It should be noted that the specific limitations on the fabrication method of a GaN device structure are as described above regarding the limitations on a GaN device structure. The two have the same function and role, and will not be repeated here.

[0085] This invention discloses a method for fabricating a GaN device structure. On the same GaN semiconductor wafer, a two-dimensional electron gas barrier is blocked between components through an isolation process, and electrodes that need to be electrically connected are interconnected in layers through a metal interconnect process. This enables system-level integration of semiconductor wafer chips and helps reduce packaging costs.

[0086] Based on the above-described GaN device structure, this invention provides a GaN device, comprising:

[0087] First GaN field-effect transistor, second GaN field-effect transistor, and shunt module;

[0088] The drain of the first GaN field-effect transistor is connected to the source of the second GaN field-effect transistor, the source of the first GaN field-effect transistor is connected to the gate of the second GaN field-effect transistor and the connection point is grounded, and the gate of the first GaN field-effect transistor is connected to an external voltage.

[0089] The first GaN field-effect transistor is configured to control the on / off state of the GaN device, and the second GaN field-effect transistor is configured to withstand an external voltage input via the gate of the first GaN field-effect transistor.

[0090] One end of the shunt module is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively, and the other end of the shunt module is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively.

[0091] The current shunting module is configured to shunt the drain-source voltage of the first GaN field-effect transistor when the sum of the drain-source capacitance and the gate-drain capacitance of the first GaN field-effect transistor is less than the sum of the drain-source capacitance and the gate-source capacitance of the second GaN field-effect transistor. The current shunting module is also configured to shunt the leakage current between the second GaN field-effect transistor and the first GaN field-effect transistor when the leakage current of the second GaN field-effect transistor is greater than the leakage current of the first GaN field-effect transistor.

[0092] It should be noted that for specific limitations of a GaN device, please refer to the limitations of a GaN device structure mentioned above. The two have the same function and role, and will not be repeated here.

[0093] like Figure 4 As shown, the present invention provides a power supply device that uses a GaN device as described above.

[0094] The power supply device 460 includes a high-voltage primary circuit 461, a low-voltage secondary circuit 462, and a transformer 463 disposed between the primary circuit 461 and the secondary circuit 462.

[0095] The primary circuit 461 includes an AC power supply 464, a bridge rectifier circuit 465, multiple switching devices 466, and a single switching device 467. The secondary circuit 462 includes multiple switching devices 468.

[0096] exist Figure 4 In this embodiment, GaN devices are used as switching devices 466 and 467 as described above. In some embodiments, switching devices 466 and 467 in the primary circuit 461 are normally off semiconductors. A common metal-insulator-semiconductor field-effect transistor (MISFET) formed of silicon is used as switching device 468 in the secondary circuit 462.

[0097] like Figure 5 As shown, the present invention provides an amplifier that uses a GaN device as described above.

[0098] In some implementations, amplifier 470 can be used as a high-power amplifier, for example, for a mobile phone base station. Amplifier 470 includes digital predistortion circuitry 471, mixer 472, power amplifier 473, and directional coupler 474.

[0099] Digital predistortion circuit 471 compensates for nonlinear distortion of the input signal. Mixer 472 mixes the AC signal and the input signal with compensated nonlinear distortion. Power amplifier 473 amplifies the input signal mixed with the AC signal.

[0100] exist Figure 5 In this configuration, power amplifier 473 includes a GaN device as described above. Directional coupler 474 monitors input and output signals, etc. Figure 5 In the circuit, the input signal and the AC signal can be mixed by the mixer 472 and transmitted to the digital predistortion circuit 471 through the switching operation.

[0101] In summary, the GaN device structure and its application of this invention, by connecting a first capacitor and a first resistor in parallel between the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, effectively matches the capacitance and leakage current between the two transistors, thus improving the reliability of the GaN device. Simultaneously, the introduction of a filter module and a protection module with high-frequency characteristics enhances the high-frequency and high-efficiency characteristics of the GaN device. Furthermore, on the same GaN semiconductor wafer, by isolating the two-dimensional electron gas between components using an isolation process and layering the electrodes requiring electrical connection using a metal interconnect process, system-level integration of the semiconductor wafer chip can be achieved, which helps reduce packaging costs.

[0102] The various embodiments in this specification are described in a progressive manner. For directly identical or similar parts of each embodiment, refer to the other embodiments. Each embodiment focuses on its differences from other embodiments. It should be noted that the technical features of the above embodiments can be combined arbitrarily. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as these combinations of technical features do not contradict each other, they should be considered within the scope of this specification.

[0103] The above description is only a preferred embodiment of the present invention. It should be noted that for those skilled in the art, several improvements and substitutions can be made without departing from the technical principles of the present invention, and these improvements and substitutions should also be considered within the scope of protection of the present invention.

Claims

1. A GaN device structure, characterized in that, include: First GaN field-effect transistor, second GaN field-effect transistor, and shunt module; The drain of the first GaN field-effect transistor is connected to the source of the second GaN field-effect transistor, the source of the first GaN field-effect transistor is connected to the gate of the second GaN field-effect transistor and the connection point is grounded, and the gate of the first GaN field-effect transistor is connected to an external voltage. The first GaN field-effect transistor is configured to control the on / off state of the GaN device, and the second GaN field-effect transistor is configured to withstand the external voltage input via the gate of the first GaN field-effect transistor; One end of the current shunt module is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively, and the other end of the current shunt module is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively. The current shunting module is configured to shunt the drain-source voltage of the first GaN field-effect transistor when the sum of the drain-source capacitance and the gate-drain capacitance of the first GaN field-effect transistor is less than the sum of the drain-source capacitance and the gate-source capacitance of the second GaN field-effect transistor. The current shunting module is also configured to shunt the leakage current between the second GaN field-effect transistor and the first GaN field-effect transistor when the leakage current of the second GaN field-effect transistor is greater than the leakage current of the first GaN field-effect transistor.

2. The GaN device structure according to claim 1, characterized in that, The first GaN field-effect transistor is an enhancement-mode GaN field-effect transistor with a drain-source voltage less than a first threshold.

3. The GaN device structure according to claim 1, characterized in that, The second GaN field-effect transistor is a depletion-type GaN field-effect transistor with a drain-source voltage greater than a second threshold.

4. The GaN device structure according to claim 1, characterized in that, The ratio of the linear region on-resistance of the first GaN field-effect transistor to the linear region on-resistance of the second GaN field-effect transistor does not exceed a third threshold.

5. The GaN device structure according to claim 1, characterized in that, The current shunt module includes: a first capacitor and a first resistor.

6. The GaN device structure according to claim 5, characterized in that, One end of the first capacitor is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively, and the other end of the first capacitor is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively. The first capacitor is configured to shunt the drain-source voltage of the first GaN field-effect transistor when the sum of the drain-source capacitance and the gate-drain capacitance of the first GaN field-effect transistor is less than the sum of the drain-source capacitance and the gate-source capacitance of the second GaN field-effect transistor.

7. The GaN device structure according to claim 5, characterized in that, One end of the first resistor is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively, and the other end of the first resistor is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively. The first resistor is configured to shunt the leakage current between the second GaN field-effect transistor and the first GaN field-effect transistor when the leakage current of the second GaN field-effect transistor is greater than the leakage current of the first GaN field-effect transistor.

8. The GaN device structure according to claim 1, characterized in that, The GaN device structure also includes a filtering module; The filtering module is connected in parallel between the gate and source of the first GaN field-effect transistor. The filtering module is configured to perform noise filtering on the external voltage so that the noise-filtered external voltage is input to the gate of the first GaN field-effect transistor.

9. The GaN device structure according to claim 8, characterized in that, The filtering module includes: a filtering inductor, a second capacitor, and a second resistor.

10. The GaN device structure according to claim 9, characterized in that, One end of the filter inductor is connected to the external voltage, and the other end of the filter inductor is connected to the second capacitor and the second resistor respectively and connected to the gate of the first GaN field-effect transistor. The second capacitor and the second resistor are both connected in parallel between the gate and the source of the first GaN field-effect transistor. The filter inductor is configured to perform noise filtering on the current generated based on the external voltage and the second resistor, and the second capacitor is configured to perform noise filtering on the external voltage.

11. The GaN device structure according to claim 1, characterized in that, The GaN device structure also includes a protection module; The protection module is connected in parallel between the gate and source of the first GaN field-effect transistor. The protection module is configured to limit the gate-source leakage current of the first GaN field-effect transistor to a preset level when the first GaN field-effect transistor is in a reverse bias state, and the protection module is configured to clamp the gate-source voltage of the first GaN field-effect transistor to a fixed voltage when the first GaN field-effect transistor is in an overcurrent state.

12. The GaN device structure according to claim 11, characterized in that, The protection module includes a first diode and a second diode, which are connected in reverse series.

13. The GaN device structure according to claim 12, characterized in that, Both the first diode and the second diode are Schottky diodes.

14. A method for fabricating a GaN device structure, characterized in that, include: Provide substrate; A channel layer is formed on the substrate; A barrier layer is formed on the channel layer; A P-GaN layer is formed on the barrier layer; The P-GaN layer, the barrier layer, and the channel layer are etched to form isolation trenches; The P-GaN layer at the isolation trench is etched away in a designated area to form a first passivation layer; A first GaN field-effect transistor, a second GaN field-effect transistor, and a shunt module are formed in the first passivation layer; A second passivation layer is formed on the first passivation layer, and the first GaN field-effect transistor, the second GaN field-effect transistor, and the shunt module are interconnected by electrodes in the second passivation layer; In this configuration, the drain of the first GaN field-effect transistor is connected to the source of the second GaN field-effect transistor, the source of the first GaN field-effect transistor is connected to the gate of the second GaN field-effect transistor, and the connection point is grounded. The gate of the first GaN field-effect transistor is connected to an external voltage. One end of the shunt module is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively. The other end of the shunt module is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively.

15. The method for fabricating the GaN device structure according to claim 14, characterized in that, The current shunt module includes: a first capacitor and a first resistor; The step of forming a second passivation layer on the first passivation layer and interconnecting the first GaN field-effect transistor, the second GaN field-effect transistor, and the shunt module in the second passivation layer includes: A second passivation layer is formed on the first passivation layer, and the first GaN field-effect transistor, the second GaN field-effect transistor, the first capacitor and the first resistor are interconnected in the second passivation layer; In this configuration, one end of the first capacitor is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively; the other end of the first capacitor is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively; one end of the first resistor is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively; and the other end of the first resistor is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively.

16. The method for fabricating a GaN device structure according to claim 14, characterized in that, Also includes: A filter module is formed in the first passivation layer, and the first GaN field-effect transistor and the filter module are interconnected by electrodes in the second passivation layer; One end of the filtering module is connected to the gate of the first GaN field-effect transistor, and the other end of the filtering module is connected to the source of the first GaN field-effect transistor.

17. The method for fabricating a GaN device structure according to claim 16, characterized in that, The filtering module includes: a filtering inductor, a second capacitor, and a second resistor; The step of interconnecting the first GaN field-effect transistor and the filter module in the second passivation layer includes: Electrode interconnections are made between the first GaN field-effect transistor, the filter inductor, the second capacitor, and the second resistor in the second passivation layer; Wherein, one end of the filter inductor is connected to the external voltage, and the other end of the filter inductor is connected to the second capacitor and the second resistor respectively and connected to the gate of the first GaN field-effect transistor. One end of the second capacitor is connected to the gate of the first GaN field-effect transistor, and the other end of the second capacitor is connected to the source of the first GaN field-effect transistor. One end of the second resistor is connected to the gate of the first GaN field-effect transistor, and the other end of the second resistor is connected to the source of the first GaN field-effect transistor.

18. The method for fabricating a GaN device structure according to claim 14, characterized in that, Also includes: A protection module is formed in the first passivation layer, and the first GaN field-effect transistor and the protection module are interconnected by electrodes in the second passivation layer; One end of the protection module is connected to the gate of the first GaN field-effect transistor, and the other end of the protection module is connected to the source of the first GaN field-effect transistor.

19. The method for fabricating a GaN device structure according to claim 18, characterized in that, The protection module includes: a first diode and a second diode; The step of interconnecting the first GaN field-effect transistor and the protection module in the second passivation layer includes: The first GaN field-effect transistor, the first diode, and the second diode are interconnected in the second passivation layer; In this configuration, the anode of the first diode is connected to the anode of the second diode, the cathode of the first diode is connected to the gate of the first GaN field-effect transistor, and the cathode of the second diode is connected to the source of the first GaN field-effect transistor.

20. The method for fabricating the GaN device structure according to claim 14, characterized in that, The channel layer is made of GaN, the barrier layer is made of AlGaN, and the first passivation layer and the second passivation layer are both made of SiN.

21. A GaN device, characterized in that, include: First GaN field-effect transistor, second GaN field-effect transistor, and shunt module; The drain of the first GaN field-effect transistor is connected to the source of the second GaN field-effect transistor, the source of the first GaN field-effect transistor is connected to the gate of the second GaN field-effect transistor and the connection point is grounded, and the gate of the first GaN field-effect transistor is connected to an external voltage. The first GaN field-effect transistor is configured to control the on / off state of the GaN device, and the second GaN field-effect transistor is configured to withstand the external voltage input via the gate of the first GaN field-effect transistor; One end of the current shunt module is connected to the drain of the first GaN field-effect transistor and the source of the second GaN field-effect transistor, respectively, and the other end of the current shunt module is connected to the source of the first GaN field-effect transistor and the gate of the second GaN field-effect transistor, respectively. The current shunting module is configured to shunt the drain-source voltage of the first GaN field-effect transistor when the sum of the drain-source capacitance and the gate-drain capacitance of the first GaN field-effect transistor is less than the sum of the drain-source capacitance and the gate-source capacitance of the second GaN field-effect transistor. The current shunting module is also configured to shunt the leakage current between the second GaN field-effect transistor and the first GaN field-effect transistor when the leakage current of the second GaN field-effect transistor is greater than the leakage current of the first GaN field-effect transistor.

22. A power supply device, characterized in that, include: The GaN device according to claim 21.

23. An amplifier, characterized in that, include: The GaN device according to claim 21.

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