Communication method and apparatus

Abstract

The application relates to a communication method and device, which can flexibly configure the code rate and code length of an RM code, and can improve the coding performance or decoding performance of the RM code. The method comprises the following steps: an information bit sequence is acquired by a sending end device; S times of encoding are performed according to the information bit sequence to obtain a first coded bit sequence. The coding mode corresponding to the i-th encoding or the i+1-th encoding in the S times of encoding is RM coding; the input bit sequence corresponding to the i+1-th encoding is determined according to part or all bits in the output bit sequence corresponding to the i-th encoding; the input bit sequence corresponding to the first encoding in the S times of encoding comprises part or all bits in the information bit sequence; i is an integer in 1 to S-1; and S is an integer greater than 1.

Description

Technical Field

[0001] This application relates to the field of communication technology, and in particular to communication methods and apparatus. Background Technology

[0002] In communication systems, transmitting devices can perform channel coding on information bit sequences to improve their anti-interference capability. Reed-Muller (RM) codes have a long history among error-correcting codes and are relatively simple in structure. For example, the transmitting device can determine the RM code length based on the code length parameter m (m is used to determine the RM code length; for example, the RM code length can be 2...). m The generator matrix is ​​determined by the generator matrix and its order r. The generator matrix can then be used to perform RM encoding on the information bit sequence to obtain the encoded bit sequence.

[0003] Among these issues, how to flexibly configure the bitrate and bit length of RM codes while improving the encoding or decoding performance of RM codes has become an urgent problem to be solved. Summary of the Invention

[0004] This application provides a communication method and apparatus that can flexibly configure the code rate and code length of RM codes, while improving the encoding or decoding performance of RM codes.

[0005] Firstly, this application provides a communication method that can be executed by a transmitting device. Unless otherwise specified, "transmitting device" in this application can refer to the transmitting device itself, a component within the transmitting device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the transmitting device. The method includes: the transmitting device acquiring an information bit sequence; and performing S encoding operations on the information bit sequence to obtain a first encoded bit sequence. The encoding method corresponding to the i-th or (i+1)-th encoding in the S-th encoding is RM encoding; the input bit sequence corresponding to the (i+1)-th encoding is determined based on some or all bits in the output bit sequence corresponding to the i-th encoding; the input bit sequence corresponding to the first encoding in the S-th encoding includes some or all bits in the information bit sequence; i is an integer from 1 to S-1; and S is an integer greater than 1.

[0006] Specifically, compared to performing RM encoding on the information bit sequence once, in this application, the transmitting device can perform S encodings on the information bit sequence, and at least one of the S encodings corresponds to RM encoding (equivalent to the ith or (i+1)th encoding in the S encodings corresponding to RM encoding). The transmitting device can use some or all of the bits from the output bit sequence corresponding to the ith encoding as the input bit sequence corresponding to the (i+1)th encoding. That is, the transmitting device can perform RM encoding on the already encoded bit sequence, or it can re-encode the RM-encoded bit sequence, which can improve the code distance of the RM code and increase the encoding gain, thereby improving the encoding performance of the RM code. Furthermore, since some or all of the bits in the output bit sequence corresponding to the i-th encoding can be used as the input bit sequence corresponding to the (i+1)-th encoding, different code lengths (i.e., the length of the first encoded bit sequence) and code rates (i.e., the ratio of the length of the information bit sequence to the length of the first encoded bit sequence) can be flexibly supported. This can improve the flexibility and diversity of the code length and code rate configuration of RM codes, and at the same time, it can make the code rate and code length adapt to different communication scenarios, thereby improving the encoding performance.

[0007] Optionally, the length of the first encoded bit sequence can be determined based on the number of resource elements (REs) corresponding to the transmission resource.

[0008] One possible implementation is that all S-encodings correspond to RM encoding; or, at least two of the S-encodings correspond to different encoding methods.

[0009] Based on this possible implementation, the encoding method corresponding to S-encoding can be RM encoding for all cases, or it can be any other encoding besides RM encoding, which can improve the flexibility of S-encoding. In addition, the corresponding encoding method can be determined in different communication scenarios to meet different communication needs, thereby improving the reliability of communication.

[0010] Furthermore, since at least two of the encoding methods in the S-encoding are different, we can avoid using long RM codes to transmit information bit sequences as much as possible, which can reduce the encoding complexity of RM codes.

[0011] One possible implementation is that the encoding methods corresponding to S-encoding, other than RM encoding, are one or more of the following: convolutional coding, parity check (PC) coding, single parity check (SPC) PC coding, cyclic redundancy check (CRC) coding, bose–chaudhuri–hocquenghem (BCH) coding, polar coding, low-density parity check (LDPC) coding, or reed-solomon (RS) coding.

[0012] Optionally, the encoding method corresponding to S-encoding can be linear block coding, convolutional coding, concatenated coding, polar coding, or LDPC coding.

[0013] Based on this possible implementation, the information bit sequence can be encoded S times using one or more of the above encoding methods, as well as RM encoding, which can improve the flexibility and versatility of S-time encoding. Furthermore, the corresponding encoding method can be determined for different communication scenarios to meet different communication needs, thereby improving communication reliability.

[0014] Furthermore, the use of long RM codes to transmit information bit sequences can be avoided as much as possible, which can reduce the encoding complexity of RM codes.

[0015] One possible implementation is that the encoding method corresponding to the first encoding is RM encoding; or, the encoding method corresponding to the S-th encoding is RM encoding.

[0016] Optionally, RM encoding can be located at any position in the S-th encoding. For example, the encoding method corresponding to the S / 2th encoding can also be RM encoding.

[0017] Based on this possible implementation, for the encoding method corresponding to the first encoding, which is RM encoding, the output bit sequence corresponding to the first encoding can be encoded S-1 times (i.e., the RM code can be encoded S-1 times) to obtain a first encoded bit sequence of arbitrary length, which can improve the flexibility of the length (or code length) of the first encoded bit sequence; for the encoding method corresponding to the S-th encoding, which is RM encoding, information bit sequences of arbitrary length can be encoded, which can improve the encoding gain.

[0018] One possible implementation is that the input bit sequence corresponding to the first encoding is the first of the S first sequences, and the input bit sequence corresponding to the (i+1)th encoding includes the output bit sequence corresponding to the ith encoding and the (i+1)th first sequence among the S first sequences; wherein, the S first sequences are determined according to the information bit sequence, and the first encoded bit sequence is the output bit sequence corresponding to the Sth encoding.

[0019] Based on this possible implementation, S first sequences can be determined according to the information bit sequence. The input bit sequence corresponding to the (i+1)th encoding can include not only the output bit sequence corresponding to the ith encoding, but also the (i+1)th first sequence (i.e., a portion of the bits in the information bit sequence). That is, different information bits in the information bit sequence can be encoded at different times (or it can be described as multi-level encoding of the information bit sequence, with different levels corresponding to different information bits in the information bit sequence), which can make different information bits receive different degrees of protection and improve encoding performance.

[0020] In addition, by adjusting the code rate corresponding to different encoding times, the unequal protection of different bits in the information bit sequence can be adjusted, which can further improve the encoding performance.

[0021] One possible implementation is that the S first sequences are obtained by segmenting the information bit sequence; or, the S first sequences are determined according to a first encoding method and the information bit sequence; wherein the first encoding method is any of the following: convolutional encoding, PC encoding, SPC encoding, CRC encoding, BCH encoding, polar encoding, LDPC encoding, RS encoding, or RM encoding.

[0022] Based on this possible implementation, the computational complexity can be reduced and the implementation simplified by segmenting the information bit sequence to obtain S first sequences. Alternatively, the S first sequences can be determined based on the first encoding method and the information bit sequence, thereby obtaining encoding gain and improving encoding performance.

[0023] One possible implementation is that S first sequences are obtained by segmenting a second sequence; wherein the second sequence is obtained by encoding the information bit order using a first encoding method.

[0024] Based on this possible implementation, a second sequence can be obtained by encoding the information bit sequence, and then the second sequence can be segmented to obtain S first sequences, thereby obtaining coding gain and improving coding performance.

[0025] One possible implementation is that at least two of the S first sequences have different lengths; or, the S first sequences have the same length.

[0026] Based on this possible implementation, if at least two of the S first sequences have different lengths, the S first sequences can be determined based on the code rates corresponding to different encoding operations. This allows for adjustment of the protection against inequality in different bits within the information bit sequence, thereby improving encoding performance. If the S first sequences have the same length, computational complexity can be reduced, simplifying the implementation.

[0027] One possible implementation is that the input bit sequence corresponding to the first encoding is an information bit sequence, and the input bit sequence corresponding to the (i+1)th encoding includes a portion of the bits in the output bit sequence corresponding to the i-th encoding; wherein, the first encoded bit sequence includes the output bit sequence corresponding to the first encoding to the output bit sequence corresponding to the S-th encoding.

[0028] Based on this possible implementation, a portion of the output bit sequence corresponding to the i-th encoding can be used as the input bit sequence corresponding to the (i+1)-th encoding. This allows for unequal protection of different bits in the information bit sequence, improving encoding performance. Furthermore, error-prone bits can be encoded multiple times, reducing the bit error rate and thus improving communication reliability.

[0029] One possible implementation is that the input bit sequence corresponding to the first encoding is the information bit sequence; the input bit sequence corresponding to the (i+1)th encoding is the output bit sequence corresponding to the i-th encoding, or the input bit sequence corresponding to the (i+1)th encoding includes the output bit sequence corresponding to the i-th encoding and padding bits; wherein, the first encoded bit sequence is the output bit sequence corresponding to the S-th encoding.

[0030] Based on this possible implementation, the output bit sequence corresponding to the i-th encoding can be used as the input bit sequence corresponding to the (i+1)-th encoding. Multiple encodings of the information bit sequence can increase the encoding gain, thereby improving encoding performance. Furthermore, performing S encodings on the information bit sequence can improve the code distance of the RM code, thus enhancing encoding performance.

[0031] One possible implementation is S=2, where the encoding method corresponding to the first encoding is any of the following: convolutional encoding, PC encoding, SPC encoding, CRC encoding, BCH encoding, polar encoding, LDPC encoding, or RS encoding, and the encoding method corresponding to the second encoding is RM encoding.

[0032] Based on this possible implementation, the output bit sequence corresponding to the first encoding can be RM encoded, which can improve the code distance of the RM code and increase the encoding gain, thereby improving the encoding performance.

[0033] One possible implementation is that the length of the output bit sequence corresponding to the first encoding is associated with the first and second parameters of the RM code, where the first parameter is the code length parameter of the RM code and the second parameter is the order of the RM code.

[0034] Based on this possible implementation, the output bit sequence corresponding to the first encoding can be determined based on the first and second parameters of the RM code, thereby determining the code rate of the first encoding.

[0035] One possible implementation is that the code rate corresponding to the first encoding is greater than or equal to the length of the information bit sequence and 2. m The ratio, where m is the first parameter of the RM code.

[0036] Based on this possible implementation, the range of possible values ​​for the code rate corresponding to the first encoding can be increased; that is, the code rate corresponding to the first encoding can be equal to the length of the information bit sequence and 2. m The ratio can also be less than the length of the information bit sequence and 2. m The ratio can improve the flexibility and diversity of determining the code rate corresponding to the first encoding.

[0037] One possible implementation is that the code rate corresponding to the first encoding is greater than the length of the information bit sequence and 2. m In the case of the ratio, the input bit sequence corresponding to the second encoding includes the output bit sequence corresponding to the first encoding and the padding bits.

[0038] Based on this possible implementation, even if the length of the output bit sequence corresponding to the first encoding is small, the input bit sequence corresponding to the second encoding can be obtained by adding padding bits to the output bit sequence corresponding to the first encoding. This can improve the flexibility and diversity of the code rate determination corresponding to the first encoding, as well as the flexibility and diversity of the encoding method corresponding to the first encoding.

[0039] One possible implementation is that, in the case that the encoding method corresponding to the first encoding is PC encoding or CRC encoding, the absolute value of the difference between the sequence numbers of any two adjacent check bits in the output bit sequence corresponding to the first encoding is a preset value.

[0040] Based on this possible implementation, the parity bits can be evenly distributed in the output bit sequence corresponding to the first encoding, which can reduce the implementation complexity of the first encoding.

[0041] One possible implementation is that the first encoding corresponds to RM encoding; the second encoding corresponds to any of the following: convolutional encoding, PC encoding, CRC encoding, BCH encoding, polar encoding, LDPC encoding, or RS encoding.

[0042] Based on this possible implementation, the output bit sequence corresponding to the first encoding can be encoded (i.e., the RM code can be encoded again) based on any of the above encoding methods. This allows for more flexible adaptation of code rate and code length, supporting different code lengths and rates, and improving encoding performance.

[0043] One possible implementation is that the first encoded bit sequence includes L second encoded bit sequences; wherein the j-th second encoded bit sequence among the L second encoded bit sequences is obtained by encoding the j-th third sequence among the L third sequences S times, and the L third sequences are determined according to the information bit sequence, j = 1, 2, ..., L, where L is an integer greater than 1.

[0044] Based on this possible implementation, L third sequences can be determined according to the information bit sequence. Each of the L third sequences is encoded S times. The length of the third sequence is less than the length of the information bit sequence. By encoding the third sequence S times, the encoding complexity can be reduced and the implementation can be simplified.

[0045] One possible implementation is that the first coded bit sequence includes L third coded bit sequences and a fourth coded bit sequence; wherein, the j-th third coded bit sequence among the L third coded bit sequences is obtained by encoding the j-th third sequence among the L third sequences S-1 times, and at least one of the S-1 encodings corresponds to the encoding method RM encoding, the L third sequences are determined according to the information bit sequence, j = 1, 2, ..., L, where L is an integer greater than 1; the fourth coded bit sequence is obtained by encoding some or all of the bits in the L third sequences.

[0046] Based on this possible implementation, L third sequences can be determined according to the information bit sequence. Each of the L third sequences is encoded S-1 times. The length of the third sequence is less than the length of the information bit sequence. By encoding the third sequence S-1 times, the encoding complexity can be reduced and the implementation can be simplified. In addition, by encoding some or all of the bits in the L third sequences once, the encoding gain can be increased, thereby improving the encoding performance.

[0047] One possible implementation is that the fourth coded bit sequence includes one or more fifth coded bit sequences; wherein each of the one or more fifth coded bit sequences is obtained by encoding some or all of the u-th bits of at least two of the L third sequences, where u is an integer from 1 to U, and U is the maximum value of the length of the L third sequences.

[0048] Based on this possible implementation, a feasible scheme is provided for encoding some or all of the bits in L third sequences at once, which can improve the coding gain and thus improve the coding performance.

[0049] One possible implementation is that the L third sequences have the same length.

[0050] Based on this possible implementation, the computational complexity of determining L third sequences can be reduced, and the implementation can be simplified.

[0051] Secondly, this application provides a communication method that can be executed by a receiving device. Unless otherwise specified, "receiving device" in this application can refer to the receiving device itself, a component within the receiving device (e.g., a processor, chip, or chip system), or a logic module or software capable of implementing all or part of the functions of the receiving device. The method includes: the receiving device receiving information to be decoded; and performing S decoding operations based on the information to be decoded to obtain a first decoded bit sequence. The information to be decoded corresponds to an information bit sequence; the decoding method corresponding to the i-th or (i+1)-th decoding operation in the S decoding operations is RM decoding; the input bit sequence corresponding to the (i+1)-th decoding operation is determined based on some or all of the bits in the output bit sequence corresponding to the i-th decoding operation; the input bit sequence corresponding to the first decoding operation in the S decoding operations includes some or all of the bits in the information to be decoded; i is an integer from 1 to S-1; and S is an integer greater than 1.

[0052] Specifically, compared to performing a single RM decoding on the information to be decoded, in this application, the receiving device can perform S encodings on the information to be decoded, and at least one of the S decodings corresponds to RM encoding (equivalent to the i-th or (i+1)-th decoding in the S decodings corresponding to RM decoding). The receiving device can use some or all of the bits in the output bit sequence corresponding to the i-th decoding as the input bit sequence corresponding to the (i+1)-th decoding. That is, the receiving device can perform RM decoding on the decoded bit sequence, or it can decode the bit sequence after RM decoding again. Since the decoding complexity is related to the first parameter (i.e., the code length parameter) and the second parameter (i.e., the order of the RM code) of the RM code, this application can transform the decoding of a long-code-length, high-order RM code into a shorter-code-length, lower-order RM code decoding process, thereby reducing the implementation complexity of the decoding. Furthermore, by performing multiple decodings on some or all of the bits in the information to be decoded, the decoding performance can be improved.

[0053] One possible implementation is that the decoding methods for all S decoding operations are RM decoding; or, in the S decoding operations, there are at least two decoding operations with different decoding methods.

[0054] Based on this possible implementation, the decoding method corresponding to S-level decoding can be RM decoding for all cases, or it can be other decoding methods besides RM decoding, which can improve the flexibility of S-level decoding. In addition, the corresponding decoding method can be determined in different communication scenarios to meet different communication needs, thereby improving the reliability of communication.

[0055] One possible implementation is that the decoding method corresponding to S-time decoding, other than RM decoding, is one or more of the following: convolutional decoding, PC decoding, SPC decoding, CRC decoding, BCH decoding, polarization decoding, LDPC decoding, or RS decoding.

[0056] Based on this possible implementation, the information to be decoded can be decoded S times using one or more of the above-mentioned decoding methods and RM decoding, which can improve the flexibility and versatility of S-time decoding. Furthermore, the corresponding decoding method can be determined in different communication scenarios to meet different communication needs, thereby improving communication reliability. Moreover, decoding long RM codes can be avoided as much as possible, reducing the decoding complexity of RM codes.

[0057] One possible implementation is that the decoding method corresponding to the first decoding is RM decoding; or, the decoding method corresponding to the S-th decoding is RM decoding.

[0058] Based on this possible implementation, two feasible schemes are provided for the position of RM decoding in S-level decoding.

[0059] One possible implementation is that the input bit sequence corresponding to the first decoding includes all bits in the information to be decoded, and the input bit sequence corresponding to the (i+1)th decoding includes all bits in the output bit sequence corresponding to the i-th decoding except for the i-th fourth sequence; wherein, the first decoding bit sequence includes the first to the S-th fourth sequences; or, the first decoding bit sequence is obtained by decoding the first to the S-th fourth sequences.

[0060] Based on this possible implementation, different bits in the information to be decoded can be decoded at different times (or it can be described as multi-level decoding of the information to be decoded, with different levels corresponding to different bits in the information to be decoded), which can make different bits receive different degrees of protection and improve decoding performance.

[0061] One possible implementation is that the input bit sequence corresponding to the first decoding includes the first fifth sequence among S fifth sequences, and the input bit sequence corresponding to the (i+1)th decoding includes the output bit sequence corresponding to the ith decoding and the (i+1)th fifth sequence among S fifth sequences; wherein, the fifth sequence is obtained by segmenting all bits in the information to be decoded; the first decoding bit sequence is the output bit sequence corresponding to the Sth decoding.

[0062] Based on this possible implementation, all bits in the information to be decoded can be segmented to obtain S fifth sequences. Then, the (i+1)th fifth sequence and the output bit sequence corresponding to the i-th decoding can be decoded, allowing different bits to receive different levels of protection, thus improving decoding performance. Furthermore, error-prone bits can be decoded multiple times, reducing the bit error rate and thereby improving communication reliability.

[0063] One possible implementation is that the input bit sequence corresponding to the first decoding includes all the bits in the information to be decoded; the input bit sequence corresponding to the (i+1)th decoding includes the output bit sequence corresponding to the i-th decoding, or the input bit sequence corresponding to the (i+1)th decoding includes the bits in the output bit sequence corresponding to the i-th decoding except for the padding bits; wherein, the first decoding bit sequence is the output bit sequence corresponding to the S-th decoding.

[0064] Based on this possible implementation, the output bit sequence corresponding to the i-th decoding can be used as the input bit sequence corresponding to the (i+1)-th decoding to achieve S-time decoding of the information to be decoded, which can simplify the implementation and improve the decoding performance.

[0065] One possible implementation is that S is 2, the decoding method corresponding to the first decoding is RM decoding, and the decoding method corresponding to the second decoding is one or more of the following: convolutional decoding, PC decoding, SPC decoding, CRC decoding, BCH decoding, polarization decoding, LDPC decoding, or RS decoding.

[0066] Based on this possible implementation, the bit sequence after RM decoding can be decoded again, which can improve decoding performance.

[0067] One possible implementation is that the code rate corresponding to the second decoding is greater than or equal to the length of the output bit sequence corresponding to the first decoding and 2. m The ratio, where m is the code length parameter corresponding to RM decoding.

[0068] Based on this possible implementation, the code rate for the second decoding can be determined based on the code length parameter corresponding to the RM decoding and the length of the output bit sequence corresponding to the RM code. The code rate for the second decoding can be the length of the output bit sequence corresponding to the first decoding and 2. m The ratio can also be less than the length of the output bit sequence corresponding to the first decoding and 2. m The ratio can improve the flexibility and diversity of code rate determination for the second decoding.

[0069] One possible implementation is that S is 2, and the decoding method corresponding to the first decoding is one or more of the following: convolutional decoding, PC decoding, SPC decoding, CRC decoding, BCH decoding, polarization decoding, LDPC decoding, or RS decoding, and the decoding method corresponding to the second decoding is RM decoding.

[0070] Based on this possible implementation, the decoded bits can be RM-decoded again, which can improve decoding performance.

[0071] One possible implementation is that the first decoded bit sequence includes L second decoded bit sequences; wherein the j-th second decoded bit sequence in the L second decoded bit sequences is obtained by decoding the j-th fifth sequence in the L fifth sequences S times, and the L fifth sequences are obtained by segmenting all bits in the information to be decoded, j = 1, 2, ..., L.

[0072] Based on this possible implementation, L fifth sequences can be determined according to all the bits in the information to be decoded. Each of the L fifth sequences is decoded S times. The length of the fifth sequence is less than the number of bits included in the information to be decoded. By decoding the fifth sequence S times, the decoding complexity can be reduced and the implementation can be simplified.

[0073] One possible implementation is that the first decoded bit sequence includes L third decoded bit sequences and a fourth decoded bit sequence; wherein, the j-th third decoded bit sequence among the L third decoded bit sequences is obtained by performing S-1 decodings on the j-th fifth sequence among the L fifth sequences, and at least one of the S-1 decodings corresponds to the decoding method RM decoding; the L fifth sequences are obtained by segmenting the bits in the information to be decoded, excluding the fourth decoded bit sequence, j = 1, 2, ..., L; the fourth decoded bit sequence is obtained by decoding some or all of the bits in the L fifth sequences.

[0074] Based on this possible implementation, L fifth sequences can be determined according to all the bits in the information to be decoded. Each of the L fifth sequences is then decoded S-1 times. The length of each fifth sequence is less than the number of bits in the information to be decoded. By decoding the fifth sequences S times, the decoding complexity can be reduced, simplifying the implementation. Furthermore, decoding some or all of the bits in the L fifth sequences can further improve decoding performance.

[0075] One possible implementation is that the fourth decoded bit sequence includes one or more fifth decoded bit sequences, each of which is obtained by decoding some or all of the u-th bits of at least two of the L fifth sequences, where u is an integer from 1 to U, and U is the maximum value of the lengths of the L fifth sequences.

[0076] Based on this possible implementation, one or more fifth decoded bit sequences can be determined, which in turn can determine the fourth decoded bit sequence, thereby improving decoding performance.

[0077] Thirdly, embodiments of this application provide a communication device that can be applied to the transmitting end device described in the first aspect to realize the functions performed by the transmitting end device. The communication device can be the transmitting end device itself, or it can be a chip, chip system, or system-on-a-chip of the transmitting end device, etc. The communication device can execute the functions performed by the transmitting end device through hardware, or it can execute corresponding software through hardware. The hardware or software includes one or more modules corresponding to the above functions. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations, or it can cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations, or it can cooperate with the transceiver module to complete the following processing operations, without limitation.

[0078] For example, the processing module is used to acquire the information bit sequence; the transceiver module is used to perform S encodings based on the information bit sequence to obtain the first encoded bit sequence; wherein, the encoding method corresponding to the i-th encoding or the (i+1)-th encoding in the S encodings is RM encoding; the input bit sequence corresponding to the (i+1)-th encoding is determined based on some or all of the bits in the output bit sequence corresponding to the i-th encoding, and the input bit sequence corresponding to the first encoding in the S encodings includes some or all of the bits in the information bit sequence, where i is an integer from 1 to S-1, and S is an integer greater than 1.

[0079] Optionally, the transceiver module and processing module of the communication device in the third aspect may also perform the corresponding functions in the first aspect or any possible design of the first aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0080] Fourthly, embodiments of this application provide a communication device that can be applied to the receiving device described in the second aspect to realize the functions performed by the receiving device. The communication device can be the receiving device itself, or it can be a chip, chip system, or system-on-a-chip of the receiving device. The communication device can execute the functions performed by the receiving device through hardware or through corresponding software. The hardware or software includes one or more modules corresponding to the functions described above. For example, a transceiver module and a processing module. The transceiver module can independently complete the following transceiver operations or cooperate with the processing module to complete the following transceiver operations; correspondingly, the processing module can independently complete the following processing operations or cooperate with the transceiver module to complete the following processing operations, without limitation.

[0081] For example, the transceiver module is used to receive information to be decoded; wherein the information to be decoded corresponds to an information bit sequence; the processing module is used to perform S decoding operations based on the information to be decoded to obtain a first decoded bit sequence; wherein the decoding method corresponding to the i-th decoding or the (i+1)-th decoding operation in the S decoding operation is RM decoding, the input bit sequence corresponding to the (i+1)-th decoding operation is determined based on some or all of the bits in the output bit sequence corresponding to the i-th decoding operation, and the input bit sequence corresponding to the first decoding operation in the S decoding operation includes some or all of the bits in the information to be decoded, where i is an integer from 1 to S-1, and S is an integer greater than 1.

[0082] Optionally, the transceiver module and processing module of the communication device in the fourth aspect may also perform the corresponding functions in the second aspect or any possible design of the second aspect, as detailed in the method examples, and the beneficial effects that can be achieved can also be found in the foregoing related content.

[0083] Fifthly, embodiments of this application provide a communication device, which includes one or more processors; the one or more processors are configured to run computer programs or instructions, such that when the one or more processors execute the computer instructions or instructions, the communication method described in any one of the first to second aspects is performed.

[0084] In one possible design, the communication device further includes one or more memories coupled to one or more processors, the memories used to store the aforementioned computer programs or instructions. In one possible implementation, the memories are located outside the communication device. In another possible implementation, the memories are located inside the communication device. In embodiments of this application, the processor and memory may also be integrated into a single device, i.e., the processor and memory may be integrated together. In one possible implementation, the communication device further includes a transceiver for receiving and / or transmitting information.

[0085] In one possible design, the communication device further includes one or more communication interfaces coupled to one or more processors, and the communication interfaces are used to communicate with other modules outside the communication device.

[0086] In a sixth aspect, embodiments of this application provide a communication device, which includes an interface circuit and a logic circuit; the interface circuit is used to input and / or output information; the logic circuit is used to execute the communication method as described in any one of the first to second aspects, and to process and / or generate information based on the information.

[0087] In a seventh aspect, embodiments of this application provide a computer-readable storage medium storing computer instructions or programs that, when executed on a computer, cause the communication method described in any one of the first to second aspects to be performed.

[0088] Eighthly, embodiments of this application provide a computer program product containing computer instructions that, when run on a computer, causes the communication method described in any one of the first to second aspects to be executed.

[0089] Ninthly, embodiments of this application provide a computer program that, when run on a computer, causes the communication method described in any one of the first to second aspects to be executed.

[0090] In a tenth aspect, embodiments of this application provide a chip, including: a processor coupled to a memory, the memory being used to store programs or instructions, wherein when the program or instructions are executed by the processor, a communication method as described in any one of the first to second aspects is executed.

[0091] The technical effects of any of the design methods in aspects three through ten are similar to those in aspects one through two, and will not be elaborated upon further.

[0092] Eleventhly, embodiments of this application provide a communication system that may include communication means for performing the communication as described in the first aspect or any possible design of the first aspect, and communication means for performing the communication as described in the second aspect or any possible design of the second aspect. Attached Figure Description

[0093] Figure 1 A schematic diagram of a communication system provided in an embodiment of this application;

[0094] Figure 2 A schematic diagram illustrating the connection relationship between a network device and a terminal device, provided as an embodiment of this application;

[0095] Figure 3 A schematic diagram illustrating encoding and decoding of a transmitting end device and a receiving end device according to an embodiment of this application;

[0096] Figure 4 A schematic diagram of an encoding processing unit chip architecture provided in an embodiment of this application;

[0097] Figure 5 A schematic diagram of a decoding processing unit chip architecture provided in an embodiment of this application;

[0098] Figure 6This is a schematic diagram of the structure of a communication device provided in an embodiment of this application;

[0099] Figure 7 A flowchart illustrating a communication method provided in an embodiment of this application;

[0100] Figure 8 A schematic diagram illustrating encoding and decoding provided for an embodiment of this application;

[0101] Figure 9 A schematic diagram of a first encoding and RM encoding provided for embodiments of this application;

[0102] Figure 10 A schematic diagram illustrating convolutional coding and RM coding as provided in an embodiment of this application;

[0103] Figure 11 A schematic diagram of a PC bit verification information bit provided in an embodiment of this application;

[0104] Figure 12 A schematic diagram illustrating encoding and decoding provided for an embodiment of this application;

[0105] Figure 13 A schematic diagram of a three-level RM encoding provided for an embodiment of this application;

[0106] Figure 14 A schematic diagram illustrating encoding and decoding provided for an embodiment of this application;

[0107] Figure 15 A schematic diagram of an encoding provided for an embodiment of this application;

[0108] Figure 16 A schematic diagram of a three-level RM encoding provided for an embodiment of this application;

[0109] Figure 17 A schematic diagram illustrating encoding and decoding provided for an embodiment of this application;

[0110] Figure 18 A schematic diagram of an encoding provided for an embodiment of this application;

[0111] Figure 19 This is a schematic diagram of the structure of a transmitting device provided in an embodiment of this application;

[0112] Figure 20 This is a schematic diagram of the structure of a receiving device provided in an embodiment of this application;

[0113] Figure 21 This is a schematic diagram of another communication device provided in an embodiment of this application;

[0114] Figure 22This is a schematic diagram of the structure of another communication device provided in the embodiments of this application;

[0115] Figure 23 A schematic diagram of another encoding processing unit chip architecture provided in an embodiment of this application;

[0116] Figure 24 This is a schematic diagram of another decoding processing unit chip architecture provided in an embodiment of this application. Detailed Implementation

[0117] Before describing the embodiments of this application, the technical terms involved in the embodiments of this application will be described.

[0118] Channel coding is one of the core technologies in wireless communication. The complete channel coding process includes adding Cyclic Redundancy Check (CRC) codes, block segmentation, error correction coding, rate adaptation, block concatenation, data interleaving, and data scrambling. The purpose of error correction coding is to ensure that the receiving device can automatically correct errors that occur during data transmission with minimal redundancy overhead. For example, with the same bit error rate, lower redundancy overhead results in higher coding efficiency. Channel coding and decoding can include linear block codes (such as Hamming codes, Gray codes, BCH codes, RS codes, etc.), convolutional codes (such as Turbo codes), and concatenated codes.

[0119] In third-generation (3G) and fourth-generation (4G) communication systems, Turbo codes, defined as the encoding and decoding technology in the Third Generation Partnership Project (3GPP) standard, exhibit excellent performance, approaching the limits of Shannon's theory. However, in fifth-generation (5G) communication systems, data transmission rates are orders of magnitude higher than in 4G, and Turbo code-based serial decoders struggle to effectively support such high-speed data transmission. Furthermore, 5G introduces richer service applications and new requirements for channel coding. For example, enhanced machine-type communication (eMTC) scenarios require smaller data packets, while ultra-reliable and low-latency communication (URLLC) scenarios demand higher requirements for encoding and decoding latency and low error rates. Therefore, the 5G standard employs low-density parity-check (LDPC) codes and polar codes. LDPC codes and polar codes outperform linear block codes and convolutional codes, and can approach the limits of Shannon's theory very closely.

[0120] For future mobile communication networks, commercial applications such as extended reality (XR), mixed reality (MR), and immersive services have emerged, offering real-time high data rates. These emerging services place higher demands on the peak throughput and area efficiency of encoding and decoding, with peak rates even required to reach Tbps. At the same time, the power consumption of decoders needs to be further reduced. Therefore, for channel encoding and decoding of future mobile communication network chips, technological breakthroughs need to be sought in two main directions: high-throughput low-power encoding and decoding, and high-reliability encoding and decoding. This can be achieved through new coding designs and low-complexity decoding designs to reach the goals of future mobile communication standards.

[0121] RM codes: RM codes have a relatively simple structure. They were proposed by scholar Demuller in 1954 and have a long history. The modeling and characterization of RM codes have covered different methods, such as finite geometry, polynomial rings, and Boolean functions.

[0122] For example, taking a polynomial ring as an example, a binary RM code contains multivariate polynomials in a binary field. The evaluation results above consider a polynomial ring with m variables. For a polynomial and a binary vector Define Eval z (f)=f(z1,z2,…,z m Let f be the value of the polynomial f in the binary vector z. Based on this, the evaluation vector of the polynomial f can be defined. That is, a coordinate of Eval(f) is the evaluation result of the polynomial f at a certain binary vector. Since There are 2^m m-dimensional binary vectors in the array, therefore the evaluation vector Eval(f) has 2^m dimensions. For an RM code with parameters m and r (which can be described as an RM(m,r) code), its codeword set can be defined as the set of evaluation vectors for all polynomials of order no higher than r, i.e., deg(f) represents the order of the polynomial f.

[0123] Understandably, the generator matrix G of an RM(m,r) code can be determined based on the evaluation vector of the one-way expression. For example, the generator matrix of an RM(3,1) code can be: For example, the generator matrix of an RM(3,2) code can be:

[0124] Furthermore, the information bit sequence can be RM encoded based on the generator matrix to obtain the encoded bit sequence. For example, the encoded bit sequence can be represented as: xG, where x can represent the information bit sequence.

[0125] Here, parameter m can be called the code length parameter of the RM(m,r) code (or the first parameter of the RM code) (for example, the code length of the RM code (or the length of the encoded bit sequence mentioned above) can be 2m), and parameter r can be called the order of the RM(m,r) code (or the second parameter of the RM code). According to the above definition, the number of input bits corresponding to the RM(m,r) code is the number of m-ary binary monomials, that is, the number of input bits corresponding to the RM(m,r) code. The number of input bits corresponding to the RM(m,r) code is the same as the number of rows in the aforementioned generator matrix.

[0126] RM Codes in 5G: The encoding matrix of RM codes in 5G, as shown in Table 1, consists of an RM code generator matrix and a five-column mask matrix. The 5G protocol specifies that if the number of bits in the control information is greater than or equal to 3 and less than or equal to 11, RM codes can be used to encode the control information. For example, the control information can be encoded based on the RM code encoding matrix shown in Table 1 to obtain a 32-bit encoded sequence. Alternatively, based on the control information, a first sequence of length 11 can be constructed, and multiplying this first sequence by the encoding matrix shown in Table 1 yields a 32-bit encoded sequence.

[0127] Table 1. Encoding Matrix of RM Codes

[0128]

[0129]

[0130] In Table 1, the first 6 columns are the 6 bases of the RM(5,1) code, and the last 5 columns are the mask of the RM(5,1) code.

[0131] In summary, the transmitting device can encode the information bit sequence based on RM code to obtain the encoded bit sequence. However, how to improve the decoding performance of RM code is an urgent problem to be solved.

[0132] This application provides a communication method in which a transmitting device acquires an information bit sequence; based on the information bit sequence, it performs S encodings to obtain a first encoded bit sequence. The encoding method corresponding to the i-th or (i+1)-th encoding in the S encodings is RM encoding; the input bit sequence corresponding to the (i+1)-th encoding is determined based on some or all bits in the output bit sequence corresponding to the i-th encoding; the input bit sequence corresponding to the first encoding in the S encodings includes some or all bits in the information bit sequence, where i is an integer from 1 to S-1, and S is an integer greater than 1.

[0133] Specifically, compared to performing RM encoding on the information bit sequence once, in this application, the transmitting device can perform S encodings on the information bit sequence, and at least one of the S encodings corresponds to RM encoding (equivalent to the ith or (i+1)th encoding in the S encodings corresponding to RM encoding). The transmitting device can use some or all of the bits from the output bit sequence corresponding to the ith encoding as the input bit sequence corresponding to the (i+1)th encoding. That is, the transmitting device can perform RM encoding on the already encoded bit sequence, or it can re-encode the RM-encoded bit sequence, which can improve the code distance of the RM code and increase the encoding gain, thereby improving the encoding performance of the RM code. Furthermore, since some or all of the bits in the output bit sequence corresponding to the i-th encoding can be used as the input bit sequence corresponding to the (i+1)-th encoding, different code lengths (i.e., the length of the first encoded bit sequence) and code rates (i.e., the ratio of the length of the information bit sequence to the length of the first encoded bit sequence) can be flexibly supported. This can improve the flexibility and diversity of the code length and code rate configuration of RM codes, and at the same time, it can make the code rate and code length adapt to different communication scenarios, thereby improving the encoding performance.

[0134] The embodiments of this application will now be described in detail with reference to the accompanying drawings.

[0135] The communication method provided in this application can be used in any communication system, such as a 3GPP communication system, for example, a long term evolution (LTE) system, a 5G mobile communication system, a hybrid LTE and 5G network system, a new radio (NR) system, a vehicle-to-everything (V2X) system, a device-to-device (D2D) communication system, a machine-to-machine (M2M) communication system, an internet of things (IoT) system, a narrowband internet of things (NB-IoT) system, a global system for mobile communications (GSM), an enhanced data rate for GSM evolution (EDGE) system, a wideband code division multiple access (WCDMA) system, a code division multiple access 2000 (CDMA2000) system, or a time division-synchronization code division multiple access (TDMA) system. Access, TD-SCDMA), enhanced mobile broadband (eMBB), URLLC, eMTC, and various types of future communication systems are not restricted. Non-terrestrial network (NTN) systems (such as satellite communication systems) and non-3GPP communication systems are also included without restriction.

[0136] The following is based on Figure 1 Taking an example, the communication system provided in the embodiments of this application will be described. Figure 1 As shown, the communication system may include at least one terminal device and at least one network device.

[0137] in, Figure 1The terminal device can be located within the beam / cell coverage area of ​​the network device, and the network device can provide communication services to the terminal device. For example, the network device can use channel coding to encode downlink data and then transmit it to the terminal device via air interface after constellation modulation (i.e., the network device is the transmitting device and the terminal device is the receiving device); the terminal device can also use channel coding to encode uplink data and then transmit it to the network device via air interface after constellation modulation (i.e., the terminal device is the transmitting device and the network device is the receiving device).

[0138] It is understandable that when network devices communicate with each other, or when terminal devices communicate with each other, they can also communicate based on channel coding. That is, the sending end device and the receiving end device can both be network devices or both be terminal devices, without restriction.

[0139] Figure 1 The terminal equipment in this context can be a device with wireless transceiver capabilities or a chip or chip system that can be configured on the device. It allows users to access the network and is used to provide voice and / or data connectivity to users. Terminal equipment can also be called user equipment (UE), subscriber unit, terminal, mobile station (MS), or mobile terminal (MT), etc.

[0140] For example, a terminal device can be a mobile phone, a tablet computer, or a computer with wireless transceiver capabilities. A terminal device can also be a user station, mobile station, remote station, remote terminal device, mobile terminal device, user terminal device, wireless communication device, user agent, user device, cellular phone, cordless phone, session initiation protocol (SIP) phone, wireless local loop (WLL) station, personal digital assistant (PDA), handheld device with wireless communication capabilities, computing device, processing device connected to a wireless modem, in-vehicle device, wearable device, terminal device in the Internet of Things (IoT), home appliance, virtual reality (VR) terminal, augmented reality (AR) terminal, wireless terminal in industrial control, wireless terminal in autonomous driving, wireless terminal in telemedicine, wireless terminal in smart grid, wireless terminal in smart city, wireless terminal in smart home, vehicle with vehicle-to-vehicle (V2V) communication capabilities, intelligent connected vehicle, or unmanned aerial vehicle (UAV) communication. Unmanned aerial vehicles (UAVs) with U2U (toUAV, U2U) communication capabilities, terminal devices in future networks, or terminal devices in future evolved public land mobile networks (PLMNs) are not subject to restrictions.

[0141] in, Figure 1 The network equipment in this context can be any device deployed in the access network capable of wireless communication with terminal devices. It can also be a chip or chip system configurable within such devices, a logical node or module, or a function implemented in software. Its main responsibilities include air interface-side wireless physical control, resource scheduling, wireless resource management, quality of service management, data compression and encryption, wireless access control, and mobility management. Specifically, the network equipment can be either wired or wireless access-enabled.

[0142] For example, a network device can consist of one or more access network (AN) / radio access network (RAN) nodes. AN / RAN nodes can be various types of base stations, such as: satellite base stations, evolved Node Bs (gNBs), transmission reception points (TRPs), evolved Node Bs (eNBs), radio network controllers (RNCs), Node Bs (NBs), base station controllers (BSCs), base transceiver stations (BTSs), home base stations (e.g., home evolved Node Bs, or home Node Bs (HNBs), macro base stations, micro base stations, pico base stations, small cells, relay stations, balloon stations, drone stations, wireless backhaul nodes, baseband units (BBUs), or wireless fidelity (Wi-Fi) access points (APs), etc. It is understood that network devices can be terrestrial devices or non-terrestrial devices (such as satellites, drones, high-altitude communication equipment, etc.). Furthermore, in communication systems employing different wireless access technologies, the names of network devices with base station functions may differ, and this application does not impose any restrictions on this.

[0143] In another example, the network equipment may include a BBU and a remote radio unit (RRU). The BBU and RRU can be located in different places; for example, the RRU can be moved remotely to a high-traffic area, while the BBU is located in the central equipment room. The BBU and RRU can also be located in the same equipment room. The BBU and RRU can also be different components under the same rack.

[0144] In another example, the network device can be a device that includes centralized unit (CU) nodes, distributed unit (DU) nodes, or both CU and DU nodes. For instance, the network device can be logically divided into CUs and DUs, with some protocol layer functions centrally controlled by the CU, and the remaining partial or complete protocol layer functions distributed in the DU, which is centrally controlled by the CU. The CU and DU can be separate entities or included in the same network element, such as a BBU. Furthermore, the centralized unit (CU) can be further divided into a control plane (CU-CP) and a user plane (CU-UP).

[0145] In another example, the network device may also be a device that includes a radio unit (RU), or a device that includes a CU, a DU, and a RU. The RU may be included in a radio frequency device or radio frequency unit, such as an RRU, an active antenna unit (AAU), or a remote radio head (RRH).

[0146] It is understood that CU (or CU-CP and CU-UP), DU, or RU may have different names in different systems, but those skilled in the art will understand their meaning. For example, in an open radioaccess network (O-RAN) system, CU can also be called O-CU (open CU), DU can also be called O-DU, CU-CP can also be called O-CU-CP, CU-UP can also be called O-CU-UP, and RU can also be called O-RU. For ease of description, this application uses CU, CU-CP, CU-UP, DU, and RU as examples. Any of the units among CU (or CU-CP, CU-UP), DU, and RU in this application can be implemented through a software module, a hardware module, or a combination of software and hardware modules.

[0147] Optionally, the embodiments in this application can be applied to various communication scenarios, such as Figure 2 As shown, taking the network device as the base station and the terminal device as the UE as an example, in Figure 2 In the communication scenario shown in (a), the connection between the base station and the UE is a point-to-point single connection, meaning the base station and the UE can communicate directly; Figure 2 In the communication scenario shown in (b), the connection between the base station and the UE is a multi-hop single connection, meaning that the base station and the UE can communicate through multiple relays; Figure 2 In the communication scenario shown in (c), there is dual connectivity between the base station and the UE, meaning that multiple base stations can communicate directly with one UE; Figure 2 In the communication scenario shown in (d), the communication between the base station and the UE is multi-hop, multi-connection, compared to... Figure 2 The communication scenario shown in (b) is as follows: Figure 2 In the communication scenario shown in (d), the base station and the UE can communicate through different relays. Figure 2 The communication scenarios shown are merely examples and do not impose any limitations on the network architecture used in this application.

[0148] Based on the above description of the terminal device and network device, optionally, the communication method provided in the embodiments of this application can be implemented by the aforementioned terminal device or network device, or by components of the terminal device or network device, such as by application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or software (such as program code in memory) deployed in the terminal device or network device, without limitation.

[0149] Optionally, in this embodiment of the application, the transmitting device and the receiving device may adopt the following... Figure 3 The process shown involves encoding and decoding. The transmitting device can be... Figure 1 Any terminal device or network device in the communication system shown, the receiving device can also be Figure 1 Any terminal device or network device in the communication system shown.

[0150] The transmitting device can encode, modulate, map, precode, frame, perform inverse fast fourier transform (IFFT), and apply intermediate radio frequency (IRF) to its generated layer (L)2 data to obtain the transmitted signal, which can then be transmitted to the receiving device through the channel. When the receiving device receives the signal through the channel, it can recover the source bitstream through IRF, fast fourier transform (FFT), deframing, equalization, demapping, demodulation, and decoding.

[0151] Optionally, the transmitting device can encode the information bits using an encoding processing unit chip architecture, and correspondingly, the receiving device can decode the information to be decoded using a decoding processing unit chip architecture to obtain the decoding result. The encoding processing unit chip architecture can be as follows: Figure 4 As shown, the encoding processing unit chip architecture may include a computing unit, a storage unit, and a control unit. Figure 4 The computational unit within the chip can perform transport block (TB)-CRC calculation, code block segmentation, code block (CB)-CRC calculation, RM encoding, rate matching, and code block concatenation. The decoding processing unit chip architecture can be as follows: Figure 5 As shown, the decoding processing unit chip architecture may include a computing unit, a storage unit, and a control unit. Figure 5The computational unit shown can perform rate matching, hybrid automatic repeat request (HARQ) merging, RM decoding, CB-CRC checksum, and TB-CRC checksum. Because encoding and decoding require high throughput, hardware accelerators (HACs) are generally used in system-on-chip (SoCs) for encoding and decoding. Furthermore, scrambling and descrambling can also be implemented within the HAC.

[0152] In practical implementation, Figure 1 As shown in the figure: various terminal devices and network devices can adopt Figure 6 The shown composition structure, or including Figure 6 The components shown. Figure 6 This is a schematic diagram illustrating the composition of a communication device 600 provided in an embodiment of this application. The communication device 600 can be a terminal device or a chip or system-on-a-chip within a terminal device; it can also be a network device or a chip or system-on-a-chip within a network device. For example... Figure 6 As shown, the communication device 600 includes a processor 601, a transceiver 602, and a communication line 603.

[0153] Furthermore, the communication device 600 may also include a memory 604. The processor 601, memory 604, and transceiver 602 can be connected via a communication line 603.

[0154] The processor 601 can be a central processing unit (CPU), a network processor (NP), a digital signal processor (DSP), a microprocessor, a microcontroller, a programmable logic device (PLD), or any combination thereof. The processor 601 can also be other devices with processing capabilities, such as circuits, devices, or software modules, without limitation.

[0155] Transceiver 602 is used to communicate with other devices or other communication networks. These other communication networks can be Ethernet, radio access network (RAN), wireless local area networks (WLAN), etc. Transceiver 602 can be a module, circuit, transceiver, or any device capable of enabling communication.

[0156] Communication line 603 is used to transmit information between the components included in communication device 600.

[0157] Memory 604 is used to store instructions. These instructions can be computer programs.

[0158] The memory 604 can be a read-only memory (ROM) or other type of static storage device that can store static information and / or instructions; it can also be a random access memory (RAM) or other type of dynamic storage device that can store information and / or instructions; it can also be an electrically erasable programmable read-only memory (EEPROM), a compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, etc., without limitation.

[0159] It is understood that the memory 604 can exist independently of the processor 601, or it can be integrated with the processor 601. The memory 604 can be used to store instructions, program code, or some data, etc. The memory 604 can be located inside or outside the communication device 600, without limitation. The processor 601 is used to execute the instructions stored in the memory 604 to implement the communication method provided in the following embodiments of this application.

[0160] In one example, processor 601 may include one or more CPUs, for example Figure 6 CPU0 and CPU1 in the CPU.

[0161] As an optional implementation, the communication device 600 includes multiple processors, for example, besides Figure 6 In addition to processor 601, it may also include processor 607.

[0162] As an optional implementation, the communication device 600 also includes an output device 605 and an input device 606. For example, the input device 606 is a device such as a keyboard, mouse, microphone, or joystick, and the output device 605 is a device such as a display screen or speaker.

[0163] It is understood that the communication device 600 can be a desktop computer, laptop computer, network server, mobile phone, tablet computer, wireless terminal, embedded device, chip system, or something similar. Figure 6 Equipment with a similar structure. Furthermore... Figure 6 The structural composition shown does not constitute a limitation on the communication device, except... Figure 6 In addition to the components shown, the communication device may include more or fewer components than illustrated, or combine certain components, or have different component arrangements.

[0164] In this embodiment of the application, the chip system may be composed of chips or may include chips and other discrete devices.

[0165] Furthermore, the actions, terms, etc., involved in the various embodiments of this application can be referenced interchangeably without limitation. The message names or parameter names in the messages exchanged between the various devices in the embodiments of this application are merely examples, and other names may be used in specific implementations without limitation.

[0166] The following is combined Figure 1 The communication system shown refers to the following Figure 7 The communication method provided in the embodiments of this application is described below, wherein the sending device can be... Figure 1 Any terminal device or network device in the communication system shown, the receiving device can also be Figure 1 Any terminal device or network device in the communication system shown. The transmitting or receiving device described in the following embodiments may have... Figure 6 The component shown.

[0167] Figure 7 A flowchart of a communication method provided in an embodiment of this application is shown below. Figure 7 As shown, the method may include the following steps:

[0168] Step 701: The sending device obtains the information bit sequence.

[0169] The information bit sequence can also be described as the bit sequence to be encoded.

[0170] The length of the information bit sequence can be K, where K is a positive integer. The information bit sequence may include the information bits themselves, in which case K can be the number of information bits included in the information bit sequence; or, the information bit sequence may include information bits and CRC bits, that is, the information bit sequence may be a CRC-encoded payload bit sequence, in which case K can be the sum of the number of information bits and the number of CRC bits included in the payload bit sequence.

[0171] Step 702: The transmitting device performs S encodings based on the information bit sequence to obtain the first encoded bit sequence.

[0172] Where S is an integer greater than 1. For example, S can be 2; or S can be 3; or S can be 4; or S can be 5.

[0173] In this process, the transmitting device performs S-fold encoding based on the information bit sequence. This can be understood as the transmitting device performing S-fold encoding on the information bit sequence in a serial (or concatenated) manner; or it can be understood as the transmitting device constructing concatenated codes to encode the information bit sequence using concatenated codes. Specifically, RM codes can participate in the construction of concatenated codes. For example, multiple RM codes can be combined to form a concatenated code, or RM codes can be combined with other codes (such as convolutional codes, linear block codes, polar codes, LDPC codes, etc.) to form a concatenated code.

[0174] In this S-encoding scheme, the input bit sequence corresponding to the first encoding includes some or all of the bits in the information bit sequence. For example, the input bit sequence corresponding to the first encoding can be the information bit sequence, or it can be one of a plurality of first sequences. The plurality of first sequences can be determined based on the information bit sequence. For details, please refer to the description of the first sequence below, which will not be repeated here.

[0175] In this S-encoding scheme, the input bit sequence corresponding to the (i+1)th encoding is determined based on some or all of the bits in the output bit sequence corresponding to the ith encoding. For example, the input bit sequence corresponding to the (i+1)th encoding can be the output bit sequence corresponding to the ith encoding; or, the input bit sequence corresponding to the (i+1)th encoding can include some bits from the output bit sequence corresponding to the ith encoding; or, the input bit sequence corresponding to the (i+1)th encoding can include the output bit sequence corresponding to the ith encoding and one of a plurality of first sequences.

[0176] Where i is an integer from 1 to S-1. For example, if S is 2, i can be 1 or i can be 2. Or, if S is 3, i can be 1 or i can be 2 or i can be 3.

[0177] For example, with S=2, the input bit sequence corresponding to the first encoding can be the information bit sequence, and the input bit sequence corresponding to the second encoding can be the output bit sequence corresponding to the first encoding.

[0178] In this application, the input bit sequence corresponding to the s-th encoding in S-encoding can be understood as the bit sequence to be encoded for the s-th encoding; similarly, the output bit sequence corresponding to the s-th encoding in S-encoding can be understood as the encoded bit sequence obtained by performing the s-th encoding on the bit sequence to be encoded corresponding to the s-th encoding; s = 1, 2, ..., S.

[0179] It is understandable that the input bit sequence corresponding to the (s+1)th encoding in S-encoding can include some or all of the bits in the output bit sequence corresponding to the s-th encoding. The input bit sequence corresponding to the (s+1)th encoding in S-encoding can be referred to in the description of the input bit sequence corresponding to the (i+1)th encoding in S-encoding, and the output bit sequence corresponding to the s-th encoding in S-encoding can be referred to in the description of the output bit sequence corresponding to the i-th encoding in S-encoding, which will not be repeated here.

[0180] In this context, the encoding method corresponding to the i-th or i+1-th encoding in the S-encoding is RM encoding; or it can be replaced by the fact that at least one encoding in the S-encoding corresponds to the RM encoding.

[0181] Optionally, the encoding methods corresponding to the S-encoding can all be RM encoding, or at least two of the S-encodings can have different encoding methods.

[0182] Optionally, the encoding methods corresponding to S-encoding, other than RM encoding, can be one or more of the following: convolutional encoding, PC encoding, SPC encoding, CRC encoding, BCH encoding, polar encoding, LDPC encoding, or RS encoding.

[0183] Other encoding methods may also be used in this application. The above encoding methods are only examples and do not limit this application.

[0184] It is understandable that the transmitting device can perform S-encoding on the information bit sequence based on one or more of the above encoding methods and RM encoding. Alternatively, the transmitting device can perform S-encoding on the information bit sequence based on RM code, which can improve the flexibility and versatility of S-encoding. Furthermore, the corresponding encoding method can be determined in different communication scenarios to meet different communication needs, thereby improving communication reliability. Moreover, the use of long RM codes to transmit information bit sequences can be avoided as much as possible, reducing the encoding complexity of RM codes.

[0185] In one example, the encoding method corresponding to the first encoding in the S-th encoding can be RM encoding, the encoding method corresponding to the second encoding can be RM encoding, the encoding method corresponding to the third encoding can be RM encoding, ..., the encoding method corresponding to the S-th encoding can be RM encoding.

[0186] In another example, taking S as 2, the encoding method corresponding to the first encoding in the S encoding can be the first encoding, and the encoding method corresponding to the second encoding can be RM encoding; or, the encoding method corresponding to the first encoding in the S encoding can be RM encoding, and the encoding method corresponding to the second encoding can be the first encoding.

[0187] The first encoding can be one or more of the following: convolutional encoding, PC encoding, SPC encoding, CRC encoding, BCH encoding, polar encoding, LDPC encoding, or RS encoding.

[0188] Understandably, when the encoding method corresponding to the second encoding is RM encoding, the output bit sequence corresponding to the first encoding can be RM encoded, which can improve the code distance of the RM code and increase the encoding gain, thereby improving encoding performance. When the encoding method corresponding to the first encoding is RM encoding, the output bit sequence corresponding to the first encoding can be encoded based on any of the above encoding methods (i.e., the RM code is encoded again), allowing for more flexible adaptation of code rate and code length, supporting different code lengths and rates, and improving encoding performance.

[0189] Optionally, RM encoding can be used at any position within the S-th encoding. For example, the encoding method corresponding to the first encoding in the S-th encoding can be RM encoding, or the encoding method corresponding to the S-th encoding in the S-th encoding can be RM encoding, or the encoding method corresponding to the S / 2-th encoding in the S-th encoding can be RM encoding. Furthermore, the encoding methods corresponding to the first and S-th encodings in the S-th encoding can be RM encoding, or the encoding methods corresponding to the first and second encodings in the S-th encoding can be RM encoding. Even further, the encoding methods corresponding to the first, S / 2, and S-th encodings in the S-th encoding can be RM encoding.

[0190] The above is merely an example of the position of RM encoding in S-encoding, and does not impose any restrictions on the position of RM encoding in S-encoding.

[0191] It is understandable that, for the first encoding, which corresponds to RM encoding, the output bit sequence corresponding to the first encoding can be encoded S-1 times (i.e., the RM code can be encoded S-1 times) to obtain a first encoded bit sequence of arbitrary length, which can improve the flexibility of the length (or code length) of the first encoded bit sequence; for the S-th encoding, which corresponds to RM encoding, information bit sequences of arbitrary length can be encoded, which can improve the encoding gain.

[0192] Optionally, the length of the first coded bit sequence can be determined based on the number of transmission resources (REs). Here, transmission resources can be understood as resources used to transmit information bit sequences. For example, the length of the first coded bit sequence can be the product of a first value and the modulation order, where the first value is an integer less than or equal to the number of REs corresponding to the transmission resources.

[0193] Step 703: The transmitting device outputs the first encoded bit sequence; correspondingly, the receiving device receives the decoding information from the transmitting device.

[0194] Optionally, the transmitting device can perform rate matching on the first coded bit sequence to obtain a rate-matched bit sequence.

[0195] Optionally, the transmitting device can interleave the rate-matched bit sequence to obtain an interleaved bit sequence, and then modulate the interleaved bit sequence to obtain a modulated symbol sequence; or, the transmitting device can modulate the rate-matched bit sequence to obtain a modulated symbol sequence, without limitation.

[0196] It is understandable that the modulation symbol sequence sent by the transmitting device to the receiving device may be affected by noise and other interference when transmitted through the channel. The information to be demodulated received by the receiving device is the modulation symbol sequence affected by noise and other interference.

[0197] Optionally, the receiving device can demodulate the information to be demodulated to obtain the information to be decoded.

[0198] Step 704: The receiving device performs S decoding operations based on the information to be decoded to obtain the first decoded bit sequence.

[0199] Optionally, if the transmitting device interleaves the rate-matched bit sequence, the receiving device can deinterleave the information to be decoded to obtain a deinterleaved bit sequence, and then de-rate-match the deinterleaved bit sequence to obtain a de-rate-matched bit sequence; otherwise, the receiving device can de-rate-match the information to be decoded to obtain a de-rate-matched bit sequence.

[0200] The fact that the receiving device performs S decodings based on the information to be decoded can be understood as the receiving device performing S decodings on the rate-matched bit sequence. It is understood that "part or all of the bits in the information to be decoded" in this application can be understood as "part or all of the bits in the rate-matched bit sequence".

[0201] The description of S above is sufficient and will not be repeated here.

[0202] In this S-stage decoding, the input bit sequence corresponding to the first decoding step includes some or all of the bits in the information to be decoded. For example, the input bit sequence corresponding to the first decoding step may include all the bits in the information to be decoded, or it may include one of a plurality of fifth sequences. The plurality of fifth sequences can be determined based on the information to be decoded; details can be found in the following description of the fifth sequences, which will not be repeated here.

[0203] In the S-decoding process, the input bit sequence corresponding to the i+1th decoding is determined based on some or all of the bits in the output bit sequence corresponding to the i-th decoding.

[0204] It is understandable that the input bit sequence or output bit sequence corresponding to the s-th decoding in S-th decoding corresponds to the input bit sequence or output bit sequence corresponding to the (S-s+1)-th encoding in S-th encoding, where s = 1, 2, ..., S.

[0205] In this context, the decoding method corresponding to the i-th or i+1-th decoding in the S-th decoding is RM decoding; or it can be replaced by the fact that there is at least one decoding method corresponding to RM decoding in the S-th decoding.

[0206] It is understandable that the position of the RM encoding in the S-th encoding corresponds one-to-one with the position of the RM decoding in the S-th decoding. For example, if the encoding method corresponding to the A-th encoding in the S-th encoding is RM encoding, then the decoding method corresponding to the (S-A+1)-th decoding in the S-th decoding is RM decoding; similarly, if the decoding method corresponding to the B-th decoding in the S-th decoding is RM decoding, then the encoding method corresponding to the (S-B+1)-th encoding in the S-th encoding is RM encoding, where A and B are both positive integers less than or equal to S. For example, taking S as 2, assuming the encoding method corresponding to the 2nd encoding is RM encoding, the decoding method corresponding to the 1st decoding can be RM decoding. Or, taking S as 4, assuming the encoding method corresponding to the 2nd encoding is RM encoding, the decoding method corresponding to the 3rd decoding can be RM decoding.

[0207] Similarly, the encoding method corresponding to the s-th encoding in S-th encoding corresponds to the decoding method corresponding to the (S-s+1)-th decoding in S-th decoding. For example, if the encoding method corresponding to the 1st encoding in S-th encoding is RM encoding and the encoding method corresponding to the 2nd encoding is convolutional encoding, then the decoding method corresponding to the S-th decoding in S-th decoding is RM decoding, and the decoding method corresponding to the (S-1)-th decoding is convolutional decoding.

[0208] Optionally, all S-times of decoding can be RM decoding; or, at least two of the S-times of decoding can be performed using different decoding methods.

[0209] Optionally, the decoding methods corresponding to S-time decoding, other than RM decoding, can be one or more of the following: convolutional decoding, PC decoding, SPC decoding, CRC decoding, BCH decoding, polarization decoding, LDPC decoding, or RS decoding.

[0210] Optionally, RM decoding can be performed at any position in the S-th decoding. For example, the decoding method corresponding to the first decoding in the S-th decoding can be RM decoding; or, the decoding method corresponding to the S-th decoding in the S-th decoding can be RM decoding; or, the decoding method corresponding to the S / 2-th decoding in the S-th decoding can be RM decoding.

[0211] In one example, the decoding method corresponding to the first decoding in the S-th decoding can be RM decoding, the decoding method corresponding to the second decoding can be RM decoding, the decoding method corresponding to the third decoding can be RM decoding, ..., the decoding method corresponding to the S-th decoding can be RM decoding.

[0212] In another example, taking S as 2, the decoding method corresponding to the first decoding in S decoding can be first decoding, and the decoding method corresponding to the second decoding can be RM decoding; or, the decoding method corresponding to the first decoding in S decoding can be RM decoding, and the decoding method corresponding to the second decoding can be first decoding.

[0213] The first decoding method can be one or more of the following: convolutional decoding, PC decoding, SPC decoding, CRC decoding, BCH decoding, polarization decoding, LDPC decoding, or RS decoding.

[0214] based on Figure 7 The communication method shown in this application, compared to performing RM encoding on the information bit sequence once, allows the transmitting device to perform S encodings on the information bit sequence, and at least one of the S encodings corresponds to RM encoding (equivalent to the ith or (i+1)th encoding in the S encodings corresponding to RM encoding). The transmitting device can use some or all of the bits in the output bit sequence corresponding to the ith encoding as the input bit sequence corresponding to the (i+1)th encoding. That is, the transmitting device can perform RM encoding on the already encoded bit sequence, or it can re-encode the RM-encoded bit sequence, which can improve the code distance of the RM code and increase the encoding gain, thereby improving the encoding and decoding performance of the RM code. Furthermore, since some or all of the bits in the output bit sequence corresponding to the i-th encoding can be used as the input bit sequence corresponding to the (i+1)-th encoding, different code lengths (i.e., the length of the first encoded bit sequence) and code rates (i.e., the ratio of the length of the information bit sequence to the length of the first encoded bit sequence) can be flexibly supported. This can improve the flexibility and diversity of the code length and code rate configuration of RM codes, and at the same time, it can make the code rate and code length adapt to different communication scenarios, thereby improving encoding and decoding performance.

[0215] For the receiving device, it can use some or all of the bits in the output bit sequence corresponding to the i-th decoding as the input bit sequence corresponding to the (i+1)-th decoding. That is, the receiving device can perform RM decoding on the decoded bit sequence, or it can decode the bit sequence after RM decoding again. Since the decoding complexity is related to the first parameter (i.e., the code length parameter) and the second parameter (i.e., the order of the RM code) of the RM code, this application can transform the decoding of a long-code-length, high-order RM code into a decoding process of a short-code-length, low-order RM code, which can reduce the implementation complexity of decoding. In addition, by performing multiple decodings on some or all of the bits in the information to be decoded, the decoding performance can be improved.

[0216] based on Figure 7 The communication method shown allows the transmitting device to perform S-encoding on the information bit sequence. The input bit sequence corresponding to the (i+1)th encoding in the S-encoding can be determined based on some or all of the bits in the output bit sequence corresponding to the ith encoding, and the input bit sequence corresponding to the 1st encoding can include some or all of the bits in the information bit sequence. This application provides four possible designs to implement S-encoding of the information bit sequence.

[0217] In the first possible design, the input bit sequence corresponding to the first encoding can be an information bit sequence, and the input bit sequence corresponding to the (i+1)th encoding can include the output bit sequence corresponding to the ith encoding. In the second possible design, the input bit sequence corresponding to the first encoding can be an information bit sequence, and the input bit sequence corresponding to the (i+1)th encoding can be a portion of the output bit sequence corresponding to the ith encoding. In the third possible design, the input bit sequence corresponding to the first encoding can be a portion of the information bit sequence, and the input bit sequence corresponding to the (i+1)th encoding can include a portion of the output bit sequence corresponding to the ith encoding and a portion of the information bit sequence. In the fourth possible design, the transmitting device can perform S encodings on each of the multiple third sequences; or, the transmitting device can perform one encoding on a portion or all of the multiple third sequences, and perform S-1 encodings on each of the multiple third sequences. The multiple third sequences can be determined based on the information bit sequence, as detailed in the following description of the third sequences, which will not be elaborated upon here.

[0218] The first possible design will be described in detail below:

[0219] In this case, the input bit sequence corresponding to the first encoding can be an information bit sequence, and the input bit sequence corresponding to the (i+1)th encoding can be the output bit sequence corresponding to the ith encoding (i.e., the length of the output bit sequence corresponding to the ith encoding is equal to the length of the input bit sequence corresponding to the (i+1)th encoding); or, the input bit sequence corresponding to the first encoding can be an information bit sequence, and the input bit sequence corresponding to the (i+1)th encoding can include the output bit sequence corresponding to the ith encoding and padding bits (i.e., the length of the output bit sequence corresponding to the ith encoding is less than the length of the input bit sequence corresponding to the (i+1)th encoding, and the number of padding bits can be the absolute value of the difference between the length of the input bit sequence corresponding to the (i+1)th encoding and the length of the output bit sequence corresponding to the ith encoding). In this case, the first encoded bit sequence can be the output bit sequence corresponding to the Sth encoding.

[0220] For example, such as Figure 8 As shown in (a), the input bit sequence corresponding to the first encoding can be the information bit sequence, the input bit sequence corresponding to the second encoding can be the output bit sequence corresponding to the first encoding, the input bit sequence corresponding to the third encoding can be the output bit sequence corresponding to the second encoding, ..., the input bit sequence corresponding to the S-th encoding can be the output bit sequence corresponding to the (S-1)-th encoding, and the output bit sequence corresponding to the S-th encoding is only the first encoding bit sequence.

[0221] Accordingly, if the transmitting device encodes the information bit sequence S times based on the first possible design, the receiving device can correspondingly perform S decodings on the information to be decoded. That is, the input bit sequence corresponding to the first decoding can include all bits in the information to be decoded, and the input bit sequence corresponding to the (i+1)th decoding can be the output bit sequence corresponding to the i-th decoding (i.e., the length of the input bit sequence corresponding to the (i+1)th decoding is equal to the length of the output bit sequence corresponding to the i-th decoding). Alternatively, the input bit sequence corresponding to the first decoding can include all bits in the information to be decoded, and the input bit sequence corresponding to the (i+1)th decoding can include bits from the output bit sequence corresponding to the i-th decoding, excluding padding bits (i.e., the length of the input bit sequence corresponding to the (i+1)th decoding is less than the length of the output bit sequence corresponding to the i-th decoding, and the number of padding bits can be the absolute value of the difference between the length of the input bit sequence corresponding to the (i+1)th decoding and the length of the output bit sequence corresponding to the i-th decoding). In this case, the first decoded bit sequence can be the output bit sequence corresponding to the S-th decoding.

[0222] For example, such as Figure 8As shown in (b), the input bit sequence corresponding to the first decoding can include all bits in the information to be decoded, the input bit sequence corresponding to the second decoding can be the output bit sequence corresponding to the first decoding, the input bit sequence corresponding to the third decoding can be the output bit sequence corresponding to the second decoding, ..., the input bit sequence corresponding to the S-th decoding can be the output bit sequence corresponding to the (S-1)-th decoding, and the output bit sequence corresponding to the S-th decoding is the first decoding bit sequence.

[0223] Based on the first possible design, this application provides two possible implementations. In the first possible implementation, the first encoding precedes the RM encoding, and in the second possible implementation, the first encoding follows the RM encoding.

[0224] In the first possible implementation, the encoding method corresponding to the i-th encoding in the S-encoding can be the first encoding, and the encoding method corresponding to the (i+1)-th encoding can be the RM encoding. The first encoding can refer to the description of the first encoding above, and will not be repeated here.

[0225] The length of the input bit sequence (i.e., the code length of the RM code) corresponding to the (i+1)th encoding and the length of the output bit sequence corresponding to the (i+1)th encoding can be determined based on the first and second parameters of the RM code.

[0226] Wherein, the first parameter is the code length parameter m of the RM code, and the second parameter is the order r of the RM code. Optionally, the first and second parameters can be configured by the network device, or they can be predefined, or they can be configured by the communication system, without restriction.

[0227] For example, the length of the output bit sequence corresponding to the (i+1)th encoding can be determined according to the first parameter. For instance, the length of the output bit sequence corresponding to the (i+1)th encoding can be 2... m .

[0228] For example, the length of the input bit sequence corresponding to the (i+1)th encoding can be determined based on the first parameter and the second parameter. For instance, the length of the input bit sequence corresponding to the (i+1)th encoding can be...

[0229] The code rate of the first encoding can be determined based on the length K of the input bit sequence corresponding to the i-th encoding. i The length T of the input bit sequence corresponding to the (i+1)th encoding i+1 Sure.

[0230] In one example, the code rate R of the first encoding can be the ratio of the length of the input bit sequence corresponding to the i-th encoding to the length of the input bit sequence corresponding to the second encoding, for example, R = K.i / T i+1 .

[0231] In another example, the code rate R of the first encoding can be included in a preset code rate set. The code rate of the first encoding can be greater than or equal to the ratio of the length of the input bit sequence corresponding to the i-th encoding to the length of the input bit sequence corresponding to the second encoding. For example, R ≥ K i / T i+1 Alternatively, K / R ≤ T. That is, a code rate R can be determined from a preset code rate set, which satisfies the following formula: K i / R≤T i+1 Alternatively, the following formula can be satisfied: R≥K i / T i+1 .

[0232] Understandably, the transmitting device can perform a first encoding on the input bit sequence corresponding to the i-th encoding based on the code rate of the first encoding, to obtain the output bit sequence corresponding to the i-th encoding. If the code rate of the first encoding is equal to K... i / T i+1 The input bit sequence corresponding to the (i+1)th encoding can be the output bit sequence corresponding to the ith encoding; if the code rate of the first encoding is greater than K i / T i+1 The input bit sequence corresponding to the (i+1)th encoding can include the output bit sequence corresponding to the i-th encoding and padding bits, and the number of padding bits can be (T). i+1 -K i / R).

[0233] Furthermore, the code rate corresponding to the i-th encoding can be equal to K. i / T i+1 It can also be less than K. i / T i+1 This can improve the flexibility and diversity of determining the code rate corresponding to the i-th encoding.

[0234] It is understandable that the code rate corresponding to the i-th decoding in S-th decoding can be determined by referring to the code rate corresponding to the i-th encoding mentioned above, and will not be elaborated here.

[0235] Based on the first possible implementation, this application provides a possible embodiment, taking S as 2 as an example, such as... Figure 9 As shown in (a), the transmitting device can perform a first encoding on the information bit sequence to obtain a sixth encoded bit sequence, and then perform RM encoding on the sixth encoded bit sequence to obtain the first encoded bit sequence.

[0236] The length of the output bit sequence corresponding to the first encoding (i.e., the sixth encoded bit sequence) is related to the first and second parameters of the RM code. That is, the length of the input bit sequence corresponding to the second encoding can be determined based on the first and second parameters of the RM code. Furthermore, the code rate of the first encoding can be determined based on the length of the input bit sequence corresponding to the second encoding and the length of the information bit sequence. Finally, the length of the output bit sequence corresponding to the first encoding can be determined based on the code rate of the first encoding and the length of the information bit sequence. The specific determination process can be referred to the above description of the length of the output bit sequence corresponding to the i-th encoding and the code rate of the i-th encoding, and will not be repeated here.

[0237] Among them, the code rate corresponding to the first encoding is greater than or equal to the length K of the information bit sequence and 2. m The ratio, where m is the first parameter of the RM code. That is, the range of values ​​for the code rate corresponding to the first encoding can be increased; the code rate corresponding to the first encoding can be equal to the length of the information bit sequence and 2. m The ratio can also be less than the length of the information bit sequence and 2. m The ratio can improve the flexibility and diversity of determining the code rate corresponding to the first encoding.

[0238] In this case, the code rate corresponding to the first encoding is greater than the length of the information bit sequence and 2. m In the case of a ratio, the input bit sequence corresponding to the second encoding can include the output bit sequence corresponding to the first encoding and padding bits. For details, refer to the above description of the input bit sequence corresponding to the (i+1)th encoding including the output bit sequence corresponding to the i-th encoding and padding bits; it will not be repeated here. It is understandable that even if the length of the output bit sequence corresponding to the first encoding is small, the input bit sequence corresponding to the second encoding can be obtained by adding padding bits to the output bit sequence corresponding to the first encoding. This can improve the flexibility and diversity of the code rate determination for the first encoding, and also improve the flexibility and diversity of the encoding method for the first encoding.

[0239] based on Figure 9 The embodiment shown in (a) provides two possible examples, with the first encoding differing in the different examples:

[0240] In one example, taking convolutional coding as the first encoding, assuming the first parameter is 7 and the second parameter is 3, then the length of the output bit sequence corresponding to the second encoding can be 128 (i.e., 2^32). 7 The length of the input bit sequence corresponding to the second encoding can be 64 (i.e., If the length K of the information bit sequence is 64, the code rate R of the convolutional code can be determined to be 1 (i.e., 64 / 64), and the generator polynomial of the convolutional code can be as follows: Figure 10 As shown in (a), the transmitting device can perform convolutional coding on a 64-bit information sequence to obtain a sixth coded bit sequence of length 64. Then, it can perform RM coding on the sixth coded bit sequence to obtain a first coded bit sequence of length 128. Alternatively, if the length K of the information bit sequence is 32, the code rate R of the convolutional code can be determined to be 1 / 2 (i.e., 32 / 64), and the generator polynomial of the convolutional code can be as follows: Figure 10 As shown in (b), the transmitting device can perform convolutional encoding on the information bit sequence of length 32 to obtain a sixth encoded bit sequence of length 64, and then perform RM encoding on the sixth encoded bit sequence to obtain a first encoded bit sequence of length 128.

[0241] In another example, taking PC encoding as the first encoding, assuming the first parameter m is 7 and the second parameter r is 3, then the length of the output bit sequence corresponding to the second encoding can be 128 (i.e., 2^32). 7 The length of the input bit sequence corresponding to the second encoding can be 64 (i.e., If the length K of the information bit sequence is 56, the code rate of PC encoding can be determined to be 0.875 (i.e., 56 / 64). Eight PC bits can be inserted into the information bit sequence to obtain a sixth encoded bit sequence of length 64. Then, the sixth encoded bit sequence can be RM encoded to obtain a first encoded bit sequence of length 128.

[0242] It is understandable that PC encoding involves inserting one or more PC bits into the information bit sequence. The bit value of the PC bit can be determined based on the bit value of the information bit being checked. For example, the bit value of the PC bit can be the result of XORing the bit values ​​of the information bit being checked.

[0243] Optionally, one or more PC bits can be evenly inserted into the information bit sequence to obtain the sixth encoded bit sequence. That is, the difference between the indices of two adjacent PC bits in the sixth encoded bit sequence can be a first preset value, or it can be understood that the PC bits can be evenly distributed in the sixth encoded bit sequence, thereby reducing the implementation complexity of PC encoding.

[0244] For example, taking an information bit sequence of length 56 and a PC bit count of 8, assuming a preset value of 7, a PC bit can be inserted after every 7 bits in the information bit sequence. For instance, the first PC bit is inserted after the 7th bit, the second PC bit after the 14th bit, the third PC bit after the 21st bit, and so on, until the eighth bit is inserted after the 56th bit, to obtain the sixth encoded bit sequence.

[0245] Optionally, the PC bit can verify information bits located before or after the PC bit, without restriction.

[0246] Optionally, the difference in the sequence number of two adjacent information bits checked by a PC bit can be a second preset value, that is, the information bits checked by a PC bit can be evenly distributed. For example, taking a PC bit count of 2 as an example, assuming the length of the sixth encoded bit sequence is 16, the sequence number of the first PC bit in the sixth encoded bit sequence is 8, and the sequence number of the second PC bit in the sixth encoded bit sequence is 16, such as... Figure 11 As shown, the first PC bit can verify the second and fifth information bits in the sixth encoded bit sequence (e.g., Figure 11 (As shown by the dashed line in the image), the second PC bit can check the fourth, seventh, tenth, and thirteenth information bits in the sixth encoded bit sequence (as shown by the dashed line in the image). Figure 11 (as shown by the solid line in the image).

[0247] Optionally, the number of information bits verified by different PC bits can be the same, or the number of information bits verified by different PC bits can be different.

[0248] For example, taking a PC bit count of 2 as an example, assuming the length of the sixth encoded bit sequence is 16, the first PC bit has an index of 8 in the sixth encoded bit sequence, and the second PC bit has an index of 16 in the sixth encoded bit sequence. The first PC bit can check the first and fifth information bits in the sixth encoded bit sequence, and the second PC bit can check the ninth and thirteenth information bits in the sixth encoded bit sequence; that is, the first PC bit and the second PC bit check the same number of information bits. Alternatively, the first PC bit can check the second and fifth information bits in the sixth encoded bit sequence, and the second PC bit can check the fourth, seventh, tenth, and thirteenth information bits in the sixth encoded bit sequence; that is, the first PC bit and the second PC bit check the different numbers of information bits.

[0249] It is understood that the above PC encoding can also be replaced by CRC encoding. Accordingly, one or more CRC bits can be inserted into the information bit sequence to obtain the sixth encoding bit sequence. The CRC bits can be scattered in the middle of the sixth encoding bit sequence or all located at the end of the sixth encoding bit sequence. This application does not limit this.

[0250] In the second possible implementation, the encoding method corresponding to the i-th encoding in the S-th encoding is RM encoding, and the encoding method corresponding to the (i+1)-th encoding is the first encoding.

[0251] The length of the input bit sequence corresponding to the i-th encoding can be determined by referring to the determination of the length of the input bit sequence corresponding to the (i+1)-th encoding as described above; similarly, the length of the output bit sequence corresponding to the i-th encoding can be determined by referring to the determination of the length of the output bit sequence corresponding to the (i+1)-th encoding as described above, and will not be elaborated here.

[0252] For example, taking S as 2, such as Figure 9 As shown in (b), the transmitting device can perform RM encoding on the information bit sequence to obtain the sixth encoded bit sequence, and then perform first encoding on the sixth encoded bit sequence to obtain the first encoded bit sequence.

[0253] Based on the first possible design, the output bit sequence corresponding to the i-th encoding can be used as the input bit sequence corresponding to the (i+1)-th encoding. Multiple encodings of the information bit sequence can increase the encoding gain, thereby improving both encoding and decoding performance. Furthermore, performing S encodings on the information bit sequence can improve the code distance of the RM code, thus further enhancing both encoding and decoding performance.

[0254] In the second possible design, the input bit sequence corresponding to the first encoding can be an information bit sequence, and the input bit sequence corresponding to the (i+1)th encoding can be a subset of bits from the output bit sequence corresponding to the ith encoding. For example, such as... Figure 12 As shown in (a), the input bit sequence corresponding to the first encoding can be an information bit sequence. The input bit sequence corresponding to the second encoding can include a portion of the output bit sequence corresponding to the first encoding. The input bit sequence corresponding to the third encoding can include a portion of the output bit sequence corresponding to the second encoding, and so on, until the input bit sequence corresponding to the S-th encoding can include a portion of the output bit sequence corresponding to the (S-1)-th encoding. In this case, the first encoded bit sequence can include the output bit sequences corresponding to the first encoding up to the output bit sequences corresponding to the S-th encoding, or it can be understood as concatenating the output bit sequences corresponding to the first encoding up to the output bit sequences corresponding to the S-th encoding to obtain the first encoded bit sequence. For example, the first encoded bit sequence can include the input bit sequences corresponding to the first encoding, the input bit sequences corresponding to the second encoding, the input bit sequences corresponding to the third encoding, and so on, until the input bit sequences corresponding to the S-th encoding.

[0255] Accordingly, if the transmitting device encodes the information bit sequence S times based on the second possible design, the receiving device can correspondingly perform S decodings on the decoded information. That is, the receiving device can segment all bits in the information to be decoded to obtain S fifth sequences. The input bit sequence corresponding to the first decoding can include the first fifth sequence among the S fifth sequences, and the input bit sequence corresponding to the (i+1)th decoding can include the output bit sequence corresponding to the ith decoding and the (i+1)th fifth sequence among the S fifth sequences. In this case, the first decoded bit sequence can be the output bit sequence corresponding to the Sth decoding.

[0256] For example, such as Figure 12 As shown in (b), the input bit sequence corresponding to the first decoding may include the first fifth sequence, the input bit sequence corresponding to the second decoding may include the second fifth sequence and the output bit sequence corresponding to the first decoding, the input bit sequence corresponding to the third decoding may include the third fifth sequence and the output bit sequence corresponding to the second decoding, ..., the input bit sequence corresponding to the S-th decoding may include the S-th fifth sequence and the output bit sequence corresponding to the (S-1)-th decoding, and the output bit sequence corresponding to the S-th decoding is the first decoding bit sequence.

[0257] Based on the second possible design, this application provides a possible embodiment, taking S as 3 as an example, such as... Figure 13As shown, the encoding methods corresponding to the S-th encoding can all be RM encoding. The first encoding bit sequence can include the output bit sequence corresponding to RM code I, the output bit sequence corresponding to RM code II, and the output bit sequence corresponding to RM code III.

[0258] The first parameter corresponding to RM code I, the first parameter corresponding to RM code II, and the first parameter corresponding to RM code III can be the same or different; similarly, the second parameter corresponding to RM code I, the second parameter corresponding to RM code II, and the second parameter corresponding to RM code III can be the same or different, without restriction.

[0259] Based on the second possible design, some bits from the output bit sequence corresponding to the i-th encoding can be used as the input bit sequence corresponding to the (i+1)-th encoding. This allows for unequal protection of different bits in the information bit sequence, improving both encoding and decoding performance. Furthermore, error-prone bits can be encoded multiple times, reducing the bit error rate and thus improving communication reliability.

[0260] In the third possible design, the input bit sequence corresponding to the first encoding can be a portion of the information bit sequence, and the input bit sequence corresponding to the (i+1)th encoding can include the output bit sequence corresponding to the i-th encoding and a portion of the information bit sequence.

[0261] Specifically, the input bit sequence corresponding to the first encoding can be the first first sequence among S first sequences, and the input bit sequence corresponding to the (i+1)th encoding can include the output bit sequence corresponding to the ith encoding and the (i+1)th first sequence among S first sequences. In this case, the first encoded bit sequence can be the output bit sequence corresponding to the Sth encoding.

[0262] Among them, the S first sequences can be determined based on the information bit sequence.

[0263] For example, such as Figure 14 As shown in (a), the input bit sequence corresponding to the first encoding can be the first first sequence, the input bit sequence corresponding to the second encoding can include the output bit sequence corresponding to the first encoding and the second second sequence, the input bit sequence corresponding to the third encoding can include the output bit sequence corresponding to the second encoding and the third second sequence, ..., the input bit sequence corresponding to the Sth encoding can include the output bit sequence corresponding to the (S-1)th encoding and the Sth second sequence, and the output bit sequence corresponding to the Sth encoding is the first encoded bit sequence.

[0264] Correspondingly, if the transmitting device encodes the information bit sequence S times based on the third possible design, the receiving device can correspondingly decode the information to be decoded S times. That is, the input bit sequence corresponding to the first decoding can include all the bits in the information to be decoded, and the input bit sequence corresponding to the (i+1)th decoding can include the bits in the output bit sequence corresponding to the i-th decoding except for the i-th fourth sequence. In this case, the first decoding bit sequence can include the first to the S-th fourth sequences.

[0265] The i-th fourth sequence corresponds to the (S-i+1)-th first sequence.

[0266] For example, such as Figure 14 As shown in (b), the input bit sequence corresponding to the first decoding can include all bits in the information to be decoded; the input bit sequence corresponding to the second decoding can include bits from the output bit sequence corresponding to the first decoding except for the first fourth sequence; the input bit sequence corresponding to the third decoding can include bits from the output bit sequence corresponding to the second decoding except for the second fourth sequence, ..., the input bit sequence corresponding to the S-th decoding can include bits from the output bit sequence corresponding to the (S-1)-th decoding except for the (S-1)-th fourth sequence, and the output bit sequence corresponding to the S-th decoding is the S-th fourth sequence. The first decoding bit sequence can include the first to the S-th fourth sequences.

[0267] For the above S first sequences determined according to the information bit sequence, this application provides two possible implementations:

[0268] In one possible implementation, the S first sequences can be obtained by segmenting the information bit sequence. For example, let the length of the s-th first sequence be Zs (s = 1, 2, ..., S). The first first sequence can include the first ratio to the Z1-th bit in the information bit sequence, the second first sequence can include the Z1+1-th ratio to the Z2-th bit in the information bit sequence, the third first sequence can include the Z2+1-th ratio to the Z3-th bit in the information bit sequence, ..., and the S-th first sequence can include the Z-th bit in the information bit sequence. S-1 +1 ratio to the Kth bit. K is the length of the information bit sequence.

[0269] The sum of the lengths of the S first sequences can be the length of the information bit sequence.

[0270] Based on the first possible implementation, the computational complexity can be reduced and the implementation simplified by segmenting the information bit sequence to obtain S first sequences.

[0271] In the second possible implementation, the S first sequences can be determined according to the first encoding method and the information bit sequence, wherein the first encoding method can be any of the following: convolutional encoding, PC encoding, SPC encoding, CRC encoding, BCH encoding, polar encoding, LDPC encoding, RS encoding or RM encoding.

[0272] Specifically, S first sequences can be obtained by segmenting a second sequence. The second sequence can be obtained by encoding the information bit order using a first encoding method. That is, the transmitting device can encode the information bit sequence based on the first encoding method to obtain the second sequence, and then segment the second sequence to obtain S first sequences. Let the length of the s-th first sequence be Zs'. The first first sequence can include the first ratio to the Z1'-th bit in the second sequence, the second first sequence can include the Z1'+1-th ratio to the Z2'-th bit in the second sequence, the third first sequence can include the Z2'+1-th ratio to the Z3'-th bit in the second sequence, ..., the S-th first sequence can include the Z-th bit in the second sequence. S-1 +1 ratio up to the Zth S The length of the second sequence can be (Z1'+Z2'+Z3'+...+Z...) bits. S '). Among them, the sum of the lengths of the S first sequences can be the length of the second sequence.

[0273] For example, such as Figure 15 As shown, the transmitting device can encode the information bit sequence to obtain a second sequence, and then segment the second sequence to obtain L first sequences. Each of the L first sequences can then be encoded S-1 times. The specific process can be referred to the above. Figure 14 The S-order encoding shown in (a) is to replace the S-order encoding with the S-1-order encoding.

[0274] Based on the second possible implementation, S first sequences can be determined according to the first encoding method and the information bit sequence, thereby obtaining encoding gain and improving encoding and decoding performance.

[0275] Optionally, the length of the second sequence can be the same as the length of the information bit sequence, or the length of the second sequence can be greater than the length of the information bit sequence; there is no restriction. Correspondingly, Zs can be the same as Zs' or different from Zs'.

[0276] Optionally, the lengths of the S first sequences can be the same, or at least two of the S first sequences have different lengths, or all of the S first sequences have different lengths; there are no restrictions.

[0277] Understandably, if at least two of the S first sequences have different lengths, the S first sequences can be determined based on the code rates corresponding to different encoding operations. This allows for adjustments to the protection against inequalities in different bits within the information bit sequence, thereby improving encoding performance. If the S first sequences have the same length, computational complexity can be reduced, simplifying implementation.

[0278] Optionally, the lengths of the S first sequences can be determined based on the lengths of the input bit sequences and the output bit sequences corresponding to the S encodings. For example, the length of the first first sequence can be the length of the input bit sequence corresponding to the first encoding; the length of the second first sequence can be the absolute value of the difference between the length of the input bit sequence corresponding to the second encoding and the length of the output bit sequence corresponding to the first encoding; the length of the third first sequence can be the absolute value of the difference between the length of the input bit sequence corresponding to the third encoding and the length of the output bit sequence corresponding to the second encoding; ..., the length of the Sth first sequence can be the absolute value of the difference between the length of the input bit sequence corresponding to the Sth encoding and the length of the output bit sequence corresponding to the (S-1)th encoding.

[0279] Based on the third possible design, this application provides a possible embodiment. Taking S as 3 as an example, the encoding method corresponding to the S encodings can all be RM encoding. Assume that the first parameter of RM code I is 4 and the second parameter is 1 (i.e., the length of the input bit sequence corresponding to RM code I is 5 and the length of the output bit sequence is 16); the first parameter of RM code II is 6 and the second parameter is 2 (i.e., the length of the input bit sequence corresponding to RM code II is 22 and the length of the output bit sequence is 64); the first parameter of RM code III is 8 and the second parameter can be 3 (i.e., the length of the input bit sequence corresponding to RM code III is 93 and the length of the output bit sequence is 256). Then, the length of the first sequence can be 5, the length of the second sequence can be 6 (i.e., 22-16), and the length of the third sequence can be 29 (i.e., 93-64).

[0280] In one example, such as Figure 16 As shown in (a), taking an information bit sequence length of 40 as an example, the input bit sequence corresponding to RM code I can be the first first sequence, the input bit sequence corresponding to RM code II can include the output bit sequence corresponding to RM code I and the second first sequence, the input bit sequence corresponding to RM code III can include the output bit sequence corresponding to RM code II and the third first sequence, and the output bit sequence corresponding to RM code III is the first encoded bit sequence.

[0281] In another example, such as Figure 16As shown in (b), taking an information bit sequence of length 40 as an example, since the sum of the input bit sequences corresponding to RM code I, RM code II, and RM code III is 40, the information bit sequence can be linearly block-coded (e.g., Hamming code, Gray code, BCH code, RS code, etc.) to obtain a second sequence. The length of the second sequence is the same as the length of the information bit sequence (i.e., 40). Furthermore, the second sequence can be segmented to obtain three first sequences. The input bit sequence corresponding to RM code I can be the first first sequence. The input bit sequence corresponding to RM code II can include the output bit sequence corresponding to RM code I and the second first sequence. The input bit sequence corresponding to RM code III can include the output bit sequence corresponding to RM code II and the third first sequence. The output bit sequence corresponding to RM code III is the first encoded bit sequence.

[0282] Based on the third possible design, S first sequences can be determined according to the information bit sequence. The input bit sequence corresponding to the (i+1)th encoding can include not only the output bit sequence corresponding to the ith encoding, but also the (i+1)th first sequence (i.e., a portion of the bits in the information bit sequence). That is, different information bits in the information bit sequence can be encoded at different numbers of times (or, as described, the information bit sequence can be encoded at multiple levels, with different levels corresponding to different information bits), allowing for varying degrees of protection for different information bits, thus improving encoding and decoding performance. Furthermore, by adjusting the code rate corresponding to different encoding levels, the unequal protection of different bits in the information bit sequence can be adjusted, further enhancing encoding and decoding performance.

[0283] The fourth possible design is that the transmitting device can encode each of the L third sequences S times; or, the transmitting device can encode some or all of the bits in the L third sequences once, and encode each of the L third sequences S-1 times.

[0284] Where L is an integer greater than 1. For example, L can be 2, or L can be 3, or L can be 4.

[0285] Optionally, L can be equal to S, or L can be greater than S, or L can be less than S; there are no restrictions.

[0286] Optionally, L can be predefined, or L can be configured for network devices, or L can be configured for communication systems, without restriction.

[0287] Among them, the L third sequences can be determined based on the information bit sequence.

[0288] Optionally, the L third sequences can be obtained by segmenting the information bit sequence; specifically, refer to the above method for determining the S first sequences, i.e., replacing S with L and replacing the first sequences with the third sequences, which will not be elaborated here.

[0289] Alternatively, the L third sequences can be determined based on the second encoding method and the information bit sequence. The second encoding method can be any of the following: convolutional coding, PC coding, SPC coding, CRC coding, BCH coding, polar coding, LDPC coding, RS coding, or RM coding. For example, the L third sequences can be obtained by segmenting the sixth sequence, and the sixth sequence can be obtained by encoding the information bit sequence using the first encoding method. The determination of the sixth sequence can be specifically referred to the determination of the second sequence described above, that is, replacing the first encoding method with the first encoding method; details will not be elaborated here.

[0290] Optionally, the lengths of the L third sequences can be the same; or, at least two of the L third sequences have different lengths; or, the lengths of the L third sequences are different.

[0291] For example, the lengths of the L third sequences can be the same. Taking the length of the information bit sequence as K, the length of each of the L third sequences can be K / L. For instance, the first third sequence may include the first bit to the K / Lth bit of the information bit sequence, the second third sequence may include the K / L+1th bit to the 2*(K / L)th bit of the information bit sequence, the third third sequence may include the 2*(K / L)+1th bit to the 3*(K / L)th bit of the information bit sequence, ..., and the Lth third sequence may include the (L-1)*(K / L)+1th bit to the Kth bit of the information bit sequence.

[0292] It is understandable that having L third sequences of the same length can reduce the computational complexity of determining L third sequences and simplify the implementation.

[0293] Based on the fourth possible design, this application provides two possible implementations:

[0294] In the first implementation, the first coded bit sequence can include L second coded bit sequences. The j-th second coded bit sequence among the L second coded bit sequences can be obtained by encoding the j-th third sequence among the L third sequences S times, where j = 1, 2, ..., L. Alternatively, it can be described that the transmitting device can determine L third sequences based on the information bit sequence, and encode the j-th third sequence among the L third sequences S times to obtain the j-th second coded bit sequence. The first coded bit sequence can include the 1st to the Lth second coded bit sequences. It is understood that the transmitting device can encode each of the L third sequences S times.

[0295] For example, such as Figure 17 As shown in (a), taking the j-th third sequence among L third sequences as an example, the input bit sequence corresponding to the first encoding j can be the j-th third sequence, the input bit sequence corresponding to the second encoding j can be the output bit sequence corresponding to the first encoding j, the input bit sequence corresponding to the third encoding j can be the output bit sequence corresponding to the second encoding j, ..., the input bit sequence corresponding to the S-th encoding j can be the output bit sequence corresponding to the (S-1)-th encoding j, and the output bit sequence corresponding to the S-th encoding j is the j-th second encoding bit sequence.

[0296] It is understandable that encoding L third sequences S times can be done by referring to the method of encoding the information bit sequence S times in the three possible designs mentioned above, which will not be elaborated here.

[0297] Accordingly, if the transmitting device encodes the information bit sequence S times based on the first possible implementation, the receiving device can correspondingly perform S decodings on the information to be decoded. That is, the first decoded bit sequence can include L second decoded bit sequences, and the j-th second decoded bit sequence among the L second decoded bit sequences can be obtained by performing S decodings on the j-th fifth sequence among the L fifth sequences. The L fifth sequences can be obtained by segmenting all bits in the information to be decoded. Alternatively, it can be described that the receiving device can segment all bits in the information to be decoded to obtain L fifth sequences, and then perform S decodings on the j-th fifth sequence among the L fifth sequences to obtain the j-th second decoded bit sequence. The first decoded bit sequence can include L second decoded bit sequences.

[0298] For example, such as Figure 17As shown in (b), for the j-th fifth sequence among L fifth sequences, the input bit sequence corresponding to the first decoding j can be the j-th fifth sequence, the input bit sequence corresponding to the second decoding j can be the output bit sequence corresponding to the first decoding j, the input bit sequence corresponding to the third decoding j can be the output bit sequence corresponding to the second decoding j, ..., the input bit sequence corresponding to the S-th decoding j can be the output bit sequence corresponding to the (S-1)-th decoding j, and the output bit sequence corresponding to the S-th decoding j is the j-th second decoding bit sequence. The first decoding bit sequence can include the first to the S-th second decoding bit sequences.

[0299] Based on the first possible implementation, L third sequences can be determined according to the information bit sequence. Each of the L third sequences is encoded S times. The length of the third sequence is less than the length of the information bit sequence. By encoding the third sequence S times, the encoding complexity can be reduced and the implementation can be simplified.

[0300] In the second possible implementation, the first coded bit sequence may include L third coded bit sequences and a fourth coded bit sequence. The j-th third coded bit sequence among the L third coded bit sequences is obtained by encoding the j-th third sequence among the L third sequences S-1 times. At least one of the S-1 encoding operations corresponds to the RM encoding method. The fourth coded bit sequence can be obtained by encoding some or all of the bits in the L third sequences. Alternatively, it can be described that the transmitting device can determine L third sequences based on the information bit sequence, encode the j-th third sequence among the L third sequences S-1 times to obtain the j-th third coded bit sequence, and further, the transmitting device can encode some or all of the bits in the L third sequences once to obtain the fourth coded bit sequence. The first coded bit sequence may include the L third coded bit sequences and the fourth coded bit sequence.

[0301] The transmitting device may first determine the fourth coded bit sequence, and then determine L third coded bit sequences; or, the transmitting device may first determine L fifth coded bit sequences, and then determine the fourth coded bit sequence; or, the transmitting device may simultaneously determine L fifth coded bit sequences and the fourth coded bit sequence, without restriction.

[0302] For example, encoding the j-th third sequence out of L third sequences S-1 times can be referred to Figure 17 In (a), the j-th third sequence among the L third sequences is encoded S times.

[0303] The fourth coded bit sequence may include one or more fifth coded bit sequences; that is, one or more fifth coded bit sequences can be concatenated to obtain the fourth coded bit sequence.

[0304] Each of the one or more fifth coded bit sequences can be obtained by encoding some or all of the bits in the u-th bit of at least two of the L third sequences.

[0305] Where u is an integer from 1 to U, and U is the maximum length of the L third sequences. For example, if the L third sequences have the same length, U can be the length of any third sequence (such as K / L); or if the L third sequences have different lengths, U can be the maximum length of the L third sequences.

[0306] For example, taking L third sequences, each with a length of K / L, K / L first sets can be determined based on the L third sequences. That is, the c-th first set among the K / L first sets may include the c-th bit from the L third sequences, where c = 1, 2, ..., K / L. The transmitting device can determine at least one first set from the K / L first sets, and encode some or all of the bits in each of the at least one first set to obtain at least one fifth coded bit sequence.

[0307] For example, the transmitting device can encode all bits in the first set of K / L first sets to obtain the first fifth coded bit sequence; encode all bits in the second set to obtain the second fifth coded bit sequence; ...; encode all bits in the K / Lth set to obtain the K / Lth fifth coded bit sequence. In this case, the fourth coded bit sequence can include the first to the K / Lth fifth coded bit sequences.

[0308] For example, the transmitting device can encode a portion of the bits in the first set of K / L first sets to obtain the first fifth coded bit sequence; encode a portion of the bits in the second set to obtain the second fifth coded bit sequence; ...; encode a portion of the bits in the K / Lth set to obtain the K / Lth fifth coded bit sequence. In this case, the fourth coded bit sequence can include the first to the K / Lth fifth coded bit sequences.

[0309] For example, the transmitting device can encode all bits in the first set of K / L first sets to obtain the first fifth encoded bit sequence; and encode a portion of the bits in the second set to obtain the second fifth encoded bit sequence. In this case, the fourth encoded bit sequence may include the first and second fifth encoded bit sequences.

[0310] Understandably, the transmitting device can encode some or all of the bits in each of the entire first sets; or it can encode some or all of the bits in each of the partial first sets. Furthermore, taking the determination of D first sets from the entire first set as an example (D being a positive integer), the transmitting device can encode all the bits in each of the D first sets; or it can determine one or more bits from each of one or more first sets to obtain one or more second sets, and then encode all the bits in each of the one or more second sets, without restriction.

[0311] In this context, the D second sets can contain the same number of bits, or at least two of the D sets can contain different numbers of bits, or the D sets can contain different numbers of bits. Furthermore, any of the D second sets can include any one or more bits from the corresponding first set. For example, assuming there are three first sets, the first first set can include the first bit of L third sequences, the second first set can include the second bit of L third sequences, and the third first set can include the third bit of L third sequences. Therefore, the first second set corresponding to the first first set can include the first bit of the first to the (L-1)th third sequences, the second second set corresponding to the second first set can include the second bit of the second to the fourth third sequences, and the third second set corresponding to the third first set can include the third bit of the first to the (L-1)th third sequences.

[0312] Correspondingly, when the transmitting device encodes the information bit sequence S times based on the second possible implementation, the receiving device can correspondingly perform S decoding on the information to be decoded. That is, the first decoded bit sequence can include L third decoded bit sequences and a fourth decoded bit sequence. The j-th third decoded bit sequence among the L third decoded bit sequences can be obtained by performing S-1 decoding on the j-th fifth sequence among the L fifth sequences. In the S-1 decoding, at least one decoding corresponds to the decoding method RM decoding. The fourth decoded bit sequence is obtained by decoding some or all of the bits in the L fifth sequences. Alternatively, it can be described that the receiving device can segment all the bits in the information to be decoded to obtain L fifth sequences, perform S-1 decoding on the j-th fifth sequence among the L fifth sequences to obtain the j-th third decoded bit sequence, and further, the receiving device can decode some or all of the bits in the L fifth sequences to obtain the fourth decoded bit sequence. The first decoded bit sequence can include L third decoded bit sequences and a fourth decoded bit sequence.

[0313] The receiving device may first determine the L third decoding bit sequences and then determine the fourth decoding bit sequence; or, the receiving device may first determine the fourth decoding bit sequence and then determine the L third decoding bit sequences; or, the receiving device may simultaneously determine the L third decoding bit sequences and the fourth decoding bit sequence, without restriction.

[0314] For example, decoding the j-th fifth sequence out of L fifth sequences in S-1 steps can be referred to Figure 17 In (a), the j-th fifth sequence among the L fifth sequences is decoded S times.

[0315] The fourth decoded bit sequence includes one or more fifth decoded bit sequences. Each fifth decoded bit sequence is obtained by decoding some or all of the u-th bits of at least two of the L fifth sequences, where u is an integer from 1 to U, and U is the maximum length of the L fifth sequences.

[0316] Based on the second possible implementation, this application provides a possible embodiment, taking S as 2 as an example, such as... Figure 18 As shown, the transmitting device can segment the information bit sequence to obtain L third sequences, each of length K / L. Each third sequence can be RM encoded to obtain L third encoded bit sequences. The w-th bit in the L third sequences can be SPC encoded to obtain a fourth encoded bit sequence. Then, the first encoded bit sequence can be obtained by concatenating the L third encoded bit sequences and the fourth encoded bit sequence.

[0317] Based on the second possible implementation, L third sequences can be determined according to the information bit sequence. Each of the L third sequences is encoded S-1 times. The length of the third sequence is less than the length of the information bit sequence. By encoding the third sequence S-1 times, the encoding complexity can be reduced and the implementation can be simplified. In addition, by encoding some or all of the bits in the L third sequences once, the encoding gain can be increased, thereby improving the encoding performance.

[0318] Based on the fourth possible design, each of the L third sequences can be encoded S times or S-1 times. The length of the third sequence is less than the length of the information bit sequence, which can reduce the encoding complexity and simplify the implementation.

[0319] Based on the description of the above communication method, the receiving device determines the length of the input bit sequence and the length of the output bit sequence corresponding to the (S-s+1)th decoding, which can be referred to the description of the sending device determining the length of the input bit sequence and the length of the output bit sequence corresponding to the sth encoding; in addition, the receiving device determines the code rate corresponding to the (S-s+1)th decoding, which can be referred to the sending device determining the code rate corresponding to the sth encoding, and will not be repeated in this application.

[0320] The various embodiments of this application can be implemented independently or in combination, without limitation. Unless otherwise specified or in conflict of logic, the terminology and / or descriptions between the different embodiments provided in this application are consistent and can be referenced mutually. Technical features in different embodiments can be combined to form new embodiments based on their inherent logical relationships.

[0321] It is understood that in the embodiments of this application, the executing entity may perform some or all of the steps in the embodiments of this application. These steps or operations are merely examples, and the embodiments of this application may also perform other operations or variations thereof. Furthermore, the various steps may be executed in different orders as presented in the embodiments of this application, and it is not necessarily necessary to execute all the operations in the embodiments of this application.

[0322] The foregoing primarily describes the solutions provided in this application from the perspective of device-to-device interaction. It is understood that each device, in order to achieve the aforementioned functions, includes corresponding hardware structures and / or software modules for executing each function. Those skilled in the art will readily recognize that, based on the algorithmic steps of the examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0323] This application embodiment can divide each device into functional modules according to the above method example. For example, each function can be divided into a separate functional module, or two or more functions can be integrated into one processing module. The integrated module can be implemented in hardware or as a software functional module. The module division in this application embodiment is illustrative and only represents one logical functional division. In actual implementation, there may be other division methods.

[0324] When dividing each function into modules according to its corresponding function. Figure 19 A transmitting device 190 is shown, which can perform the above-described... Figure 7 The actions performed by the sending device in the method shown, and all related content of each step involved in the above method embodiments, can be referenced from the functional description of the corresponding functional module. The technical effects that can be obtained can be referred to the above method embodiments, and will not be repeated here.

[0325] The transmitting device 190 may include a transceiver module 1901 and a processing module 1902. Exemplarily, the transmitting device 190 may be a communication device, or a chip or other combination device or component having the aforementioned transmitting device functions applied in a communication device. When the transmitting device 190 is a communication device, the transceiver module 1901 may be a transceiver, which may include an antenna and radio frequency circuits, etc.; the processing module 1902 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the transmitting device 190 is a component having the aforementioned transmitting device functions, the transceiver module 1901 may be a radio frequency unit; the processing module 1902 may be a processor (or processing circuit), such as a baseband processor. When the transmitting device 190 is a chip system, the transceiver module 1901 may be an input / output interface of a chip (e.g., a baseband chip); the processing module 1902 may be a processor (or processing circuit) of the chip system, and may include one or more central processing units. It should be understood that the transceiver module 1901 in the embodiments of this application can be implemented by a transceiver or transceiver-related circuit components; the processing module 1902 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

[0326] For example, transceiver module 1901 can be used to perform... Figure 7 In the illustrated embodiment, all transmit and receive operations performed by the transmitting device, and / or other processes used to support the techniques described herein; the processing module 1902 can be used to perform Figure 7The embodiments shown include all operations performed by the transmitting device other than the sending and receiving operations, and / or other processes used to support the techniques described herein.

[0327] Figure 20 A receiving device 200 is shown, which can perform the above-described... Figure 7 The actions performed by the receiving device in the method shown, and all related content of each step involved in the above method embodiments, can be referenced from the functional description of the corresponding functional module. The technical effects that can be obtained can be referred to the above method embodiments, and will not be repeated here.

[0328] The receiving device 200 may include a transceiver module 2001 and a processing module 2002. For example, the receiving device 200 may be a communication device, or a chip or other combination device or component having the aforementioned receiving device functions. When the receiving device 200 is a communication device, the transceiver module 2001 may be a transceiver, which may include an antenna and radio frequency circuits; the processing module 2002 may be a processor (or processing circuit), such as a baseband processor, which may include one or more CPUs. When the receiving device 200 is a component having the aforementioned receiving device functions, the transceiver module 2001 may be a radio frequency unit; the processing module 2002 may be a processor (or processing circuit), such as a baseband processor. When the receiving device 200 is a chip system, the transceiver module 2001 may be an input / output interface of a chip (e.g., a baseband chip); the processing module 2002 may be a processor (or processing circuit) of the chip system, and may include one or more central processing units. The transceiver module 2001 in this embodiment can be implemented by a transceiver or transceiver-related circuit components; the processing module 2002 can be implemented by a processor or processor-related circuit components (or, referred to as processing circuit).

[0329] For example, the transceiver module 2001 can be used to execute... Figure 7 In the illustrated embodiment, all transmit and receive operations performed by the receiving device, and / or other processes used to support the techniques described herein; the processing module 2002 can be used to perform Figure 7 The embodiments shown include all operations performed by the receiving device other than the transmit and receive operations, and / or other processes used to support the techniques described herein.

[0330] As another feasible approach Figure 19 The transceiver module 1901 can be replaced by a transceiver unit, which can integrate the functions of the transceiver module 1901; the processing module 1902 can be replaced by a processor, which can integrate the functions of the processing module 1902. Furthermore, Figure 19The transmitting device 190 shown may also include a memory. Alternatively, Figure 20 The transceiver module 2001 can be replaced by a transceiver unit, which can integrate the functions of the transceiver module 2001; the processing module 2002 can be replaced by a processor, which can integrate the functions of the processing module 2002. Furthermore, Figure 20 The receiver device 200 shown may also include a memory.

[0331] Alternatively, when the processing module 1902 is replaced by a processor and the transceiver module 1901 is replaced by a transceiver, the transmitting end device 190 involved in the embodiments of this application can also be... Figure 21 The communication device 210 shown. Alternatively, when the processing module 2002 is replaced by a processor and the transceiver module 2001 is replaced by a transceiver, the receiving end device 200 involved in the embodiments of this application can also be Figure 21 The communication device 210 shown.

[0332] The processor can be logic circuit 2101, and the transceiver can be interface circuit 2102. Furthermore, Figure 21 The communication device 210 shown may further include a memory 2103. The memory 2103 may exist independently of the processor or may be integrated with the processor. The memory 2103 may be used to store instructions, program code, or some data. The memory 2103 may be located inside or outside the communication device 210, without limitation.

[0333] This application also provides a communication device, such as... Figure 22 As shown, this communication device can be applied to the above-mentioned... Figure 7 In any of the embodiments shown in the method, such as Figure 22 As shown, the communication device includes a processing module and a transceiver module. The processing module may be one or more processors, and the transceiver module may be a transceiver or a communication interface. This communication device can be used to implement the sending or receiving device involved in any of the above method embodiments, or to implement the functions of the device involved in any of the above method embodiments. The device or device function may be a network component in a hardware device, a software function running on dedicated hardware, or a virtualization function instantiated on a platform (e.g., a cloud platform). Optionally, the communication device may further include a storage module for storing the program code and data of the communication device.

[0334] In one example, the communication device acts as a transmitting device or is a chip applied in a transmitting device, and performs the steps executed by the transmitting device in the above method embodiments. The transceiver module is used for specific execution. Figure 7The sending and / or receiving actions performed by the sending device in any of the embodiments herein may include, for example, other processes that support the sending device in performing the techniques described herein. The processing module may be used to support the communication device in performing the processing actions in the above method embodiments, for example, supporting the sending device in performing other processes of the techniques described herein.

[0335] To achieve the above functions, the chip of this application may include hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art will readily recognize that, based on the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein, this application can be implemented in hardware or a combination of hardware and computer software. Whether a function is executed in hardware or by computer software driving hardware depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of this application.

[0336] In one possible implementation, when the transmitting or receiving device is a chip, the transceiver module can be a communication interface, pins, or circuits. The communication interface can be used to input data to be processed to the processor and can output the processor's processing results. Specifically, the communication interface can be a general purpose input / output (GPIO) interface, which can connect to multiple peripheral devices (such as LCD displays, cameras, radio frequency (RF) modules, antennas, etc.). The communication interface is connected to the processor via a bus.

[0337] The processing module can be a processor, which can execute computer execution instructions stored in the storage module to cause the chip to perform... Figure 7The method involved in any of the embodiments shown is further described below. The processor may include a controller, an arithmetic logic unit (ALU), and registers. For example, the controller is primarily responsible for instruction decoding and issuing control signals for the operations corresponding to the instructions. The ALU is primarily responsible for performing fixed-point or floating-point arithmetic operations, shift operations, and logical operations, and can also perform address operations and translations. The registers are primarily responsible for storing register operands and intermediate operation results temporarily stored during instruction execution. In specific implementations, the processor's hardware architecture can be an ASIC architecture, a microprocessor without interlocked piped stages architecture (MIPS), an advanced reduced instruction set machine (RISC) machine (ARM) architecture, or a network processor (NP) architecture, etc. The processor can be single-core or multi-core. The storage module can be an in-chip storage module, such as a register or cache. The storage module can also be an external storage module, such as ROM or other types of static storage devices that can store static information and instructions, RAM, etc.

[0338] This application also provides an encoding processing unit chip architecture and a decoding processing unit chip architecture. The encoding processing unit chip architecture can be as follows: Figure 23 As shown, the decoding processing unit chip architecture can be as follows: Figure 24 As shown, the chip architecture of either the encoding or decoding processing unit can include a computing unit, a storage unit, and a control unit. The computing unit is responsible for processing the logical operations of the encoder and decoder, the storage unit is responsible for storing the data during the computing process, and the control unit is responsible for scheduling and controlling the computing unit and storage resources. Figure 23 The computational unit can be used to add CRC check bits, RM encoding, and rate matching; for specific implementation details, please refer to the description in this application. Figure 7 The communication method shown; Figure 24 The computational unit in the document can be used to implement rate matching, RM decoding, and CRC verification. For specific implementation details, please refer to the documentation in this application. Figure 7 The passage shown

[0339] This application also provides a computer program product that, when executed by a computer, can implement the functions of any of the above method embodiments.

[0340] This application also provides a computer program that, when executed by a computer, can implement the functions of any of the above method embodiments.

[0341] This application also provides a computer-readable storage medium. All or part of the processes in the above method embodiments can be implemented by a computer program instructing related hardware. This program can be stored in the computer-readable storage medium, and when executed, it can include the processes of the above method embodiments. The computer-readable storage medium can be an internal storage unit of the terminal (including a data sending end and / or a data receiving end) of any of the foregoing embodiments, such as the terminal's hard disk or memory. The computer-readable storage medium can also be an external storage device of the terminal, such as a plug-in hard disk, smart media card (SMC), secure digital (SD) card, flash card, etc., equipped on the terminal. Further, the computer-readable storage medium can include both the terminal's internal storage unit and external storage devices. The computer-readable storage medium is used to store the computer program and other programs and data required by the terminal. The computer-readable storage medium can also be used to temporarily store data that has been output or will be output.

[0342] The terms "first" and "second," etc., used in the specification, claims, and drawings of this application are used to distinguish different objects, not to describe a specific order. "First" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Therefore, a feature defined with "first" and "second" may explicitly or implicitly include one or more of that feature. In the description of this embodiment, unless otherwise stated, "a plurality of" means two or more.

[0343] Furthermore, the terms “comprising” and “having”, and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the steps or units listed, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus.

[0344] It is understood that in this application, "at least one (item)" refers to one or more. "More than one" refers to two or more. "At least two (items)" refers to two or three or more. "And / or" is used to describe the relationship between related objects, indicating that there can be three relationships. For example, "A and / or B" can mean: only A exists, only B exists, and both A and B exist simultaneously, where A and B can be singular or plural. The character " / " generally indicates that the related objects before and after are in an "or" relationship. "At least one (item) of the following" or similar expressions refer to any combination of these items, including any combination of single or plural items. For example, at least one (item) of a, b, or c can mean: a, b, c, "a and b", "a and c", "b and c", or "a and b and c", where a, b, and c can be single or multiple. Both "...when" and "if" indicate that a corresponding action will be taken under certain objective circumstances. They are not time limits, nor do they require a judgment action to be taken when the action is taken, nor do they imply any other limitations.

[0345] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of terms such as "exemplary" or "for example" is intended to present the relevant concepts in a specific manner to facilitate understanding.

[0346] In this application, "sending information to...(terminal device)" can be understood as the destination of the information being the terminal device. This can include sending information directly or indirectly to the terminal device. "Receiving information from...(terminal device)" can be understood as the source of the information being the terminal device, and can include receiving information directly or indirectly from the terminal device. Information may undergo necessary processing between the source and destination, such as format changes, but the destination can understand the valid information from the source.

[0347] Through the above description of the embodiments, those skilled in the art can clearly understand that, for the sake of convenience and brevity, only the division of the above functional modules is used as an example. In actual applications, the above functions can be assigned to different functional modules as needed, that is, the internal structure of the device can be divided into different functional modules to complete all or part of the functions described above.

[0348] In the several embodiments provided in this application, the disclosed apparatus and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the displayed or discussed mutual couplings, direct couplings, or communication connections may be through some interfaces; indirect couplings or communication connections between devices or units may be electrical, mechanical, or other forms.

[0349] The units described as separate components may or may not be physically separate. A component shown as a unit can be one or more physical units; that is, it can be located in one place or distributed in multiple different locations. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0350] Furthermore, the functional units in the various embodiments of this application can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0351] If the integrated unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a readable storage medium. Based on this understanding, the technical solution of this application embodiment, or all or part of the technical solution, can be embodied in the form of a software product. This software product is stored in a storage medium and includes several instructions to cause a device (which may be a microcontroller, chip, etc.) or processor to execute all or part of the steps of the methods described in the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, ROM, RAM, magnetic disks, or optical disks.

Claims

1. A communication method, characterized in that, include: Obtain the information bit sequence; Based on the information bit sequence, S encodings are performed to obtain the first encoded bit sequence; wherein, the encoding method corresponding to the i-th encoding or the (i+1)-th encoding in the S encodings is Reed-Muller RM encoding; The input bit sequence corresponding to the (i+1)th encoding is determined based on some or all of the bits in the output bit sequence corresponding to the i-th encoding. The input bit sequence corresponding to the first encoding in the S encoding includes some or all of the bits in the information bit sequence, where i is an integer from 1 to S-1, and S is an integer greater than 1.

2. The method according to claim 1, characterized in that, The encoding methods corresponding to the S-times are all RM encoding; or In the S-encoding, at least two encodings correspond to different encoding methods.

3. The method according to claim 1 or 2, characterized in that, The encoding methods corresponding to the S-encoding, other than the RM encoding, are one or more of the following: convolutional encoding, parity check PC encoding, single PC encoding, cyclic redundancy check CRC encoding, Booz-Joher-Hokvenheim BCH encoding, polar encoding, low-density parity check LDPC encoding, or Reed-Solomon RS encoding.

4. The method according to any one of claims 1-3, characterized in that, The encoding method corresponding to the first encoding is RM encoding; or The encoding method corresponding to the Sth encoding is RM encoding.

5. The method according to any one of claims 1-4, characterized in that, The input bit sequence corresponding to the first encoding is the first first sequence among the S first sequences, and the input bit sequence corresponding to the (i+1)th encoding includes the output bit sequence corresponding to the ith encoding and the (i+1)th first sequence among the S first sequences; The S first sequences are determined based on the information bit sequence, and the first encoded bit sequence is the output bit sequence corresponding to the Sth encoding.

6. The method according to claim 5, characterized in that, The S first sequences are determined based on the information bit sequence, including: The S first sequences are obtained by segmenting the information bit sequence; or The S first sequences are determined according to the first encoding method and the information bit sequence; wherein the first encoding method is any one of the following: convolutional encoding, PC encoding, single PC encoding, CRC encoding, BCH encoding, polar encoding, LDPC encoding, RS encoding, or RM encoding.

7. The method according to claim 6, characterized in that, The S first sequences are determined according to the first encoding method and the information bit sequence, including: The S first sequences are obtained by segmenting the second sequence; wherein the second sequence is obtained by encoding the information bit order using the first encoding method.

8. The method according to any one of claims 1-4, characterized in that, The input bit sequence corresponding to the first encoding is the information bit sequence, and the input bit sequence corresponding to the (i+1)th encoding includes a portion of the bits in the output bit sequence corresponding to the i-th encoding. The first encoded bit sequence includes the output bit sequence corresponding to the first encoding to the output bit sequence corresponding to the S-th encoding.

9. The method according to any one of claims 1-4, characterized in that, The input bit sequence corresponding to the first encoding is the information bit sequence; The input bit sequence corresponding to the (i+1)th encoding includes the output bit sequence corresponding to the ith encoding, or the input bit sequence corresponding to the (i+1)th encoding includes the output bit sequence corresponding to the ith encoding and padding bits; Wherein, the first encoded bit sequence is the output bit sequence corresponding to the S-th encoding.

10. The method according to any one of claims 5-9, characterized in that, The value of S is 2. The encoding method corresponding to the first encoding is any one of the following: convolutional encoding, PC encoding, single PC encoding, CRC encoding, BCH encoding, polar encoding, LDPC encoding, or RS encoding, and the encoding method corresponding to the second encoding is RM encoding.

11. The method according to claim 10, characterized in that, The code rate corresponding to the first encoding is greater than or equal to the length of the information bit sequence and 2. m The ratio, where m is the code length parameter corresponding to the RM encoding.

12. The method according to any one of claims 1-4, characterized in that, The first encoded bit sequence includes L second encoded bit sequences; wherein, the j-th second encoded bit sequence among the L second encoded bit sequences is obtained by encoding the j-th third sequence among the L third sequences S times, and the L third sequences are determined according to the information bit sequence, j = 1, 2, ..., L, where L is an integer greater than 1.

13. The method according to any one of claims 1-4, characterized in that, The first coded bit sequence includes L third coded bit sequences and a fourth coded bit sequence; wherein, the j-th third coded bit sequence among the L third coded bit sequences is obtained by encoding the j-th third sequence among the L third sequences S-1 times, and at least one of the S-1 encodings corresponds to the encoding method RM encoding, and the L third sequences are determined according to the information bit sequence, j = 1, 2, ..., L, where L is an integer greater than 1; The fourth encoded bit sequence is obtained by encoding some or all of the bits in the L third sequences.

14. The method according to claim 13, characterized in that, The fourth encoded bit sequence is obtained by encoding some or all of the bits in the L third sequences, including: The fourth coded bit sequence includes one or more fifth coded bit sequences; wherein each of the one or more fifth coded bit sequences is obtained by encoding some or all of the u-th bits of at least two of the L third sequences, where u is an integer from 1 to U, and U is the maximum value of the length of the L third sequences.

15. A communication method, characterized in that, include: Receive information to be decoded; wherein the information to be decoded corresponds to an information bit sequence; Based on the information to be decoded, S decoding operations are performed to obtain the first decoded bit sequence; wherein, the decoding method corresponding to the i-th or (i+1)-th decoding in the S decoding operations is Reed-Muller RM decoding, the input bit sequence corresponding to the (i+1)-th decoding operations is determined based on some or all of the bits in the output bit sequence corresponding to the i-th decoding operations, and the input bit sequence corresponding to the first decoding in the S decoding operations includes some or all of the bits in the information to be decoded, where i is an integer from 1 to S-1, and S is an integer greater than 1.

16. The method according to claim 15, characterized in that, The decoding methods corresponding to the S-times of decoding are all RM decoding; or In the S-times of decoding, at least two decoding operations have different decoding methods.

17. The method according to claim 15 or 16, characterized in that, The decoding methods corresponding to the S-time decoding, other than the RM decoding, are one or more of the following: convolutional decoding, parity check PC decoding, single PC decoding, cyclic redundancy check CRC decoding, Bosch-Joherry-Hockwinheim BCH decoding, polarization decoding, low-density parity check LDPC decoding, or Reed-Solomon RS decoding.

18. The method according to any one of claims 15-17, characterized in that, The decoding method corresponding to the first decoding is RM decoding; or The decoding method corresponding to the S-th decoding is RM decoding.

19. The method according to any one of claims 15-18, characterized in that, The input bit sequence corresponding to the first decoding includes all bits in the information to be decoded, and the input bit sequence corresponding to the (i+1)th decoding includes all bits in the output bit sequence corresponding to the ith decoding except for the ith fourth sequence. Wherein, the first decoded bit sequence includes the first fourth sequence to the Sth fourth sequence; or, the first decoded bit sequence is obtained by decoding the first fourth sequence to the Sth fourth sequence.

20. The method according to any one of claims 15-18, characterized in that, The input bit sequence corresponding to the first decoding includes the first fifth sequence among the S fifth sequences, and the input bit sequence corresponding to the (i+1)th decoding includes the output bit sequence corresponding to the ith decoding and the (i+1)th fifth sequence among the S fifth sequences; The fifth sequence is obtained by segmenting all bits in the information to be decoded; the first decoded bit sequence is the output bit sequence corresponding to the Sth decoding.

21. The method according to any one of claims 15-18, characterized in that, The input bit sequence corresponding to the first decoding includes all bits in the information to be decoded; The input bit sequence corresponding to the i+1th decoding includes the output bit sequence corresponding to the i-th decoding, or the input bit sequence corresponding to the i+1th decoding includes the bits in the output bit sequence corresponding to the i-th decoding except for the padding bits; Wherein, the first decoded bit sequence is the output bit sequence corresponding to the S-th decode.

22. The method according to any one of claims 19-21, characterized in that, The value of S is 2. The first decoding corresponds to RM decoding, and the second decoding corresponds to one or more of the following: convolutional decoding, PC decoding, single PC decoding, CRC decoding, BCH decoding, polarization decoding, LDPC decoding, or RS decoding.

23. The method according to claim 22, characterized in that, The code rate corresponding to the second decoding is greater than or equal to the length of the output bit sequence corresponding to the first decoding and 2. m The ratio of , where m is the code length parameter corresponding to the RM decoding.

24. The method according to any one of claims 15-18, characterized in that, The first decoded bit sequence includes L second decoded bit sequences; wherein, the j-th second decoded bit sequence among the L second decoded bit sequences is obtained by decoding the j-th fifth sequence among the L fifth sequences S times, and the L fifth sequences are obtained by segmenting all bits in the information to be decoded, j = 1, 2, ..., L.

25. The method according to any one of claims 15-18, characterized in that, The first decoded bit sequence includes L third decoded bit sequences and a fourth decoded bit sequence; wherein, the j-th third decoded bit sequence among the L third decoded bit sequences is obtained by performing S-1 decoding on the j-th fifth sequence among the L fifth sequences, and at least one of the S-1 decoding operations corresponds to RM decoding; the L fifth sequences are obtained by segmenting the bits in the information to be decoded, excluding the fourth decoded bit sequence, where j = 1, 2, ..., L; The fourth decoded bit sequence is obtained by decoding some or all of the bits in the L fifth sequences.

26. The method according to claim 25, characterized in that, The fourth decoded bit sequence is obtained by decoding some or all of the bits in the L fifth sequences, including: The fourth decoded bit sequence includes one or more fifth decoded bit sequences. Each of the one or more fifth decoded bit sequences is obtained by decoding some or all of the u-th bits of at least two of the L fifth sequences, where u is an integer from 1 to U, and U is the maximum value of the length of the L fifth sequences.

27. A communication device, characterized in that, The communication device includes a processor; the processor is configured to cause the communication method as described in any one of claims 1-14 to be executed, or to cause the communication method as described in any one of claims 15-26 to be executed, by means of logic circuits and / or by running a computer program or instructions.

28. A communication device, characterized in that, The communication device includes an interface circuit and a logic circuit; the interface circuit is used to input and / or output information; the logic circuit is used to execute the communication method as described in any one of claims 1-14, or to execute the communication method as described in any one of claims 15-26, and to process and / or generate the information based on the information.

29. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer instructions or programs that, when executed on a computer, cause the communication method as described in any one of claims 1-14 to be executed, or cause the communication method as described in any one of claims 15-26 to be executed.

30. A computer program product, characterized in that, The computer program product includes computer instructions; when some or all of the computer instructions are executed on a computer, they cause the communication method as described in any one of claims 1-14 to be executed, or cause the communication method as described in any one of claims 15-26 to be executed.

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