Radio frequency chip anti-interference method and system based on channel occupancy map
Patent Information
- Application Number
- CN202611139027.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-29
- Publication Date
- 2026-10-16
AI Technical Summary
[0004]现有技术能够完成干扰路径检测或者已知杂散抵消,但对于具有差分时钟传输段和两个以上功能抽头的射频芯片,仍难以在保持各功能时钟边沿序列和正常通信状态的同时,确定占用峰值对应的集中耦合位置或分布耦合区段
本发明通过双向校准步骤分别建立第一端单向注入状态和第二端单向注入状态,并利用各功能抽头的方向对应延时补偿,使两个单向注入状态下的功能时钟边沿序列保持一致。两个单向注入状态采用相反的时钟传播方向,但各功能电路接收到的功能时钟边沿保持不变,因此,两个单向注入状态之间的占用峰值复相量差异能够更准确地反映差分时钟传输段内部传播方向和干扰耦合位置产生的影响,减少功能时钟偏移对测量结果造成的混入。
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Abstract
Description
Technical Field
[0001] This invention relates to the fields of radio frequency integrated circuits, wireless communication transmission, clock synchronization control and electromagnetic interference suppression, and in particular to a radio frequency chip anti-interference method and system based on channel occupancy map. Background Technology
[0002] As the integration of digital circuits, clock networks, and RF receiving links in RF chips increases, digital clocks and their harmonics can easily enter the RF receiving link through internal electromagnetic coupling, power supply network coupling, or substrate coupling, forming occupancy peaks in the operating channel, resulting in decreased receiving sensitivity, reduced signal-to-noise ratio, or increased communication errors.
[0003] US Patent 9459317B2 discloses a mixed-mode integrated circuit and an electromagnetic compatibility (EMC) testing method. This method detects current paths that may cause EMC problems by providing a controllable test clock signal to analog or digital sub-circuits. The technique primarily involves changing the clock state of the sub-circuit during testing and detecting interference paths. US Patent 9160465B2 discloses a spurious cancellation technique for radio frequency receivers. This technique identifies digital clock spurs that may fall into a selected channel, generates corresponding cancellation signals, and subtracts the cancellation signals during digital processing.
[0004] Existing technologies can detect interference paths or cancel known spurious emissions, but for RF chips with differential clock transmission sections and two or more functional taps, it remains difficult to determine the concentrated coupling location or distributed coupling section corresponding to the occupied peak while maintaining the clock edge sequence of each function and the normal communication state. End reflections, propagation phase changes, and variations in operating temperature and power supply voltage can also cause deviations in interference localization results and spurious emission suppression parameters, making it difficult to maintain stable anti-interference performance. Summary of the Invention
[0005] The purpose of this invention is to provide a radio frequency chip anti-interference method and system based on channel occupancy map to address the shortcomings of existing technologies. The technical problem to be solved is: how to repeatedly identify the coupling position of the occupancy peak caused by the differential clock transmission segment without changing the normal function clock edge sequence of each functional tap of the radio frequency chip, and to implement stable suppression of concentrated coupling positions or distributed coupling segments based on the identification results, while reducing the impact of end reflection, propagation phase change and operating parameter drift on the identification results and suppression effect, so that the target communication signal quality still meets the link maintenance conditions after the occupancy peak is reduced.
[0006] The present invention specifically adopts the following scheme: an anti-interference method for radio frequency chips based on channel occupancy maps, executed by a radio frequency chip control processor, including the following steps: Bidirectional calibration steps: Set the first or second end of the same differential clock transmission segment as the injection end, connect the other end to the matching terminal, and compensate for the delay corresponding to the direction of each functional tap to make the clock edge sequence of each function consistent in the two injection states. Coordinate identification steps: In two injection states, collect the complex phase of the same occupancy peak at more than two clock harmonics respectively. Determine the coupling coordinates based on the relationship between the phase difference between states corresponding to each clock harmonic and the relative harmonic frequency and the propagation constant of the differential clock transmission segment. Write the coupling coordinates into the directional response edge of the channel occupancy map. Zero-point synthesis step: control the first and second ends to inject simultaneously, adjust the phase difference and amplitude ratio of the injected signals at both ends, so that the synthesized clock current of the differential clock transmission segment at the coupling coordinate is lower than the zero-point threshold, and maintain the consistency of the clock edge sequence of each function through local delay compensation of each functional tap. Zero-point locking step: Apply a positive phase probe and a negative phase probe around the current phase difference of the injected signals at both ends, and adjust the current phase difference according to the difference in amplitude of the occupied peak complex phase corresponding to the two phase probes until the amplitude difference is lower than the locking threshold; Closed-loop verification steps: When the amplitude of the occupied peak complex phase meets the suppression condition and the quality of the target communication signal meets the link maintenance condition, retain the injected parameters at both ends; otherwise, restore the single-end injected parameters.
[0007] In a further embodiment of the present invention, the bidirectional calibration step further includes the following sub-steps: Edge acquisition sub-step: Acquire the edge moments of the output clock of each functional tap relative to the same reference clock in the first-end injection state and the second-end injection state respectively; Compensation selection sub-step: For each functional tap, select the two directional delay codes from the delay codes of the corresponding programmable delay unit that minimize the time difference between the corresponding edges of the two injected states; Consistency verification sub-step: When the edge time difference of each functional tap is lower than the edge consistency threshold, and the clock cycle difference of the two injection states is lower than the cycle consistency threshold, the delay compensation corresponding to the confirmation direction is completed.
[0008] In a further embodiment of the present invention, the coordinate identification step further includes the following sub-steps: Phase expansion sub-step: Perform phase expansion on the phase difference between states corresponding to each clock harmonic in ascending order of harmonic frequency; Coordinate generation sub-step: Generate candidate coupled coordinates based on the expanded phase difference, frequency interval, and propagation constant corresponding to any two clock harmonics; Coprime disambiguation steps: Select three or more clock harmonics of coprime order, and determine the candidate coupling coordinates that simultaneously satisfy the phase difference of each harmonic expansion as the coupling coordinates.
[0009] In a further embodiment of the present invention, the coordinate identification step further includes the following sub-steps: Reflection calibration sub-step: Send calibration clock signals to the first and second ends respectively, and measure the complex reflection coefficients at both ends of the differential clock transmission segment; Phase correction sub-step: Based on the two complex reflection coefficients and the length of the differential clock transmission segment, subtract the round-trip reflection phase of each clock harmonic; Coordinate update sub-step: Re-determine the coupled coordinates based on the phase difference between states after deducting the round-trip reflection phase.
[0010] In a further embodiment of the present invention, when the linear fitting residual of the phase difference between the states of each clock harmonic relative to the harmonic frequency reaches the point source fitting threshold, the coordinate identification step further includes the following sub-steps: Segmentation sub-step: Divide the differential clock transmission segment into two or more candidate coupling segments according to the functional tap position of the differential clock transmission segment; Segment fitting sub-steps: Determine the directional response basis vectors corresponding to each candidate coupling segment, and select the target combination from the combination of directional response basis vectors with the smallest number of combinations whose difference with the complex phase of each clock harmonic is lower than the segment fitting threshold. Distribution mapping sub-step: Write the candidate coupling segments and corresponding complex weights corresponding to the target combination into the distribution coupling edges of the channel occupancy graph.
[0011] Specifically: When interference enters the RF chip's receiving link through a concentrated location in the differential clock transmission segment, the phase difference between states changes linearly with the harmonic frequency. When interference enters the RF chip's receiving link simultaneously through two or more locations, the complex coupling components corresponding to different locations superimpose, and the linear fitting residual of the phase difference between states relative to the harmonic frequency increases.
[0012] In the segmentation sub-step, the coordinate identification module segments the data according to the connection positions of each functional tap on the differential clock transmission segment. A candidate coupling segment is formed between the first injection terminal and the first functional tap, a candidate coupling segment is formed between adjacent functional taps, and a candidate coupling segment is formed between the last functional tap and the second injection terminal. The center position of each candidate coupling segment can be used as the initial target coupling coordinates.
[0013] In the segment fitting sub-step, the coordinate identification module establishes a direction response basis vector for each candidate coupling segment. When establishing the direction response basis vector, a calibration signal of known amplitude can be applied to the corresponding candidate coupling segment under chip testing conditions. Then, the occupied peak complex phasor corresponding to each clock harmonic under the first-end unidirectional injection state and the second-end unidirectional injection state are collected respectively. The complex phasor response corresponding to a unit amplitude of the calibration signal constitutes the direction response basis vector.
[0014] When a calibration signal cannot be applied directly, the theoretical direction response basis vector can be calculated based on the propagation constant of the differential clock transmission section, the center position of the candidate coupling section, and the propagation distance of the two injection directions.
[0015] The coordinate identification module first uses a candidate coupling segment for fitting. If a single candidate coupling segment cannot meet the segment fitting threshold, the coordinate identification module uses two candidate coupling segments for combined fitting, and continues the calculation in ascending order of the number of candidate coupling segments. The combination that meets the segment fitting threshold and contains the fewest candidate coupling segments is determined as the target combination.
[0016] In the distributed mapping sub-step, the distributed coupling edge record of the channel occupancy map includes the occupancy peak identifier, candidate coupling segment identifier, target coupling coordinates, complex weights, corresponding clock harmonic frequencies, and segment fitting errors. The complex weight amplitude represents the contribution intensity of the corresponding candidate coupling segment, and the complex weight phase represents the phase of the interference component generated by the corresponding candidate coupling segment.
[0017] In a further embodiment of the present invention, the zero-point synthesis step further includes the following sub-steps: Multi-point selection sub-step: Based on the complex weights in the distributed coupling edge, select two or more target coupling coordinates whose complex weight amplitudes reach the weight threshold; Segmented driving sub-step: By using a programmable phase driving unit set between adjacent functional taps, the double-ended injection phase difference and amplitude ratio of each transmission segment are adjusted respectively; Multi-zero synthesizer step: Make the synthesized clock current corresponding to each target coupling coordinate lower than the corresponding zero threshold, and make the clock edge difference of each functional tap lower than the edge holding threshold.
[0018] Specifically: In the multi-point selection sub-step, the zero-point control module reads the complex weights corresponding to the coupling coordinates of each target in the distributed coupling edge. The zero-point control module compares the magnitude of the complex weights with the weight threshold, and adds the coupling coordinates of targets whose complex weight magnitudes reach the weight threshold to the multi-point control set.
[0019] The weight threshold can be set to 10% to 30% of the maximum complex weight amplitude. Target coupling coordinates with complex weight amplitudes lower than the weight threshold can be temporarily excluded from the first zero-point synthesis. After the first zero-point synthesis is completed, if the occupied peak complex phase still does not meet the suppression condition, the zero-point control module can reduce the weight threshold and increase the target coupling coordinates.
[0020] The segmented phase modules control programmable phase drive units located between adjacent functional taps. Each programmable phase drive unit has a programmable phase code and a programmable amplitude code. The programmable phase code is used to adjust the clock phase in the corresponding transmission segment, and the programmable amplitude code is used to adjust the clock drive amplitude in the corresponding transmission segment.
[0021] At the start of the segmented driving sub-step, the zero-point control module determines the programmable phase driving unit associated with each target's coupling coordinate based on the candidate coupling segment where each target's coupling coordinate is located. The zero-point control module first fixes the control code of other programmable phase driving units, then adjusts one programmable phase driving unit at a time, and collects the complex phase change of the occupied peak value corresponding to each target's coupling coordinate.
[0022] When adjusting a programmable phase drive unit reduces the amplitude of the peak complex phase of a target without causing the amplitude of the peak complex phase of other targets to exceed the protection threshold, the zero-point control module retains the current adjustment result. When adjusting a programmable phase drive unit causes the amplitude of the peak complex phase of any other target to exceed the protection threshold, the zero-point control module cancels the current adjustment result and reduces the adjustment step size.
[0023] The multi-zero synthesis sub-step uses the fact that the synthesized clock current corresponding to each target coupling coordinate is lower than the corresponding zero-point threshold as the convergence condition. The zero-point control module can cyclically adjust each programmable phase drive unit until all target coupling coordinates meet the zero-point threshold, or reach the preset maximum number of cycles.
[0024] After each round of segmented driving is completed, the tap compensation module re-examines the functional clock edge sequence of each functional tap. When the edge time difference of any functional tap reaches the edge hold threshold, the tap compensation module adjusts the local delay compensation of the corresponding functional tap. After completing the local delay compensation, the zero-point control module re-acquires the occupied peak complex phase quantity to prevent changes in the functional clock edge from affecting the zero-point synthesis result.
[0025] In a further embodiment of the present invention, the zero-point locking step further includes the following sub-steps: Amplitude and phase probe sub-step: Apply a positive phase probe, a negative phase probe, a positive amplitude probe, and a negative amplitude probe to the phase and amplitude of the signal injected into the first end, respectively; Sensitive decoding sub-step: Determine the phase sensitive component and amplitude sensitive component based on the occupied peak complexity of each probe; Joint locking sub-step: Synchronously adjust the phase difference and amplitude ratio of the injected signals at both ends according to the phase sensitive component and the amplitude sensitive component until both sensitive components are lower than the corresponding sensitive threshold.
[0026] In a further embodiment of the present invention, the closed-loop verification step further includes the following sub-steps: Alternating verification sub-step: Switch the injection state in the order of first-end unidirectional injection, double-end simultaneous injection, double-end simultaneous injection and first-end unidirectional injection, and collect the occupied peak complex quantity and functional clock edge sequence in each injection state; Reproduction verification sub-step: When the difference between the corresponding peak complex phases of two simultaneous double-ended injections is lower than the reproduction threshold, a zero-point reproduction marker is generated; Recovery verification sub-step: When the difference between the occupied peak complex phases corresponding to the two first-end unidirectional injections is lower than the recovery threshold, and the difference between the four functional clock edge sequences is lower than the edge hold threshold, a single-end recovery mark is generated; Parameter retention sub-step: Retain the injected parameters at both ends only when generating zero-point reproduction markers and single-end recovery markers simultaneously.
[0027] A radio frequency chip anti-interference system based on channel occupancy map includes: The differential clock transmission segment has a first injection terminal, a second injection terminal, and two or more functional taps; The dual-ended injection module is connected to the first injection end and the second injection end respectively, and is used to form a first-end unidirectional injection state, a second-end unidirectional injection state, and a dual-end simultaneous injection state. The tap compensation module is connected to each functional tap to keep the clock edge sequence of each function consistent under different injection states. The spectrum acquisition module is connected to the RF chip receiving link and is used to acquire the complex phase quantity of the same occupied peak at more than two clock harmonics; The coordinate identification module is connected to the dual-ended injection module and the spectrum acquisition module respectively. It is used to determine the coupling coordinates based on the harmonic phase difference between the two unidirectional injection states and write the coupling coordinates into the directional response edge of the channel occupancy map. The zero-point control module is connected to the dual-ended injection module and the coordinate identification module respectively. It is used to adjust the phase difference and amplitude ratio of the dual-ended injection signal so that the synthesized clock current at the coupled coordinate is lower than the zero-point threshold. The RF chip control processor is connected to the tap compensation module, spectrum acquisition module and zero-point control module respectively. It is used to perform phase probe locking and retain the double-ended injection parameters or restore the single-ended injection parameters according to the amplitude of the occupied peak complex phase and the quality of the target communication signal.
[0028] A further aspect of the present invention includes: The reflection calibration module is connected to the first and second injection terminals of the differential clock transmission section, respectively, and is used to measure the complex reflection coefficients corresponding to the two injection terminals and output the reflection phase correction to the coordinate identification module. The segmented phase module includes two or more programmable phase drive units respectively disposed between adjacent functional taps. Each programmable phase drive unit is connected to the zero-point control module and is used to adjust the double-ended injection phase difference of the corresponding transmission segment. The sensitive locking module is connected to the dual-ended injection module, the spectrum acquisition module, and the zero-point control module, respectively. It is used to output the phase adjustment amount and the amplitude adjustment amount based on the occupied peak complex phase amount corresponding to the forward phase probe, the reverse phase probe, the forward amplitude probe, and the reverse amplitude probe.
[0029] Specifically, the reflection calibration module is connected to the first and second injection terminals of the differential clock transmission section, respectively. The reflection calibration module includes two directional coupling measurement channels. Each directional coupling measurement channel acquires the incident signal and the reflected signal at the corresponding injection terminal, and outputs the complex reflection coefficient based on the complex ratio between the incident signal and the reflected signal.
[0030] The reflection calibration module generates a reflection phase correction value based on the complex reflection coefficients corresponding to each clock harmonic and sends the reflection phase correction value to the coordinate identification module. The coordinate identification module subtracts the reflection phase correction value when calculating the phase difference between states.
[0031] The segmented phase module includes two or more programmable phase drive units disposed between adjacent functional taps. Each programmable phase drive unit receives the phase code and amplitude code output by the segmented phase module and adjusts the phase and amplitude of the clock signal in the corresponding transmission segment.
[0032] The segmented phase module stores the correspondence between each programmable phase drive unit and the candidate coupling segment. The zero-point control module determines the programmable phase drive unit that needs to be adjusted based on the candidate coupling segment where the target coupling coordinates are located, and outputs the corresponding control parameters to the segmented phase module.
[0033] The sensitive locking module is communicatively connected to the dual-ended injection module, the spectrum acquisition module, and the zero-point control module. The sensitive locking module outputs forward phase probe parameters, reverse phase probe parameters, forward amplitude probe parameters, and reverse amplitude probe parameters to the dual-ended injection module.
[0034] The spectrum acquisition module acquires the occupied peak complex phase value at each probe state and sends it to the sensitivity locking module. The sensitivity locking module determines the phase sensitivity component and amplitude sensitivity component based on the occupied peak complex phase values corresponding to the four probe states, and outputs the phase adjustment amount and amplitude adjustment amount to the zero-point control module.
[0035] The zero-point control module updates the phase difference of the double-ended injected signal based on the phase adjustment amount, and updates the amplitude ratio of the double-ended injected signal based on the amplitude adjustment amount. After the zero-point control module completes the parameter update, the sensitivity locking module re-executes the four probe states until the phase sensitivity component and the amplitude sensitivity component are respectively lower than the corresponding sensitivity threshold.
[0036] When the reflection calibration module, segmented phase module, and sensitive locking module work together, the reflection calibration module reduces the impact of end reflections on the coupled coordinates, the segmented phase module enables two or more target coupled coordinates to form current zeros respectively, and the sensitive locking module compensates for zero-point drift generated during operation, thereby keeping the occupied peak suppression state stable under different operating temperatures, power supply voltages, and communication loads.
[0037] The beneficial effects of this invention are: This invention establishes a first-end unidirectional injection state and a second-end unidirectional injection state through a bidirectional calibration step, and uses the direction-corresponding delay compensation of each functional tap to ensure that the functional clock edge sequence is consistent between the two unidirectional injection states. The two unidirectional injection states use opposite clock propagation directions, but the functional clock edges received by each functional circuit remain unchanged. Therefore, the difference in occupied peak complex phase between the two unidirectional injection states can more accurately reflect the influence of the propagation direction and interference coupling position within the differential clock transmission segment, reducing the interference caused by functional clock offset in the measurement results.
[0038] The coordinate identification step collects the occupancy peak complex phase at two or more clock harmonics for the same occupancy peak, and determines the coupled coordinates based on the phase difference between states corresponding to each clock harmonic, the harmonic frequency, and the propagation constant. The phase expansion sub-step eliminates coordinate folding caused by phase period jumps, the coprime disambiguation sub-step uses clock harmonics of three or more coprime orders to eliminate duplicate coordinates, and the reflection calibration and phase correction sub-steps use the complex reflection coefficients corresponding to the first and second injection ends to correct the end reflection phase. These processes ensure that the coupled coordinates are simultaneously constrained by propagation distance, multi-harmonic phase, and end reflection parameters, improving the uniqueness and accuracy of coupling position identification.
[0039] When the occupancy peak cannot be explained by a single concentrated coupling location, the segmentation sub-step divides candidate coupling segments according to the functional tap positions. The segment fitting sub-step fits the measured directional response vector using the directional response basis vector and complex weights. The distribution mapping sub-step writes the target coupling coordinates, candidate coupling segments, and complex weights into the distribution coupling edges of the channel occupancy map. The channel occupancy map can thus record concentrated coupling and distribution coupling separately, avoiding the erroneous identification of the superposition of complex phasors formed by two or more coupling locations as a single coupling location.
[0040] The zero-point synthesis step controls the simultaneous injection of clock signals of the same frequency at the first and second injection terminals according to the coupling coordinates, and adjusts the phase difference and amplitude ratio of the two injected signals to make the clock currents propagating in the two directions cancel each other out at the coupling coordinates. The tap compensation module synchronously performs local delay compensation for each functional tap, so that the occupancy peak suppression process does not change the functional clock edge sequence of each functional tap. This process does not require changing the operating clock frequency, nor does it require directly superimposing a fixed digital cancellation signal in the RF receiving link, thus reducing the coupling components entering the RF receiving link from the clock interference formation path.
[0041] For distributed coupling, the multi-point selection sub-step selects two or more target coupling coordinates based on the complex weights in the distributed coupling edge. The segmented phase module adjusts the phase difference and amplitude ratio of the corresponding transmission segments respectively through programmable phase drive units set between adjacent functional taps, so that current zeros are formed at the two or more target coupling coordinates. This process can adapt to situations where clock interference enters the RF receiving link from two or more locations simultaneously, and avoids the limitation that a single current zero can only suppress one concentrated coupling location.
[0042] The zero-point locking process applies forward phase probes, reverse phase probes, forward amplitude probes, and reverse amplitude probes around the current phase difference and amplitude ratio. The sensitivity locking module determines the phase sensitivity component and amplitude sensitivity component based on the occupied peak complexity corresponding to each probe state, and the zero-point control module continuously corrects the dual-ended injection parameters based on the two sensitivity components. When the operating temperature, power supply voltage, or communication load changes, the zero-point locking process can track the direction of change of the current zero point, reducing the recovery of occupied peaks caused by mismatch of fixed control parameters.
[0043] The closed-loop verification process is performed alternately in the following order: unidirectional injection at the first end, simultaneous injection at both ends, simultaneous injection at both ends, and unidirectional injection at the first end. Simultaneously, the occupied peak complex phase, functional clock edge sequence, and target communication signal quality are compared. Two simultaneous injection results at both ends are used to verify the reproducibility of the occupied peak suppression state, and two unidirectional injection results at the first end are used to verify the recoverability of the original state. When the verification conditions are met, the injection parameters at both ends are retained; when the verification conditions are not met, the single-ended injection parameters are restored. This reduces the possibility of erroneous parameter retention due to measurement noise, transient disturbances, or parameter drift, and ensures that anti-interference processing does not disrupt the normal communication function of the RF chip. Attached Figure Description
[0044] Figure 1 This is a schematic diagram of the signal flow for the execution steps of the method of the present invention.
[0045] Figure 2 This is a schematic diagram of the overall system structure of the present invention.
[0046] Figure 3This is a schematic diagram of the bidirectional calibration steps and coordinate identification steps of the present invention.
[0047] Figure 4 This is a schematic diagram of the zero-point synthesis step and the zero-point locking step of the present invention.
[0048] Figure 5 A schematic diagram of the distribution mapping sub-step, the segmented driving sub-step, and the closed-loop verification step. Detailed Implementation
[0049] The following is combined Figures 1 to 5 The technical solution of the present invention will be further described below. The embodiments described are used to illustrate the structure, parameter configuration, signal processing process, and verification process of the radio frequency chip anti-interference method and system based on channel occupancy map, and are not intended to limit the scope of protection of the present invention.
[0050] The RF chip in this embodiment includes a differential clock transmission segment, a first injection terminal, a second injection terminal, two or more functional taps disposed on the differential clock transmission segment, an RF chip receiving link, and an RF chip control processor. The first injection terminal and the second injection terminal are respectively connected to a dual-ended injection module. The dual-ended injection module can form a first-ended unidirectional injection state, a second-ended unidirectional injection state, and a dual-ended simultaneous injection state, and can independently adjust the injection signal amplitude, injection signal phase, and injection signal start / stop state of the two injection terminals.
[0051] The differential clock transmission segment can employ on-chip differential metal transmission lines, in-package differential transmission lines, or a differential clock network with programmable terminations. The transmission length between the first injection terminal and the second injection terminal is denoted as the transmission segment length. In the unidirectional injection state at the first terminal, the first injection terminal outputs a differential clock signal, and the second injection terminal is connected to the matching terminal; in the unidirectional injection state at the second terminal, the second injection terminal outputs a differential clock signal, and the first injection terminal is connected to the matching terminal; in the simultaneous injection state at both ends, the first and second injection terminals simultaneously output differential clock signals with the same frequency and adjustable amplitude and phase.
[0052] Each functional tap is connected to its corresponding tap compensation module. The tap compensation module can consist of a programmable delay unit, a clock buffer, and an edge detection unit. It is used to adjust the delay of the functional tap output clock under different injection states, ensuring that the functional clock edge sequence remains consistent across the first-end unidirectional injection state, the second-end unidirectional injection state, and the dual-end simultaneous injection state. The functional clock edge sequence includes the rising edge time, the falling edge time, and the clock period.
[0053] The spectrum acquisition module connects to the RF chip's receiving link and is used to acquire the occupied peak complex phase (OPP) of the RF chip's receiving link. The OOP POP includes the occupied peak amplitude and the occupied peak phase. The spectrum acquisition module can sample the in-phase and quadrature components output from the RF chip's receiving link under the same reference clock and complete quadrature demodulation within an integer number of clock cycles, ensuring that the OOP POP obtained under different injection states has a unified phase reference.
[0054] like Figure 1 As shown, the method in this embodiment includes a bidirectional calibration step, a coordinate identification step, a zero-point synthesis step, a zero-point locking step, and a closed-loop verification step in sequence.
[0055] The bidirectional calibration step is used to establish the first-end unidirectional injection state and the second-end unidirectional injection state, and to eliminate the influence of propagation direction changes on the output clock edges of each functional tap. The bidirectional calibration step includes an edge acquisition sub-step, a compensation selection sub-step, and a consistency verification sub-step.
[0056] In the edge acquisition sub-step, the RF chip controller first controls the dual-ended injection module to form a first-end unidirectional injection state. The first injection end outputs a differential clock signal corresponding to the operating frequency, and the second injection end is connected to the matching terminal. The RF chip controller reads the rising and falling edge times of the clock output from each functional tap. After completing the edge acquisition of the first-end unidirectional injection state, the RF chip controller controls the dual-ended injection module to form a second-end unidirectional injection state, and reads the rising and falling edge times of the clock output from each functional tap in the same way.
[0057] In the compensation selection sub-step, the RF chip control processor reads all available delay codes for each functional tap, corresponding to the programmable delay unit. The RF chip control processor calculates the edge time difference between the first-end unidirectional injection state and the second-end unidirectional injection state under different delay codes, and determines the delay code with the smallest edge time difference as the direction-corresponding delay code. The first-end unidirectional injection state and the second-end unidirectional injection state can use different direction-corresponding delay codes.
[0058] In the consistency verification sub-step, the RF chip control processor switches between the first-end unidirectional injection state and the second-end unidirectional injection state again, and reads the functional clock edge sequence of each functional tap. When the edge timing difference corresponding to each functional tap is lower than the edge consistency threshold, and the clock cycle difference corresponding to the two injection states is lower than the cycle consistency threshold, the bidirectional calibration is confirmed to be complete. If any functional tap does not meet the consistency verification conditions, the process returns to the compensation selection sub-step to re-determine the delay code corresponding to the direction.
[0059] The coordinate identification step is used to determine the coupling coordinates of clock interference entering the RF chip's receiving link based on the phase changes of the peak value at more than two clock harmonics under the first-end unidirectional injection state and the second-end unidirectional injection state. The coordinate identification step includes a phase expansion sub-step, a coordinate generation sub-step, a coprime disambiguation sub-step, a reflection calibration sub-step, a phase correction sub-step, a coordinate update sub-step, a segmentation sub-step, a segment fitting sub-step, and a distribution mapping sub-step.
[0060] In the phase unwinding sub-step, the spectrum acquisition module acquires the occupancy peak complex phase at two or more clock harmonics with the same occupancy peak in the first-end unidirectional injection state, and then acquires the occupancy peak complex phase corresponding to the same set of clock harmonics in the second-end unidirectional injection state. The RF chip control processor calculates the inter-state phase difference between the two injection states in ascending order of harmonic frequency, and performs phase unwinding on the inter-state phase difference that crosses the ±180 degree boundary.
[0061] In the phase expansion sub-step, the phase difference between states can be determined according to the following formula: ; In the formula, the phase difference between states Indicates the first The phase difference between the clock harmonics in the first-terminal unidirectional injection state and the second-terminal unidirectional injection state after phase expansion processing; the first occupied peak complex phase. Indicates the first end unidirectional injection state The occupied peak complex phase corresponding to the first clock harmonic; the second occupied peak complex phase Indicating the second end unidirectional injection state, the first Peak phase occupancy corresponding to each clock harmonic; reflection phase correction. This indicates that the reflection calibration module is for the first... Round-trip reflection phase correction determined by each clock harmonic; harmonic number Represents the clock harmonic sequence numbers arranged from low to high harmonic frequency; phase expansion operator This indicates how to convert the phase difference between states that cross the phase period boundary into a continuous phase difference; phase angle operator This indicates the calculation of the phase angle of a complex phasor.
[0062] In the reflection calibration sub-step, the RF chip control processor first outputs a calibration clock signal at the first injection terminal, and then measures the complex reflection coefficients corresponding to the first and second injection terminals through the reflection calibration module; subsequently, it outputs a calibration clock signal at the second injection terminal, and measures the complex reflection coefficients corresponding to the two injection terminals again. The reflection calibration module can use a directional coupler, a reflection sampling circuit, and a complex demodulation circuit to obtain the complex reflection coefficients.
[0063] In the phase correction sub-step, the RF chip control processor determines the round-trip reflection phase based on the complex reflection coefficients corresponding to the two injection ends, the length of the differential clock transmission segment, and the frequency of each clock harmonic. It then subtracts the round-trip reflection phase from the phase difference between the original states to reduce the impact of end reflections on the coupling coordinate calculation results.
[0064] In the coordinate generation sub-step, the first injection end is taken as the coordinate origin, and the direction along the differential clock transmission segment towards the second injection end is taken as the coordinate increment direction. The coupled coordinates can be determined according to the following formula: ; No. The propagation constants corresponding to each clock harmonic are determined according to the following formula: ; Among them, candidate coupling coordinates Indicates according to the first The distance of the interference coupling position relative to the first injection end obtained from the clock harmonic calculation; the length of the differential clock transmission segment. This indicates the transmission distance between the first injection terminal and the second injection terminal; the phase difference between states. Represents the phase difference after reflection phase correction and phase expansion; propagation constant. Indicates the first The phase change per unit length of each clock harmonic in the differential clock transmission segment; clock harmonic frequency. Indicates the first The frequency of each clock harmonic; the propagation speed of the clock signal This represents the phase velocity of the clock signal propagating along the differential clock transmission segment.
[0065] In the coprime disambiguation step, the RF chip control processor selects three or more clock harmonics of coprime order and calculates candidate coupling coordinates for each. If the maximum difference between the candidate coupling coordinates is lower than the coordinate consistency threshold, the average value of the candidate coupling coordinates is determined as the coupling coordinate. If the maximum difference between the candidate coupling coordinates reaches the coordinate consistency threshold, the selected clock harmonic combination is changed, and the phase expansion sub-step and coordinate generation sub-step are re-executed.
[0066] In the coordinate update sub-step, the RF chip control processor recalculates the coupling coordinates based on the phase difference between states after reflection phase correction, and writes the coupling coordinates into the directional response edge of the channel occupancy map. The directional response edge records at least the occupancy peak identifier, clock harmonic frequency, occupancy peak complex phase corresponding to the first-end unidirectional injection state, occupancy peak complex phase corresponding to the second-end unidirectional injection state, phase difference between states, and coupling coordinates.
[0067] When the phase difference between the states corresponding to each clock harmonic can be fitted by a straight line, and the linear fitting residual is lower than the point source fitting threshold, the interference coupling position can be regarded as concentrated in a single coupling coordinate. When the linear fitting residual reaches the point source fitting threshold, the segmentation sub-step, the segment fitting sub-step, and the distribution mapping sub-step are executed.
[0068] In the segmentation sub-step, the RF chip control processor divides the differential clock transmission segment into two or more candidate coupling segments according to the position of each functional tap on the differential clock transmission segment. A candidate coupling segment can be formed between two adjacent functional taps, and candidate coupling segments can also be formed between the first injection terminal and the first functional tap, as well as between the last functional tap and the second injection terminal.
[0069] In the segment fitting sub-step, the RF chip control processor establishes a directional response basis vector for each candidate coupling segment. The directional response basis vector represents the change in the occupied peak complex phasor formed under various clock harmonics and two injection states when a unit coupling strength is applied to the corresponding candidate coupling segment. The measured directional response can be fitted using the following formula: ; When the candidate coupling segment combination satisfies the following formula, the candidate coupling segment combination is determined to be a segment fit: ; Among them, the measured directional response vector This represents a complex vector formed based on the unidirectional injection states at the first and second ends, as well as the occupied peak complex phasors corresponding to each clock harmonic; the directional response basis vector. Indicates the unit coupling strength acting on the first Theoretical directional response formed when considering candidate coupling segments; complex weights Indicates the first The complex contribution coefficients of each candidate coupling segment to the measured directional response vector; the number of candidate coupling segments. This indicates the total number of candidate coupled segments participating in the fitting of the current segment; the candidate coupled segment number. Indicates the candidate coupling segment number participating in the current segment fitting; segment fitting threshold. Represents the maximum allowed complex vector fitting error; 2-norm operator It represents the square root of the sum of the squares of the magnitudes of the elements in a complex vector.
[0070] The RF chip control processor starts segment fitting from a combination containing a candidate coupling segment. When the current candidate coupling segment combination does not meet the segment fitting conditions, the RF chip control processor increases the number of candidate coupling segments participating in the fitting until a target combination that meets the segment fitting conditions and has the fewest candidate coupling segments is obtained.
[0071] During segment fitting, the RF chip control processor starts fitting from the combination that uses the fewest candidate coupling segments. If a single candidate coupling segment can make the fitting error lower than the segment fitting threshold, then a candidate coupling segment is retained; if a single candidate coupling segment cannot meet the condition, then the number of candidate coupling segments is increased until the fitting error is lower than the segment fitting threshold.
[0072] In the distributed mapping sub-step, the RF chip controls the processor to write the candidate coupling segments, target coupling coordinates, and corresponding complex weights that meet the fitting conditions into the distributed coupling edges of the channel occupancy map. Distributed coupling edges are used to represent situations where the same occupancy peak is simultaneously affected by two or more coupling locations.
[0073] The zero-point synthesis step is used to control the first and second injection terminals to simultaneously output clock signals based on the determined coupling coordinates, so that the clock currents propagating in the two directions cancel each other out at the coupling coordinates. The zero-point synthesis step includes a multi-point selection sub-step, a segmented driving sub-step, and a multi-zero synthesis sub-step.
[0074] For a single coupled coordinate, the synthesized clock current at the coupled coordinate can be determined according to the following formula: ; When the synthesized clock current satisfies the following equation, a current zero point is determined at the coupling coordinates: ; Among them, the synthesized clock current This represents the complex current formed by the superposition of the clock current propagating from the first injection terminal to the coupling coordinate and the clock current propagating from the second injection terminal to the coupling coordinate; the amplitude of the first injection signal. This represents the amplitude of the differential clock signal output from the first injection terminal; the amplitude of the second injection signal. This indicates the amplitude of the differential clock signal output from the second injection terminal; the phase difference of the injected signal. This represents the phase difference between the output signal at the second injection terminal and the output signal at the first injection terminal; the operating propagation constant. Represents the propagation constant of the operating clock frequency in the differential clock transmission segment; coupling coordinates Indicates the distance of the interference coupling location relative to the first injection point; differential clock transmission segment length. Indicates the transmission distance between the first injection terminal and the second injection terminal; imaginary unit. satisfy Zero-point threshold This indicates the maximum allowable amplitude of the synthesized clock current when a current zero point is formed at the coupling coordinate.
[0075] The RF chip control processor can first fix the amplitude of the injected signal corresponding to the first injection terminal, and then adjust the amplitude of the injected signal corresponding to the second injection terminal and the phase difference between the injected signals corresponding to the two injection terminals step by step. After each amplitude or phase adjustment is completed, the spectrum acquisition module acquires the occupied peak complex phase. When the amplitude of the occupied peak complex phase decreases, the phase difference or amplitude ratio continues to be changed along the current adjustment direction; when the amplitude of the occupied peak complex phase increases, the adjustment direction is changed.
[0076] In the dual-ended simultaneous injection state, the clock signals in both propagation directions will jointly change the arrival phase at each functional tap. The tap compensation module adjusts the local delay compensation corresponding to each functional tap to ensure that the functional clock edge sequence of each functional tap in the dual-ended simultaneous injection state is consistent with the functional clock edge sequence after bidirectional calibration.
[0077] In the multi-point selection sub-step, the RF chip control processor reads each complex weight in the distributed coupling edge and selects two or more target coupling coordinates whose complex weight amplitude reaches the weight threshold.
[0078] In the segmented driving sub-step, the segmented phase module controls the programmable phase driving units located between adjacent functional taps. Each programmable phase driving unit is used to adjust the double-ended injection phase difference and amplitude ratio in the corresponding transmission segment, so that adjacent target coupling coordinates can adopt different local phase configurations.
[0079] In the multi-zero synthesis step, the RF chip control processor sequentially adjusts each programmable phase drive unit to ensure that the synthesized clock current corresponding to each target coupling coordinate is lower than the corresponding zero-point threshold, and simultaneously checks the functional clock edge sequence of each functional tap. When the edge time difference corresponding to any functional tap reaches the edge hold threshold, the tap compensation module readjusts the corresponding local delay compensation.
[0080] The zero-point locking procedure is used to maintain the current at zero point in the face of temperature changes, power supply voltage changes, and communication status changes. The zero-point locking procedure includes an amplitude-phase probe sub-step, a sensitive decoding sub-step, and a combined locking sub-step.
[0081] In the amplitude and phase probe sub-step, the RF chip control processor applies forward and reverse phase probes around the current phase difference, and applies forward and reverse amplitude probes around the current amplitude ratio. The absolute values of the phase changes corresponding to the forward and reverse phase probes are the same, but their directions are opposite. The absolute values of the amplitude ratio changes corresponding to the forward and reverse amplitude probes are the same, but their directions are opposite.
[0082] The phase-sensitive component and the amplitude-sensitive component can be determined according to the following formula: ; The amplitude sensitivity component is determined according to the following formula: ; Among them, the phase-sensitive component This indicates the local direction and degree of change in the amplitude of the occupied peak complex relative to the phase difference of the injected signal; amplitude-sensitive component. This indicates the local direction and degree of change in the ratio of the occupied peak complex phasor amplitude to the injected signal amplitude; positive phase probe complex phasor. This represents the peak occupancy complexity acquired when the forward phase probe is applied; the reverse phase probe complexity... This represents the occupied peak complex phase acquired when the reverse phase probe is applied; the forward amplitude probe complex phase. This represents the occupied peak complexity acquired when a positive amplitude probe is applied; the reverse amplitude probe complexity... This represents the occupied peak complex phase acquired when the reverse amplitude probe is applied; the phase probe change. This represents the absolute value of the change in phase difference between the forward and reverse phase probes relative to the currently injected signal; the change in amplitude probe value. This represents the absolute value of the change in the amplitude ratio of the forward and reverse amplitude probes relative to the current injected signal.
[0083] When the phase sensitive component When the value is positive, the zero-point control module adjusts in the direction of reducing the phase difference of the injected signal; when the phase-sensitive component... When the value is negative, the zero-point control module adjusts in the direction of increasing the phase difference of the injected signal. When the amplitude-sensitive component... When the value is positive, the zero-point control module adjusts in the direction of decreasing the amplitude ratio of the injected signal; when the amplitude sensitive component... When the value is negative, the zero-point control module adjusts in the direction of increasing the amplitude ratio of the injected signal. Zero-point locking is confirmed when both the absolute value of the phase-sensitive component and the absolute value of the amplitude-sensitive component are below the amplitude-sensitive threshold.
[0084] In the sensitive decoding sub-step, the sensitive locking module determines the phase sensitive component and the amplitude sensitive component based on the occupied peak complex phase values corresponding to the four probe states. When the phase sensitive component is positive, the RF chip controls the processor to adjust in the direction of decreasing the current phase difference; when the phase sensitive component is negative, the RF chip controls the processor to adjust in the direction of increasing the current phase difference. The adjustment method for the amplitude sensitive component is the same as that for the phase sensitive component.
[0085] In the joint locking sub-step, the RF chip control processor synchronously adjusts the phase difference and amplitude ratio in opposite directions of the phase-sensitive component and the amplitude-sensitive component until the absolute value of the phase-sensitive component is lower than the phase-sensitive threshold and the absolute value of the amplitude-sensitive component is lower than the amplitude-sensitive threshold. After reaching the two sensitivity thresholds, the zero-point control module saves the current phase difference, amplitude ratio, and local delay compensation for each functional tap.
[0086] The closed-loop verification process includes alternating verification sub-steps, reproducible verification sub-steps, recovery verification sub-steps, and parameter retention sub-steps.
[0087] In the alternating verification sub-step, the RF chip control processor switches the injection state in the order of first-end unidirectional injection, dual-end simultaneous injection, dual-end simultaneous injection, and first-end unidirectional injection. After each state switch, the spectrum acquisition module acquires the occupied peak complex phase, and the tap compensation module acquires the functional clock edge sequence of each functional tap.
[0088] In the reproduction verification sub-step, the RF chip control processor compares the occupied peak complex quantities corresponding to two simultaneous injection states. When the amplitude difference and phase difference of the two occupied peak complex quantities are both lower than the reproduction threshold, a zero-point reproduction mark is generated.
[0089] In the recovery verification sub-step, the RF chip control processor compares the occupied peak complex phase values corresponding to the two first-end unidirectional injection states, and compares the functional clock edge sequences corresponding to each functional tap in the four states. When the difference between the occupied peak complex phase values corresponding to the two first-end unidirectional injection states is lower than the recovery threshold, and the edge timing difference corresponding to each functional tap is lower than the edge hold threshold, a single-end recovery marker is generated.
[0090] In the parameter retention sub-step, the injected parameters at both ends are retained only when both the zero-point reproduction marker and the single-end recovery marker are generated simultaneously, and the target communication signal quality meets the link preservation condition. If either condition is not met, the single-end injection parameters corresponding to the first-end unidirectional injection state are restored.
[0091] like Figure 2 As shown, the system includes a differential clock transmission section, a first injection terminal, a second injection terminal, a dual-ended injection module, two or more functional taps, a programmable phase drive unit, a tap compensation module, a segmented phase module, a reflection calibration module, a spectrum acquisition module, a coordinate identification module, a zero-point control module, a sensitivity locking module, an RF chip receiving link, a channel occupancy map, and an RF chip control processor.
[0092] The dual-ended injection module is connected to the first injection terminal and the second injection terminal respectively. The dual-ended injection module can be configured with two phase-locked clock output channels, two programmable phase adjustment channels, and two programmable amplitude adjustment channels. The two clock output channels are driven by the same reference clock, ensuring that the clock frequencies corresponding to the first and second injection terminals are consistent.
[0093] The differential clock transmission section has two or more function taps. Each function tap is connected to its corresponding function circuit and to a tap compensation module. Figure 2 The function taps 1, 2, 3 and N shown indicate that the number of function taps can be set according to the chip size.
[0094] Programmable phase drive units are set between adjacent functional taps. These programmable phase drive units are connected to segmented phase modules. The segmented phase modules change the clock propagation phase and drive amplitude in the corresponding transmission segment according to the phase and amplitude codes issued by the RF chip control processor.
[0095] Figure 2 The reflection calibration modules shown on the left and right sides can be implemented using two measurement channels of the same reflection calibration module. The two measurement channels are connected to the first injection end and the second injection end, respectively, and are used to determine the complex reflection coefficients corresponding to the two injection ends.
[0096] The spectrum acquisition module connects to the RF chip's receiving link and sends the occupied peak complex phase value to the RF chip's control processor and coordinate identification module. The coordinate identification module performs phase unwrapping, reflection phase correction, coupling coordinate calculation, and segment fitting. The zero-point control module controls the dual-ended injection module and the segmented phase module based on the coupling coordinates. The sensitivity locking module performs sensitivity decoding for the forward phase probe, reverse phase probe, forward amplitude probe, and reverse amplitude probe.
[0097] Channel occupancy maps can be stored in non-volatile memory or on-chip static memory connected to the RF chip's control processor. Directional response edges in the channel occupancy map record the bidirectional responses corresponding to concentrated coupling locations, while distributed coupling edges record the complex weights corresponding to two or more candidate coupling segments.
[0098] like Figure 3 As shown, the first-end unidirectional injection state and the second-end unidirectional injection state constitute two measurement states with opposite directions. Both states use the same operating clock frequency and the same spectrum acquisition window.
[0099] In the first-end unidirectional injection state, the spectrum acquisition module collects the occupied peak complex value from the RF chip receiving link. In the second-end unidirectional injection state, the spectrum acquisition module collects the occupied peak complex value again at the same harmonic frequency and the same sampling length.
[0100] Functional tap 1, functional tap 2 and functional tap 3 maintain the consistency of the functional clock edge sequence through direction-corresponding delay compensation. Figure 3 The three function taps are used to illustrate the implementation process; in a real system, more than two function taps can be set.
[0101] Figure 3 The left and right sides illustrate the reflection calibration sub-step and the phase correction sub-step, respectively. The reflection calibration result is used to correct the additional reflection phase corresponding to the two propagation directions. After the phase correction is completed, the RF chip control processor executes the phase expansion sub-step in the order of harmonic frequencies, and forms a phase expansion curve in the coordinate relationship between the phase difference between states and the harmonic frequency.
[0102] The coordinate generation sub-step determines the coupled coordinates based on the slope of the phase expansion curve and the propagation constant. The coprime disambiguation sub-step uses coprime clock harmonics of three or more orders to eliminate coordinate repetitions caused by phase periods. The coordinate update sub-step writes the coupled coordinates, after reflection correction and coprime disambiguation, into the direction response edge.
[0103] In a specific test, the differential clock transmission segment length was set to 24 mm, and the clock signal propagation speed was set to (1.5 × 10⁸) meters per second. Three clock harmonics, 1.2 GHz, 1.8 GHz, and 2.4 GHz, were selected, and the phase differences between the states after reflection phase correction were 23.0 degrees, 34.6 degrees, and 46.1 degrees, respectively. According to the aforementioned coordinate calculation relationship, the candidate coupling coordinates corresponding to the three clock harmonics are all 8.0 mm. Therefore, the position 8.0 mm away from the first injection end was determined as the coupling coordinate.
[0104] like Figure 4 As shown, after determining the coupling coordinates, the dual-ended injection module enters a dual-ended simultaneous injection state. The first and second injection ends simultaneously inject differential clock signals of the same frequency into the differential clock transmission segment. The zero-point control module changes the phase difference and amplitude ratio of the two injected signals, causing the synthesized clock current at the coupling coordinates to gradually decrease.
[0105] Functional taps 1, 2, and 3 perform local delay compensation to ensure that the function clock edge sequence under the dual-end simultaneous injection state is consistent with the function clock edge sequence after bidirectional calibration.
[0106] When there are two or more target coupling coordinates in the channel occupancy map, the multi-point selection sub-step selects the target coupling coordinates to be suppressed according to the complex weight, the segmented driving sub-step controls the corresponding programmable phase driving unit, and the multi-zero synthesis sub-step makes the synthesized clock current corresponding to the two or more target coupling coordinates lower than the corresponding zero threshold.
[0107] After initial zero-point synthesis is completed, the sensitive locking module sequentially applies forward phase probes, reverse phase probes, forward amplitude probes, and reverse amplitude probes. The sensitive decoding sub-step generates phase-sensitive components and amplitude-sensitive components based on the occupied peak complex phase quantities corresponding to the four probe states. The joint locking sub-step synchronously corrects the phase difference and amplitude ratio based on the two sensitive components.
[0108] like Figure 5 As shown, the differential clock transmission segment is configured with function taps 1, 2, 3, and 4. Programmable phase drive units 1 through 6 are respectively configured between adjacent function taps. The number of programmable phase drive units can be set according to the number of transmission segments.
[0109] The segmentation sub-step divides the differential clock transmission segment into candidate coupling segment 1, candidate coupling segment 2, candidate coupling segment 3, and candidate coupling segment 4 according to the position of each functional tap. Within each candidate coupling segment, one or more target coupling coordinates can be recorded, and a corresponding complex weight is recorded for each target coupling coordinate.
[0110] The segment fitting sub-step determines the target coupling coordinates and complex weights based on the directional response basis vectors of each candidate coupling segment. The distribution mapping sub-step writes the candidate coupling segments, target coupling coordinates, and complex weights into the distribution coupling edges of the channel occupancy map.
[0111] The multi-point selection sub-step selects target coupling coordinates from the distributed coupling edges whose complex weight amplitude reaches the weight threshold. The segmented driving sub-step determines the programmable phase driving unit that needs to be adjusted based on the candidate coupling segment where each target coupling coordinate is located. The multi-zero synthesis sub-step adjusts the selected programmable phase driving units respectively, so that the corresponding current zero point is formed at each target coupling coordinate.
[0112] Figure 5 The lower part shows the four injection states of the alternating verification sub-step: unidirectional injection at the first end, simultaneous injection at both ends, simultaneous injection at both ends, and unidirectional injection at the first end. For each injection state, the occupied peak complex quantity and the functional clock edge sequence are acquired.
[0113] The reproduction verification sub-step compares the occupied peak complexity corresponding to the two simultaneous double-ended injection states. The recovery verification sub-step compares the occupied peak complexity corresponding to the two unidirectional injection states at the first end with the functional clock edge sequence corresponding to the four states. The parameter retention sub-step determines whether to retain the injected parameters at both ends based on the zero-point reproduction result, the unidirectional recovery result, and the target communication signal quality.
[0114] The table below provides a set of parameter ranges and test settings for implementing this solution. These parameters can be adjusted based on the RF chip's operating frequency, differential clock transmission segment length, and RF chip receiver link sensitivity.
[0115]
[0116] To verify the effectiveness of this solution, tests were conducted under the conditions of an operating temperature of 25 degrees Celsius, a power supply voltage of 1.0 volt, and a differential clock fundamental frequency of 600 MHz. The test results are shown in the table below.
[0117]
[0118] The data in the table shows that after zero-point locking, the amplitude of the occupied peak complex phase is reduced by 24.2 dB compared to the first-end unidirectional injection state. The maximum edge difference corresponding to each functional tap is still less than 5 picoseconds, and the target communication signal bit error rate still meets the link maintenance condition. After the first-end unidirectional injection is restored, the difference between the amplitude of the occupied peak complex phase and the initial first-end unidirectional injection state is 0.2 dB, indicating that the suppression result of the occupied peak in the dual-end injection state is reproducible, and the single-end injection parameters can be recovered.
[0119] Finally, it should be noted that any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this invention should be included within the scope of protection of this invention.
Claims
1. A method for anti-interference of radio frequency chips based on channel occupancy maps, characterized in that, Includes the following steps: Bidirectional calibration steps: Set the first or second end of the same differential clock transmission segment as the injection end, connect the other end to the matching terminal, and compensate for the delay corresponding to the direction of each functional tap to make the clock edge sequence of each function consistent in the two injection states. Coordinate identification steps: In two injection states, collect the complex phase of the same occupancy peak at more than two clock harmonics respectively. Determine the coupling coordinates based on the relationship between the phase difference between states corresponding to each clock harmonic and the relative harmonic frequency and the propagation constant of the differential clock transmission segment. Write the coupling coordinates into the directional response edge of the channel occupancy map. Zero-point synthesis step: control the first and second ends to inject simultaneously, adjust the phase difference and amplitude ratio of the injected signals at both ends, so that the synthesized clock current of the differential clock transmission segment at the coupling coordinate is lower than the zero-point threshold, and maintain the consistency of the clock edge sequence of each function through local delay compensation of each functional tap. Zero-point locking step: Apply a positive phase probe and a negative phase probe around the current phase difference of the injected signals at both ends, and adjust the current phase difference according to the difference in amplitude of the occupied peak complex phase corresponding to the two phase probes until the amplitude difference is lower than the locking threshold; Closed-loop verification steps: When the amplitude of the occupied peak complex phase meets the suppression condition and the quality of the target communication signal meets the link maintenance condition, retain the injected parameters at both ends; otherwise, restore the single-end injected parameters.
2. The radio frequency chip anti-interference method based on channel occupancy map according to claim 1, characterized in that, The bidirectional calibration step also includes the following sub-steps: Edge acquisition sub-step: Acquire the edge moments of the output clock of each functional tap relative to the same reference clock in the first-end injection state and the second-end injection state respectively; Compensation selection sub-step: For each functional tap, select the two directional delay codes from the delay codes of the corresponding programmable delay unit that minimize the time difference between the corresponding edges of the two injected states; Consistency verification sub-step: When the edge time difference of each functional tap is lower than the edge consistency threshold, and the clock cycle difference of the two injection states is lower than the cycle consistency threshold, the delay compensation corresponding to the confirmation direction is completed.
3. The radio frequency chip anti-interference method based on channel occupancy map according to claim 2, characterized in that, The coordinate identification step also includes the following sub-steps: Phase expansion sub-step: Perform phase expansion on the phase difference between states corresponding to each clock harmonic in ascending order of harmonic frequency; Coordinate generation sub-step: Generate candidate coupled coordinates based on the expanded phase difference, frequency interval, and propagation constant corresponding to any two clock harmonics; Coprime disambiguation steps: Select three or more clock harmonics of coprime order, and determine the candidate coupling coordinates that simultaneously satisfy the phase difference of each harmonic expansion as the coupling coordinates.
4. The radio frequency chip anti-interference method based on channel occupancy map according to claim 3, characterized in that, The coordinate identification step also includes the following sub-steps: Reflection calibration sub-step: Send calibration clock signals to the first and second ends respectively, and measure the complex reflection coefficients at both ends of the differential clock transmission segment; Phase correction sub-step: Based on the two complex reflection coefficients and the length of the differential clock transmission segment, subtract the round-trip reflection phase of each clock harmonic; Coordinate update sub-step: Re-determine the coupled coordinates based on the phase difference between states after deducting the round-trip reflection phase.
5. The radio frequency chip anti-interference method based on channel occupancy map according to claim 4, characterized in that, When the linear fitting residual of the phase difference between the states of each clock harmonic relative to the harmonic frequency reaches the point source fitting threshold, the coordinate identification step further includes the following sub-steps: Segmentation sub-step: Divide the differential clock transmission segment into two or more candidate coupling segments according to the functional tap position of the differential clock transmission segment; Segment fitting sub-steps: Determine the directional response basis vectors corresponding to each candidate coupling segment, and select the target combination from the combination of directional response basis vectors with the smallest number of combinations whose difference with the complex phase of each clock harmonic is lower than the segment fitting threshold. Distribution mapping sub-step: Write the candidate coupling segments and corresponding complex weights corresponding to the target combination into the distribution coupling edges of the channel occupancy graph.
6. The radio frequency chip anti-interference method based on channel occupancy map according to claim 5, characterized in that, The zero-point synthesis step further includes the following sub-steps: Multi-point selection sub-step: Based on the complex weights in the distributed coupling edge, select two or more target coupling coordinates whose complex weight amplitudes reach the weight threshold; Segmented driving sub-step: By using a programmable phase driving unit set between adjacent functional taps, the double-ended injection phase difference and amplitude ratio of each transmission segment are adjusted respectively; Multi-zero synthesizer step: Make the synthesized clock current corresponding to each target coupling coordinate lower than the corresponding zero threshold, and make the clock edge difference of each functional tap lower than the edge holding threshold.
7. The radio frequency chip anti-interference method based on channel occupancy map according to claim 6, characterized in that, The zero-point locking step further includes the following sub-steps: Amplitude and phase probe sub-step: Apply a positive phase probe, a negative phase probe, a positive amplitude probe, and a negative amplitude probe to the phase and amplitude of the signal injected into the first end, respectively; Sensitive decoding sub-step: Determine the phase sensitive component and amplitude sensitive component based on the occupied peak complexity of each probe; Joint locking sub-step: Synchronously adjust the phase difference and amplitude ratio of the injected signals at both ends according to the phase sensitive component and the amplitude sensitive component until both sensitive components are lower than the corresponding sensitive threshold.
8. The radio frequency chip anti-interference method based on channel occupancy map according to claim 7, characterized in that, The closed-loop verification step also includes the following sub-steps: Alternating verification sub-step: Switch the injection state in the order of first-end unidirectional injection, double-end simultaneous injection, double-end simultaneous injection and first-end unidirectional injection, and collect the occupied peak complex quantity and functional clock edge sequence in each injection state; Reproduction verification sub-step: When the difference between the corresponding peak complex phases of two simultaneous double-ended injections is lower than the reproduction threshold, a zero-point reproduction marker is generated; Recovery verification sub-step: When the difference between the occupied peak complex phases corresponding to the two first-end unidirectional injections is lower than the recovery threshold, and the difference between the four functional clock edge sequences is lower than the edge hold threshold, a single-end recovery mark is generated; Parameter retention sub-step: Retain the injected parameters at both ends only when generating zero-point reproduction markers and single-end recovery markers simultaneously.
9. A radio frequency chip anti-interference system based on channel occupancy map, characterized in that, include: The differential clock transmission segment has a first injection terminal, a second injection terminal, and two or more functional taps; The dual-ended injection module is connected to the first injection end and the second injection end respectively, and is used to form a first-end unidirectional injection state, a second-end unidirectional injection state, and a dual-end simultaneous injection state. The tap compensation module is connected to each functional tap to keep the clock edge sequence of each function consistent under different injection states. The spectrum acquisition module is connected to the RF chip receiving link and is used to acquire the complex phase quantity of the same occupied peak at more than two clock harmonics; The coordinate identification module is connected to the dual-ended injection module and the spectrum acquisition module respectively. It is used to determine the coupling coordinates based on the harmonic phase difference between the two unidirectional injection states and write the coupling coordinates into the directional response edge of the channel occupancy map. The zero-point control module is connected to the dual-ended injection module and the coordinate identification module respectively. It is used to adjust the phase difference and amplitude ratio of the dual-ended injection signal so that the synthesized clock current at the coupled coordinate is lower than the zero-point threshold. The RF chip control processor is connected to the tap compensation module, the spectrum acquisition module, and the zero-point control module, respectively. It is used to perform phase probe locking and retain the double-ended injection parameters or restore the single-ended injection parameters according to the amplitude of the occupied peak complex phase and the quality of the target communication signal.
10. The radio frequency chip anti-interference system based on channel occupancy map according to claim 9, characterized in that, Also includes: The reflection calibration module is connected to the first and second injection terminals of the differential clock transmission segment, respectively, and is used to measure the complex reflection coefficients corresponding to the two injection terminals and output the reflection phase correction amount to the coordinate identification module. The segmented phase module includes two or more programmable phase drive units respectively disposed between adjacent functional taps. Each programmable phase drive unit is connected to the zero-point control module and is used to adjust the double-ended injection phase difference of the corresponding transmission segment. The sensitive locking module is connected to the dual-ended injection module, the spectrum acquisition module, and the zero-point control module, respectively. It is used to output the phase adjustment amount and the amplitude adjustment amount based on the occupied peak complex phase amount corresponding to the forward phase probe, the reverse phase probe, the forward amplitude probe, and the reverse amplitude probe.
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