Wired network parasitic time synchronization control method and system

Abstract

The present application relates to network time service and synchronization control technical field, especially to a kind of wired network parasitic time service synchronization control method and system, this method listens to the data frame sequence transmitted in wired network, parses frame structure and locates error check redundancy coding section, identifies error correction code type and error correction margin, clock synchronization reference code is encoded as pseudo-random scrambling code and the controlled error mode corresponding to pseudo-random scrambling code and located in error correction margin is introduced in redundancy coding section, receiving end detects error pattern by error correction decoding and extracts pseudo-random scrambling code, with local scrambling code template relevant operation Decodes clock synchronization reference and records relevant peak time domain position, analyzes relevant peak time domain position change trajectory and constructs drift trend model to predict clock offset and generates compensation instruction to adjust receiving end clock frequency, according to residual deviation, update drift trend model and adjust pseudo-random scrambling code length, realize high-precision adaptive time service synchronization without occupying extra bandwidth.

Description

Technical Field

[0001] This invention relates to the field of network time synchronization and control technology, and in particular to a method and system for parasitic time synchronization and control of wired networks. Background Technology

[0002] Clock synchronization in wired networks is a fundamental requirement for real-time collaboration in distributed systems. Scenarios such as industrial control, power dispatching, data acquisition, and audio / video transmission all require network nodes to maintain a unified time base to accurately mark the sequence of events and coordinate action timing. Current conventional practices rely on dedicated time synchronization protocols. A master clock node periodically constructs and sends synchronization messages carrying timestamps. Clock nodes receive these messages, parse the time information, and perform local clock correction based on propagation delay and link symmetry assumptions. This protocol-based time synchronization method has been widely adopted in wide area networks (WANs) and local area networks (LANs), and corresponding standards have been established.

[0003] Protocol-based time synchronization requires dedicated message channels to carry time information, causing synchronization functions and business data to compete for link resources. Synchronization messages are continuously generated at fixed or adaptive frequencies, consuming effective bandwidth and increasing network load. Higher message density ensures better synchronization accuracy, but also increases bandwidth costs. Network nodes also need to maintain protocol state machines, manage sessions, and cache timestamps, incurring additional consumption of processing and port resources. More importantly, synchronization messages share queues and exchange buffers with ordinary data frames during transmission, undergoing queuing, scheduling, and congestion processes, making it difficult to completely eliminate jitter in arrival time. When network load fluctuates, synchronization accuracy drops significantly, requiring higher message frequencies or more complex filtering algorithms to compensate, further exacerbating resource consumption.

[0004] Furthermore, protocol-based time synchronization typically requires every node in the network link to support the same time synchronization protocol. Cross-protocol domains or heterogeneous network environments necessitate the configuration of conversion and boundary mechanisms, leading to complex deployment and high maintenance costs. In wired networks with limited bandwidth and dynamically changing service loads, the above approach struggles to balance synchronization accuracy and transmission efficiency. Therefore, it is necessary to develop clock synchronization implementation methods that have less impact on network services, reducing reliance on dedicated synchronization messages and improving the robustness of time base correction. Summary of the Invention

[0005] The present invention provides a method and system for parasitic time synchronization control of wired networks, which can solve the problems in the prior art.

[0006] A first aspect of the present invention provides a wired network parasitic time synchronization control method, comprising:

[0007] Monitor the data frame sequence transmitted in the wired network, parse the frame structure of the data frame sequence and locate the redundant coding segment used for error verification;

[0008] Identify the error correction code type and its error correction tolerance used in the redundant coding segment, encode the clock synchronization reference as a pseudo-random scrambling code, introduce a controlled error mode corresponding to the pseudo-random scrambling code and located within the error correction tolerance in the redundant coding segment, so that the clock synchronization reference is embedded in the data frame sequence in the form of an error mode;

[0009] At the receiving end, error correction decoding is performed on the data frame sequence. The pseudo-random scrambling code is extracted from the error pattern detected during the decoding process. The pseudo-random scrambling code is correlated with the local scrambling code template to decode the clock synchronization reference, and the time domain position of the correlation peak of the correlation operation is recorded.

[0010] The trajectory of the time domain position of the relevant peak is analyzed, and a drift trend model reflecting the accumulation of frequency deviation between the two ends is constructed. The drift trend model is used to predict the future offset of the receiving clock and generate compensation instructions to drive the frequency adjustment unit of the receiving clock source.

[0011] The residual deviation between the receiver clock after frequency adjustment and the newly decoded clock synchronization reference is monitored, and the drift trend model is updated and the code length of the pseudo-random scrambling code is adjusted according to the residual deviation.

[0012] Monitoring a sequence of data frames transmitted in a wired network, parsing the frame structure of the data frame sequence, and locating redundant coded segments used for error checking include:

[0013] An optical splitter coupler is connected in series in the transmission link of the wired network. The optical splitter coupler splits the transmitted optical signal into a transmission optical path and a listening optical path according to a preset split ratio. The transmission optical path transmits the data frame sequence, and the listening optical path converts the split signal into an electrical signal through a photoelectric conversion module and outputs it to the signal processing unit.

[0014] The signal processing unit performs adaptive equalization on the electrical signal to compensate for channel distortion, extracts the bit stream and accompanying clock from the equalized signal, and uses the accompanying clock to establish a sampling reference synchronized with the data frame sequence.

[0015] Based on the sampling reference, the frame parsing state machine sequentially identifies the preamble, frame delimiter, address field, and data field. When the start identifier of the check field is identified, the current bit position is locked and marked as the start of the redundant coding segment.

[0016] The bit stream is continuously received starting from the beginning of the redundant coded segment. The termination position of the redundant coded segment is determined by detecting the frame interval signal. The bit sequence between the beginning and the termination position is extracted as the redundant coded segment, and the bit length of the redundant coded segment is associated with the frame sequence number and stored.

[0017] Identifying the error correction code type and its error correction tolerance used in the redundant coded segments, and encoding the clock synchronization reference into a pseudo-random scrambling code, including:

[0018] Extract the row and column dimensions and column weight distribution of the parity check matrix from the redundant coding segment, combine the row and column dimensions and column weight distribution into a structural fingerprint, perform similarity matching with the standard code pattern database through the structural fingerprint, and output the error correction code type identifier;

[0019] Read the corresponding design distance parameter according to the error correction code type identifier, and determine the error correction tolerance threshold based on the relationship between the design distance parameter and the error correction radius of the decoding algorithm;

[0020] The phase information of the clock source at the transmitting end and the phase information of the clock source at the receiving end are collected. The phase information is differentially processed to obtain the phase deviation vector. The phase deviation vector is quantized into a digital sequence as a clock synchronization reference.

[0021] A clock synchronization reference is input to a pseudo-random sequence generator, which drives the pseudo-random sequence generator to perform state iteration based on primitive polynomials. The output bit stream is extracted from the state iteration process to form a pseudo-random scrambling code.

[0022] Calculate the Hamming weight of the pseudo-random scrambling code, determine the constraint relationship between the Hamming weight and the error correction tolerance threshold, compress the pseudo-random scrambling code by truncating or folding when the Hamming weight exceeds the error correction tolerance threshold, and maintain the pseudo-random scrambling code structure and output it for error mode construction when the Hamming weight meets the error correction tolerance threshold.

[0023] Introducing a controlled error pattern corresponding to the pseudo-random scrambling code and within the error correction tolerance into the redundant coded segment, so that the clock synchronization reference is embedded in the data frame sequence in the form of the error pattern, includes:

[0024] Extract the starting bit segment of the pseudo-random scrambling code as the initial state value, perform a linear feedback shift operation based on the initial state value to generate a pseudo-random position sequence, and determine the target bit position to be flipped in the redundant coding segment according to the pseudo-random position sequence.

[0025] Read the current state of the target bit position, perform a logical reversal on the current state to obtain the flipped state, and write the flipped state back to the target bit position to form a perturbation coded segment;

[0026] The perturbation coding segment is decoded to obtain the recovery codeword. The number of difference positions between the recovery codeword and the perturbation coding segment is compared to determine whether the number of difference positions does not exceed the maximum error correction capability value specified by the error correction tolerance.

[0027] When the number of difference positions does not exceed the maximum error correction capability value, the perturbation coded segment is written into the data frame sequence as a controlled error mode; when the number of difference positions exceeds the maximum error correction capability value, the feedback connection structure of the linear feedback shift operation is simplified to reduce the operation bit width, the pseudo-random position sequence is regenerated and the target bit position is updated, and the logic inversion and decoding operations are repeated until the number of difference positions meets the maximum error correction capability value constraint.

[0028] At the receiving end, error correction decoding is performed on the data frame sequence. The pseudo-random scrambling code is extracted from the error patterns detected during the decoding process. The pseudo-random scrambling code is correlated with a local scrambling code template to decode the clock synchronization reference, and the time-domain position of the correlation peak of the correlation operation is recorded, including:

[0029] Error correction decoding is performed on the redundant coded segments of the data frame sequence to obtain the syndrome vector. The syndrome vector is parsed to obtain the error location polynomial. The error location polynomial is solved to obtain the root set. The root set is mapped to the bit flip position index. The bit flip position index is used to extract the bit state before flipping in the redundant coded segments to form an error pattern. The error pattern is subjected to reverse scrambling operation to eliminate the linear transformation introduced by the encoding and obtain the original scrambling state.

[0030] The original scrambling code state and the local scrambling code template are subjected to time-domain sliding correlation operation to generate a correlation function curve. The peak value is searched on the correlation function curve and the horizontal axis position of the peak value is extracted as the coarse synchronization time. A local time window is established with the coarse synchronization time as the center. Parabolic interpolation fitting is performed on the correlation function curve within the local time window, and the horizontal coordinate of the vertex of the fitted parabola is calculated as the precise synchronization time.

[0031] For continuously received data frames, the precise synchronization time is recorded sequentially to form a time sequence. Linear fitting is performed on the time sequence to obtain the time evolution slope. The frequency deviation of the clock synchronization reference is determined based on the time evolution slope.

[0032] Analyzing the trajectory of the time-domain position change of the relevant peak, a drift trend model reflecting the accumulation of frequency deviation between the two ends of the clock is constructed. This drift trend model is then used to predict the future offset of the receiving clock and generate compensation commands to drive the frequency adjustment unit of the receiving clock source, including:

[0033] Extract the time-domain positions of the relevant peaks corresponding to the continuously received data frames to form the original trajectory sequence. Perform wavelet decomposition on the original trajectory sequence to separate the low-frequency approximation coefficients and high-frequency detail coefficients. Calculate the energy proportion of the low-frequency approximation coefficients in each frequency band and select the frequency band with the largest energy proportion as the dominant frequency band.

[0034] The low-frequency approximation coefficients are identified by recursive least squares method. Historical observation data are given decreasing weights by forgetting factor. The time-varying model parameter vector is extracted from the parameter identification results. A drift trend model is established in the form of autoregressive moving average.

[0035] The phase-locked loop lock status flag of the receiving clock source and the slope of the voltage-controlled oscillator tuning curve are read as constraints to limit the upper and lower bounds of the prediction output of the drift trend model. Prediction operations are performed between the upper and lower bounds of the prediction output to obtain the expected value of the time domain position at the end of the prediction time window.

[0036] The tracking error between the expected value of the time-domain position and the real-time measurement value is calculated and the future offset is extracted. The future offset is converted into a frequency correction instruction code through a compensation gain coefficient and transmitted to the frequency adjustment unit of the receiving clock source through a serial communication protocol.

[0037] The low-frequency approximation coefficients are parameterized using recursive least squares. A forgetting factor is used to assign decreasing weights to historical observation data. The time-varying model parameter vector is extracted from the parameter identification results. A drift trend model is established using an autoregressive moving average, including:

[0038] The low-frequency approximation coefficients are standardized, and the order of the autoregressive model is determined by the decay characteristics of the partial autocorrelation function, and the order of the moving average model is determined by the truncation characteristics of the autocorrelation function.

[0039] A regression matrix is ​​constructed based on the order of the autoregressive model and the order of the moving average model. The regression matrix is ​​decomposed using the recursive least squares method. In each recursive iteration, the gain matrix is ​​updated using the deviation between the current observed value and the predicted value. The parameter estimation vector is corrected using the gain matrix. The error covariance matrix is ​​updated exponentially using the forgetting factor.

[0040] When the iterative change magnitude of the parameter estimation vector satisfies the convergence condition, the time-varying model parameter vector is output, and the time-varying model parameter vector is divided into an autoregressive coefficient group and a moving average coefficient group according to the order of the autoregressive model and the order of the moving average model.

[0041] A linear recursive relationship for historical time-domain positions is established based on the set of autoregressive coefficients, and a weighted cumulative relationship for random disturbances is established based on the set of moving average coefficients. The linear recursive relationship and the weighted cumulative relationship are combined to form a drift trend model in the form of an autoregressive moving average.

[0042] A second aspect of the present invention provides a wired network parasitic time synchronization control system, comprising:

[0043] The frame monitoring unit is used to monitor the data frame sequence transmitted in the wired network, parse the frame structure of the data frame sequence, and locate the redundant coding segment used for error checking.

[0044] An error embedding unit is used to identify the error correction code type and its error correction tolerance used in the redundant coding segment, encode the clock synchronization reference into a pseudo-random scrambling code, introduce a controlled error mode in the redundant coding segment that corresponds to the pseudo-random scrambling code and is within the error correction tolerance, so that the clock synchronization reference is embedded in the data frame sequence in the form of an error mode.

[0045] The decoding and extraction unit is used to perform error correction decoding on the data frame sequence at the receiving end, extract the pseudo-random scrambling code from the error pattern detected during the decoding process, perform correlation operation on the pseudo-random scrambling code and the local scrambling code template to decode the clock synchronization reference, and record the time domain position of the correlation peak of the correlation operation.

[0046] The drift compensation unit is used to analyze the change trajectory of the time domain position of the relevant peak, construct a drift trend model that reflects the accumulation of frequency deviation between the two ends of the clock, use the drift trend model to predict the future offset of the receiving end clock and generate compensation instructions to drive the frequency adjustment unit of the receiving end clock source.

[0047] The deviation update unit is used to monitor the residual deviation between the frequency-adjusted receiver clock and the newly decoded clock synchronization reference, update the drift trend model according to the residual deviation, and adjust the code length of the pseudo-random scrambling code.

[0048] A third aspect of the present invention provides an electronic device, comprising:

[0049] processor;

[0050] Memory used to store processor-executable instructions;

[0051] The processor is configured to invoke instructions stored in the memory to execute the aforementioned method.

[0052] A fourth aspect of the present invention provides a computer-readable storage medium having stored thereon computer program instructions that, when executed by a processor, implement the aforementioned method.

[0053] The redundant coded segments of wired network data frames serve as parasitic carriers for clock synchronization references. They do not require the allocation of dedicated time slots or the addition of extra data packets. Synchronization information is embedded in a controlled error mode, which does not substantially damage the error checking capability of the original frame. The error correction decoding process maintains its original logic, and the network protocol stack does not require any modification. Upper-layer services are completely unaware of the existence of the synchronization process. Time synchronization is completed under the conditions of zero bandwidth overhead and zero frame format changes, making it particularly suitable for bandwidth-sensitive or protocol-closed industrial control networks.

[0054] The receiver directly extracts the pseudo-random scrambling code from the error pattern of the error correction decoding. The correlation operation removes the synchronization reference from the noise background. The spreading gain effectively suppresses channel interference and burst errors. The time domain position of the correlation peak accurately identifies the arrival time of the clock reference. The decoded synchronization reference has a sub-microsecond time resolution. The synchronization information is scattered in the redundant coding field and is not exposed in the plaintext data area. The anti-interception and anti-tampering capabilities are significantly enhanced, and the security of the synchronization link is improved.

[0055] The drift trend model estimates the cumulative pattern of frequency deviation between the two ends in real time based on the trajectory of the correlation peak position change, and performs advance compensation for future offsets, effectively offsetting the accumulation of synchronization errors caused by crystal oscillator drift and temperature changes, ensuring that the receiver clock remains stably aligned with the reference source over a long period of time. The residual deviation feedback mechanism drives the drift model to continuously correct itself, while dynamically adjusting the pseudo-random scrambling code length. In low signal-to-noise ratio environments, the code length is automatically extended to enhance anti-interference capabilities, and in high service loads, the code length is automatically shortened to reduce latency, achieving an adaptive balance between synchronization accuracy and resource consumption. The robustness, maintainability, and long-term stability of the overall time synchronization system are significantly improved. Attached Figure Description

[0056] Figure 1 This is a flowchart illustrating the parasitic time synchronization control method for wired networks according to an embodiment of the present invention.

[0057] Figure 2 This is a flowchart illustrating the method for identifying redundant coded segments and generating pseudo-random scrambling codes according to an embodiment of the present invention.

[0058] Figure 3 A graph showing the cumulative evolution trend of clock skew;

[0059] Figure 4 This is a diagram showing residual bias feedback and code length adaptive adjustment. Detailed Implementation

[0060] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0061] The technical solution of the present invention will be described in detail below with reference to specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments.

[0062] Figure 1 This is a flowchart illustrating a parasitic time synchronization control method for wired networks according to an embodiment of the present invention. The present invention provides a parasitic time synchronization control method for wired networks, comprising:

[0063] Monitor the data frame sequence transmitted in the wired network, parse the frame structure of the data frame sequence and locate the redundant coding segment used for error verification;

[0064] Identify the error correction code type and its error correction tolerance used in the redundant coding segment, encode the clock synchronization reference as a pseudo-random scrambling code, introduce a controlled error mode corresponding to the pseudo-random scrambling code and located within the error correction tolerance in the redundant coding segment, so that the clock synchronization reference is embedded in the data frame sequence in the form of an error mode;

[0065] At the receiving end, error correction decoding is performed on the data frame sequence. The pseudo-random scrambling code is extracted from the error pattern detected during the decoding process. The pseudo-random scrambling code is correlated with the local scrambling code template to decode the clock synchronization reference, and the time domain position of the correlation peak of the correlation operation is recorded.

[0066] The trajectory of the time domain position of the relevant peak is analyzed, and a drift trend model reflecting the accumulation of frequency deviation between the two ends is constructed. The drift trend model is used to predict the future offset of the receiving clock and generate compensation instructions to drive the frequency adjustment unit of the receiving clock source.

[0067] The residual deviation between the receiver clock after frequency adjustment and the newly decoded clock synchronization reference is monitored, and the drift trend model is updated and the code length of the pseudo-random scrambling code is adjusted according to the residual deviation.

[0068] Monitoring a sequence of data frames transmitted in a wired network, parsing the frame structure of the data frame sequence, and locating redundant coded segments used for error checking include:

[0069] An optical splitter coupler is connected in series in the transmission link of the wired network. The optical splitter coupler splits the transmitted optical signal into a transmission optical path and a listening optical path according to a preset split ratio. The transmission optical path transmits the data frame sequence, and the listening optical path converts the split signal into an electrical signal through a photoelectric conversion module and outputs it to the signal processing unit.

[0070] The signal processing unit performs adaptive equalization on the electrical signal to compensate for channel distortion, extracts the bit stream and accompanying clock from the equalized signal, and uses the accompanying clock to establish a sampling reference synchronized with the data frame sequence.

[0071] Based on the sampling reference, the frame parsing state machine sequentially identifies the preamble, frame delimiter, address field, and data field. When the start identifier of the check field is identified, the current bit position is locked and marked as the start of the redundant coding segment.

[0072] The bit stream is continuously received starting from the beginning of the redundant coded segment. The termination position of the redundant coded segment is determined by detecting the frame interval signal. The bit sequence between the beginning and the termination position is extracted as the redundant coded segment, and the bit length of the redundant coded segment is associated with the frame sequence number and stored.

[0073] When implementing non-intrusive eavesdropping in wired network transmission links, it is necessary to acquire complete data frame signals without interrupting existing service transmissions. To achieve this, an optical splitter coupler is connected in series at appropriate nodes in the transmission link. This device utilizes the evanescent field coupling principle of optical waveguides to split the transmitted optical signal into two independent optical paths according to a preset split ratio. The transmission path maintains the original link's transmission characteristics, and the data frame sequence continues to propagate downstream through this path. The insertion loss of the original communication link is controlled within an acceptable range, typically not exceeding 0.5dB, to ensure that the main link signal quality is not substantially affected. The eavesdropping optical path introduces the coupled split signal into a photoelectric conversion module. This module incorporates a high-sensitivity photodiode and a transimpedance amplifier to convert changes in optical power into corresponding voltage signals, which are then output to the subsequent signal processing unit. The split ratio needs to be balanced between the signal-to-noise ratio of the eavesdropping optical path and the power loss of the transmission path. In typical applications, the split ratio is set to 90:10, meaning 90% of the optical power is used for transmission and 10% is used for eavesdropping.

[0074] After receiving the electrical signal converted from photoelectric signal, the signal processing unit needs to perform adaptive equalization to compensate for distortions introduced during channel transmission. Due to the fiber length in the monitoring optical path, the frequency response characteristics of the optoelectronic devices, and the bandwidth limitations of subsequent circuits, the electrical signal often suffers from inter-symbol interference and amplitude distortion. The adaptive equalizer adopts a decision feedback equalization structure. The tap coefficients of both the feedforward filter and the feedback filter are iteratively updated using the least mean square algorithm. The converged equalizer can effectively expand the compressed eye diagram, reducing the bit decision error rate to within a reliable operating range. After equalization, the bit stream and accompanying clock are extracted from the equalized signal. The extraction of the accompanying clock uses a clock data recovery circuit, which tracks the signal transition edges through a phase-locked loop and outputs a clock signal synchronized with the data stream. The extracted accompanying clock directly reflects the symbol rate at the transmitting end. Using this clock as a sampling reference ensures that the sampling time of each bit position in the subsequent frame parsing process is strictly aligned with the original data frame sequence, thereby establishing a sampling reference synchronized with the data frame sequence.

[0075] Based on the aforementioned sampling benchmark, the frame parsing state machine performs layer-by-layer structure identification of the bitstream. The frame parsing state machine is designed as a multi-state finite automaton, and its state transition logic is defined according to the frame format specification of the target network protocol. Starting from the idle state, the state machine continuously detects the preamble pattern in the bitstream. The preamble is typically composed of a specific alternating code pattern; for example, in an Ethernet frame, the preamble is a 7-byte repeating sequence of 0xAA. After detecting this pattern through sliding window comparison, the state machine enters the preamble recognition state. Subsequently, it detects the frame delimiter, a special byte pattern distinct from the preamble. Its appearance marks the beginning boundary of the valid frame content. After detecting the frame delimiter, the state machine jumps to the frame content parsing state. In the frame content parsing state, the state machine sequentially reads the address field and data field according to the byte number or field length specified by the protocol. The address field contains the source and destination addresses, and the data field length may be a fixed value or dynamically specified by a length type field. After the data field is read, the state machine enters the verification field waiting state. At this time, the current bit position is the starting point of the redundant coding segment. The state machine locks the bit position and marks it as the starting point of the redundant coding segment, and records the corresponding frame sequence number and timestamp information.

[0076] Starting from the beginning of the redundant coded segment, subsequent bit streams are continuously received and temporarily stored in a shift register. The end position of the redundant coded segment is determined by detecting the frame interval signal. The frame interval signal refers to the silent interval between two adjacent frames, which is represented by a specific duration of no signal or a specific level state at the physical layer. For example, the Ethernet protocol specifies a minimum inter-frame interval of 96 bits. When the frame interval signal is detected, the state machine determines that the redundant coded segment of the current frame has ended, and extracts the complete bit sequence from the beginning of the redundant coded segment to the start position of the frame interval from the shift register, as the content of the redundant coded segment of that frame. After extraction, the length of this bit sequence is counted, i.e., the bit length of the redundant coded segment. and will With the corresponding frame number The data is stored in the associated data table and written to the frame structure information table. The frame structure information table is indexed by the frame sequence number, and each record contains the absolute bit position of the start of the redundant coded segment and the bit length of the redundant coded segment. And the corresponding accompanying clock phase information, which can be used in subsequent error correction code type identification and clock synchronization reference embedding processes.

[0077] In real-world deployment scenarios, wired networks may carry data frames of various protocol types. The frame structures differ between protocols, and the location and length of redundant coded segments also vary. To improve the adaptability of the frame parsing state machine, its state transition rules are designed to be configurable, supporting the loading of frame format descriptions for different protocols through parameterized configuration files. This allows for adaptation to new network protocols without modifying hardware logic. When multiple protocols are simultaneously transmitted in the network, the frame parsing state machine performs preliminary frame type classification during the preamble recognition stage. Based on the classification results, it selects the corresponding state transition path, ensuring that redundant coded segments of different data frame types can be accurately located.

[0078] For the length of redundant coded segments For protocols with dynamic changes, a length self-learning mechanism is also required. In the initial stage, the frame parsing state machine statistically analyzes the lengths of redundant coded segments in several consecutively received frames, calculates the mode as the typical redundant coded segment length for that protocol type, and writes this value into the protocol configuration table for reference during subsequent frame processing. If the actual detected length of a frame deviates from the typical value by more than a preset threshold, an anomaly flag is triggered, and the redundant coded segment information of that frame is not included in the subsequent clock synchronization reference embedding calculation, thus avoiding the amplification of synchronization errors due to frame structure anomalies. Through the complete process of establishing the monitoring link, signal recovery, frame parsing, and redundancy coded segment location described above, a precise location foundation is laid for subsequently embedding the clock synchronization reference into the data frame sequence in a controlled error mode.

[0079] Identifying the error correction code type and its error correction tolerance used in the redundant coded segments, and encoding the clock synchronization reference into a pseudo-random scrambling code, including:

[0080] Extract the row and column dimensions and column weight distribution of the parity check matrix from the redundant coding segment, combine the row and column dimensions and column weight distribution into a structural fingerprint, perform similarity matching with the standard code pattern database through the structural fingerprint, and output the error correction code type identifier;

[0081] Read the corresponding design distance parameter according to the error correction code type identifier, and determine the error correction tolerance threshold based on the relationship between the design distance parameter and the error correction radius of the decoding algorithm;

[0082] The phase information of the clock source at the transmitting end and the phase information of the clock source at the receiving end are collected. The phase information is differentially processed to obtain the phase deviation vector. The phase deviation vector is quantized into a digital sequence as a clock synchronization reference.

[0083] A clock synchronization reference is input to a pseudo-random sequence generator, which drives the pseudo-random sequence generator to perform state iteration based on primitive polynomials. The output bit stream is extracted from the state iteration process to form a pseudo-random scrambling code.

[0084] Calculate the Hamming weight of the pseudo-random scrambling code, determine the constraint relationship between the Hamming weight and the error correction tolerance threshold, compress the pseudo-random scrambling code by truncating or folding when the Hamming weight exceeds the error correction tolerance threshold, and maintain the pseudo-random scrambling code structure and output it for error mode construction when the Hamming weight meets the error correction tolerance threshold.

[0085] Extracting the structural information of the parity-check matrix from the redundant coded segments is the core step in identifying the error-correcting code type. Specifically, for the monitored data frame, the parity-check matrix corresponding to its redundant coded segments is parsed, and the number of rows in the matrix is ​​counted. With column number Simultaneously, the number of non-zero elements is calculated column by column to obtain the column weight distribution vector. ,in Indicates the first Hamming weight of the column. (This refers to the row and column dimensions.) with column weight distribution vector By splicing and combining, a high-dimensional fingerprint structure is formed. Structural fingerprint It can uniquely or nearly uniquely characterize the algebraic structure of a specific error-correcting code. Different code types (such as BCH code, RS code, LDPC code, convolutional code, etc.) have significant differences in the ratio of row and column dimensions and the distribution of column weight, so they can be used as effective features for code type recognition.

[0086] structural fingerprint Similarity matching is performed with a set of reference fingerprints in a pre-built standard code pattern database. The similarity metric uses normalized Euclidean distance or cosine similarity. A matching score is calculated for each reference fingerprint, and the code pattern identifier corresponding to the reference entry with the highest matching score is selected. The output is the recognition result. The standard code pattern database stores reference fingerprints of the redundant coding types used by mainstream wired network protocols, including the check matrix features corresponding to various CRC polynomials, the degree distribution parameters of LDPC codes, and the minimum distance and generator polynomial information of BCH codes. When the matching score is lower than the preset threshold, an anomaly flag is triggered, indicating that the redundant coding segment of the current frame may have used a non-standard or proprietary code pattern. At this time, the scrambling embedding operation for that frame is paused, and subsequent frames are monitored to accumulate more samples.

[0087] Based on the identified error correction code type identifier Read the corresponding design distance parameters from the database. This refers to the minimum Hamming distance of the code type. There is a definite algebraic relationship between the error correction radius and the design distance: for hard-decision decoding algorithms, the error correction radius... satisfy For soft-decision or iterative decoding algorithms, the actual error correction capability can be slightly higher than that of hard-decision algorithms. However, to be conservative, the error correction tolerance threshold should be set accordingly. Unified hard judgment error correction radius ,Right now This threshold directly determines the upper limit of the number of controlled error bits that can be safely introduced into the redundant coded segments. Exceeding this threshold will cause the receiver decoder to be unable to correctly recover the original data, which will lead to frame loss or error propagation and affect normal services.

[0088] Phase information of the clock source at the acquisition end Phase information with the receiving clock source Both represent the absolute value of the current clock phase in radians. A differential operation is performed on the two phase information streams to obtain the phase deviation. Because clock frequency deviations cause phase deviations to accumulate over time, it is necessary to record data at multiple consecutive sampling times. This generates a phase-biased time series. The time series is then uniformly quantized according to a predetermined quantization precision, with a quantization step size of... Based on the target synchronization accuracy requirements, the quantized integer sequence constitutes the clock synchronization reference. ,in To quantify the number of points, each element This is the quantized integer value of the phase deviation at the corresponding moment. Clock synchronization reference. It carries all the information about the double-ended clock skew in a compact digital sequence and is the direct input for subsequent scrambling coding.

[0089] Clock synchronization reference This initial state or seed is input into the pseudo-random sequence generator. The pseudo-random sequence generator is based on primitive polynomials. When constructing a linear feedback shift register (LFSR), the primitive polynomial must be chosen to satisfy its order. Match the target scrambling code length. Synchronize the clock reference. The quantized values ​​are sequentially loaded into the initial register state of the LFSR, driving the LFSR according to the feedback polynomial. The state is iterated, and the last bit of the output register is output in each iteration. After several iterations, an output bit stream is formed. A segment of predetermined length is extracted from this output bit stream to obtain the pseudo-random scrambling code. ,in For the scrambling code length, each element Since the primitive polynomial guarantees the maximum linear complexity and good autocorrelation properties of the LFSR output sequence, pseudo-random scrambling codes... It has statistical characteristics similar to white noise, which is beneficial for reliable extraction at the receiving end through relevant operations.

[0090] Calculate pseudo-random scrambling codes Hamming weight That is, the number of bits with a value of 1 in the scrambling code. With error correction tolerance threshold A comparison is made to determine whether the current scrambling code can be safely embedded into the redundant coded segment without exceeding the decoder's error correction capability boundary. When This indicates that direct embedding would introduce too many error bits, necessitating scrambling code compression. Compression operations are performed in two ways: truncation is performed from the scrambling code... Before the retention in China The subsequence corresponding to the bit positions with a value of 1 is used to force the remaining positions to be zero, so that the processed scrambling Hamming weight is exactly equal to The folding operation is to fold the scrambling code. according to After segmenting the folding step length, each segment is XORed and superimposed to obtain a new scrambling code with compressed length. Then, the positions exceeding 1 in the superposition result are truncated and normalized to ensure that the final Hamming weight does not exceed 1 / 2. The choice between the two compression methods is based on the number of remaining available bits in the redundant coded segment of the current frame: if there are enough available bits, truncation is preferred to retain more correlation peak sharpness; if there are few available bits, folding is used to maintain the recoverability of the clock synchronization reference within a shorter code length.

[0091] when At that time, scrambling code The structure remains unchanged, and the direct output is used to construct subsequent error modes. At this point, the bit positions with a value of 1 in the pseudo-random scrambling code are mapped to controlled flips of the corresponding positions in the redundant coded segments, forming error modes directly associated with the clock synchronization reference. Because the Hamming weight satisfies the error correction tolerance constraint, the receiver decoder can detect and locate these controlled errors during error correction decoding. This allows the clock synchronization reference to be implicitly embedded in the normal data frame transmission process of the wired network without affecting normal data services, achieving precise synchronization control of the receiver clock.

[0092] Introducing a controlled error pattern corresponding to the pseudo-random scrambling code and within the error correction tolerance into the redundant coded segment, so that the clock synchronization reference is embedded in the data frame sequence in the form of the error pattern, includes:

[0093] Extract the starting bit segment of the pseudo-random scrambling code as the initial state value, perform a linear feedback shift operation based on the initial state value to generate a pseudo-random position sequence, and determine the target bit position to be flipped in the redundant coding segment according to the pseudo-random position sequence.

[0094] Read the current state of the target bit position, perform a logical reversal on the current state to obtain the flipped state, and write the flipped state back to the target bit position to form a perturbation coded segment;

[0095] The perturbation coding segment is decoded to obtain the recovery codeword. The number of difference positions between the recovery codeword and the perturbation coding segment is compared to determine whether the number of difference positions does not exceed the maximum error correction capability value specified by the error correction tolerance.

[0096] When the number of the difference locations does not exceed the maximum error correction capability value, the perturbation coded segment is written into the data frame sequence as a controlled error mode;

[0097] When the number of discrepancies exceeds the maximum error correction capability value, the feedback connection structure of the linear feedback shift operation is simplified to reduce the operation bit width, a pseudo-random position sequence is regenerated and the target bit position is updated, and the logic inversion and decoding operations are repeated until the number of discrepancies meets the maximum error correction capability value constraint.

[0098] In the process of determining the target bit position, from pseudo-random scrambling codes Extract the starting bit segment from the first few bits and use it as the initial state value of the linear feedback shift register. The length of this initial state value is determined by the number of register stages in the linear feedback shift register, and is typically taken from the first few bits of the scrambling code. The initial load value is composed of bits, where This is a register series parameter. The linear feedback shift operation is driven by this initial state, outputting one status bit per clock cycle, continuously outputting... After 1 bit, a pseudo-random position sequence is formed. ,in This is the length of the position sequence. The bit length of each element in the redundant coded segment The modulo operation yields the set of indices mapped to the redundant coded segment, thereby determining the set of target bit positions that need to be flipped. This method of generating position sequences based on linear feedback shift operations gives the distribution of target bit positions good pseudo-randomness, avoiding errors from concentrating in fixed areas of redundant coded segments, thereby reducing the likelihood of the receiver performing statistical analysis on the perturbation pattern.

[0099] Read For each index corresponding to the current bit state of the redundant coded segment, perform a logical inversion operation on each target position, that is, reverse the original value. Transform into ,in , This is the flipped state. All flipped states are written back sequentially to their corresponding target bit positions to form a perturbation coded segment. Compared to the original redundant coded segment, the perturbed coded segment only differs in... The specified position changes state, while the other positions remain unchanged. This precise point-flipping method ensures the reproducibility of the controlled error pattern. The receiver only needs to hold the same local scrambling template and linear feedback shift register structure parameters to accurately reconstruct the position distribution of the error pattern during the decoding process, thereby extracting the embedded clock synchronization reference information.

[0100] For the perturbation coding segment Perform the same decoding operation as the receiving end to obtain the recovered codeword. .calculate and Number of differences between positions That is, to calculate the Hamming weight after XORing the two bits: ,in This represents a bitwise XOR operation. The maximum error correction capability value specified by the error correction tolerance. Comparison. When When the error rate is within the correctable range of the error correction code, it indicates that the number of errors introduced by the current perturbation coding segment is within the correctable range of the error correction code. The error correction decoder at the receiving end can process the frame normally without losing synchronization information. At this point, the error will be... The corresponding redundant coded segment position is written into the data frame sequence as the controlled error mode, completing this round of embedding operation.

[0101] when This indicates that the current pseudo-random position sequence results in overly dense flip positions, exceeding the corrective range of the error-correcting code. Therefore, simplification of the feedback connection structure of the linear feedback shift operation is required. The core idea of ​​this simplification is to reduce the operation bit width, that is, to reduce the number of stages in the linear feedback shift register from... Reduced to ,in After reducing the bit width, the period of the output sequence is shortened, but the probability of repetition at different positions in the pseudo-random position sequence increases, and the number of effective flip positions after modulo mapping is reduced. This will decrease accordingly, thereby reducing The linear feedback shift operation is re-executed with the reduced register series to generate a new pseudo-random position sequence. Update the target bit position set Repeat the logical inversion and decoding operations, and calculate again. and with The comparison is then performed. This iterative process continues, with each iteration further reducing the register stages until... Continue until the constraints are satisfied.

[0102] During the iteration process, the reduction step size of the register series can be set to a fixed value. Each iteration executes To prevent the position sequence from degenerating into a deterministic sequence of all zeros or extremely short periods due to excessively small register levels, a minimum register level limit needs to be set. .when Down to At that time, if Still exceeding Then, a slight perturbation is applied to the initial state value, specifically by flipping the least significant bit of the initial load value. This alters the specific distribution of the position sequence, attempting to obtain a set of flipped positions that satisfy the constraints without changing the register structure. This two-layer adaptive mechanism enables the generation process of controlled error modes to converge to a solution that satisfies the constraints, regardless of the different error correction code parameter configurations.

[0103] In practical applications, for wired network frame structures using BCH or Reed-Solomon codes, the bit length of the redundant coded segment... Typically in the range of tens to hundreds of bits, while the maximum error correction capability value Then it depends on the design distance parameters of the specific code pattern. The decision is made by taking a typical industrial Ethernet frame as an example. Its frame check sequence field is 32 bits long and uses CRC-32 checksum. In this case, the number of controlled error bits that the redundant coding segment can carry is strictly constrained. The initial bit width of the linear feedback shift register is typically set between 8 and 16 levels to achieve a balance between position randomness and controllable error quantity. When the network link quality is poor and the background bit error rate is high, the initial register level can be appropriately shortened to reduce the number of controlled flip bits, leaving more error correction margin for background bit errors, and ensuring that the receiver can still stably extract the embedded clock synchronization reference information even in the presence of background noise.

[0104] After writing the perturbation coded segment that finally satisfies the constraints into the data frame sequence, the number of register levels used in this operation is also recorded. The initial state value is used for reuse in the generation of controlled error patterns in subsequent frames, avoiding the need to re-execute the complete iterative search process for each frame, thereby reducing the impact of processing latency on timing accuracy. When extracting error patterns, the receiver reconstructs a pseudo-random position sequence based on the same register levels and initial state values, compares it with the actual detected error positions, and completes reliable decoding of the clock synchronization reference.

[0105] At the receiving end, error correction decoding is performed on the data frame sequence. The pseudo-random scrambling code is extracted from the error patterns detected during the decoding process. The pseudo-random scrambling code is correlated with a local scrambling code template to decode the clock synchronization reference, and the time-domain position of the correlation peak of the correlation operation is recorded, including:

[0106] Error correction decoding is performed on the redundant coded segments of the data frame sequence to obtain the syndrome vector. The syndrome vector is parsed to obtain the error location polynomial. The error location polynomial is solved to obtain the root set. The root set is mapped to the bit flip position index.

[0107] Based on the bit flip position index, the bit state before flipping is extracted from the redundant coding segment to form an error pattern. The error pattern is then subjected to a reverse scrambling operation to eliminate the linear transformation introduced by the coding and obtain the original scrambling state.

[0108] The original scrambling code state and the local scrambling code template are subjected to time-domain sliding correlation operation to generate a correlation function curve. The peak value is searched on the correlation function curve and the horizontal axis position of the peak value is extracted as the rough synchronization time.

[0109] A local time window is established with the coarse synchronization time as the center. Parabolic interpolation fitting is performed on the relevant function curve within the local time window, and the x-coordinate of the vertex of the fitted parabola is calculated as the precise synchronization time.

[0110] For continuously received data frames, the precise synchronization time is recorded sequentially to form a time sequence. Linear fitting is performed on the time sequence to obtain the time evolution slope. The frequency deviation of the clock synchronization reference is determined based on the time evolution slope.

[0111] When performing error correction decoding on redundant coded segments in a data frame sequence, the received redundant coded segment codewords are multiplied by the parity check matrix to obtain the syndrome vector. .like If the vector is all zeros, it indicates that no error was detected in that segment; if If it is a non-zero vector, then use Constructing error location polynomials For algebraic error-correcting codes such as BCH codes or Reed-Solomon codes, the Berlekamp-Massey algorithm or the Euclidean algorithm can be used to extract errors from the adjoint vector. Iterative solution of the error location polynomial The coefficients. The roots of the mislocated polynomial correspond to the finite field. For specific elements in the finite field, candidate roots are enumerated one by one using the Chien search algorithm to find the elements that satisfy the condition. index Collect as the root set ,in Let be the primitive element of a finite field. Root set. Each element in the code corresponds to a bit position that is flipped within the redundant coded segment. Mapped to a set of bit flip position indices This allows for precise location of all flip positions introduced by the controlled error mode.

[0112] Based on the set of bit flip positions The bit states at corresponding positions are extracted from the received original codeword of the redundant coded segment. These bit states are the values ​​after the flip operation. Because the transmitting end performs a logical inversion on specific positions of the original redundant coded segment when embedding the clock synchronization reference, the values ​​read by the receiving end at these positions are exactly the flipped states. These bit values ​​are then processed according to... The sequential arrangement forms the error pattern vector. Error pattern It contains pseudo-random scrambling code information embedded at the sender, but because the sender introduces a linear transformation (including an XOR operation with the scrambling code template and a position mapping transformation) when generating the controlled error mode, it is necessary to... Perform the corresponding inverse scrambling operation. The essence of the inverse scrambling operation is to... Multiply by the inverse of the linear transformation matrix used by the sender, or equivalently, multiply by the inverse of the linear transformation matrix used by the sender. By performing an XOR operation again with the known scrambling mask sequence, the effects of the linear transformation are eliminated, and the original scrambling state vector is restored. . This refers to the original bit sequence of the pseudo-random scrambling code used by the transmitting end to encode the clock synchronization reference.

[0113] The original state vector of the scrambling code Scrambling templates stored locally Perform time-domain sliding correlation operations. Sliding correlation operations are performed by shifting bit by bit along the time axis. Calculate each shift offset Down and Normalized cross-correlation value Generate the correlation function curve. Normalize the cross-correlation value. The calculation method involves comparing the bits at corresponding positions one by one, counting the ratio of the number of identical bits to the total number of bits, and then performing a mean-removal process to ensure that... The range of values ​​is normalized to Interval. When shift bias When aligned with the starting phase when the scrambling code is embedded at the transmitter, A significant peak will appear, with an amplitude much higher than that of the sidelobes. (This will be observed in the correlation function curve.) Search for the maximum value point and extract the horizontal axis position corresponding to that maximum value. This serves as a rough synchronization point. Since the temporal resolution of the sliding correlation operation is limited by the sampling interval of a single frame, It can only provide synchronous estimates with integer sampling precision, and there is a certain quantization error, so it needs to be further refined.

[0114] With rough synchronization time Expanding on both sides of the center. There are 1 sampling point, and a width of is established. A local time window. Within this local time window, the correlation function curve is taken. Discrete sampled values, in parabolic model Perform least-squares fitting on the data points within the window to solve for the parabolic coefficients. , , The x-coordinate of the vertex of the fitted parabola is determined by... Give, This refers to the precise synchronization time. Parabolic interpolation fitting can improve the estimation accuracy of the synchronization time from integer sampling intervals to sub-sampling levels, significantly reducing the quantization error of the synchronization time. Local time window width parameter. The selection of the value needs to balance fitting accuracy and the ability to suppress sidelobe interference, and is usually chosen as follows: The scrambling code length is set to 3% to 8% to ensure that the window only contains the monotonic region near the main peak, thus avoiding the involvement of sidelobe points in the fitting and causing the peak estimation to shift.

[0115] For multiple consecutively received data frames, the above-described procedures of syndrome parsing, error pattern extraction, reverse scrambling recovery, and correlation peak search are executed sequentially to record the precise synchronization moment for each frame. ,in The frames are indexed by their sequence numbers, thus forming a time sequence. Under ideal clock synchronization conditions, the difference in precise synchronization times between adjacent frames should equal the frame period, and the time sequence exhibits a strictly arithmetic linear growth trend. However, due to clock frequency deviations between the transmitter and receiver, the actual growth slope of the time sequence deviates from the theoretical frame period. Perform linear fitting and build a model ,in The slope of the time evolution obtained by fitting, The fitting intercept. The evolution slope at time step [time]. Compared with the theoretical frame period The difference reflects the frequency deviation of the two-ended clock; the estimated frequency deviation value... can be The approximate calculation yields the physical meaning of the frequency offset of the receiver clock relative to the transmitter clock per unit time. This frequency offset estimate will serve as the input for subsequent drift trend model construction and frequency compensation command generation, driving the frequency adjustment unit of the receiver clock source to perform precise correction.

[0116] The number of data frames used in linear fitting directly affects the accuracy of frequency deviation estimation. More frames result in better statistical averaging and a smaller standard deviation of the frequency deviation estimate; however, too many frames can lead to increased fitting residuals in the linear model if the clock drift itself changes non-linearly over time, resulting in estimation errors. Therefore, in practical implementation, a sliding window mechanism with a fixed window length can be used. (For example, take 100 to 500 frames) Perform piecewise linear fitting on the time series, update the window and re-estimate the slope after each new frame is received. This allows for the tracking of clock drift dynamics while maintaining sufficient estimation accuracy. When the root mean square value of the fitted residuals exceeds a preset threshold, the window length can be automatically shortened to improve the response speed to clock abrupt changes; when the root mean square value of the residuals is small and the clock is operating stably, the window length is extended to further improve the resolution of frequency deviation estimation.

[0117] Analyzing the trajectory of the time-domain position change of the relevant peak, a drift trend model reflecting the accumulation of frequency deviation between the two ends of the clock is constructed. This drift trend model is then used to predict the future offset of the receiving clock and generate compensation commands to drive the frequency adjustment unit of the receiving clock source, including:

[0118] Extract the time-domain positions of the relevant peaks corresponding to the continuously received data frames to form the original trajectory sequence. Perform wavelet decomposition on the original trajectory sequence to separate the low-frequency approximation coefficients and high-frequency detail coefficients. Calculate the energy proportion of the low-frequency approximation coefficients in each frequency band and select the frequency band with the largest energy proportion as the dominant frequency band.

[0119] The low-frequency approximation coefficients are identified by recursive least squares method. Historical observation data are given decreasing weights by forgetting factor. The time-varying model parameter vector is extracted from the parameter identification results. A drift trend model is established in the form of autoregressive moving average.

[0120] The phase-locked loop lock status flag of the receiving clock source and the slope of the voltage-controlled oscillator tuning curve are read as constraints to limit the upper and lower bounds of the prediction output of the drift trend model. Prediction operations are performed between the upper and lower bounds of the prediction output to obtain the expected value of the time domain position at the end of the prediction time window.

[0121] The tracking error between the expected value of the time-domain position and the real-time measurement value is calculated and the future offset is extracted. The future offset is converted into a frequency correction instruction code through a compensation gain coefficient and transmitted to the frequency adjustment unit of the receiving clock source through a serial communication protocol.

[0122] Extract the temporal positions of the relevant peaks corresponding to the continuously received data frames, and arrange them in the order of frame arrival to form the original trajectory sequence, such as... Figure 3 As shown, Figure 3The horizontal axis represents the data frame number (unit: frame), and the vertical axis represents the cumulative time deviation (unit: nanoseconds, ns) between the receiving clock and the transmitting reference clock. The graph includes a smooth, rising curve, primarily in blue. This curve is not strictly linear but rather a composite of periodic fluctuations and random jitter. The overall monotonically increasing trend of the curve represents the main drift component caused by crystal aging and long-term accumulation of frequency deviation. The periodic fluctuations on the curve simulate the modulation effect of ambient temperature changes on the quartz crystal oscillation frequency, exhibiting slow, sinusoidal fluctuations. The fine spikes attached to the main curve correspond to short-term random errors caused by network transmission jitter and thermal noise. A red dashed trend line is also plotted in the graph. This line, obtained through linear regression fitting of all data points, accurately indicates the current average frequency deviation rate (unit: ns / frame) of both clocks. This graph visually reveals the inherent law of clock deviation evolution over time, concretizing the pure concept of frequency deviation into a visualized cumulative trajectory, providing intuitive data support for subsequent establishment of a parameterized drift trend model.

[0123] The original trajectory sequence records the dynamic evolution of the clock frequency deviation accumulated over time. However, due to the combined effects of network transmission jitter, hardware thermal noise, and quantization errors, the original trajectory sequence often contains disturbances of different frequency components. Discrete wavelet decomposition is performed on the original trajectory sequence, decomposing it into several levels of low-frequency approximation coefficients and high-frequency detail coefficients. The low-frequency approximation coefficients reflect the trend of clock drift, while the high-frequency detail coefficients correspond to short-term jitter and random noise. When calculating the energy proportion of each frequency band, the sum of squares of the coefficients of each frequency band is divided by the sum of squares of all frequency band coefficients to obtain the normalized energy proportion of that frequency band. The frequency band with the largest energy proportion is selected as the dominant frequency band. Subsequent parameter identification and prediction calculations are based on the low-frequency approximation coefficients of this dominant frequency band, thereby effectively suppressing the interference of high-frequency noise on the drift trend estimation.

[0124] In the parameter identification stage, the recursive least squares method is used to identify the low-frequency approximation coefficient sequence of the dominant frequency band online. Let the low-frequency approximation coefficient sequence be... , its first The elements are denoted as The recursive least squares method updates parameter estimates upon receiving a new observation sample, eliminating the need to store all historical data and resulting in lower computational complexity. To enable the parameter identification results to track the slow time-varying nature of clock drift, a forgetting factor is introduced. (The range of values ​​is usually 100) to This assigns exponentially decreasing weights to historical observation data, with historical samples from further back in time receiving smaller weights. Forgetting Factor The selection of the tracking speed needs to be a trade-off between the tracking speed and the estimated variance: The smaller the value, the more sensitive the model is to new data, but the estimation variance also increases accordingly; The larger the value, the more stable the estimation result, but the longer the tracking delay for time-varying characteristics. In practical applications, it can be dynamically adjusted according to the frequency stability index of the clock source. The value of .

[0125] Extracting the time-varying model parameter vector from the identification results of recursive least squares method A drift trend model is established using the Autoregressive Moving Average (ARMA) method. The ARMA model outputs low-frequency approximation coefficients at the current time and inputs coefficient values ​​from several historical time points (the autoregressive part) and residuals from several historical time points (the moving average part). Its autoregressive order is... With moving average order The model is determined by the Akaike information criterion or Bayesian information criterion used in the identification process to balance model complexity and fitting accuracy. Once the drift trend model is established, the prediction of future clock offsets can be achieved solely through local computation at the receiver without incurring additional communication overhead.

[0126] Before performing the prediction operation, read the phase-locked loop lock status flag of the receiver clock source. .when When in the locked state, the output frequency of the phase-locked loop is within the normal adjustment range, allowing the predicted output of the drift trend model to vary over a relatively wide range; when When the clock signal is in an unlocked state, it indicates an abnormal operating state of the receiver's clock source. Stricter constraints need to be applied to the prediction output to prevent the compensation command from driving excessive frequency jumps in the frequency adjustment unit. Simultaneously, the slope of the voltage-controlled oscillator (VCO) tuning curve should be read. This slope describes the change in oscillation frequency corresponding to each unit change in the control voltage, with units of Hz / V. Using The maximum allowable frequency correction is converted into the maximum control voltage change, thereby determining the upper bound of the drift trend model's predicted output. and the lower world Prediction operations in The prediction is executed within the interval, and the predicted value outside the interval will be truncated to the boundary value, thereby protecting the frequency adjustment unit from the impact of abnormal prediction results.

[0127] Within the constraints, the prediction calculation is performed, and the established ARMA drift trend model is used to recursively calculate the expected value of the temporal position at the end of the prediction time window. Length of the prediction time window The prediction time window is determined jointly by the execution delay of the compensation instruction and the transmission delay of the serial communication protocol to ensure that the time corresponding to the prediction result matches the actual time when the compensation instruction takes effect. If the prediction time window is too short, the predicted value will expire before the compensation instruction takes effect; if the prediction time window is too long, the model prediction error will accumulate with the increase of the step size, leading to a decrease in the compensation effect. Therefore, The proper selection of [aspect name] is a key factor in ensuring the accuracy of compensation.

[0128] Calculate the expected value of the time domain location With real-time measurement values Tracking error between ,in Tracking error This directly reflects the deviation between the current prediction model and the actual clock drift state, and serves as the basis for extracting future offsets. The future offsets are then processed through a compensation gain coefficient. Convert to frequency correction instruction code The relationship is transformed into ,in This indicates a rounding operation, mapping continuous offsets to a discrete instruction code format acceptable to the frequency adjustment unit. Compensation gain coefficient. Taking into account the conversion relationship between time-domain position deviation and frequency deviation, as well as the resolution of the frequency adjustment unit, its value is determined through the calibration process during the system initialization phase and is adaptively corrected as the drift trend model is updated.

[0129] Frequency correction instruction code The frequency adjustment unit transmits the clock signal to the receiving end clock source via a serial communication protocol. The serial communication protocol uses a frame format with parity check. Each frame carries a numerical field of the instruction code, a frame sequence number field, and a check field. Upon receiving a complete and successfully checked instruction frame, the frequency adjustment unit will... The input register of the digital-to-analog converter drives a corresponding change in the control voltage of the voltage-controlled oscillator, thereby achieving closed-loop compensation for the receiver clock frequency. The entire compensation process is repeated after each prediction time window, forming a continuously operating adaptive clock synchronization control loop that keeps the residual deviation between the receiver clock frequency and the transmitter clock frequency within the range allowed by the system design.

[0130] The low-frequency approximation coefficients are parameterized using recursive least squares. A forgetting factor is used to assign decreasing weights to historical observation data. The time-varying model parameter vector is extracted from the parameter identification results. A drift trend model is established using an autoregressive moving average, including:

[0131] The low-frequency approximation coefficients are standardized, and the order of the autoregressive model is determined by the decay characteristics of the partial autocorrelation function, and the order of the moving average model is determined by the truncation characteristics of the autocorrelation function.

[0132] A regression matrix is ​​constructed based on the order of the autoregressive model and the order of the moving average model. The regression matrix is ​​decomposed using the recursive least squares method. In each recursive iteration, the gain matrix is ​​updated using the deviation between the current observed value and the predicted value. The parameter estimation vector is corrected using the gain matrix. The error covariance matrix is ​​updated exponentially using the forgetting factor.

[0133] When the iterative change magnitude of the parameter estimation vector satisfies the convergence condition, the time-varying model parameter vector is output, and the time-varying model parameter vector is divided into an autoregressive coefficient group and a moving average coefficient group according to the order of the autoregressive model and the order of the moving average model.

[0134] A linear recursive relationship for historical time-domain positions is established based on the set of autoregressive coefficients, and a weighted cumulative relationship for random disturbances is established based on the set of moving average coefficients. The linear recursive relationship and the weighted cumulative relationship are combined to form a drift trend model in the form of an autoregressive moving average.

[0135] After obtaining the low-frequency approximation coefficient sequence, it needs to be standardized to eliminate the influence of dimensional differences on the subsequent parameter identification process. The standardization process involves calculating the mean of the low-frequency approximation coefficient sequence within the current sliding window. with standard deviation Subtract the mean from each low-frequency approximation coefficient element and divide by the standard deviation to obtain a standardized sequence with zero mean and unit variance. ,Right now Standardized operations help improve the numerical stability of recursive least squares and prevent ill-conditioned covariance matrices caused by excessively large differences in the order of magnitude of the coefficients.

[0136] After standardization, it is necessary to determine the order combination of the autoregressive moving average model. By calculating the partial autocorrelation function (PACF) of the standardized series, its decay characteristics as the lag order increases are observed: if the partial autocorrelation function decreases with increasing lag order... A significant truncation then occurs (i.e., the absolute value rapidly falls into the confidence interval). If the order of the autoregressive model is within (the range specified in the original text), then the order of the autoregressive model By calculating the autocorrelation function (ACF) of the standardized sequence, we observe its truncation characteristics as the lag order increases: if the autocorrelation function increases with lag order... If a significant truncation occurs thereafter, the order of the moving average model is determined as follows. In practical engineering, to avoid parameter redundancy caused by excessively high order, it is usually... and The value range is limited to a small integer range (e.g., none of them exceed 5), and the candidate order combinations are scored in combination with the Akaike Information Criterion (AIC) or the Bayesian Information Criterion (BIC), and the combination with the lowest score is selected as the final order.

[0137] Determine the order and Next, construct the regression matrix. Each row of the regression matrix corresponds to an observation vector at a given time point, derived from the observations at the previous time points. The standardized coefficient values ​​are compared with those before the current time. It is composed of 1 residual estimate, and the row vector has a dimension of 1. The vector of parameters to be estimated Also has There are 10 components, of which the first 10 is the first 10. Each component is an autoregressive coefficient, and the subsequent components are autoregressive coefficients. Each component is a moving average coefficient.

[0138] The recursive least squares (RLS) method is used to perform online decomposition and parameter updates of the regression matrix. In the... In each recursive iteration, it is necessary to consider the current regression vector. (i.e., the regression matrix of the first) (row transpose) and the parameter estimation vector from the previous time step Calculate the predicted value Then, the deviation between the current observation and the predicted value (new information) is calculated. Using the error covariance matrix (Initialized as a large positive definite diagonal matrix) and the current regression vector, calculate the gain vector according to the standard RLS gain formula. :

[0139]

[0140] in The forgetting factor, typically ranging from 0.95 to 0.999, is used to assign exponentially decreasing weights to historical observation data, enabling the model to track time-varying characteristics. Gain vector. After the calculation is complete, update the parameter estimation vector using the following formula:

[0141]

[0142] At the same time, the error covariance matrix is ​​updated according to the exponential weighting method:

[0143]

[0144] Forgetting factor The introduction of this feature makes the contribution of historical observation data further away from the current time to the covariance matrix smaller, thus giving more weight to recent data and effectively dealing with scenarios where clock frequency drift characteristics change dynamically with factors such as ambient temperature and load.

[0145] After each iteration, the magnitude of change in the parameter estimation vector between two adjacent iterations is calculated. .when The value is below the preset convergence threshold for several consecutive times (usually set to 3 to 5 times). At that time, it is determined that the parameter estimation has converged, and the current... The output is the time-varying model parameter vector. Convergence threshold The setting needs to balance convergence speed and estimation accuracy, and is usually adaptively adjusted according to the variance level of the standardized sequence, for example, set to 0.1% to 1% of the variance of the current sequence.

[0146] The converged time-varying model parameter vector Segmented by order: First The components constitute the autoregressive coefficient group. ,back The components constitute the moving average coefficient group. The autoregressive coefficient set describes the linear dependence of the current time domain location on the historical time domain location, while the moving average coefficient set describes the weighted cumulative effect of random disturbances (residuals).

[0147] Based on the autoregressive coefficient set, a linear recursive relationship for historical time-domain locations is established: the standardized low-frequency approximation coefficients for the current moment can be derived from the previous... The values ​​at each time point are predicted by a weighted linear summation, where the weights are the autoregressive coefficients. Based on the moving average coefficient set, establish a weighted cumulative relationship for random disturbances: [The text abruptly ends here, likely due to an incomplete sentence or a formatting error.] The residual estimates at each time point are multiplied by their corresponding moving average coefficients. The contributions of random disturbances are then summed. Combining the above linear recursive relationship with the weighted cumulative relationship yields the complete autoregressive moving average (ARMA) form of the drift trend model:

[0148]

[0149] The model will perform the prediction phase. Set to zero (i.e., use only the deterministic part for prediction), calculate the predicted value of the standardized low-frequency approximation coefficient at several future times recursively, and then perform an inverse standardized transformation (multiplied by) Add back The predicted time-domain position is restored to its original dimensions, ultimately providing a basis for generating clock compensation commands at the receiving end. The order combination and parameter coefficients of the ARMA model are recursively updated with each newly arrived low-frequency approximation coefficient sample, ensuring that the drift trend model always reflects the latest clock frequency deviation accumulation characteristics.

[0150] like Figure 4 As shown, Figure 4 The horizontal axis represents the data frame number (unit: frame), and the vertical axis represents the residual deviation (unit: nanoseconds, ns) between the receiver clock and the synchronization reference after frequency compensation command adjustment. The graph is presented as a bar chart, with each bar representing the magnitude and direction of the residual deviation at the current frame time (positive values ​​indicate receiver clock lag, negative values ​​indicate lead). The bars fluctuate around the zero line, with most bars appearing blue; their height characterizes the steady-state performance where the compensated deviation converges within an acceptable range. When the absolute value of the residual deviation exceeds a preset engineering threshold (e.g., 0.3 nanoseconds), the corresponding bar turns orange, marking the moment of abnormal deviation increase in a prominent color. The diagram also includes a set of dynamically updated text labels that intelligently determine link quality based on the root mean square (RMS) value of the residual deviation within the current time period: when the RMS value is large (e.g., exceeding 0.2 ns), the system automatically extends the code length of the pseudo-random scrambling code from the nominal 56-bit or 64-bit to 72-bit or 96-bit to enhance anti-interference capability; when the deviation converges well, it reverts to a shorter code length to reduce processing latency. This diagram fully illustrates the adaptive closed-loop control logic of "monitoring-feedback-adjustment," demonstrating the core mechanism of the drift trend model continuously updating based on real-time residual deviation and dynamically adjusting scrambling code parameters to balance synchronization accuracy and resource consumption.

[0151] A second aspect of the present invention provides a wired network parasitic time synchronization control system, comprising:

[0152] The frame monitoring unit is used to monitor the data frame sequence transmitted in the wired network, parse the frame structure of the data frame sequence, and locate the redundant coding segment used for error checking.

[0153] An error embedding unit is used to identify the error correction code type and its error correction tolerance used in the redundant coding segment, encode the clock synchronization reference into a pseudo-random scrambling code, introduce a controlled error mode in the redundant coding segment that corresponds to the pseudo-random scrambling code and is within the error correction tolerance, so that the clock synchronization reference is embedded in the data frame sequence in the form of an error mode.

[0154] The decoding and extraction unit is used to perform error correction decoding on the data frame sequence at the receiving end, extract the pseudo-random scrambling code from the error pattern detected during the decoding process, perform correlation operation on the pseudo-random scrambling code and the local scrambling code template to decode the clock synchronization reference, and record the time domain position of the correlation peak of the correlation operation.

[0155] The drift compensation unit is used to analyze the change trajectory of the time domain position of the relevant peak, construct a drift trend model that reflects the accumulation of frequency deviation between the two ends of the clock, use the drift trend model to predict the future offset of the receiving end clock and generate compensation instructions to drive the frequency adjustment unit of the receiving end clock source.

[0156] The deviation update unit is used to monitor the residual deviation between the frequency-adjusted receiver clock and the newly decoded clock synchronization reference, update the drift trend model according to the residual deviation, and adjust the code length of the pseudo-random scrambling code.

[0157] A third aspect of the present invention provides an electronic device, comprising:

[0158] processor;

[0159] Memory used to store processor-executable instructions;

[0160] The processor is configured to invoke instructions stored in the memory to execute the aforementioned method.

[0161] A fourth aspect of the present invention provides a computer-readable storage medium having stored thereon computer program instructions that, when executed by a processor, implement the aforementioned method.

[0162] This invention can be a method, apparatus, system, and / or computer program product. The computer program product may include a computer-readable storage medium having computer-readable program instructions loaded thereon for performing various aspects of the invention.

[0163] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A wired network parasitic time synchronization control method, characterized in that, include: Monitor the data frame sequence transmitted in the wired network, parse the frame structure of the data frame sequence and locate the redundant coding segment used for error verification; Identify the error correction code type and its error correction tolerance used in the redundant coding segment, encode the clock synchronization reference as a pseudo-random scrambling code, introduce a controlled error mode corresponding to the pseudo-random scrambling code and located within the error correction tolerance in the redundant coding segment, so that the clock synchronization reference is embedded in the data frame sequence in the form of an error mode; At the receiving end, error correction decoding is performed on the data frame sequence. The pseudo-random scrambling code is extracted from the error pattern detected during the decoding process. The pseudo-random scrambling code is correlated with the local scrambling code template to decode the clock synchronization reference, and the time domain position of the correlation peak of the correlation operation is recorded. The trajectory of the time domain position of the relevant peak is analyzed, and a drift trend model reflecting the accumulation of frequency deviation between the two ends is constructed. The drift trend model is used to predict the future offset of the receiving clock and generate compensation instructions to drive the frequency adjustment unit of the receiving clock source. The residual deviation between the receiver clock after frequency adjustment and the newly decoded clock synchronization reference is monitored, and the drift trend model is updated and the code length of the pseudo-random scrambling code is adjusted according to the residual deviation.

2. The method according to claim 1, characterized in that, Monitoring a sequence of data frames transmitted in a wired network, parsing the frame structure of the data frame sequence, and locating redundant coded segments used for error checking include: An optical splitter coupler is connected in series in the transmission link of the wired network. The optical splitter coupler splits the transmitted optical signal into a transmission optical path and a listening optical path according to a preset split ratio. The transmission optical path transmits the data frame sequence, and the listening optical path converts the split signal into an electrical signal through a photoelectric conversion module and outputs it to the signal processing unit. The signal processing unit performs adaptive equalization on the electrical signal to compensate for channel distortion, extracts the bit stream and accompanying clock from the equalized signal, and uses the accompanying clock to establish a sampling reference synchronized with the data frame sequence. Based on the sampling reference, the frame parsing state machine sequentially identifies the preamble, frame delimiter, address field, and data field. When the start identifier of the check field is identified, the current bit position is locked and marked as the start of the redundant coding segment. The bit stream is continuously received starting from the beginning of the redundant coded segment. The termination position of the redundant coded segment is determined by detecting the frame interval signal. The bit sequence between the beginning and the termination position is extracted as the redundant coded segment, and the bit length of the redundant coded segment is associated with the frame sequence number and stored.

3. The method according to claim 1, characterized in that, Identifying the error correction code type and its error correction tolerance used in the redundant coded segments, and encoding the clock synchronization reference into a pseudo-random scrambling code, including: Extract the row and column dimensions and column weight distribution of the parity check matrix from the redundant coding segment, combine the row and column dimensions and column weight distribution into a structural fingerprint, perform similarity matching with the standard code pattern database through the structural fingerprint, and output the error correction code type identifier; Read the corresponding design distance parameter according to the error correction code type identifier, and determine the error correction tolerance threshold based on the relationship between the design distance parameter and the error correction radius of the decoding algorithm; The phase information of the clock source at the transmitting end and the phase information of the clock source at the receiving end are collected. The phase information is differentially processed to obtain the phase deviation vector. The phase deviation vector is quantized into a digital sequence as a clock synchronization reference. A clock synchronization reference is input to a pseudo-random sequence generator, which drives the pseudo-random sequence generator to perform state iteration based on primitive polynomials. The output bit stream is extracted from the state iteration process to form a pseudo-random scrambling code. Calculate the Hamming weight of the pseudo-random scrambling code, determine the constraint relationship between the Hamming weight and the error correction tolerance threshold, compress the pseudo-random scrambling code by truncating or folding when the Hamming weight exceeds the error correction tolerance threshold, and maintain the pseudo-random scrambling code structure and output it for error mode construction when the Hamming weight meets the error correction tolerance threshold.

4. The method according to claim 1, characterized in that, Introducing a controlled error pattern corresponding to the pseudo-random scrambling code and within the error correction tolerance into the redundant coded segment, so that the clock synchronization reference is embedded in the data frame sequence in the form of the error pattern, includes: Extract the starting bit segment of the pseudo-random scrambling code as the initial state value, perform a linear feedback shift operation based on the initial state value to generate a pseudo-random position sequence, and determine the target bit position to be flipped in the redundant coding segment according to the pseudo-random position sequence. Read the current state of the target bit position, perform a logical reversal on the current state to obtain the flipped state, and write the flipped state back to the target bit position to form a perturbation coded segment; The perturbation coding segment is decoded to obtain the recovery codeword. The number of difference positions between the recovery codeword and the perturbation coding segment is compared to determine whether the number of difference positions does not exceed the maximum error correction capability value specified by the error correction tolerance. When the number of difference positions does not exceed the maximum error correction capability value, the perturbation coded segment is written into the data frame sequence as a controlled error mode; when the number of difference positions exceeds the maximum error correction capability value, the feedback connection structure of the linear feedback shift operation is simplified to reduce the operation bit width, the pseudo-random position sequence is regenerated and the target bit position is updated, and the logic inversion and decoding operations are repeated until the number of difference positions meets the maximum error correction capability value constraint.

5. The method according to claim 1, characterized in that, At the receiving end, error correction decoding is performed on the data frame sequence. The pseudo-random scrambling code is extracted from the error patterns detected during the decoding process. The pseudo-random scrambling code is correlated with a local scrambling code template to decode the clock synchronization reference, and the time-domain position of the correlation peak of the correlation operation is recorded, including: Error correction decoding is performed on the redundant coded segments of the data frame sequence to obtain the syndrome vector. The syndrome vector is parsed to obtain the error location polynomial. The error location polynomial is solved to obtain the root set. The root set is mapped to the bit flip position index. The bit flip position index is used to extract the bit state before flipping in the redundant coded segments to form an error pattern. The error pattern is subjected to reverse scrambling operation to eliminate the linear transformation introduced by the encoding and obtain the original scrambling state. The original scrambling code state and the local scrambling code template are subjected to time-domain sliding correlation operation to generate a correlation function curve. The peak value is searched on the correlation function curve and the horizontal axis position of the peak value is extracted as the coarse synchronization time. A local time window is established with the coarse synchronization time as the center. Parabolic interpolation fitting is performed on the correlation function curve within the local time window, and the horizontal coordinate of the vertex of the fitted parabola is calculated as the precise synchronization time. For continuously received data frames, the precise synchronization time is recorded sequentially to form a time sequence. Linear fitting is performed on the time sequence to obtain the time evolution slope. The frequency deviation of the clock synchronization reference is determined based on the time evolution slope.

6. The method according to claim 1, characterized in that, Analyzing the trajectory of the time-domain position change of the relevant peak, a drift trend model reflecting the accumulation of frequency deviation between the two ends of the clock is constructed. This drift trend model is then used to predict the future offset of the receiving clock and generate compensation commands to drive the frequency adjustment unit of the receiving clock source, including: Extract the time-domain positions of the relevant peaks corresponding to the continuously received data frames to form the original trajectory sequence. Perform wavelet decomposition on the original trajectory sequence to separate the low-frequency approximation coefficients and high-frequency detail coefficients. Calculate the energy proportion of the low-frequency approximation coefficients in each frequency band and select the frequency band with the largest energy proportion as the dominant frequency band. The low-frequency approximation coefficients are identified by recursive least squares method. Historical observation data are given decreasing weights by forgetting factor. The time-varying model parameter vector is extracted from the parameter identification results. A drift trend model is established in the form of autoregressive moving average. The phase-locked loop lock status flag of the receiving clock source and the slope of the voltage-controlled oscillator tuning curve are read as constraints to limit the upper and lower bounds of the prediction output of the drift trend model. Prediction operations are performed between the upper and lower bounds of the prediction output to obtain the expected value of the time domain position at the end of the prediction time window. The tracking error between the expected value of the time-domain position and the real-time measurement value is calculated and the future offset is extracted. The future offset is converted into a frequency correction instruction code through a compensation gain coefficient and transmitted to the frequency adjustment unit of the receiving clock source through a serial communication protocol.

7. The method according to claim 6, characterized in that, The low-frequency approximation coefficients are parameterized using recursive least squares. A forgetting factor is used to assign decreasing weights to historical observation data. The time-varying model parameter vector is extracted from the parameter identification results. A drift trend model is established using an autoregressive moving average, including: The low-frequency approximation coefficients are standardized, and the order of the autoregressive model is determined by the decay characteristics of the partial autocorrelation function, and the order of the moving average model is determined by the truncation characteristics of the autocorrelation function. A regression matrix is ​​constructed based on the order of the autoregressive model and the order of the moving average model. The regression matrix is ​​decomposed using the recursive least squares method. In each recursive iteration, the gain matrix is ​​updated using the deviation between the current observed value and the predicted value. The parameter estimation vector is corrected using the gain matrix. The error covariance matrix is ​​updated exponentially using the forgetting factor. When the iterative change magnitude of the parameter estimation vector satisfies the convergence condition, the time-varying model parameter vector is output, and the time-varying model parameter vector is divided into an autoregressive coefficient group and a moving average coefficient group according to the order of the autoregressive model and the order of the moving average model. A linear recursive relationship for historical time-domain positions is established based on the set of autoregressive coefficients, and a weighted cumulative relationship for random disturbances is established based on the set of moving average coefficients. The linear recursive relationship and the weighted cumulative relationship are combined to form a drift trend model in the form of an autoregressive moving average.

8. A wired network parasitic time synchronization control system, used to implement the method as described in any one of claims 1-7, characterized in that, include: The frame monitoring unit is used to monitor the data frame sequence transmitted in the wired network, parse the frame structure of the data frame sequence, and locate the redundant coding segment used for error checking. An error embedding unit is used to identify the error correction code type and its error correction tolerance used in the redundant coding segment, encode the clock synchronization reference into a pseudo-random scrambling code, introduce a controlled error mode in the redundant coding segment that corresponds to the pseudo-random scrambling code and is within the error correction tolerance, so that the clock synchronization reference is embedded in the data frame sequence in the form of an error mode. The decoding and extraction unit is used to perform error correction decoding on the data frame sequence at the receiving end, extract the pseudo-random scrambling code from the error pattern detected during the decoding process, perform correlation operation on the pseudo-random scrambling code and the local scrambling code template to decode the clock synchronization reference, and record the time domain position of the correlation peak of the correlation operation. The drift compensation unit is used to analyze the change trajectory of the time domain position of the relevant peak, construct a drift trend model that reflects the accumulation of frequency deviation between the two ends of the clock, use the drift trend model to predict the future offset of the receiving end clock and generate compensation instructions to drive the frequency adjustment unit of the receiving end clock source. The deviation update unit is used to monitor the residual deviation between the frequency-adjusted receiver clock and the newly decoded clock synchronization reference, update the drift trend model according to the residual deviation, and adjust the code length of the pseudo-random scrambling code.

9. An electronic device, characterized in that, include: processor; Memory used to store processor-executable instructions; The processor is configured to invoke instructions stored in the memory to execute the method according to any one of claims 1 to 7.

10. A computer-readable storage medium having computer program instructions stored thereon, characterized in that, When the computer program instructions are executed by the processor, they implement the method described in any one of claims 1 to 7.

Images