A network cooperative additive manufacturing instruction parallel preloading scheduling method and system

Abstract

Embodiments of the present disclosure provide a network collaborative additive manufacturing instruction parallel preloading scheduling method and system. Applied to the field of additive manufacturing technology, the method comprises: generating heterogeneous instructions through a trajectory mapping module, dynamically setting a transmission window through a time delay reasoning module, and realizing multi-channel streaming transmission by a phase packaging module. On the execution side, the edge pre-decoding processing module converts parallel packets into bottom layer control data, and then the time sequence isolation module realizes frame-by-frame cascade triggering and time delay jitter isolation, and finally the collaborative forming module drives the physical mechanism to complete the high-precision additive cladding of the component. Through multi-level space-time decoupling mapping, real-time dynamic window transmission and bottom layer physical signal triggering control, the scheme realizes sub-microsecond level action synchronization in a network high time delay jitter environment, significantly improving the trajectory smoothness, molten pool stability and component forming precision of multi-axis collaborative cladding.

Description

Technical Field

[0001] This disclosure relates to the field of additive manufacturing technology, and in particular to a method and system for parallel preloading and scheduling of network collaborative additive manufacturing instructions. Background Technology

[0002] In the multi-degree-of-freedom spatial collaborative cladding process, the physical actuator needs to receive high-density heterogeneous instructions and achieve multi-axis synchronous drive in a continuous time axis. The instruction stream is transmitted through the network and buffered by multiple nodes from generation to execution. Any delay jitter or timing deviation in any link will directly lead to deviation of the cladding trajectory and deterioration of the component forming quality.

[0003] Nowadays, the global machining trajectory data of the component to be printed is usually obtained first. Based on this, machining instructions are generated and sent to each edge execution node through the network channel. After receiving the instructions, each node stores them in its local buffer. After the master control terminal arrives with the synchronization signal, the instructions are parsed one by one and converted into pulse level control signals, which finally drive the cladding actuator to complete the component forming.

[0004] However, existing technologies lack spatiotemporal decoupling mapping of global trajectories, lack a unified timing reference for command streams, and fail to perform delay extrapolation and transmission window calculation for network dynamic states. Multi-channel transmission lacks phase alignment and parallel multiplexing, and edge nodes lack pipelined asynchronous pre-decoding. Under network latency jitter, synchronization accuracy is severely insufficient, failing to meet the real-time control requirements of high-precision collaborative cladding forming. Summary of the Invention

[0005] To address the shortcomings of existing technologies, this disclosure provides a parallel preloading scheduling method and system for network-based collaborative additive manufacturing instructions. This disclosure solves the problems of existing technologies lacking spatiotemporal decoupling mapping of global trajectories, lacking a unified timing reference for instruction streams, failing to perform delay extrapolation and transmission window calculation for network dynamic states, lacking phase alignment and parallel multiplexing in multi-channel transmission, and lacking pipelined asynchronous pre-decoding at edge nodes. Furthermore, these technologies suffer from severely insufficient synchronization accuracy under network latency jitter, failing to meet the real-time control requirements of high-precision collaborative cladding forming.

[0006] According to a first aspect of this disclosure, a method for parallel preloading and scheduling of network collaborative additive manufacturing instructions is provided, comprising: acquiring global machining trajectory data of the component to be printed, performing spatiotemporal decoupling mapping of multidimensional spatial trajectory interpolation and dynamic constraints based on the global machining trajectory data, and obtaining heterogeneous instruction stream data under a continuous time axis; The dynamic state sequence data generated during the transmission of heterogeneous command stream data in the network channel is obtained. Based on the dynamic state sequence data, the time-domain sliding window correlation matching and quantitative deduction of the maximum transmission delay boundary of the network are performed on the heterogeneous command stream data to obtain real-time updated transmission window data. Based on the transmission window data, phase alignment and parallel time-division multiplexing streaming encapsulation are performed on heterogeneous command stream data through multi-channel delay control links to obtain dynamically delivered parallel data packets. Based on the underlying buffers of each edge node, parallel data packets are processed using multi-threaded pipeline asynchronous pre-decoding and pulse level control signal conversion to obtain the underlying control data of rolling latch. The system acquires the synchronization signal sequence data continuously transmitted from the master control terminal via the network. Based on the synchronization signal sequence data, it performs physical signal-level frame-by-frame instantaneous cascading triggering and network latency jitter isolation response on the underlying control data to obtain continuous drive data. Based on real-time control of the physical actuator using continuous drive data, a multi-degree-of-freedom spatial collaborative cladding forming process is performed to obtain the formed component.

[0007] According to a second aspect of this disclosure, a network collaborative additive manufacturing instruction parallel preloading scheduling system is provided for executing the method described in the first aspect, comprising: a trajectory mapping module for acquiring global machining trajectory data of the component to be printed, and performing spatiotemporal decoupling mapping of multidimensional spatial trajectory interpolation and dynamic constraints based on the global machining trajectory data to obtain heterogeneous instruction stream data under a continuous time axis; The delay prediction module is used to acquire dynamic state sequence data generated when heterogeneous command stream data is transmitted in the network channel. Based on the dynamic state sequence data, the module performs time-domain sliding window correlation matching and quantitative prediction of the maximum transmission delay boundary of the network on the heterogeneous command stream data to obtain real-time updated transmission window data. The phase encapsulation module is used to perform phase alignment and parallel time-division multiplexing streaming encapsulation on heterogeneous command stream data based on the transmission window data, so as to obtain dynamically delivered parallel data packets. The pre-decoding processing module is used to perform multi-threaded pipelined asynchronous pre-decoding and pulse level control signal conversion processing on parallel data packets based on the underlying buffer of each edge node, so as to obtain the underlying control data of rolling latch; The timing isolation module is used to acquire the synchronization signal sequence data continuously sent by the master control terminal through the network. Based on the synchronization signal sequence data, it performs physical signal-level frame-by-frame instantaneous cascade triggering and network latency jitter isolation response on the underlying control data to obtain continuous drive data. The collaborative molding module is used to control the physical actuator in real time based on continuous drive data to perform multi-degree-of-freedom spatial collaborative cladding molding process to obtain molded components.

[0008] According to a third aspect of this disclosure, an electronic device is provided, comprising: a memory and a processor, wherein the memory stores a computer program, and the processor executes the program to implement the method described above.

[0009] In the above-mentioned network collaborative additive manufacturing instruction parallel preloading scheduling method and system, the embodiments of this disclosure achieve sub-microsecond-level action synchronization in a network high-latency jitter environment through multi-level spatiotemporal decoupling mapping, real-time dynamic window transmission and underlying physical signal triggering control, which significantly improves the trajectory smoothness, melt pool stability and component forming accuracy of multi-axis collaborative cladding. Attached Figure Description

[0010] To more clearly illustrate the technical solutions in the embodiments of this disclosure or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this disclosure. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0011] Figure 1 A first flowchart of a network collaborative additive manufacturing instruction parallel preloading scheduling method according to an embodiment of the present disclosure is shown; Figure 2 A second flowchart of a network collaborative additive manufacturing instruction parallel preloading scheduling method according to an embodiment of the present disclosure is shown; Figure 3 A schematic block diagram of a network-based collaborative additive manufacturing instruction parallel preloading scheduling system according to an embodiment of the present disclosure is shown. Figure 4 A schematic diagram of the structure of an electronic device according to an embodiment of the present disclosure is shown. Detailed Implementation

[0012] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that, unless otherwise specifically stated, the relative arrangement, numerical expressions, and values ​​of the components and steps set forth in these embodiments do not limit the scope of the present disclosure.

[0013] Those skilled in the art will understand that the terms "first," "second," etc., in the embodiments of this disclosure are only used to distinguish different steps, devices, or modules, and do not represent any specific technical meaning, nor do they indicate a necessary logical order between them. It should also be understood that in the embodiments of this disclosure, "multiple" can refer to two or more, and "at least one" can refer to one, two, or more. It should also be understood that any component, data, or structure mentioned in the embodiments of this disclosure can generally be understood as one or more unless explicitly limited or given a contrary indication in the context. Furthermore, the term "and / or" in this disclosure is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, and B existing alone. Additionally, the character " / " in this disclosure generally indicates that the related objects before and after are in an "or" relationship. It should also be understood that the descriptions of the various embodiments in this disclosure emphasize the differences between the various embodiments; their similarities or commonalities can be referred to mutually, and for the sake of brevity, they will not be elaborated upon one by one.

[0014] Furthermore, it should be understood that, for ease of description, the dimensions of the various parts shown in the accompanying drawings are not drawn to actual scale. The following description of at least one exemplary embodiment is merely illustrative and is in no way intended to limit this disclosure or its application or use. Techniques, methods, and apparatus known to those skilled in the art will not be discussed in detail, but where appropriate, such techniques, methods, and apparatus should be considered part of the specification. It should be noted that similar reference numerals and letters in the following drawings denote similar items; therefore, once an item is defined in one drawing, it need not be further discussed in subsequent drawings.

[0015] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this disclosure, and not all embodiments. Based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.

[0016] Figure 1 This is a first flowchart illustrating a parallel preloading scheduling method for network collaborative additive manufacturing instructions provided in an embodiment of this disclosure.

[0017] S101: Obtain the global machining trajectory data of the component to be printed, and perform spatiotemporal decoupling mapping of multidimensional spatial trajectory interpolation and dynamic constraints based on the global machining trajectory data to obtain heterogeneous instruction stream data under continuous time axis.

[0018] The component to be printed is a physical entity or its corresponding discretized geometric model that is in a state of waiting to be processed after the spatial topology is designed and planned according to the digital three-dimensional model in additive manufacturing or multi-degree-of-freedom collaborative cladding process.

[0019] Global machining trajectory data is a pre-planned sequence of vector coordinates that includes the machining sequence and geometric path of the component in all three dimensions of space. This sequence defines the traversal path and pose distribution of the physical actuator in the entire three-dimensional machining space.

[0020] Heterogeneous instruction stream data in precision additive manufacturing or space machining systems includes motion axis pulses and level signal streams of multi-axis linkage servo motion systems, power modulation parameters of high-energy beam generators, feed rate indicators of material transport control interfaces, and a global timing alignment identifier for mapping a global control clock reference, as well as a multi-dimensional collaborative control instruction sequence with an absolute timestamp tag.

[0021] Based on a digital 3D model, global machining trajectory data of the component to be printed is obtained. First, discretization mesh generation and layer slicing are performed, and mesh reconstruction technology is used to transform the complex continuous solid surface into a discretized geometric model. After obtaining the discretized geometric model, a multi-axis orientation optimization algorithm and a scan path filling strategy are implemented to calculate a continuous sequence of tool center point poses from the discretized 3D layer information. Next, in a 3D coordinate system, nearest neighbor sorting and geometric trajectory smoothing are performed to bind scattered spatial points to a clear global machining sequence and spatial orientation vector. Finally, a vector coordinate sequence containing the machining sequence and geometric path across all spatial dimensions is calculated and output, thus obtaining the global machining trajectory data.

[0022] In the process of multidimensional spatial trajectory interpolation based on global machining trajectory data, a multi-axis linkage interpolation algorithm is used to perform dense sampling and discretization calculations on the vector coordinate sequence in the global machining trajectory data using small straight line segments or spatial spline curves. In this process, the global machining trajectory data is used as the discrete geometric source input. Under the clock cycle constraint of the motion control layer, position command interpolation subdivision is performed, refining the sparse machining trajectory point matrix into a continuous and smooth spatial pose curve in the microscopic space. This establishes the linkage correspondence between the motion control axes of the physical actuator at the spatial geometric level, resulting in multidimensional spatial interpolation trajectory data.

[0023] After obtaining the multidimensional spatial interpolation trajectory data, time-optimal trajectory planning based on dynamic constraints is implemented. Since different execution units in the physical actuators have differentiated response characteristics, a seven-segment S-curve acceleration / deceleration trajectory planning algorithm is introduced. This algorithm transforms the spatial displacement of the motion control axes of each physical actuator into a time-domain evolution trajectory composed of acceleration, uniform acceleration, deceleration, uniform speed, acceleration / deceleration, uniform deceleration, and deceleration segments. By introducing physical boundary conditions where the velocity and acceleration at the processing start and end points are both zero, the switching times and segment durations of the time-domain evolution trajectory between segments are obtained through reverse solving. This decomposes the purely spatial geometric pose information in the multidimensional spatial interpolation trajectory data into axial dynamic parameters that independently act on each time dimension.

[0024] A feedforward speed planner is used for dynamic amplitude limiting checks and feedforward error compensation under real-time constraints. This feedforward speed planner directly receives the motor torque limit data and the thermal response time constant of the high-energy beam generator as boundary constraints. By calculating and outputting the speed correction amount with real-time hard constraints, the dynamic boundary conditions such as the mechanical motion inertia of the physical actuator, the motor torque limit, and the energy hysteresis effect of the high-energy beam generator are transformed into sampling period constraints on the time axis. This allows for adaptive dynamic scaling of the interpolation trajectory curve arc length in the time domain, ensuring that the energy output of the high-energy beam generator remains stable at the corners of the processing trajectory, and obtaining spatiotemporal mapping parameters.

[0025] Based on the spatiotemporal mapping parameters, the heterogeneous instruction stream data is finally calculated and output. This step introduces a multi-axis control instruction encapsulation mechanism based on distributed clock synchronization, which performs continuous timestamp marking and communication protocol stack encapsulation processing on the spatiotemporal mapping parameters. This synchronization mechanism runs in a microsecond-level hard real-time operating system environment, and according to the stepping speed of the underlying hardware clock cycle, it binds an absolute timestamp tag to the control parameters of each execution unit in a specific header field of the data frame.

[0026] Multi-channel data parallel arrangement and timing consistency verification are enabled. By using the direct memory access mechanism, an independent direct memory access channel and a circular buffer are opened. Control data such as pulse counting commands belonging to the motion control axis, power modulation signals belonging to the high-energy beam generator, and supply rate parameters of the material delivery module are prioritized and time-synchronized according to the order of timestamps. They are then uniformly arranged and aligned to the same continuous time axis. Finally, a multi-dimensional collaborative control command sequence with continuous timestamp attributes is generated, which is the heterogeneous command stream data under the continuous time axis.

[0027] Based on the above technical solution, optionally, spatiotemporal decoupling mapping of multidimensional spatial trajectory interpolation and dynamic constraints is performed based on global machining trajectory data to obtain heterogeneous command stream data under continuous time axis, including: Based on global processing trajectory data, continuous fitting of spatial path curvature and interpolation of high-order geometric curves are performed to obtain trajectory point matrix sequence data. The preset axial acceleration data of the physical actuator is obtained. Based on the preset axial acceleration data, multi-axis velocity look-ahead control and dynamic flexible acceleration and deceleration constraints are applied to the trajectory dot matrix sequence data to obtain the time series data of the planned trajectory of the physical actuator. Obtain preset coordinate mapping logic data, and based on the preset coordinate mapping logic data, perform three-dimensional spatial pose mapping and joint spatial degree of freedom decoupling on the planned trajectory time series data to obtain the control sequence data of each node of the physical actuator; Obtain the preset initial time window data of the network channel, and based on the preset initial time window data, perform heterogeneous bus protocol encoding mapping and clock reference tag sequence injection on the control sequence data of each node of the physical actuator to obtain heterogeneous instruction stream data under continuous time axis.

[0028] In this scheme, the trajectory point sequence data is a set of discrete coordinate points that describes the precise position distribution and trajectory morphology of the execution end in three-dimensional space. It is generated by continuously fitting the curvature of the spatial path and interpolating the high-order geometric curves based on the global processed trajectory data.

[0029] Preset axial acceleration data is a set of parameters that are pre-set and limited to the maximum allowable acceleration and deceleration of each axis during the multi-axis linkage operation of the physical actuator in order to ensure motion stability and mechanical structure safety, based on the rotational inertia, load characteristics and response frequency band of the servo motor of each motion axis.

[0030] The planned trajectory time series data is generated by resampling the trajectory point matrix sequence data in the time domain through multi-axis velocity look-ahead control and dynamic flexible acceleration and deceleration planning, under the premise of satisfying the preset axial acceleration constraints of each axis. This generates a trajectory parameter sequence with a clear correspondence between velocity, acceleration and position time.

[0031] The preset coordinate mapping logic data is used to define the transformation relationship between the pose of the tool's center point and the rotation angles of the motors of each motion axis of the physical actuator in a three-dimensional Cartesian coordinate system. It includes a set of logical rules for the inverse kinematics model and the spatial pose transformation matrix.

[0032] A node is a hardware terminal in a physical actuator that has independent motion control or energy modulation functions, and can receive control commands and execute specific processing actions. It mainly includes a motion control axis, a high-energy beam generator, and a material transport control interface.

[0033] Control sequence data is a set of drive commands that correspond to the physical execution capabilities of each node and include specific operational parameters such as axial position commands, beam energy values, and material feed rates. It is obtained by decoupling and transforming the time-series data of the planned trajectory using preset coordinate mapping logic data.

[0034] The preset initial time window data is a time window parameter predefined based on the network channel bandwidth and transmission delay characteristics to ensure the timing determinism of control commands during heterogeneous bus transmission. It is used to align heterogeneous bus protocol encoding and inject global clock reference tags.

[0035] To obtain trajectory point matrix sequence data, the system performs continuous spatial path curvature fitting and spline interpolation based on global machining trajectory data. First, the global machining trajectory data is input into the geometry processing engine. Using cubic spline interpolation and a geometric continuity constraint algorithm, the vector coordinate sequence, encompassing the machining sequence and geometric path across the entire spatial dimension of the component, is globally smoothed to ensure that the traversal path and pose distribution within the 3D machining space exhibit continuous curvature at geometric connection points. After completing the continuous spatial path curvature fitting, the system employs polynomial interpolation and a fixed-time-step discretization control method to perform high-frequency sampling interpolation calculations along the fitted continuous spatial geometric path, refining the originally discrete vector coordinate sequence into a dense interpolation point sequence. During this interpolation process, the calculation not only outputs the 3D coordinates of each sampling point but also simultaneously calculates the tangent vector and principal normal vector at each point of the execution endpoint. Finally, these are combined to generate a complete set of discrete coordinate points that accurately describe the precise positional distribution and trajectory morphology characteristics of the execution endpoint in 3D space, thus obtaining the trajectory point matrix sequence data.

[0036] The system acquires preset axial acceleration data of the physical actuator and performs look-ahead velocity planning and asymmetric acceleration / deceleration constraints on the trajectory point matrix sequence data based on this data to obtain the planned trajectory timing data of the physical actuator. This step first reads a parameter set containing the rotational inertia, load characteristics, and maximum allowable acceleration / deceleration of the servo motors of each motion axis through the hardware low-level configuration interface. Next, the system introduces a look-ahead velocity planning algorithm to pre-retrieve multiple sets of trajectory point matrix sequence data from the current processing point backward, extracting the curvature radius and direction change characteristics of the path, and calculating the maximum allowable critical passing speed at each corner by combining the preset axial acceleration data. After obtaining the speed limits, S-curve acceleration / deceleration control technology and asymmetric acceleration / deceleration planning method are used to resample the trajectory point matrix sequence data in the time domain, calculating the absolute timestamp, instantaneous target velocity, and instantaneous target acceleration corresponding to each discrete coordinate point. This process ensures that the dynamic response of each axis does not exceed the limit boundary during the entire motion process through iterative solution, establishes a strict mapping between pure geometric space points and physical time axis, and finally generates a trajectory parameter sequence with clear velocity, acceleration and position-time correspondence, thus obtaining the planned trajectory time series data of the physical actuator.

[0037] The process involves acquiring preset coordinate mapping logic data and decoupling the planned trajectory time-series data into 3D spatial pose mapping and joint spatial degrees of freedom to obtain control sequence data for each node of the physical actuator. During implementation, a set of logic rules containing the inverse kinematics solution model and spatial pose transformation matrix is ​​first loaded via a memory-sharing mechanism. The processing takes the tool center point pose and geometric coordinates from the planned trajectory time-series data as known inputs. Using inverse kinematics numerical solution technology and the Jacobian matrix inverse operation algorithm, the spatial motion trajectory in the 3D Cartesian coordinate system is decoupled in real time and transformed to each independent hardware execution terminal of the physical actuator. During this decoupling calculation, the 3D displacement and attitude of the tool center point are assigned to each motion axis of the multi-axis linkage servo motion system. Simultaneously, based on the energy density requirements and material deposition rate corresponding to the trajectory time step, the power servo characteristics of the laser source and the feed control parameters of the material delivery control interface are synchronously mapped. These decoupled instructions are synchronized and reassembled in the local controller to form a set of drive instructions corresponding to the execution capabilities of each hardware and including specific operating parameters such as axial position instructions, beam energy values ​​and material feed rates. This results in the control sequence data of each node of the physical actuator.

[0038] To obtain heterogeneous instruction stream data on a continuous time axis, the system first needs to extract predefined communication cycle parameters based on the network channel bandwidth and transmission delay characteristics through the network's underlying communication bus configuration interface. During the data packaging phase, the system enables a real-time network protocol stack and a real-time frame encapsulation mechanism to perform binary encoding mapping of the control sequence data belonging to each node according to the frame structure of the underlying communication protocol, converting it into standard messages that can be transmitted through the heterogeneous bus. Subsequently, using clock synchronization technology based on the network timing protocol and a global timestamp injection algorithm, within the constraints of the communication cycle parameters, a timestamp mapped to the global control clock reference is forcibly appended to each encapsulated bus message frame, and the absolute timestamp tag is written into a specific header field of the data frame. By employing priority queue scheduling and time synchronization verification, the motion axis pulses and level signal streams, high-energy beam generator power modulation parameters, and material conveying control interface feed rate indicators are uniformly arranged and aligned onto the same continuous time axis. Finally, a multi-dimensional collaborative control instruction sequence with continuous timestamp attributes is generated, thus obtaining heterogeneous instruction stream data under the continuous time axis.

[0039] In this solution, the latency jitter of network transmission is eliminated by multi-axis collaborative interpolation and distributed clock synchronization mechanism, and the accurate real-time response of multi-dimensional heterogeneous commands is realized, which improves the trajectory smoothness, molten pool stability and component dimensional accuracy of complex curved surface cladding forming.

[0040] Based on the above technical solution, optionally, by performing time-domain sliding window correlation matching and quantitative extrapolation of the maximum transmission delay boundary of the network on heterogeneous command stream data based on dynamic state sequence data, real-time updated transmission window data can be obtained, including: Based on dynamic state sequence data, multidimensional feature association and network state synchronization matching processing of heterogeneous instruction stream data are performed using time-domain sliding window to obtain time-domain sliding window matching data. Based on time-domain sliding window matching data, the dynamic transmission behavior of heterogeneous instruction stream data in the network channel is analyzed by performing queue buffer latency analysis and quantitative analysis of protocol scheduling overhead to obtain time-domain boundary extrapolation data. Based on the temporal boundary extrapolation data, the network channel's preset initial time window data is processed with temporal boundary adaptive dynamic correction and real-time feedback compensation to obtain real-time updated transmission window data.

[0041] In this scheme, the time-domain sliding window matching data is the matching result generated by associating the transmission timing characteristics of each network node in the dynamic state sequence data with the absolute timestamp in the heterogeneous instruction stream data within the time-domain sliding window. This includes the arrival time of each instruction packet in the network channel, the node forwarding status flag, and the time slot matching association code.

[0042] The time-domain boundary extrapolation data is a set of parameters derived from the quantitative analysis of network channel transmission behavior. Its contents include the maximum tolerable delay limit of the network channel, the fixed overhead value brought by protocol scheduling, the queuing delay margin of the current link, and the time reference threshold used to define the stability boundary of data transmission.

[0043] To obtain time-domain sliding window matching data, a sliding window analysis and network state synchronization matching are performed on the multi-axis synchronization command sequence based on continuous-time state vectors. First, the continuous-time state vectors, which are captured in real-time and include the queue backlog depth of each network node, end-to-end real-time transmission jitter index, channel load ratio, and timing response, are input into the hard real-time processing module. Then, using circular buffer management technology, network state samples for the current period are extracted on the time axis. Next, the system uses state correlation analysis and consistency verification technology to extract the timestamps carried in each frame of the multi-axis synchronization command sequence and compare them with the timing responses in the circular buffer. During this process, the processing module uses a cross-correlation analysis algorithm to time-align the command sequence, which includes the motion axis pulses and level signal streams of the multi-axis linkage servo motion system, laser source power modulation parameters, and material conveying control interface feed rate index, with the queue backlog depth and channel load ratio of each network node. This allows for real-time calculation of the queuing position and forwarding delay of each command packet in the current network topology. Finally, the processing serializes and reassembles the results of the state association matrix calculation to generate matching results containing the arrival time, forwarding status, and time slot identifier of each instruction packet in the network channel, thus obtaining the time-domain sliding window matching data.

[0044] Based on time-domain sliding window matching data, the system performs queuing delay analysis and protocol overhead analysis on the dynamic transmission behavior of multi-axis synchronous command sequences in the network channel to obtain time-domain boundary extrapolation data. During implementation, the generated time-domain sliding window matching data is first invoked through a shared memory access mechanism. The system introduces discrete event simulation technology based on network queuing theory, using the arrival time and forwarding status of data packets as statistical samples to calculate the queuing waiting time of each intermediate switching node due to queue backlog online. Simultaneously, the system employs encapsulation delay measurement technology and overhead analysis calculation methods to eliminate the deterministic delays incurred by protocol header encapsulation, checksum calculation, and hardware interrupt responses during the transmission of multi-axis synchronous command sequences through the real-time network protocol stack and real-time frame encapsulation mechanism, thereby accurately deducting the fixed overhead values ​​caused by the underlying communication protocol scheduling. After these two quantitative analysis steps are completed, the system uses the delay margin estimation method and the worst-case delay analysis algorithm to calculate the delay margin of the current network channel under lossless transmission conditions in real time, and reversely deduces the maximum tolerable delay limit of the network channel. Finally, the combined output includes the maximum tolerable delay limit of the network channel, the fixed overhead value brought by protocol scheduling, the delay margin of the current link, and a set of parameters for defining the time threshold for deterministic boundaries, which is the time domain boundary deduction data.

[0045] To obtain a real-time updated transmission window, adaptive clock adjustment and feedback compensation are implemented for the communication cycle parameters of the network channel based on time-domain boundary extrapolation data. First, the predefined communication cycle parameters of the network channel need to be obtained. The system employs integrated gating scheduling technology and adaptive control algorithms of time-triggered Ethernet, using the time threshold and maximum tolerable delay limit in the time-domain boundary extrapolation data as real-time dynamic hard constraints. Under this control mechanism, the system uses adaptive control technology to compare the deviation between the communication cycle parameters and the delay margin, calculating the clock offset compensation amount used to correct the transmission timing. Subsequently, the system dynamically adjusts the transmission gating state of the network controller, expanding or shrinking the original communication trigger interval in real time on the time axis. This ensures lossless transmission of multi-axis synchronous command sequences within the network channel while calculating and determining the transmission window used to control the data stream transmission frequency and the total number of data packets allowed to be transmitted instantaneously. Finally, the system outputs parameters that can adaptively adjust with the channel, thus obtaining the real-time updated transmission window.

[0046] In this solution, through dynamic time-domain window association and transmission boundary extrapolation, quantitative analysis and closed-loop compensation of network communication latency are achieved, effectively eliminating the interference of network jitter on the command stream, ensuring the timing consistency of multi-axis linkage control, and improving the trajectory tracking accuracy and manufacturing stability in complex cladding forming processes.

[0047] S102, acquire dynamic state sequence data generated during the transmission of heterogeneous command stream data in the network channel, and perform time-domain sliding window correlation matching and quantitative deduction of the maximum transmission delay boundary of the network on the heterogeneous command stream data based on the dynamic state sequence data to obtain real-time updated transmission window data.

[0048] A network channel is a logical communication link established between the physical execution mechanism and the control core during the heterogeneous instruction stream data transmission process. It includes the data link layer transmission path, network switching nodes, and various hardware buffers.

[0049] Dynamic state sequence data is a set of continuous time-state feature vectors captured in real time during data transmission, including queue backlog depth of each network node, end-to-end real-time transmission jitter index, channel load ratio, and node response timing.

[0050] The transmission window data is a time-domain threshold range that is dynamically calculated and determined after time-domain correlation matching and transmission delay boundary extrapolation to ensure non-blocking transmission of heterogeneous command stream data within the network channel. This threshold range is used to control the data stream transmission frequency and the total number of data packets allowed to be transmitted instantaneously.

[0051] To acquire dynamic state sequence data generated during the transmission of heterogeneous command streams through the network channel, it is first necessary to deploy network traffic deep packet parsing and hardware timestamp technology at each network switching node and physical interface of the network channel. When heterogeneous command stream data is distributed through the network channel, this technology captures and parses the packet headers in the data link layer transmission path without altering the data frame payload, extracting the absolute clock information of each data packet as it enters and exits the hardware buffer, thereby calculating the queue backlog depth of each network node in real time. Simultaneously, using end-to-end active probing technology and network performance monitoring algorithms, miniature probe frames are periodically sent between the control core and physical actuators. By differentially calculating the clock difference of the returned packets, end-to-end jitter and channel load ratios are obtained in real time. Next, the captured queue backlog depths, end-to-end jitter, channel load ratios, and node response timings of each network node are aligned and timestamped according to a unified clock beat, ultimately combining them to generate a time-series dataset containing the states of each network node, thus obtaining the dynamic state sequence data.

[0052] The process of performing time-domain sliding window correlation matching on heterogeneous command stream data based on dynamic state sequence data establishes a real-time mapping link between transmission rate and network state before traffic shaping. In this process, dynamic state sequence data is used as a multi-dimensional constraint background input, and a sliding window with a fixed time span is set. This sliding window dynamically advances with the current system clock tick to capture the time-varying coupling relationship between the transmission density of heterogeneous command stream data and the network channel throughput state within a specific time period. By comparing the local packet transmission rate change trend of heterogeneous command stream data within the sliding window online, and performing time-series comparison and peak detection with the end-to-end jitter index and node response timing within the same window period, the delay offset corresponding to abnormal fluctuations in network state is identified. This allows for precise identification of the heterogeneous command stream data characteristic patterns that cause transient network channel congestion on a continuous time axis, realizing time-domain correlation analysis between data features and network state, and obtaining time-domain sliding window matching correlation data.

[0053] After obtaining the temporal sliding window matching correlation data, a quantitative extrapolation of the network's maximum transmission delay boundary is performed to ultimately calculate and output the real-time updated transmission window data. This step introduces worst-case delay analysis based on network calculus, using the queue backlog depth and channel load ratio of each network node recorded in the temporal sliding window matching correlation data as input physical parameters. This worst-case delay analysis based on network calculus first calculates the dynamic service curve of the network channel based on the current channel load ratio, and then extrapolates the maximum queuing delay upper limit of each hardware buffer by calculating the minimum convolution of the arrival curve and the service curve. Next, this analysis process combines end-to-end jitter indicators, and through the minimum convolution operation of the service curve and the arrival curve, transforms the physically unpredictable random network jitter into a worst-case transmission delay limit with deterministic boundaries, thereby quantitatively extrapolating the network's maximum transmission delay boundary while ensuring non-blocking transmission of the network channel. Finally, based on the deviation between the network's maximum transmission delay boundary and the target delay, the sending window in the future control cycle is automatically adjusted using the leaky bucket flow shaping algorithm to determine the threshold range that can be used to control the data stream transmission frequency and the total number of data packets that can be sent instantaneously, thus obtaining the real-time updated sending window data.

[0054] S103 performs phase alignment and parallel time-division multiplexing streaming encapsulation on heterogeneous command stream data based on the transmission window data to obtain dynamically delivered parallel data packets.

[0055] Parallel data packets are digital information payloads that are synchronously transmitted across multiple physical channels at the same time or in adjacent time slots after phase alignment and time-division multiplexing encapsulation via multi-channel delay control links. They possess deterministic timing characteristics and a complete set of cooperative control instructions.

[0056] Phase alignment processing of heterogeneous command stream data for multi-channel delay control links based on transmission window data first requires utilizing industrial Ethernet clock synchronization technology specified by international standard protocols. This involves injecting the time-domain threshold range defined in the transmission window data as a hard constraint for the time reference of multi-channel transmission using a network clock synchronization protocol based on wireless and wired time synchronization standards in time-sensitive networks. During this process, the heterogeneous command stream data is demultiplexed and split according to its continuous timestamp attributes, mapping it to the input queues of each independent physical channel in the multi-channel delay control link. Based on the globally unified timestamp established by the network clock synchronization protocol, timing phase calibration technology is introduced. The transmission frequency and total upper limit in the transmission window data are read online, and the inherent transmission phase deviation of each independent physical channel due to hardware routing or node cascading is calculated. Then, using a time-aware shaping scheduling mechanism based on a gated list in time-sensitive networks, feedforward fine-tuning compensation is applied to the command transmission time points of each independent physical channel under microsecond-level hard real-time scheduling. This step eliminates the inconsistency in transmission time delay between independent physical channels after demultiplexing and splitting, enabling the instruction data packets of each channel to achieve high-precision phase alignment and accurate synchronization on a continuous time axis before entering the transmission buffer, thus obtaining phase-aligned instruction data.

[0057] After receiving the phase alignment command data, parallel time-division multiplexing streaming encapsulation processing is implemented to ultimately calculate and output parallel data packets. This step introduces a time-triggered frame encapsulation mechanism based on the time-sensitive networking standard, dynamically fragmenting and segmenting the phase alignment command data according to the total number of data packets allowed to be transmitted dynamically limited by the transmission window data. This time-triggered frame encapsulation mechanism runs within a hard real-time operating system environment, constructing a deterministic data frame structure for each segmented data stream based on the time-domain threshold range of the transmission window data. This structure includes a virtual LAN priority label, a time-sensitive identifier, and a network channel checksum. Next, the algorithm utilizes the time-triggered multiplexing mechanism to deterministically schedule control commands belonging to the motion control axis and power modulation commands belonging to the high-energy beam generator according to microsecond-level fixed time slots pre-allocated by the time-aware shaper gating list, ensuring precise alignment at the same time or within adjacent time slots. Ultimately, based on the frame duplication and elimination mechanism in time-sensitive networks, the algorithm uses a multi-channel parallel driver to synchronously push the encapsulated deterministic data frame structure to the physical layer transmission port of the multi-channel delay control link, thereby achieving multi-channel spatial redundancy transmission control. It synchronously transmits digital information payloads with deterministic timing characteristics and a complete set of cooperative control instructions across multiple physical channels, thus obtaining dynamically delivered parallel data packets.

[0058] S104 performs multi-threaded pipelined asynchronous pre-decoding and pulse level control signal conversion processing on parallel data packets based on the underlying buffers of each edge node to obtain the underlying control data of rolling latch.

[0059] Edge nodes are embedded computing terminals on the physical execution side that are directly responsible for receiving network stream data and performing localized real-time signal processing. They constitute the lowest execution-side boundary of the control architecture.

[0060] The underlying buffer is a hardware storage space located inside the edge node, used for high-frequency temporary storage, data alignment, and rate matching of received parallel data packets. Its main function is to smooth network transmission jitter and ensure the timing continuity of pulse signal generation.

[0061] Low-level control data refers to the terminal electrical signals that directly drive hardware actuators to perform physical actions in precision additive manufacturing or space processing systems. Specifically, these signals manifest as electrical pulse sequences that control the rotational step size and speed of motors, pulse width modulation waveforms that adjust the output power of lasers or electron beams, and binary enable signals that cut off or open high voltage, gas circuits, and other on / off states.

[0062] Based on the underlying buffers of each edge node, parallel data packets undergo multi-threaded pipelined asynchronous pre-decoding. First, the POSIX multi-threading control technology and software pipeline scheduling strategy supported by a high-concurrency hard real-time operating system are utilized to construct multiple logically parallel processing threads within the embedded computing terminal. Parallel data packets are then directly written to the hardware circular queue storage space of the underlying buffer via the network interface. Subsequently, the pre-decoding main thread, driven by a hardware high-frequency timer, monitors the read / write pointer changes of the underlying buffer in real time. Once a newly written digital information payload is captured, the data segments of the parallel data packet are asynchronously distributed to various dedicated sub-threads using mutexes and condition variables. Specifically, the basic parsing thread uses message structure deserialization technology to read deterministic timing features from the parallel data packets and performs network channel verification and comparison. Meanwhile, the instruction mapping thread synchronously employs hardware bit manipulation and lookup table technology to extract the complete set of cooperative control instructions from the digital information payload in parallel, translating the geometric pose and power modulation values ​​into recognizable motion velocity components and power pulse duty cycle data. Each thread executes multiple independent logical processing steps, such as data frame verification, timestamp parsing, and control parameter mapping, in a hardware-level pipeline manner. The decoded data is stored in real time into a specific physical address area of ​​the on-chip static random access memory, thereby eliminating the task blocking delay caused by single-threaded processing and obtaining pre-decoded instruction data.

[0063] After obtaining the pre-decoded instruction data, high-precision pulse level control signal conversion processing is performed to finally calculate and output the double-buffered latched low-level control data. This step introduces a hardware counter module and a hardware pulse width modulation generator module based on a programmable gate array to convert the motion velocity component and power pulse duty cycle data in the pre-decoded instruction data into electrical signals that directly drive the physical execution components. In this process, the hardware counter module, driven by the high-frequency system crystal oscillator at the edge node, converts the numerical velocity component into a specific frequency electrical pulse sequence for controlling the motor rotation step size and speed, which serves as the physical input signal for the motor driver. Simultaneously, the hardware pulse width modulation generator module adjusts the high-level duration of the output digital waveform in real time according to the power pulse duty cycle data, converting it into a pulse width modulation waveform for adjusting the output power of the high-energy beam generator. To ensure seamless waveform output and eliminate control dead zones during high-speed continuous printing, this process employs an atomic update mechanism based on shadow registers. Simultaneously, while outputting the current electrical pulse sequence and pulse-width modulation waveform in the current time slot, the programmable gate array (PLA) preloads the level transition parameters for the next time slot into the auxiliary latch register via the underlying internal bus. At specific processing nodes, switching between high and low levels generates binary enable signals to cut off or open / close the high-pressure and gas path states. Until the edge node captures the hardware edge trigger signal of the global synchronization clock, the output of the hardware latch instantaneously completes the seamless switching between the old and new level states, ultimately converting the digital information payload into electrical pulse sequences, pulse-width modulation waveforms, or binary enable signals that directly act on the physical execution components, resulting in double-buffered latched underlying control data.

[0064] Based on the above technical solution, optionally, multi-threaded pipelined asynchronous pre-decoding and pulse level control signal conversion processing is performed on parallel data packets based on the underlying buffer of each edge node to obtain the underlying control data of rolling latch, including: Based on the underlying buffers of each edge node, multi-threaded flow scheduling and pipelined asynchronous instruction stream parsing are implemented for parallel data packets to obtain pre-decoded state data; Based on the pre-decoded state data, pulse feature parameters are extracted and level signal logic-driven conversion is performed on the underlying buffer of each edge node to obtain the pulse level control signal; Based on the pulse level control signal, clock-triggered edge detection and asynchronous rolling latch state maintenance are performed on the register array of the underlying buffer of each edge node to obtain the underlying control data of the rolling latch.

[0065] In this scheme, the pre-decoding state data is an intermediate data set generated after the parallel data packets are parsed through a multi-threaded pipeline. It includes the instruction opcode parsing result, the execution logic flags of each subsystem, the parameter parsing check code, and the subsequent pulse generation logic control bits.

[0066] The pulse level control signal is the low-level electrical signal that the edge node converts pre-decoded state data into a signal that can directly drive the physical actuator. Specifically, it includes a stepping pulse sequence for axial movement of the motor, a pulse width modulation waveform for high-energy beam power regulation, and a binary logic enable level for controlling the opening and closing of the air circuit or power supply.

[0067] The register array is a hardware circuit unit located in the underlying buffer of the edge node. Through the matrix layout of multiple parallel storage units, it realizes the real-time temporary storage and state maintenance of pulse level control signals, and serves as the interface boundary between signal latch output and physical execution hardware.

[0068] Based on the underlying buffers of each edge node, circular buffer management and pipelined decoding are implemented for parallel data packets to obtain pre-decoding state data. First, the digital payload received from the physical channel, possessing deterministic transmission characteristics and a complete set of coordinated control instructions—i.e., parallel data packets—is temporarily stored in a memory consisting of dual-port static random access memory. Circular buffer management technology is used to smooth network transmission jitter. Next, the embedded processor enables an interrupt-driven dispatch mechanism to distribute the parallel data packets in the underlying buffer to different decoding tasks according to instruction type. During pipelined decoding, the processor uses instruction decoding technology and bitmask extraction methods to decompose the multi-axis synchronization instruction sequence frame by frame, discretely extracting instruction information of different categories, including motion axis control, laser source modulation, and feeding speed. This process, executed collaboratively by hardware and software, completes integrity verification and opcode extraction, ultimately combining them to generate an intermediate state data set containing instruction opcode parsing results, subsystem enable flags, parameter checksums, and pulse control bits—the pre-decoding state data.

[0069] Based on the pre-decoded state data, pulse parameters are extracted and level conversion is performed on the underlying buffers of each edge node to obtain pulse level control signals. During implementation, the generated pre-decoded state data is first read via the internal high-speed bus and used as the control data source. The system introduces timer capture counting technology and digital quantization processing methods to extract the pulse frequency of the motor axial movement, the duty cycle corresponding to the laser servo power, and the air circuit switch status from the pre-decoded state data in real time. During the level conversion process, the field-programmable gate array (FPGA) utilizes its internally configured underlying lookup table and flip-flop cascade structure to convert the extracted subsystem enable flags and pulse control bits into high-speed transistor-to-transistor logic levels on specific physical pins. This conversion process directly outputs step pulses for motor axial movement, pulse width modulation waveforms for laser source power adjustment, and enable signals for controlling the on / off switching of the air circuit or power supply, ultimately generating the underlying electrical signals that can directly drive the physical actuators, i.e., the pulse level control signals.

[0070] The system uses pulse-level control signals to perform edge detection and double-buffered latching on the register arrays of the underlying buffers of each edge node to obtain the rolling latched underlying control data. This step first connects the generated pulse-level control signals in parallel to the register arrays within the edge nodes, which are composed of multiple parallel memory cells. The system employs edge detection technology based on a high-frequency sampling clock, using Schmitt triggers and edge sampling circuits to capture the rising and falling edges of transistor-to-transistor logic levels. During the double-buffered latching process, when the register array detects a valid edge transition, it uses a double-buffered latching mechanism to temporarily store the current pulse-level control signal in real time in the output register, and maintains the current state through hard-wired logic until the next clock sampling cycle arrives. By adopting this state update and latching mechanism, the system smooths the decoding delay at the physical interface boundary, realizes the electrical pulse sequence for controlling the motor rotation step size and speed, the pulse width modulation waveform for adjusting the output power of the laser or electron beam, and the timing continuity of the binary enable signal on the time axis for cutting off or opening high voltage, gas circuit, etc., and finally generates the terminal control signal that directly drives the actuator to make physical actions, that is, obtains the low-level control data of rolling latch.

[0071] In this scheme, multi-threaded pre-decoding and edge-triggered latching techniques are used to achieve parallel parsing of control instructions and deterministic output of electrical signals, effectively eliminating decoding jitter and ensuring the timing continuity and synchronization accuracy of actuator drive signals.

[0072] S105: Obtain the synchronization signal sequence data continuously sent by the master control terminal through the network. Based on the synchronization signal sequence data, perform physical signal-level frame-by-frame instantaneous cascading triggering and network latency jitter isolation response on the underlying control data to obtain continuous drive data.

[0073] The master control unit is a central computing unit or host computer server in a distributed control system that has global resource scheduling capabilities, runs precise motion control algorithms, and is responsible for sending timing synchronization triggering instructions to the underlying nodes.

[0074] Synchronization signal sequence data is a set of digital instructions that are periodically generated and issued by the master control terminal, carrying a global reference clock and a precise trigger timing identifier. It is used to force the underlying nodes to keep the time domain consistent with the global control clock, and ensure that the functional units inside the physical actuator can achieve coordinated action under a unified time base.

[0075] Continuous drive data is a stream of pulses and level signals that directly drive physical actuators to maintain uniform speed or specific trajectory motion after eliminating the impact of network latency jitter, undergoing physical cascade triggering processing, and having a smooth connection with strict timing correspondence.

[0076] To acquire the synchronization signal sequence data continuously transmitted from the master control terminal via the network, the hardware timestamp capture mechanism under the network timing protocol is first used to perform hardware pass-through sampling of the synchronization signal sequence data at the communication interface of the edge node. During continuous transmission, the hardware triggering logic inside the edge node monitors the message feature bits of the network interface in real time. Once a set of digital instructions containing global clock calibration and time slot opening flags is detected, a hardware layer interrupt is immediately triggered, and the physical timestamp of the synchronization signal sequence data arriving at the local hardware bus of the edge node is accurately captured using the timestamp capture register. Subsequently, this technology performs differential comparison between the captured physical timestamp and the local running time of the edge node to calculate the master-slave clock offset and path delay accumulated during network channel transmission. The local clock frequency is adjusted using the IEEE 1588 clock servo algorithm, locking the local clock to the global reference clock synchronized with the master control terminal. This ensures that every frame of low-level control data transmitted from the master control terminal can be associated with a unified time base, achieving alignment of various functional units within the physical actuator under a unified time base and obtaining high-precision clock alignment data.

[0077] The process of isolating network latency jitter in underlying control data based on synchronization signal sequence data is implemented using a hardware queue manager and time-aware gating scheduling technology based on a time slot allocation table. After obtaining high-precision clock alignment data, the edge node temporarily stores the underlying control data sent in advance by the master control terminal in a double-buffered latch, preparing for precise alignment with the physical time slots set by the master control terminal. During this period, to isolate network latency jitter caused by network transmission uncertainties, the hardware queue manager dynamically establishes a hardware first-in-first-out buffer queue with deterministic depth, queuing the underlying control data, including electrical pulse sequences, pulse width modulation waveforms, or binary enable signals, in an orderly manner. Then, the time-aware gating scheduling technology reads the precise trigger timing identifier carried in the synchronization signal sequence data online, accurately assigning a unique future effective absolute time to each frame of underlying control data in the buffer queue. This technology forcibly absorbs the randomness of network transmission fluctuations locally at the edge node by configuring a de-jitter buffer with a depth of more than twice the maximum network latency jitter. This ensures that the control data has a stable timing state that completely eliminates the impact of network latency jitter before entering the next level of triggering, thus obtaining isolated response cache data.

[0078] The process of triggering underlying control data frame-by-frame instantaneously at the physical signal level based on the synchronization signal sequence data to ultimately obtain continuous drive data is achieved using the sequential triggering logic and glitch-free switching technology of a programmable gate array (PGA). After receiving the isolated response buffer data, the edge node continuously compares the current global reference clock with the preset effective absolute time. The moment the system hardware counter reaches the effective absolute time, the glitch-free switching technology instantly opens the hardware physical path, directly outputting the latched electrical pulse sequence, pulse width modulation waveform, and binary enable signal frame-by-frame at an extremely high speed with a logic gate-level delay. During this output process, this technology eliminates transient voltage jitter and level glitches caused by instruction frame switching by updating the synchronization register at the junction of two consecutive control instruction time slots. Furthermore, by utilizing the synchronous output register and enable control logic of the PGA, all output channels are simultaneously updated under the trigger of the global clock edge, ensuring a strict timing correspondence in the output signal chain. Ultimately, this instantaneous triggering processing at the physical signal level reconstructs the discrete low-level control data into a smoothly connected pulse and level signal stream that directly drives the physical actuator to maintain uniform speed or specific trajectory motion, thus obtaining continuous drive data.

[0079] Based on the above technical solution, optionally, based on the synchronization signal sequence data, the underlying control data is subjected to physical signal-level frame-by-frame instantaneous cascade triggering and network latency jitter isolation response to obtain continuous drive data, including: Based on the synchronization signal sequence data, the physical layer signal frame-by-frame temporal feature extraction and edge alignment processing are performed on the underlying control data to obtain the frame-by-frame synchronization control signal. Based on the frame-by-frame synchronization control signal, multi-level gate circuit cascade flipping and clock edge locked step triggering are performed on the underlying control data to obtain the cascaded triggering status signal. Based on the cascaded trigger state signal to the synchronization signal sequence data, rigid locking of the time slot window and physical blocking response processing of time delay jitter propagation are implemented to obtain the time delay immune control signal; Based on the time-delay immune control signal, the cascaded trigger state signal is subjected to continuous time-domain waveform synthesis and drive state sequence output processing to obtain continuous drive data.

[0080] In this scheme, the frame-by-frame synchronization control signal is a reference signal generated by aligning the underlying control data and the synchronization signal sequence data in the time domain. Its contents include the frame start pulse of the current processing cycle, the time slot trigger pulse aligned with the global reference clock, and the synchronization preparation status information of each execution unit.

[0081] The cascaded trigger status signal is an intermediate control state formed after being processed by multiple levels of logic circuits. Its contents include the lock-step enable logic after cascading synchronization of gate circuits, the trigger timing phase information of each functional unit, and the electrical cascaded status code that ensures coordinated action.

[0082] The time-delay immune control signal is a deterministic control signal formed by physically blocking the propagation of network time-delay jitter within a rigidly locked time slot window. Its contents include the control trigger point rigidly limited within the target time slot, the phase correction data after time-delay filtering, and the stable trigger sequence with anti-jitter characteristics.

[0083] To obtain frame-by-frame synchronization control signals, the underlying control data is synchronized and edge-aligned based on synchronization signal sequence data. First, the set of digital instructions periodically generated and issued by the master control unit, carrying a global reference clock and precise trigger timing identifiers—the synchronization signal sequence data—is introduced into the high-speed differential receiver and clock data recovery circuit. The system employs hardware timer capture technology to extract the global reference clock frequency and the frame start identifier of the data link layer from the synchronization signal sequence data in real time. Simultaneously, the system uses a phase detection circuit to phase-lock the underlying control data—including electrical pulse sequences controlling motor rotation step size and speed, pulse width modulation waveforms adjusting laser or electron beam output power, and binary enable signals indicating the on / off states of high voltage and gas circuits—with the extracted global reference clock. During this process, the field-programmable gate array (FPGA) uses its internal programmable delay line technology to dynamically fine-tune the waveform edges of the underlying control data, thereby aligning the rising edge of each frame of control data with the trigger edge of the global reference clock at the nanosecond level. Finally, the data is combined to generate a reference signal that includes the frame start pulse of the current processing cycle, the time slot trigger pulse aligned with the global reference clock, and the synchronization preparation status information of each execution unit, thus obtaining the frame-by-frame synchronization control signal.

[0084] Based on the frame-by-frame synchronization control signal, multi-level gate circuit cascading and edge-triggered synchronization are implemented on the underlying control data to obtain the cascaded trigger state signal. During implementation, the generated frame-by-frame synchronization control signal is first used as the global enable signal for subsequent hardware cascaded circuits. The system employs a multi-level high-speed AND and OR gate cascaded circuit constructed with hard-wired logic, connecting the frame start pulse and time slot trigger pulse from the frame-by-frame synchronization control signal to the control terminals of the multi-level gate circuits. During the gate circuit cascaded state switching of the underlying control data, when the transition edge of the frame-by-frame synchronization control signal triggers the first-level gate circuit, the transistor state inside the gate circuit instantaneously flips, and the enable state is transmitted to subsequent circuits with extremely low cascade propagation delay. During this propagation, the system synchronously utilizes edge-triggered synchronization technology to connect the cascaded transmission level to the input of the D flip-flop, and performs forced synchronization latching when the next rising edge of the global reference clock arrives. This process utilizes the switching characteristics of digital logic circuits to effectively eliminate the timing differences between various control commands. The final combined output includes the lock-step enable logic after cascading synchronization of gate circuits, the trigger timing phase information of each functional unit, and the intermediate control state of the electrical cascading status code that ensures coordinated action, thus obtaining the cascading trigger status signal.

[0085] To obtain a delay-immune control signal, the system implements time slot locking and jitter isolation on the synchronization signal sequence data based on the cascaded trigger status signal. This step first requires calling the generated cascaded trigger status signal as the control signal for the isolation mechanism. The system introduces time slot locking technology from the time-triggered bus, configuring protection time slots at the hardware level based on the trigger timing tags in the synchronization signal sequence data. In jitter isolation processing, the system utilizes a bus isolation switching mechanism, in conjunction with opto-isolators and independent tri-state buffers, to force the physical pins of the network data channel to a high-impedance state during non-preset transmission time slots, thereby isolating any data jitter, message blocking, or transmission delay generated during network transmission at the physical level. Only when the electrical cascaded status code in the cascaded trigger status signal completely matches the currently preset protection time slot will the hardware turn on the tri-state buffer, thus giving the output control flow a highly anti-interference deterministic transmission characteristic. Finally, a deterministic control signal is generated, containing the time slot trigger point rigidly limited to the target time slot, phase-corrected data after time delay filtering, and a stable trigger sequence with anti-jitter characteristics, thus obtaining the delay-immune control signal.

[0086] To obtain continuous drive data, the system implements waveform continuity and drive sequence output based on the time-delay immune control signal to the cascaded trigger state signal. This requires synchronously introducing the time-delay immune control signal and the cascaded trigger state signal into the combinational logic circuit of the field-programmable gate array (FPGA). The system employs waveform continuity technology and a hardware multiplexer switching method. The stable trigger sequence with anti-jitter characteristics in the time-delay immune control signal is used as the time base, while the lock-step enable logic in the cascaded trigger state signal is used as the amplitude control signal for waveform synthesis. In waveform continuity processing, the system uses a hardware state machine to perform logical AND operations and timing combinations on the two sets of signals. At the boundary of the alternating control cycles, synchronous sampling by cascaded triggers eliminates glitches caused by level switching, and dead-time control ensures smooth waveform transition. By logically recombining discrete control pulses at the physical electrical level, the system ultimately continuously outputs drive signals that, after eliminating network delay jitter, undergoing physical cascaded trigger processing, and exhibiting smooth connection and strict timing correspondence, directly drive the physical actuator to maintain uniform speed or a specific trajectory motion, thus obtaining continuous drive data.

[0087] In this scheme, physical-level frame synchronization and three-state isolation technology are used to lock the hard real-time protection time slot and eliminate the cumulative transmission jitter, ensuring the continuity of the control waveform transition level, thereby realizing nanosecond-level lock-step coordination of beam energy and spatial trajectory, which significantly improves the forming precision of the processed components.

[0088] S106, based on real-time control of physical actuators using continuous drive data, performs multi-degree-of-freedom spatial collaborative cladding forming process to obtain formed components.

[0089] The physical actuator is an automated hardware system that integrates a multi-axis linkage servo motion system, a high-energy beam generator, a real-time pose feedback sensor, a molten pool thermal imaging monitoring unit, a material conveying control interface, and a motion axis feedback encoder.

[0090] The formed component is a solid workpiece with specific geometric shape, dimensional accuracy, density and material structure formed by the multi-degree-of-freedom spatial collaborative cladding forming process of physical actuators, which deposits and solidifies metal powder or wire layer by layer.

[0091] To implement multi-degree-of-freedom spatial collaborative cladding forming by real-time control of physical actuators based on continuous drive data, high-speed differential signal receiving technology and a high-speed drive bus are first used to smoothly connect the pulse and level signal streams from the continuous drive data, eliminating the impact of network delay jitter, to the various hardware drive circuits of the physical actuator in real time. During the execution of the action, multiple heterogeneous control links of the physical actuator synchronously perform high-speed motion mapping and motion phase alignment under the hardware synchronous pulse drive with a unified time base. Among them, the multi-axis linkage servo motion system directly receives the high-frequency digital pulse sequence from the continuous drive data through the high-speed servo motion control interface, triggering the servo motor drivers of each axis, thereby precisely driving the execution end to achieve multi-axis linkage spatial trajectory interpolation motion in space, such as X, Y, Z, A, and C. Meanwhile, the high-energy beam generator synchronously receives the high-frequency pulse width modulation waveform from the continuous drive data through the high-energy beam energy real-time modulation interface. Utilizing high-speed opto-isolation drive technology, it adjusts the frequency and duty cycle of the output current according to the energy input parameters that are strictly matched with the speed of the spatial trajectory. The material delivery control interface continuously delivers metal powder or wire to the spot area of ​​the high-energy beam at a predetermined feed rate, causing the material to melt instantaneously under the action of the energy field, forming discrete molten pool state data in a controlled state.

[0092] In the ongoing process of multi-degree-of-freedom spatial collaborative cladding forming, high-frequency closed-loop acquisition and real-time online monitoring of the forming state of the physical actuators are implemented to ultimately produce formed components that meet the requirements of dimensional accuracy and density. This step utilizes an embedded motion axis feedback encoder, a high-precision real-time pose feedback sensor, and a molten pool thermal imaging monitoring unit to acquire multi-source sensor data on the forming process of the current processing plane. During the high-speed operation of the multi-axis linkage servo motion system, the embedded motion axis feedback encoder outputs the real-time current feedback and speed pulse count values ​​of each motion axis in real time, while the high-precision real-time pose feedback sensor synchronously captures the three-dimensional absolute coordinate position of the execution end. Simultaneously, the molten pool thermal imaging monitoring unit acquires the real-time temperature field pixel grayscale values ​​and the geometric contour width of the molten pool in the high-energy beam action area through an infrared optical lens group. Multi-source sensor data streams are aligned using millisecond-level hardware timestamps in a local high-speed digital signal processor. An extended Kalman filter multi-source information fusion algorithm is used to fuse encoder position feedback, thermal imaging temperature field, and powder feeding rate, constructing a digital twin model of the cladding process. This model estimates the molten pool temperature field distribution and deposition layer geometry in real time, ensuring that the deposition trajectory, cladding layer thickness, and macroscopic morphology of each layer of metal powder or wire conform to preset workpiece specifications through closed-loop feedback control along the time axis. As the multi-axis linkage servo motion system completes the scanning of the entire processing trajectory under continuous drive data, the material undergoes layer-by-layer deposition and solidification, ultimately constructing a solid workpiece with specific geometry, dimensional accuracy, density, and material microstructure—the resulting shaped component.

[0093] In this embodiment, sub-microsecond-level action synchronization is achieved in a high-latency jitter environment of the network through multi-level spatiotemporal decoupling mapping, real-time dynamic window transmission and underlying physical signal triggering control, which significantly improves the trajectory smoothness, molten pool stability and component forming accuracy of multi-axis collaborative cladding.

[0094] Based on the above technical solution, optionally, a multi-degree-of-freedom spatial collaborative cladding forming process is performed using a physical actuator controlled in real time by continuous drive data to obtain a formed component, including: Based on continuous drive data, multi-axis linkage spatial trajectory interpolation and dynamic speed matching control are performed on the physical actuator to obtain a multi-degree-of-freedom cooperative motion state. Based on the multi-degree-of-freedom cooperative motion state of the physical actuator, the shape control of the molten jet beam and the material layer cladding stacking process are implemented to obtain a spatial cladding formed entity. For spatial cladding formed entities, three-dimensional morphological temporal scanning and in-situ morphological feature extraction are performed to obtain component geometric state data; The geometric state data of the component is processed by spatiotemporal mapping alignment and multi-degree-of-freedom cooperative motion state calculation and fusion to obtain the shaped component.

[0095] In this scheme, the multi-degree-of-freedom cooperative motion state is the instantaneous physical posture exhibited by the linkage servo system of each axis under the precise control of the physical actuator under continuous drive data. Its contents include the real-time position coordinates of each motion axis, the synthetic motion vector of multi-axis linkage, the feed speed aligned with the spatial trajectory, and the current acceleration distribution parameters.

[0096] A spatial cladding-formed entity is an intermediate component formed by depositing and initially solidifying materials under the action of a molten jet beam in a state of multi-degree-of-freedom coordinated motion. Its contents include the geometric contour of the current deposited layer, the instantaneous temperature field distribution of the cladding area, the thickness information of the material stack layers, and the physical morphological characteristics of the solidified state.

[0097] The component geometric state data are descriptive parameters that are digitally mapped to the current physical form of the formed component after in-situ scanning and analysis. The data includes the three-dimensional coordinates of the spatial contour of the formed component, the deviation value of the morphological features, the surface flatness index, and the spatial geometric convergence information after comparison with the design model.

[0098] To achieve multi-degree-of-freedom cooperative motion, the system employs multi-axis linkage spatial trajectory interpolation and speed control based on continuous drive data to achieve this. First, the stepping pulses that directly drive the physical actuators to maintain uniform or specific trajectory motion—the continuous drive data—are input to the hardware input capture interface of the multi-axis motion controller. The system uses a spatial trajectory interpolation algorithm and speed look-ahead control technology to calculate the trajectory increment of each motion axis in the next servo cycle based on the timing pulses carried in the continuous drive data. In speed control processing, the system utilizes adaptive speed smoothing technology to perform a high-speed closed-loop comparison between the encoder feedback data of each motion axis and the target trajectory, dynamically adjusting the current loop and speed loop gain parameters of the servo driver to ensure a high degree of consistency between the synthesized speed of the multi-axis linkage and the trajectory feed speed. This process uses a hardware counter and servo cycle synchronization interrupt to latch the linkage state of the multi-axis in real time, thereby precisely controlling and outputting pose information including the real-time position coordinates of each motion axis, the synthesized speed of the multi-axis linkage, the trajectory feed speed aligned with the spatial trajectory, and the current acceleration allocation parameters—thus obtaining the multi-degree-of-freedom cooperative motion state.

[0099] Based on the multi-degree-of-freedom cooperative motion state, the system implements laser power modulation and layer-by-layer cladding stacking on the physical actuator to obtain a spatially clad formed entity. During implementation, the generated multi-degree-of-freedom cooperative motion state is first invoked in real-time via the fieldbus inside the physical actuator. The system introduces laser power modulation technology and powder feeding synchronization control method. Based on the synthesized velocity and trajectory feed speed of the multi-axis linkage in the multi-degree-of-freedom cooperative motion state, the output power of the laser source is adjusted in real-time, and the material delivery control interface is driven to proportionally adjust the powder feeding rate of the metal powder. In the layer-by-layer cladding stacking process, the system uses focus control technology to adjust the beam shape, ensuring that the width of the molten pool formed by the laser focus precisely matches the thickness of the powder deposition layer at the current trajectory feed speed, melting and rapidly solidifying the metal powder layer by layer. During this period, the system uses a molten pool thermal imaging monitoring unit to monitor the temperature field of the deposition area online. By adjusting the laser energy output through a closed loop, the thermal balance of the cladding process is maintained. Finally, layer-by-layer stacking generates a semi-finished product containing the geometric contour of the current deposition layer, the instantaneous temperature field distribution of the cladding area, the thickness information of the material stack layers, and the geometric characteristics of the solidified state, thus obtaining the spatially clad formed entity.

[0100] To obtain geometric state data of a spatially clad formed entity, the system performs online scanning of its 3D surface morphology and in-situ extraction of morphological features. This step first requires activating the locally integrated measurement hardware while the physical actuators maintain coordinated motion. The system employs 3D laser line scanning technology and structured light scanning methods to drive a real-time pose feedback sensor and a laser scanner to perform non-contact high-speed scanning of the surface of the solidifying spatially clad formed entity, acquiring optical image information reflected from the surface in real time. In the in-situ morphological feature extraction process, the system utilizes digital image processing technology, edge detection extraction algorithms, and online point cloud data reconstruction technology to convert the discrete electrical signals captured by the scan into a dense point cloud with spatial 3D coordinates, and automatically filters out noise interference introduced by molten pool splashes. By calculating the normal deviation between the currently reconstructed surface and the design model, the system extracts the surface contour and roughness features online, and finally reassembles and outputs digital descriptive parameters containing the spatial contour 3D coordinates of the formed component, morphological feature deviation values, surface flatness index, and geometric deviation compared to the design model, thus obtaining the component's geometric state data.

[0101] To obtain the formed component, spatiotemporal registration and kinematic fusion calculations are performed on the component's geometric state data. During implementation, the generated component geometric state data and the corresponding time-series recorded multi-degree-of-freedom cooperative motion states are simultaneously read into the processor's shared memory. The system employs spatiotemporal registration technology and sensor fusion algorithms to precisely synchronize the three-dimensional spatial contour coordinates of the timestamped component geometric state data with the pose information of the multi-degree-of-freedom cooperative motion states latched by the motion axis feedback encoder, and perform spatial three-dimensional coordinate system transformation. In the multi-degree-of-freedom cooperative motion state calculation and fusion processing, the system utilizes extended Kalman filtering technology to fuse the measured morphological feature deviation values ​​with the spatial cumulative error generated by the robotic arm's motion trajectory. By feedback correction of the trajectory correction amount and beam parameters of the next layer, dynamic closed-loop compensation for the forming process is achieved. By ensuring that the metal powder is accurately deposited and solidified layer by layer under a unified time reference, the system ultimately outputs a solid workpiece with specific geometric shape, dimensional accuracy, density, and material microstructure, thus obtaining the formed component.

[0102] In this solution, dynamic and precise matching of motion trajectory and laser energy is achieved through multi-axis linkage closed-loop compensation and real-time morphology monitoring, which effectively eliminates the cumulative error in the spatial coordination process and ensures the consistency of geometric accuracy and microstructure density of the formed component.

[0103] Figure 2 A second flowchart illustrating the parallel preloading and scheduling method for network-cooperative additive manufacturing instructions provided in this embodiment of the disclosure. The method may include the following steps: S201: Obtain the global machining trajectory data of the component to be printed, and perform spatiotemporal decoupling mapping of multidimensional spatial trajectory interpolation and dynamic constraints based on the global machining trajectory data to obtain heterogeneous instruction flow data under continuous time axis.

[0104] S202: Obtain dynamic state sequence data generated during the transmission of heterogeneous command stream data in the network channel. Based on the dynamic state sequence data, perform time-domain sliding window correlation matching and quantitative deduction of the maximum transmission delay boundary of the network on the heterogeneous command stream data to obtain real-time updated transmission window data.

[0105] S203, based on the transmit window data, performs multi-channel delay feature mapping and control cycle phase time domain alignment processing on heterogeneous command stream data to obtain phase-aligned command stream data.

[0106] S204, based on the transmit window data, performs multi-dimensional time slot slicing and parallel time-division multiplexing streaming sequence encapsulation processing on the phase-aligned command stream data to obtain time-division multiplexed streaming encapsulated data.

[0107] S205, based on time-division multiplexing streaming encapsulation of data, implements dynamic reassembly of multi-channel link frame structure and parallel data packet delivery processing to obtain dynamically delivered parallel data packets.

[0108] S206 performs multi-threaded pipelined asynchronous pre-decoding and pulse level control signal conversion processing on parallel data packets based on the underlying buffers of each edge node to obtain the underlying control data of rolling latch.

[0109] S207: Obtain the synchronization signal sequence data continuously sent by the master control terminal through the network. Based on the synchronization signal sequence data, perform physical signal-level frame-by-frame instantaneous cascading triggering and network latency jitter isolation response on the underlying control data to obtain continuous drive data.

[0110] S208, based on real-time control of physical actuators using continuous drive data, performs multi-degree-of-freedom spatial collaborative cladding forming to obtain formed components.

[0111] In this embodiment, the phase-aligned command stream data is a data sequence after the heterogeneous command stream data has undergone phase compensation and synchronization alignment in the time domain according to the real-time constraints of the transmission window data. It includes offset correction parameters of each cooperative control command, time slot markers that are strictly aligned with the global clock reference, and phase synchronization status information of each control link.

[0112] Time-division multiplexing (TDML) streaming encapsulated data is a streaming data set formed by interleaving and encapsulating multi-channel instruction sets according to specific timing rules after multi-dimensional time slot slicing. Its contents include instruction segments after time-division multiplexing, time slot allocation indexes corresponding to each physical channel, channel redundancy check sequences, and streaming transmission control words used for subsequent link packet assembly.

[0113] To obtain phase-aligned command stream data, the system performs multi-channel delay feature mapping and control cycle phase time-domain alignment processing on the multi-axis synchronization command sequence based on the transmission window. First, the multi-axis synchronization command sequence needs to be imported into the network interface controller, and link delay measurement technology is used to obtain the fixed delay of each physical channel online due to differences in transmission medium and routing nodes. Next, the system enables phase compensation algorithms and clock synchronization control technology, using the transmission window—which controls the data stream transmission frequency and the total number of data packets allowed to be transmitted instantaneously—as a hard constraint to calculate the phase offset corresponding to each physical channel. In the control cycle phase time-domain alignment processing, the system uses digital phase-locked loop (PLL) technology to perform high-precision phase compensation on the multi-dimensional coordinated control command sequence, which includes the motion axis pulses and level signal streams of the multi-axis linkage servo motion system, laser source power modulation parameters, and material conveying control interface feed rate indicators, based on the calculated phase offset. By adjusting the start point of the instruction transmission time of each physical channel in real time, the instruction sequence originally with absolute timestamp tags is clock-aligned before entering the physical transmission medium, thereby outputting a data sequence containing the phase offset compensation value of each cooperative control instruction, the synchronization time slot identifier, and the synchronization status, thus obtaining the phase-aligned instruction stream data.

[0114] Based on the transmission window, the system performs multi-dimensional time slot slicing and parallel time-division multiplexing streaming sequence encapsulation on the phase-aligned command stream data to obtain time-division multiplexed streaming encapsulated data. During implementation, the generated phase-aligned command stream data is first retrieved from the high-speed buffer. The system introduces time-division multiplexing scheduling technology and time slot allocation algorithms. Based on the bandwidth and time domain threshold range limited by the transmission window, a continuous communication time axis is finely divided into multiple standard synchronization time slots. On this basis, the system employs multi-channel parallel data multiplexing technology to sequentially fill the corresponding synchronization time slots with phase-aligned command stream data from different physical control links such as motion axis pulses, laser sources, and material conveying, according to a preset priority scheduling rule. During the streaming sequence encapsulation process, the system simultaneously enables hardware pipelined computing technology based on linear feedback shift registers to automatically append the corresponding physical channel time slot allocation index and streaming transmission control word to the command segments within each time slot, and calculates and generates the corresponding frame check sequence in real time. This process performs high-density multiplexing of multiple parallel data streams in the time domain of a single physical channel, and finally combines them to generate a set of multiplexed frames containing time-division multiplexed instruction segments, time slot allocation indices for each physical channel, frame check sequences, and streaming control words, thus obtaining time-division multiplexed streaming encapsulated data.

[0115] To obtain dynamically delivered parallel data packets, the system implements dynamic reassembly and parallel data packet delivery processing of multi-channel link frame structures based on time-division multiplexing streaming encapsulated data. This step first requires continuously reading the time-division multiplexing streaming encapsulated data from the cache using direct memory access technology. Next, the system enables link-layer frame encapsulation technology and a multi-channel parallel communication mechanism. According to the standard network transmission frame format, the system fills the payload field of the standard Ethernet data frame in real time with the instruction segments, time slot allocation indexes, frame check sequences, and streaming control words from the time-division multiplexing streaming encapsulated data. In the parallel data packet delivery processing, the system utilizes a multi-core parallel scheduling algorithm and the hardware-level gating scheduling technology of the network interface controller to synchronously map the reassembled multiple standard data frames onto multiple physical communication channels. This technology, triggered by the absolute synchronization of the underlying hardware clock, drives multiple network physical layer chips to send data loads in parallel across multiple physical channels after differential delay compensation, giving them deterministic transmission characteristics. Finally, it combines these to generate a digital load that achieves lossless transmission within the network channel, possesses deterministic transmission characteristics, and has a complete set of cooperative control instructions, thus obtaining dynamically delivered parallel data packets.

[0116] In this embodiment, by using multi-channel phase compensation and high-density time-division multiplexing encapsulation, the differential delay of multiple physical links is eliminated, ensuring the deterministic hard real-time transmission of cross-channel control commands, thereby realizing precise spatial coordination between high-energy beams and motion axes, and improving the surface quality and dimensional accuracy of component cladding.

[0117] Figure 3 A schematic block diagram of a network-based collaborative additive manufacturing instruction parallel preloading scheduling system provided in this disclosure embodiment. The system is characterized by comprising: The trajectory mapping module 301 is used to acquire the global machining trajectory data of the component to be printed, and to perform spatiotemporal decoupling mapping of multidimensional spatial trajectory interpolation and dynamic constraints based on the global machining trajectory data to obtain heterogeneous instruction stream data under continuous time axis. The delay prediction module 302 is used to acquire dynamic state sequence data generated when heterogeneous command stream data is transmitted in the network channel. Based on the dynamic state sequence data, the module performs time-domain sliding window correlation matching and quantitative prediction of the maximum transmission delay boundary of the network on the heterogeneous command stream data to obtain real-time updated transmission window data. The phase encapsulation module 303 is used to perform phase alignment and parallel time-division multiplexing streaming encapsulation of heterogeneous command stream data based on the transmission window data to obtain dynamically delivered parallel data packets. The pre-decoding processing module 304 is used to perform multi-threaded pipeline asynchronous pre-decoding and pulse level control signal conversion processing on parallel data packets based on the underlying buffer of each edge node, so as to obtain the underlying control data of rolling latch. The timing isolation module 305 is used to acquire the synchronization signal sequence data continuously sent by the master control terminal through the network, and based on the synchronization signal sequence data, to perform physical signal level frame-by-frame instantaneous cascading triggering and network latency jitter isolation response on the underlying control data to obtain continuous drive data; The collaborative molding module 306 is used to control the physical actuator in real time based on continuous drive data to perform multi-degree-of-freedom spatial collaborative cladding molding process to obtain the molded component.

[0118] Figure 4 An electronic device 400 provided in this application embodiment is shown, including a processor 401, a memory 402, and a program or instructions stored in the memory 402 and executable on the processor 401. When the program or instructions are executed by the processor 401, they implement the various processes of the above-described network collaborative additive manufacturing instruction parallel preloading scheduling method embodiment and achieve the same technical effect. To avoid repetition, they will not be described again here.

[0119] It should be noted that the electronic devices in the embodiments of this application include the mobile electronic devices and non-mobile electronic devices described above.

[0120] This application also provides a readable storage medium storing a program or instructions. When the program or instructions are executed by a processor, they implement the various processes of the above-described network collaborative additive manufacturing instruction parallel preloading scheduling method embodiment and achieve the same technical effect. To avoid repetition, they will not be described again here.

[0121] The processor is the processor in the electronic device described in the above embodiments. The readable storage medium includes computer-readable storage media, such as computer read-only memory (ROM), random access memory (RAM), magnetic disk, or optical disk.

[0122] Furthermore, it should be understood that since the various modules are only provided to illustrate the functional units of the device of the present invention, the physical devices corresponding to these modules may be the processor itself, or a part of the processor's software, hardware, or a combination of software and hardware. Therefore, the number of modules shown in the figures is merely illustrative.

[0123] Those skilled in the art will understand that the various modules in the device can be adaptively split or combined. Such splitting or combining of specific modules will not cause the technical solution to deviate from the principles of the present invention; therefore, the technical solutions after splitting or combining will fall within the protection scope of the present invention.

[0124] The technical solution of the present invention has been described above with reference to the preferred embodiments shown in the accompanying drawings. However, it will be readily understood by those skilled in the art that the scope of protection of the present invention is obviously not limited to these specific embodiments. Without departing from the principles of the present invention, those skilled in the art can make equivalent changes or substitutions to the relevant technical features, and the technical solutions after such changes or substitutions will all fall within the scope of protection of the present invention.

Claims

1. A method for parallel preloading and scheduling of network-based collaborative additive manufacturing instructions, characterized in that, The method includes: The global machining trajectory data of the component to be printed is obtained. Based on the global machining trajectory data, spatiotemporal decoupling mapping of multidimensional spatial trajectory interpolation and dynamic constraints is performed to obtain heterogeneous instruction flow data under continuous time axis. The dynamic state sequence data generated during the transmission of heterogeneous command stream data in the network channel is obtained. Based on the dynamic state sequence data, the time-domain sliding window correlation matching and quantitative deduction of the maximum transmission delay boundary of the network are performed on the heterogeneous command stream data to obtain real-time updated transmission window data. Based on the transmission window data, phase alignment and parallel time-division multiplexing streaming encapsulation are performed on heterogeneous command stream data through multi-channel delay control links to obtain dynamically delivered parallel data packets. Based on the underlying buffers of each edge node, parallel data packets are processed using multi-threaded pipeline asynchronous pre-decoding and pulse level control signal conversion to obtain the underlying control data of rolling latch. The system acquires the synchronization signal sequence data continuously transmitted from the master control terminal via the network. Based on the synchronization signal sequence data, it performs physical signal-level frame-by-frame instantaneous cascading triggering and network latency jitter isolation response on the underlying control data to obtain continuous drive data. Based on real-time control of the physical actuator using continuous drive data, a multi-degree-of-freedom spatial collaborative cladding forming process is performed to obtain the formed component.

2. The method according to claim 1, characterized in that, in, Based on global machining trajectory data, multidimensional spatial trajectory interpolation and spatiotemporal decoupling mapping with dynamic constraints are performed to obtain heterogeneous instruction stream data under continuous time axis, including: Based on global processing trajectory data, continuous fitting of spatial path curvature and interpolation of high-order geometric curves are performed to obtain trajectory point matrix sequence data. The preset axial acceleration data of the physical actuator is obtained. Based on the preset axial acceleration data, multi-axis velocity look-ahead control and dynamic flexible acceleration and deceleration constraints are applied to the trajectory dot matrix sequence data to obtain the time series data of the planned trajectory of the physical actuator. Obtain preset coordinate mapping logic data, and based on the preset coordinate mapping logic data, perform three-dimensional spatial pose mapping and joint spatial degree of freedom decoupling on the planned trajectory time series data to obtain the control sequence data of each node of the physical actuator; Obtain the preset initial time window data of the network channel, and based on the preset initial time window data, perform heterogeneous bus protocol encoding mapping and clock reference tag sequence injection on the control sequence data of each node of the physical actuator to obtain heterogeneous instruction stream data under continuous time axis.

3. The method according to claim 2, characterized in that, in, Based on dynamic state sequence data, time-domain sliding window correlation matching and quantitative extrapolation of the network's maximum transmission delay boundary are performed on heterogeneous command stream data to obtain real-time updated transmission window data, including: Based on dynamic state sequence data, multidimensional feature association and network state synchronization matching processing of heterogeneous instruction stream data are performed using time-domain sliding window to obtain time-domain sliding window matching data. Based on time-domain sliding window matching data, the dynamic transmission behavior of heterogeneous instruction stream data in the network channel is analyzed by performing queue buffer latency analysis and quantitative analysis of protocol scheduling overhead to obtain time-domain boundary extrapolation data. Based on the temporal boundary extrapolation data, the network channel's preset initial time window data is processed with temporal boundary adaptive dynamic correction and real-time feedback compensation to obtain real-time updated transmission window data.

4. The method according to claim 1, characterized in that, in, Based on the transmission window data, heterogeneous command stream data undergoes phase alignment and parallel time-division multiplexing streaming encapsulation through multi-channel delay control links to obtain dynamically delivered parallel data packets, including: Based on the transmit window data, multi-channel delay feature mapping and control cycle phase time domain alignment processing are performed on the heterogeneous command stream data to obtain phase-aligned command stream data. Based on the transmit window data, the phase-aligned command stream data is divided into multi-dimensional time slots and processed by parallel time-division multiplexing streaming sequence encapsulation to obtain time-division multiplexed streaming encapsulated data. Based on time-division multiplexing streaming encapsulation of data, dynamic reassembly of multi-channel link frame structure and parallel data packet delivery processing are implemented to obtain dynamically delivered parallel data packets.

5. The method according to claim 1, characterized in that, in, Based on the underlying buffers of each edge node, parallel data packets are processed using multi-threaded pipelined asynchronous pre-decoding and pulse level control signal conversion to obtain the underlying control data for rolling latches, including: Based on the underlying buffers of each edge node, multi-threaded flow scheduling and pipelined asynchronous instruction stream parsing are implemented for parallel data packets to obtain pre-decoded state data; Based on the pre-decoded state data, pulse feature parameters are extracted and level signal logic-driven conversion is performed on the underlying buffer of each edge node to obtain the pulse level control signal; Based on the pulse level control signal, clock-triggered edge detection and asynchronous rolling latch state maintenance are performed on the register array of the underlying buffer of each edge node to obtain the underlying control data of the rolling latch.

6. The method according to claim 1, characterized in that, in, Based on the synchronization signal sequence data, the underlying control data is subjected to frame-by-frame instantaneous cascading triggering at the physical signal level and network delay jitter isolation response to obtain continuous drive data, including: Based on the synchronization signal sequence data, the physical layer signal frame-by-frame temporal feature extraction and edge alignment processing are performed on the underlying control data to obtain the frame-by-frame synchronization control signal. Based on the frame-by-frame synchronization control signal, multi-level gate circuit cascade flipping and clock edge locked step triggering are performed on the underlying control data to obtain the cascaded triggering status signal. Based on the cascaded trigger state signal to the synchronization signal sequence data, rigid locking of the time slot window and physical blocking response processing of time delay jitter propagation are implemented to obtain the time delay immune control signal; Based on the time-delay immune control signal, the cascaded trigger state signal is subjected to continuous time-domain waveform synthesis and drive state sequence output processing to obtain continuous drive data.

7. The method according to claim 1, characterized in that, in, Based on real-time control of the physical actuator using continuously driven data, a multi-degree-of-freedom spatial collaborative cladding forming process is performed to obtain formed components, including: Based on continuous drive data, multi-axis linkage spatial trajectory interpolation and dynamic speed matching control are performed on the physical actuator to obtain a multi-degree-of-freedom cooperative motion state. Based on the multi-degree-of-freedom cooperative motion state of the physical actuator, the shape control of the molten jet beam and the material layer cladding stacking process are implemented to obtain a spatial cladding formed entity. For spatial cladding formed entities, three-dimensional morphological temporal scanning and in-situ morphological feature extraction are performed to obtain component geometric state data; The geometric state data of the component is processed by spatiotemporal mapping alignment and multi-degree-of-freedom cooperative motion state calculation and fusion to obtain the shaped component.

8. A network-based collaborative additive manufacturing instruction parallel preloading scheduling system, characterized in that, The system includes: The trajectory mapping module is used to acquire the global machining trajectory data of the component to be printed, and to perform spatiotemporal decoupling mapping of multidimensional spatial trajectory interpolation and dynamic constraints based on the global machining trajectory data to obtain heterogeneous instruction flow data under continuous time axis. The delay prediction module is used to acquire dynamic state sequence data generated when heterogeneous command stream data is transmitted in the network channel. Based on the dynamic state sequence data, the module performs time-domain sliding window correlation matching and quantitative prediction of the maximum transmission delay boundary of the network on the heterogeneous command stream data to obtain real-time updated transmission window data. The phase encapsulation module is used to perform phase alignment and parallel time-division multiplexing streaming encapsulation on heterogeneous command stream data based on the transmission window data, so as to obtain dynamically delivered parallel data packets. The pre-decoding processing module is used to perform multi-threaded pipelined asynchronous pre-decoding and pulse level control signal conversion processing on parallel data packets based on the underlying buffer of each edge node, so as to obtain the underlying control data of rolling latch; The timing isolation module is used to acquire the synchronization signal sequence data continuously sent by the master control terminal through the network. Based on the synchronization signal sequence data, it performs physical signal level frame-by-frame instantaneous cascade triggering and network latency jitter isolation response on the underlying control data to obtain continuous drive data. The collaborative molding module is used to control the physical actuator in real time based on continuous drive data to perform multi-degree-of-freedom spatial collaborative cladding molding process to obtain molded components.

9. An electronic device, characterized in that, It includes a processor, a memory, and a program or instructions stored in the memory and executable on the processor, wherein when the program or instructions are executed by the processor, they implement the steps of the network collaborative additive manufacturing instruction parallel preloading scheduling method as described in any one of claims 1-7.

10. A readable storage medium, characterized in that, The program or instructions are stored on the readable storage medium, and when the program or instructions are executed by the processor, they implement the steps of the network collaborative additive manufacturing instruction parallel preloading scheduling method as described in any one of claims 1-7.

Images