Security communication protocol data processing method and device based on security computer and medium
Patent Information
- Application Number
- CN202611215119.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-08-12
- Publication Date
- 2026-10-16
AI Technical Summary
[0005]上述现有专利所关注的技术问题是在安全计算机系统中,由于不区分安全数据与非安全数据,或虽然区分但未进行充分隔离,可能导致非安全数据被当作安全数据进行传输与处理,从而对铁路信号设备的安全性与可用性带来未知威胁;为解决这一问题,该现有专利提出了基于物理通道隔离与多级安全协议相结合的方法,将安全数据与非安全数据分别在不同物理通道上传输,并对安全数据额外封装一层内部安全通信协议;但是该现有专利的技术方案并未触及多通道冗余表决安全架构(如二取二、三取二架构)中一个更深层次且更为隐蔽的安全风险,即在同一安全通道内部,安全通信协议报文本身的数据域与安全校验域在封装、传输、解析及内存存储的全过程中未实现物理与逻辑隔离
1)本发明实现了安全通信协议数据域与安全校验域在内存地址上的全流程分离处理,从协议帧封装、校验计算到内存存储,两者相互独立、互不耦合;确保单一通道中无法获取完整的未经表决校验的安全通信协议报文,严格遵循多通道相互制衡、非表决不可输出的安全设计原则,大幅提升了安全协议数据校验的准确性和处理的可靠性,保障安全计算机的安全运行;
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Abstract
Description
Technical Field
[0001] This invention relates to secure communication protocol data processing technology, and in particular to a secure communication protocol data processing method, device and medium based on a secure computer. Background Technology
[0002] Secure computers are widely used in fields with extremely high data processing security requirements, such as rail transportation, industrial control, and aerospace. In these scenarios, secure computers generally adopt a multi-channel redundant voting security architecture (such as a 2-out-of-2 or 3-out-of-2 architecture). Their core advantage lies in processing data in parallel through multiple independent channels and cross-verifying it, avoiding security risks caused by single-channel failures or malicious tampering. However, existing secure computers with multi-channel redundant voting security architectures still have the following security vulnerabilities when processing data using secure communication protocols such as FSFB2, RSSP-I, and RSSP-II: On the one hand, the data domain and security verification domain generally adopt a fused processing and fused storage method. The original data and security verification information are not physically and logically isolated throughout the entire link of encapsulation, transmission, parsing, and memory residence. The two are intertwined and stored in an address space without code distance constraints and arranged continuously, which makes it possible for a single channel to independently obtain and output a complete security protocol message containing the original data and verification information. This architectural defect not only violates the design mechanism of multi-channel redundant voting security architecture, in which multiple channels check and balance each other and a single channel cannot independently generate a valid output, but also makes it easy to bypass the double verification closed loop when a single channel fails, is maliciously controlled, or is illegally accessed, thus destroying the dual-channel voting and anti-tampering protection capabilities, and introducing high-level security risks such as systemic failure, data forgery, and protocol bypass.
[0003] On the other hand, during the memory storage phase, existing secure computers do not impose explicit code distance constraints on the memory address allocation for the data and verification fields of the security protocol, mostly adopting contiguous address storage or random address allocation methods. Because the binary bits of a secure computer's memory address are susceptible to jumps caused by electromagnetic interference, hardware aging, voltage fluctuations, and malicious tampering, if the memory addresses of the data and verification fields are contiguous or the code distance is too small (i.e., the binary bit difference is too small), once an address bit jumps, a single channel may acquire and output complete security protocol data that has not been voted on by multiple channels, posing a certain security risk. This could lead to data corruption, security computer system crashes, or even security protocol failure, causing serious security incidents.
[0004] A search revealed that Chinese Patent Publication No. CN107968775A discloses a data processing method, apparatus, and computer equipment. The data processing method includes: classifying data into secure data and insecure data according to the data transmission path, wherein the secure data and insecure data are encapsulated with at least one layer of secure communication protocol; encapsulating the secure data with an internal secure communication protocol; and transmitting the insecure data and the secure data encapsulated with the internal security protocol on different physical channels, thereby ensuring the secure transmission of system data.
[0005] The technical problem addressed by the aforementioned existing patents is that in secure computer systems, the lack of distinction between secure and insecure data, or the failure to adequately isolate them, can lead to insecure data being transmitted and processed as secure data, posing an unknown threat to the security and availability of railway signaling equipment. To address this issue, the existing patents propose a method combining physical channel isolation and multi-level security protocols, transmitting secure and insecure data on different physical channels and encapsulating the secure data with an additional layer of internal secure communication protocol. However, the technical solution of these existing patents does not address a deeper and more hidden security risk in multi-channel redundant voting security architectures (such as two-out-of-two or three-out-of-two architectures): within the same secure channel, the data field and security verification field of the secure communication protocol message itself are not physically and logically isolated throughout the entire process of encapsulation, transmission, parsing, and memory storage.
[0006] Therefore, the technical problem to be solved in this application is: based on the existing technology that has achieved physical channel isolation between secure and insecure data, to further address the problem of a single secure channel in a multi-channel redundant voting security architecture, where the security protocol data field and the verification field are not separated throughout the protocol frame encapsulation, verification calculation and memory storage process, and the memory address of the two lacks code distance constraints, which leads to a single channel being able to independently obtain the complete protocol message and illegally read the complete data when the memory address jumps, thereby destroying the multi-channel voting mechanism and reducing the system's security protection capability. Summary of the Invention
[0007] The purpose of this invention is to overcome the defects of the prior art and provide a secure communication protocol data processing method, device and medium based on a secure computer.
[0008] The objective of this invention can be achieved through the following technical solutions: According to a first aspect of the present invention, a secure communication protocol data processing method based on a secure computer is provided. This method is applied to a secure computer with a multi-channel redundant voting security architecture, and the method includes: During the processing phase, a first memory region RAM1 is allocated in memory for processing the data field of the secure communication protocol message, and a second memory region RAM2 is allocated in memory for processing the security verification field of the secure communication protocol message. During the storage phase, the data fields of the secure communication protocol message processed in the processing phase are stored in the data storage area RAM1. In the middle, the security verification field of the security communication protocol message after processing is stored in the verification storage area RAM2. middle; For the data storage area RAM1 The memory address and the verification storage area RAM2 Hamming code distance constraints are applied to the memory addresses of the data storage area RAM1 and the memory address of the parity storage area RAM2, so that the binary bit difference between them satisfies the preset code distance threshold D1. A multi-channel voting mechanism is used to verify the consistency of protocol messages in each channel, and the protocol messages that pass the verification are output.
[0009] As a preferred technical solution, the method further includes: constraining the memory address of the second memory region RAM2 such that the binary bit difference between the memory address of the second memory region RAM2 and the memory address of the first memory region RAM1 satisfies the preset code distance threshold D1.
[0010] As a preferred technical solution, the constraint on the memory address of the second memory region RAM2 specifically includes: Calculate the Hamming code distance D between the starting memory address A of the first memory region RAM1 and the starting memory address B of the second memory region RAM2. H (A,B); Calculate the end memory address A of the first memory region RAM1 Hamming code distance D between the starting memory address B of the second memory region RAM2 and the second memory region RAM2 H (A ,B); If the D H (A,B) and the aforementioned D H (A If both B) are greater than or equal to the preset code distance threshold D1, then the memory address of the second memory region RAM2 is determined to satisfy the constraint condition.
[0011] As a preferred technical solution, the data storage area RAM1 The memory address and the verification storage area RAM2 Hamming code distance constraints on memory addresses include: For the data storage area RAM1 The memory address is constrained so that the data storage area RAM1 The binary bit difference between the memory address and the memory address of the first memory region RAM1 and the memory address of the second memory region RAM2 satisfies the preset code distance threshold D1; For the verification storage area RAM2 The memory address is constrained so that the verification storage area RAM2 The memory address is related to the memory address of the first memory region RAM1, the memory address of the second memory region RAM2, and the data storage area RAM1. The binary bit difference between memory addresses satisfies the preset code distance threshold D1.
[0012] As a preferred technical solution, the data storage area RAM1 The memory address is constrained, including: Calculate the starting memory address A of the first memory region RAM1 and the data storage region RAM1. The Hamming code distance D between the starting memory address X and the starting memory address X H (A,X); Calculate the end memory address A of the first memory region RAM1 With the data storage area RAM1 The Hamming code distance D between the starting memory address X and the starting memory address X H (A ,X); Calculate the starting memory address B of the second memory region RAM2 and the data storage region RAM1. The Hamming code distance D between the starting memory address X and the starting memory address X H (B,X); Calculate the end memory address B of the second memory region RAM2. With the data storage area RAM1 The Hamming code distance D between the starting memory address X and the starting memory address X H (B ,X); If the D H (A,X), the D H (A ,X), the D H (B,X) and the D H (B If X) are both greater than or equal to the preset code distance threshold D1, then the data storage area RAM1 is determined. The memory address satisfies the constraints.
[0013] As a preferred technical solution, the verification storage area RAM2 The memory address is constrained, including: Calculate the starting memory address A of the first memory region RAM1 and the parity storage region RAM2. The Hamming code distance D between the starting memory address Y and the starting memory address Y H (A,Y); Calculate the end memory address A of the first memory region RAM1 With the verification storage area RAM2 The Hamming code distance D between the starting memory address Y and the starting memory address Y H (A ,Y); Calculate the starting memory address B of the second memory region RAM2 and the parity storage area RAM2. The Hamming code distance D between the starting memory address Y and the starting memory address Y H (B,Y); Calculate the end memory address B of the second memory region RAM2. With the verification storage area RAM2 The Hamming code distance DH(B) between the starting memory address Y and the starting memory address Y ,Y); Calculate the data storage area RAM1 The starting memory address X and the verification storage area RAM2 The Hamming code distance D between the starting memory address Y and the starting memory address Y H (X,Y); Calculate the data storage area RAM1 End memory address X With the verification storage area RAM2 The Hamming code distance D between the starting memory address Y and the starting memory address Y H (X ,Y); If the D H (A,Y), the D H (A ,Y), the DH(B,Y), the D H (B ,Y), the D H (X,Y) and the D H (X If both and are greater than or equal to the preset code distance threshold D1, then the verification storage area RAM2 is determined. The memory address satisfies the constraints.
[0014] As a preferred technical solution, the preset code distance threshold D1 has a value range of D≥4, and the value of the preset code distance threshold D1 is different for different secure communication protocols.
[0015] As a preferred technical solution, D≥8 is set when processing the FSFB2 protocol; and D≥4 is set when processing the RSSP-I and RSSP-II protocols.
[0016] As a preferred technical solution, the method further includes: assembling a message in the first memory region RAM1 according to the message structure specified by the corresponding security protocol standard, wherein the security verification field is temporarily filled with identification information; the identification information is all zeros or a preset invalid value.
[0017] As a preferred technical solution, this method uses the security verification field of the protocol message as the identifier of the message, and establishes a verification storage area RAM2 through interaction. The content in the file is used to perform an output consistency comparison on the output protocol frames. If the comparison results are consistent, the protocol frame is retained; otherwise, the protocol frame is discarded. After the protocol frame passes the consistency check, the RAM2 storage area will be checked. The security verification field and the data storage area RAM1 The data fields in the data are merged to form a complete protocol frame, which is stored in the data storage area RAM1. In the middle, clear the verification storage area RAM2. The content in [the document / article].
[0018] According to a second aspect of the present invention, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the program to implement the method described thereon.
[0019] According to a third aspect of the present invention, a computer-readable storage medium is provided having a computer program stored thereon, which, when executed by a processor, implements the method described thereon.
[0020] Compared with the prior art, the present invention has the following advantages: 1) This invention achieves full-process separation of the secure communication protocol data field and the security verification field in memory address. From protocol frame encapsulation and verification calculation to memory storage, the two are independent and uncoupled. It ensures that a complete unverified secure communication protocol message cannot be obtained in a single channel. It strictly follows the security design principle of multi-channel mutual checks and balances and no output without voting, which greatly improves the accuracy of secure protocol data verification and the reliability of processing, and ensures the secure operation of the secure computer. 2) This invention employs a memory address code distance constraint design. By presetting a minimum Hamming code distance and using a globally unified code distance encoding method to allocate memory addresses, it ensures that the memory addresses of the data field and the security verification field have sufficient binary bit differences, effectively resisting interference from memory address bit jumps and avoiding problems such as data corruption and system crashes caused by address errors, thereby improving the security of memory access. At the same time, the code distance threshold can be flexibly adjusted according to the application scenario, adapting to scenarios with different security requirements, and has strong versatility. 3) This invention has the synergistic effect of separate processing and code distance constraint address storage, forming a dual guarantee of processing layer separation and storage layer security. The processing steps are clear and the process is simple. It is compatible with multiple security protocols such as FSFB2, RSSP-I, and RSSP-II. It does not require large-scale modification of existing secure computer systems, is easy to implement in hardware and deploy in software, has strong compatibility, and can be widely used in scenarios with extremely high security requirements for secure protocol data processing, such as rail transit, industrial control, and aerospace. It has high practicality and promotion value. Attached Figure Description
[0021] Figure 1 This is a schematic diagram of the structure of the secure computer system of the present invention; Figure 2 This is a flowchart of the static memory allocation process of the present invention; Figure 3 This is a flowchart of the security protocol transmission process of the present invention. Detailed Implementation
[0022] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.
[0023] This invention relates to a secure communication protocol data processing method based on secure computers. To prevent single-channel output of complete protocol data in a multi-channel redundant voting security architecture, this invention implements full-process separation of the data field and security verification field of mainstream secure communication protocols such as FSFB2, RSSP-I, and RSSP-II. Throughout the protocol frame encapsulation, verification calculation, and memory storage processes, the two fields remain independent and uncoupled. Simultaneously, the data field and security verification field are allocated to differentiated memory addresses that meet preset Hamming code distance constraints. Globally unified code distance encoding ensures sufficient binary bit difference between the two types of storage addresses, resisting abnormal interference such as memory bit flips and address jumps, and preventing data corruption and illegal reading due to address errors. This separation processing and code distance-isolated storage form a dual protection mechanism of physical isolation at the processing layer and security hardening at the storage layer, ensuring that no single channel can independently obtain a complete secure communication message, strictly adhering to the security design principle of multi-channel mutual checks and balances and no output without voting. The protocol of this invention has strong adaptability and low modification cost. It does not require large-scale transformation of the existing secure computer architecture, and is easy to deploy in terms of software and hardware. It can be widely used in high-security scenarios such as rail transit, industrial control, and aerospace, and significantly improves the accuracy of security protocol verification, the reliability of data processing, and the security of system operation.
[0024] The generation of secure communication protocol messages generally involves the following steps: (1) Obtain user data; (2) In accordance with the specifications of the corresponding secure communication protocol, the user's original data is packaged and assembled into a complete secure communication protocol message; (3) Store the assembled secure communication protocol messages; (4) The security computer compares and verifies the consistency of messages in each channel through a multi-channel voting mechanism; (5) Send a secure communication protocol message that has passed the vote.
[0025] A typical secure communication protocol message structure includes four parts: message header, security check field, user data packet, and message trailer. For ease of description, the parts other than the security check field (i.e., message header, user data packet, and message trailer) are collectively referred to as the data field. In order to realize the separation of the data field and the security check field in the entire process of secure communication protocol message generation, this invention implements the independent separation of the security check field from the user data acquisition stage to before message transmission (i.e., steps (2) to (4) above), ensuring that the data field and the security check field are independent of each other and uncoupled. It strictly follows the core design principle of the multi-channel redundant voting security architecture of "dual-channel mutual checks and balances, no output without voting", and eliminates the possibility of a single channel independently acquiring a complete secure communication message.
[0026] The specific implementation process of this invention is as follows: 1. Memory address allocation processing This method achieves physical and logical isolation between the data domain and the verification domain from both the processing and storage stages of the secure communication protocol.
[0027] 1.1 Processing of Secure Communication Protocol Messages When a secure computer generates a secure communication protocol message, it statically allocates an independent and contiguous memory region (denoted as RAM1). This RAM1 is specifically used to allocate all the memory space required for the entire secure protocol message processing process, excluding the security verification field. This includes various memory-intensive structures such as queues, heaps, and stacks used during the processing. Its memory capacity is reasonably determined according to the specific security protocol processing requirements.
[0028] To ensure that the inherent structure of the secure communication protocol message is not compromised, during the protocol message assembly stage, the protocol processing module strictly follows the message structure specified by the corresponding security protocol standard in RAM1 to assemble the message. The security check field in the message is temporarily filled with all zeros for identification, and no actual check information is written in it.
[0029] Simultaneously, a separate and contiguous memory region (denoted as RAM2) is statically allocated. This RAM2 is specifically used to allocate all the memory space required during the security verification field generation process. The memory addresses of RAM2 must meet a preset Hamming code distance requirement (denoted as D1). This Hamming code distance threshold D1 can be flexibly adjusted according to the security level requirements of the specific security protocol.
[0030] The definition and calculation formula for code distance are as follows: Let two memory addresses be X (binary representation) and Y (binary representation), and let the Hamming code distance between them be D, which is the number of bits in the binary representations of address X and address Y that have different values at corresponding bits; its calculation formula is: D H (X,Y)=BitCount(X⊕Y) In the formula: X⊕Y: This indicates that memory address X and memory address Y are XORed bitwise. BitCount(): Represents the number of "1"s in the binary representation of the result of an XOR operation.
[0031] The memory address allocation of RAM2 must strictly meet the following Hamming code distance constraints: 1) The code distance between the starting memory address A (binary representation) of RAM1 and the starting memory address B (binary representation) of RAM2 is greater than D1, i.e., D H (A,B)>=D1; 2) The end memory address A of RAM1 The code distance between (binary representation) and the starting memory address B of RAM2 is greater than D1, i.e., D H (A ,B)>=D1.
[0032] Only if both of the above constraints are met can the address be determined as the memory address of RAM2; if not, the memory address is reallocated until all constraints are met.
[0033] This invention presets a code distance threshold D≥4, and the specific value of D can be adjusted according to the security level requirements of the security protocol (for example, when processing the FSFB2 protocol, D≥8 is set; when processing RSSP-I and RSSP-II protocols, D≥4 can be set). The core function of code distance constraint is to prevent a single channel from mistakenly accessing the memory address of another domain due to address jumps, malicious tampering, etc., ensuring that even if an address anomaly occurs, a single channel cannot simultaneously obtain the data field and the check field, further eliminating the possibility of a single channel outputting complete data, and ensuring the security of memory access and data processing.
[0034] 1.2 Storage of Secure Communication Protocol Messages After the secure communication protocol frame is generated, the data field and the check field are stored in two independent memory areas in the secure computer's memory, respectively: Data storage area (denoted as RAM1) ), specifically used for secure communication protocol messages (i.e. protocol messages filled with all-zero check fields) that are assembled on RAM1. Verification memory area (denoted as RAM2) ), specifically used for storing the security verification field data generated on RAM2 that corresponds to the aforementioned protocol messages.
[0035] 1.2.1 Data storage area RAM1 Address constraints RAM1 The memory address allocation must strictly meet the following code distance constraints: 1) RAM1 starting memory address A (binary representation) and RAM1 The code distance between the starting memory address X (binary representation) and D1 is greater than D1, i.e., D H (A,X)>=D1; 2) The end memory address A of RAM1 (Binary representation) and RAM1 The code distance between the starting memory address X and D1 is greater than D1, i.e., D H (A ,X)>=D1.
[0036] 3) RAM2 starting memory address B (binary representation) RAM1 The code distance between the starting memory address X and D1 is greater than D1, i.e., D H (B,X)>=D1; 4) The end memory address B of RAM2 (Binary representation) and RAM1 The code distance between the starting memory address X and D1 is greater than D1, i.e., D H (B ,X)>=D1.
[0037] Only when all four constraints mentioned above are met can this address be selected as the data storage area RAM1. If the conditions are not met, a new memory address is allocated; if not, the memory address is reallocated until all constraints are met.
[0038] 1.2.2 Verify the RAM2 storage area Address constraints RAM2 The memory address allocation must strictly meet the following code distance constraints: 1) RAM1 starting memory address A (binary representation) and RAM2 The code distance between the starting memory address Y (binary representation) and D1 is greater than D1, i.e., D H (A,Y)>=D1; 2) The end memory address A of RAM1 (Binary representation) and RAM2 The code distance between the starting memory address Y and D1 is greater than D1, i.e., D H (A ,Y)>=D1.
[0039] 3) RAM2 starting memory address B (binary representation) RAM2 The code distance between the starting memory address Y and D1 is greater than D1, i.e., D H (B,Y)>=D1; 4) The end memory address B of RAM2 (Binary representation) and RAM2 The code distance between the starting memory address Y and D1 is greater than D1, i.e., D H (B ,Y)>=D1.
[0040] 5) RAM1 Starting memory address X (binary representation) RAM2 The code distance between the starting memory address Y and D1 is greater than D1, i.e., DH (X,Y)>=D1; 6) RAM1 End memory address X (Binary representation) and RAM2 The code distance between the starting memory address Y and D1 is greater than D1, i.e., D H (X ,Y)>=D1.
[0041] Only when all six constraints mentioned above are met can this address be used as the verification memory area RAM2. If the conditions are not met, a new memory address is allocated; if not, the memory address is reallocated until all constraints are met.
[0042] 2. Security Protocol Data Transmission Process The secure computer needs to complete the initialization of the aforementioned operational memory RAM1, RAM2, and storage memory RAM1 according to the memory constraints in Chapter 1. RAM2 The allocation and initialization of [the data / resources] are as follows. After completing the above steps, the specific process is as follows: (1) Acquisition of user data The secure computer obtains raw data from the upper-layer application that needs to be sent via a secure protocol. Because raw data cannot pass the security verification of the peer, its memory address is not required.
[0043] (2) Message encapsulation The single channel of the secure computer assembles a protocol frame in RAM1 according to the required format of the security protocol, with the security check field containing all zeros. After framing, the single channel of the secure computer calculates the protocol check field in RAM2 based on the data field content, according to the security protocol requirements.
[0044] (3) Message storage After message encapsulation is completed, the channel stores the protocol frame calculated by RAM1 into the memory pool RAM1. In the process, the protocol frame security check field calculated by RAM2 is stored in the memory pool RAM2. The corresponding storage location is used for easy retrieval.
[0045] (4) Message consistency voting verification A secure computer uses a multi-channel voting mechanism to compare and verify the consistency of messages across channels. This method uses the security verification field of the protocol message as a marker for the message, and stores it in RAM2 via interactive methods. The code snippet describes a process for comparing the output consistency of protocol frames. If the comparison results are consistent, the protocol frame is retained; otherwise, it is discarded.
[0046] After the protocol frame passes the consistency check, RAM2 will be... The security verification field in RAM1 The data fields in the memory are merged to form a complete protocol frame, which is stored in RAM1. In the middle, and clear RAM2 The content in [the document / article].
[0047] (5) Message transmission Output channel reads RAM1 The content is processed and the protocol frame is output externally.
[0048] The method of the present invention will be further described below with reference to the specific accompanying drawings: like Figure 1 The diagram shows the structure of a secure computer system, using a 2-out-of-2 architecture as an example. A 2-out-of-2 secure computer system includes two data processing units, DPM1 and DPM2, and multiple communication units (IOUs). DPM1 and DPM2 use different operating systems and compilers, but run the same upper-layer application software. Each IOU has multiple independent network ports for sending and receiving data. When the system sends a security protocol message, the data is processed by the DPMs and transmitted to the IOUs via the bus or network. The IOUs then perform communication layer processing on the security protocol message and send it to peripherals.
[0049] like Figure 2 The static memory allocation process of the present invention specifically includes: Step 1-1: Allocate a static and contiguous memory block RAM1. The size of RAM1 is determined according to the processing requirements of the security protocol.
[0050] Step 1-2: Allocate memory from RAM1 for all structures required for protocol data processing involving this security protocol, except for the security protocol verification field.
[0051] Steps 1-3: Allocate static memory RAM2 for calculating the security protocol frame check field.
[0052] Steps 1-4: Calculate the code distance for the start address of RAM2 and the start and end addresses of RAM1 respectively. If the code distance D is not met, reallocate RAM2 and calculate the code distance again until the code distance requirement is met.
[0053] Steps 1-5: Allocate memory pool RAM1 This is used to store all protocol frames generated during computation on RAM1.
[0054] Steps 1-6: Check RAM1 The start and end addresses of RAM1 and RAM2 must meet the code distance requirements. If the code distance requirements are not met, they will be reallocated until the code distance requirements are met.
[0055] Steps 1-7: Allocate memory pool RAM2 It is used to store the protocol frame verification field portion generated after steps 1-2.
[0056] Steps 1-8: Check RAM2 With RAM1 The start and end addresses must meet the code distance requirements. If they do not meet the code distance requirements, they will be reassigned until the code distance requirements are met.
[0057] like Figure 3 The security protocol sending process of the present invention specifically includes: Step 2-1: DPM generates raw data that needs to be sent via a security protocol.
[0058] Step 2-2: According to the security protocol requirements, DPM assembles the frame header and data field of the protocol frame on RAM1. The check field is included in the protocol frame and its content is all zeros.
[0059] Steps 2-3: DPM calculates the protocol's check field portion on RAM2 according to the security protocol requirements.
[0060] Steps 2-4: Obtain the protocol frames calculated by RAM1 and store them sequentially into memory pool RAM1. .
[0061] Steps 2-5: Obtain the protocol frame security check field calculated by RAM2 and put it into memory pool RAM2 in sequence. .
[0062] Steps 2-6: Perform output consistency comparison on the protocol frames generated by the dual channels. Take the protocol's checksum field, which is stored in RAM2. For the part, a consistency comparison is performed. If the comparison results are consistent, a protocol frame is output; otherwise, the protocol frame is discarded.
[0063] Steps 2-7: The two channels extract bytes from RAM1 according to certain rules (e.g., the upper channel extracts odd bytes, and the lower channel extracts even bytes). Extract half of the protocol frame from RAM2. Extract half of the check field of the protocol frame. After extraction, combine the protocol frame and its check field and store them in RAM1. middle, Steps 2-8: The DPM dual channels send the protocol frames processed in step 2-7 to the IOU respectively; Steps 2-9: After receiving the data from both channels, the IOU combines the two data packets into a complete protocol frame and sends it to the external device.
[0064] The above is an introduction to the method embodiments. The following embodiments using electronic devices and storage media will further illustrate the solution of the present invention.
[0065] This invention also provides an electronic device including a central processing unit (CPU), which can perform various appropriate actions and processes according to computer program instructions stored in a read-only memory (ROM) or loaded from a storage unit into a random access memory (RAM). The RAM may also store various programs and data required for device operation. The CPU, ROM, and RAM are interconnected via a bus. Input / output (I / O) interfaces are also connected to the bus.
[0066] Multiple components in the device are connected to the I / O interface, including: input units such as keyboards and mice; output units such as various types of displays and speakers; storage units such as disks and optical discs; and communication units such as network interface cards (NICs), modems, and wireless transceivers. The communication unit allows the device to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.
[0067] The processing unit performs the various methods and processes described above, such as the methods of the present invention. For example, in some embodiments, the methods of the present invention may be implemented as computer software programs tangibly contained in a machine-readable medium, such as a storage unit. In some embodiments, part or all of the computer program may be loaded and / or installed on the device via ROM and / or a communication unit. When the computer program is loaded into RAM and executed by the CPU, one or more steps of the methods of the present invention described above may be performed. Alternatively, in other embodiments, the CPU may be configured to execute the methods of the present invention by any other suitable means (e.g., by means of firmware).
[0068] The functions described above in this document can be performed, at least in part, by one or more hardware logic components. For example, exemplary types of hardware logic components that can be used, without limitation, include: Field Programmable Gate Arrays (FPGAs), Application-Specific Integrated Circuits (ASICs), Application Standard Products (ASSPs), System-on-Chip (SoCs), Complex Programmable Logic Devices (CPLDs), and so on.
[0069] The program code used to implement the methods of the present invention can be written in any combination of one or more programming languages. This program code can be provided to a processor or controller of a general-purpose computer, special-purpose computer, or other programmable data processing device, such that when executed by the processor or controller, the program code causes the functions / operations specified in the flowcharts and / or block diagrams to be implemented. The program code can be executed entirely on the machine, partially on the machine, as a standalone software package partially on the machine and partially on a remote machine, or entirely on a remote machine or server.
[0070] In the context of this invention, a machine-readable medium can be a tangible medium that may contain or store a program for use by or in conjunction with an instruction execution system, apparatus, or device. A machine-readable medium can be a machine-readable signal medium or a machine-readable storage medium. Machine-readable media can include, but are not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination of the foregoing. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination of the foregoing.
[0071] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in the present invention, and these modifications or substitutions should all be covered within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A data processing method for a secure communication protocol based on a secure computer, the method being applied to a secure computer with a multi-channel redundant voting security architecture, characterized in that, The method includes: During the processing phase, a first memory region RAM1 is allocated in memory for processing the data field of the secure communication protocol message, and a second memory region RAM2 is allocated in memory for processing the security verification field of the secure communication protocol message. During the storage phase, the data fields of the secure communication protocol message processed in the processing phase are stored in the data storage area RAM1. In the middle, the security verification field of the security communication protocol message after processing is stored in the verification storage area RAM2. middle; For the data storage area RAM1 The memory address and the verification storage area RAM2 Hamming code distance constraints are applied to the memory addresses of the data storage area RAM1 and the memory address of the parity storage area RAM2, so that the binary bit difference between them satisfies the preset code distance threshold D1. A multi-channel voting mechanism is used to verify the consistency of protocol messages in each channel, and the protocol messages that pass the verification are output.
2. The data processing method for a secure communication protocol based on a secure computer according to claim 1, characterized in that, The method further includes: constraining the memory address of the second memory region RAM2 such that the binary bit difference between the memory address of the second memory region RAM2 and the memory address of the first memory region RAM1 satisfies the preset code distance threshold D1.
3. The data processing method for a secure communication protocol based on a secure computer according to claim 2, characterized in that, The constraint on the memory address of the second memory region RAM2 specifically includes: Calculate the Hamming code distance D between the starting memory address A of the first memory region RAM1 and the starting memory address B of the second memory region RAM2. H (A,B); Calculate the end memory address A of the first memory region RAM1 Hamming code distance D between the starting memory address B of the second memory region RAM2 and the second memory region RAM2 H (A ,B); If the D H (A,B) and the aforementioned D H (A If both B) are greater than or equal to the preset code distance threshold D1, then the memory address of the second memory region RAM2 is determined to satisfy the constraint condition.
4. The data processing method for a secure communication protocol based on a secure computer according to claim 1, characterized in that, The data storage area RAM1 The memory address and the verification storage area RAM2 Hamming code distance constraints on memory addresses include: For the data storage area RAM1 The memory address is constrained so that the data storage area RAM1 The binary bit difference between the memory address and the memory address of the first memory region RAM1 and the memory address of the second memory region RAM2 satisfies the preset code distance threshold D1; For the verification storage area RAM2 The memory address is constrained so that the verification storage area RAM2 The memory address is related to the memory address of the first memory region RAM1, the memory address of the second memory region RAM2, and the data storage area RAM1. The binary bit difference between memory addresses satisfies the preset code distance threshold D1.
5. The data processing method for a secure communication protocol based on a secure computer according to claim 4, characterized in that, For the data storage area RAM1 The memory address is constrained, including: Calculate the starting memory address A of the first memory region RAM1 and the data storage region RAM1. The Hamming code distance D between the starting memory address X and the starting memory address X H (A,X); Calculate the end memory address A of the first memory region RAM1 With the data storage area RAM1 The Hamming code distance D between the starting memory address X and the starting memory address X H (A ,X); Calculate the starting memory address B of the second memory region RAM2 and the data storage region RAM1. The Hamming code distance D between the starting memory address X and the starting memory address X H (B,X); Calculate the end memory address B of the second memory region RAM2. With the data storage area RAM1 The Hamming code distance D between the starting memory address X and the starting memory address X H (B ,X); If the D H (A,X), the D H (A ,X), the D H (B,X) and the D H (B If X) are both greater than or equal to the preset code distance threshold D1, then the data storage area RAM1 is determined. The memory address satisfies the constraints.
6. The data processing method for a secure communication protocol based on a secure computer according to claim 4, characterized in that, For the verification storage area RAM2 The memory address is constrained, including: Calculate the starting memory address A of the first memory region RAM1 and the parity storage region RAM2. The Hamming code distance D between the starting memory address Y and the starting memory address Y H (A,Y); Calculate the end memory address A of the first memory region RAM1 With the verification storage area RAM2 The Hamming code distance D between the starting memory address Y and the starting memory address Y H (A ,Y); Calculate the starting memory address B of the second memory region RAM2 and the parity storage area RAM2. The Hamming code distance D between the starting memory address Y and the starting memory address Y H (B,Y); Calculate the end memory address B of the second memory region RAM2. With the verification storage area RAM2 The Hamming code distance DH(B) between the starting memory address Y and the starting memory address Y ,Y); Calculate the data storage area RAM1 The starting memory address X and the verification storage area RAM2 The Hamming code distance D between the starting memory address Y and the starting memory address Y H (X,Y); Calculate the data storage area RAM1 End memory address X With the verification storage area RAM2 The Hamming code distance D between the starting memory address Y and the starting memory address Y H (X ,Y); If the D H (A,Y), the D H (A ,Y), the DH(B,Y), the D H (B ,Y), the D H (X,Y) and the D H (X If both and are greater than or equal to the preset code distance threshold D1, then the verification storage area RAM2 is determined. The memory address satisfies the constraints.
7. The data processing method for a secure communication protocol based on a secure computer according to claim 1, characterized in that, The preset code distance threshold D1 has a value range of D≥4, and the value of the preset code distance threshold D1 is different for different secure communication protocols.
8. The secure communication protocol data processing method based on a secure computer according to claim 7, characterized in that, When processing the FSFB2 protocol, set D≥8; when processing the RSSP-I and RSSP-II protocols, set D≥4.
9. The data processing method for a secure communication protocol based on a secure computer according to claim 1, characterized in that, The method further includes: assembling a message in the first memory region RAM1 according to the message structure specified by the corresponding security protocol standard, wherein the security check field is temporarily filled with identification information; the identification information is all zeros or a preset invalid value.
10. The data processing method for a secure communication protocol based on a secure computer according to claim 1, characterized in that, This method uses the security verification field of the protocol message as an identifier for the message, and interacts with the existing verification storage area RAM2. The content in the file is used to perform an output consistency comparison on the output protocol frames. If the comparison results are consistent, the protocol frame is retained; otherwise, the protocol frame is discarded. After the protocol frame passes the consistency check, the RAM2 storage area will be checked. The security verification field and the data storage area RAM1 The data fields in the data are merged to form a complete protocol frame, which is stored in the data storage area RAM1. In the middle, clear the verification storage area RAM2. The content in [the document / article].
11. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the program, it implements the method as described in any one of claims 1 to 10.
12. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the program is executed by the processor, it implements the method as described in any one of claims 1 to 10.
Citation Information
Patent Citations
Data processing method and apparatus, computer device and computer readable storage medium
CN107968775A