Fusing graph neural network with discrete event-driven network scheduling method and device

Abstract

The application discloses a network scheduling method and device fusing a graph neural network and a discrete event driving, and relates to the technical field of resource optimization scheduling. The method comprises the following steps: building a network topology, a time delay evaluation model and an energy consumption evaluation model; popping out an event with the earliest trigger time from a minimum heap priority queue, if the event is a scheduling event, extracting a local heterogeneous subgraph from the network topology, collecting real-time utilization and historical scheduling frequency of nodes, inputting the graph neural network, obtaining a prior probability distribution, embedding a heuristic algorithm, outputting an optimal target node, calling the time delay evaluation model to calculate a full path time delay, if the constraint is met, allocating a computing resource, and generating a resource release event; if the event is a release event, recycling the computing resource of the release event, and constructing a subsequent task as a new scheduling event and pressing the new scheduling event into the queue; repeatedly executing until the queue is empty, and outputting a scheduling scheme. By using the application, the solving efficiency of various scheduling algorithms can be improved, and invalid blind search in a huge solution space can be reduced.

Description

Technical Field

[0001] This invention relates to the field of resource optimization and scheduling technology, and in particular to a network scheduling method and apparatus that integrates graph neural networks and discrete event-driven scheduling. Background Technology

[0002] With the rapid development of smart industry, the Internet of Things (IoT), intelligent transportation, and smart cities, computing demands are spreading to the network edge at an unprecedented rate. Faced with computationally intensive, latency-sensitive, and increasingly demanding service quality requirements in application scenarios, the Cloud-Edge-End Collaboration Network (CETCN) is gradually becoming a crucial infrastructure supporting new business applications. This architecture, by deploying computing power in layers among terminals, edge cloud nodes, and central cloud nodes, provides greater optimization flexibility for the system in terms of performance, energy efficiency, and resource utilization.

[0003] In CETCN, task scheduling exhibits significant multi-objective and multi-constraint characteristics. The system needs to simultaneously consider factors such as end-to-end latency, energy consumption, bandwidth utilization, link reachability, and load balancing, and these objectives often have inherent conflicts. For example, reducing latency may lead to increased energy consumption, while improving resource utilization may cause load imbalance. Furthermore, tasks in real-world scenarios often arrive dynamically in a streaming manner, and resource states change continuously with task execution and release, making traditional centralized scheduling methods that rely on globally static information difficult to adapt. At the same time, resources in CETCN are highly heterogeneous, with nodes at different levels differing significantly in computing power, storage, bandwidth, and reliability. These factors collectively make multi-constraint task scheduling a complex dynamic combinatorial optimization problem.

[0004] Existing research has proposed various scheduling strategies and simulation environments from different perspectives, including cloud computing, edge computing, and network optimization. These include lightweight methods based on heuristic rules, theoretical models based on game theory, and intelligent scheduling frameworks based on deep reinforcement learning. However, when dealing with scheduling in existing cloud-edge-device systems, current technologies mainly face the following major challenges and shortcomings: First, the underlying network topology and task evaluation models of existing technologies are too idealistic and lack the ability to perform detailed extrapolation of network-level mapping and full-path latency and energy consumption.

[0005] Second, existing scheduling frameworks and simulation environments mostly adopt static centralized scheduling mechanisms that rely on global information. The underlying dynamic queuing and advancement queues driven by discrete events are lacking, which leads to phenomena such as task flow stagnation, resource mismatch, and scheduling disorder.

[0006] Third, existing core scheduling engines lack network topology awareness and structured topology prior guidance. Underlying scheduling algorithms generally face blindness in solving problems and convergence performance bottlenecks in highly dynamic environments. They are not only prone to assigning tasks to nodes with seemingly idle computing power but severely congested transmission paths, but also struggle to quickly and stably output high-quality near-optimal scheduling strategies that meet multidimensional constraints when streaming tasks arrive dynamically. Summary of the Invention

[0007] To address the technical problems of existing technologies, such as lack of refined extrapolation capabilities, scheduling errors, and blind search, this invention provides a network scheduling method and apparatus that integrates graph neural networks and discrete event-driven scheduling. The technical solution is as follows: On the one hand, a network scheduling method integrating graph neural networks and discrete event-driven scheduling is provided. This method is implemented by a network scheduling device integrating graph neural networks and discrete event-driven scheduling, and includes: S1. Based on physical link connectivity, construct a four-layer computing network topology including terminals, access network, backbone network and cloud, establish latency assessment model and energy consumption assessment model, generate streaming tasks with dependency constraints and initialize resource requirements and tolerable latency; collect historical data offline and train a graph neural network model to enable it to output candidate node matching prior probability distribution. S2. Advance system time by popping the earliest triggered event from the continuously maintained min-heap priority queue and identify the event type. If it is a resource scheduling event, execute S3; if it is a resource release event, execute S6. S3. Using the current task to be scheduled as the anchor point, extract the local heterogeneous subgraph from the four-layer computing power network topology, collect the real-time utilization rate of nodes and the historical scheduling frequency, input them into the trained graph neural network, and obtain the structured prior probability distribution of the current task for each candidate node. S4. Embed the prior probability distribution into the heuristic algorithm and output the optimal target node for the current task to be scheduled. S5. Call the latency evaluation model to calculate the full path latency of the current task to be scheduled to be allocated to the optimal target node, and compare it with the maximum tolerable latency of the current task to be scheduled. If the latency meets the constraints, allocate the corresponding computing resources and generate a resource release event according to the task completion time, and update the node utilization rate at the same time. If it does not meet the constraints, move it to the waiting queue or mark it as a failure. S6. Reclaim the computing resources associated with the resource release event, check the successor tasks according to the dependency relationship of the directed acyclic graph, and construct the successor tasks that satisfy the completion of all predecessors as new resource scheduling events and push them into the min-heap event queue. S7. Repeat S2 to S6 until the min-heap event queue is empty, then terminate scheduling and output the scheduling scheme for all tasks.

[0008] On the other hand, a network scheduling apparatus that integrates graph neural networks and discrete event-driven scheduling is provided. This apparatus is applied to a network scheduling method that integrates graph neural networks and discrete event-driven scheduling. The apparatus includes: The building unit is used to construct a four-layer computing network topology including terminals, access networks, backbone networks and cloud based on physical link connectivity, establish latency assessment models and energy consumption assessment models, generate streaming tasks with dependency constraints and initialize resource requirements and tolerable latency; offline collection of historical data, training of graph neural network models to enable them to output candidate node matching prior probability distributions; The identification unit is used to advance system time by popping the earliest triggered event from the continuously maintained min-heap priority queue, and to identify the event type. If it is a resource scheduling event, S3 is executed; if it is a resource release event, S6 is executed. The prior extraction unit is used to extract local heterogeneous subgraphs from the four-layer computing power network topology with the current task to be scheduled as the anchor point, collect the real-time utilization rate of nodes and historical scheduling frequency, input them into the trained graph neural network, and obtain the structured prior probability distribution of the current task for each candidate node. The node selection unit is used to embed the prior probability distribution into the genetic algorithm, guide the search direction according to the probability bias in population initialization, crossover and recombination and mutation resampling, and iteratively output the optimal target node of the current task to be scheduled. The latency evaluation unit is used to call the latency evaluation model to calculate the full path latency of the current task to be scheduled to be allocated to the optimal target node, and compare it with the maximum tolerable latency of the current task to be scheduled. If the latency meets the constraints, the corresponding computing resources are allocated and a resource release event is generated according to the task completion time, while the node utilization is updated. If the constraints are not met, the task is moved to the waiting queue or marked as failed. The resource reclamation unit is used to reclaim the computing resources associated with the resource release event. It checks the successor tasks according to the dependencies of the directed acyclic graph and constructs the successor tasks that satisfy the condition that all predecessors have been completed as new resource scheduling events and pushes them into the min-heap event queue. The scheduling unit is used to repeatedly execute S2 to S6 until the min-heap event queue is empty, at which point the scheduling is terminated and the scheduling scheme for all tasks is output.

[0009] On the other hand, a network scheduling device that integrates graph neural networks and discrete event-driven scheduling is provided. The network scheduling device that integrates graph neural networks and discrete event-driven scheduling includes: a processor; a memory, wherein the memory stores computer-readable instructions, and when the computer-readable instructions are executed by the processor, they implement any of the methods described above for network scheduling that integrates graph neural networks and discrete event-driven scheduling.

[0010] On the other hand, a computer-readable storage medium is provided, wherein at least one instruction is stored in the storage medium, the at least one instruction being loaded and executed by a processor to implement any of the above-described network scheduling methods that combine graph neural networks and discrete event-driven methods.

[0011] The beneficial effects of the technical solutions provided in the embodiments of the present invention include at least the following: This invention provides a scheduling foundation environment and a high-concurrency discrete event scheduling mechanism that conforms to the physical constraints of existing networks. By constructing a multi-level network topology based on physical connectivity, it abandons idealized path assumptions detached from the underlying layers and unifies the dynamic evaluation model of full-path latency and actual execution energy consumption, ensuring the engineering feasibility of the scheduling strategy. Simultaneously, it introduces a discrete event-driven engine to precisely advance the timeline, synchronizing task status and resource reclamation in real time, effectively solving the resource awareness lag and scheduling errors that easily occur in traditional static centralized scheduling under high concurrency. Furthermore, this invention significantly improves the solution efficiency and overall performance of various scheduling algorithms in complex, multi-constraint networks. By dynamically constructing local subgraphs and introducing a congestion penalty term that integrates node utilization and historical scheduling frequency, the system possesses the network awareness capability to identify and proactively bypass congested links in advance. More importantly, it uses the prior probability distribution output by the graph neural network as a general structured guiding plugin, seamlessly embedding it into the initial solution generation, branch decision, or iterative optimization processes of various downstream core scheduling algorithms, effectively reducing ineffective blind searches in the vast solution space. Attached Figure Description

[0012] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0013] Figure 1 This is a flowchart of a network scheduling method that integrates graph neural networks and discrete event-driven methods provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of a task scheduling offline learning process based on GNN provided in an embodiment of the present invention; Figure 3 This is a block diagram of a network scheduling device that integrates graph neural networks and discrete event-driven methods, provided in an embodiment of the present invention. Figure 4 This is a schematic diagram of the structure of a network scheduling device that integrates graph neural networks and discrete event-driven methods, provided in an embodiment of the present invention. Detailed Implementation

[0014] The technical solution of the present invention will now be described with reference to the accompanying drawings.

[0015] In embodiments of the present invention, words such as "exemplarily," "for example," etc., are used to indicate that something is an example, illustration, or description. Any embodiment or design described as "exemplary" in the present invention should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of the word "exemplary" is intended to present the concept in a concrete manner. Furthermore, in embodiments of the present invention, the meaning expressed by "and / or" can be both, or either one.

[0016] In the embodiments of this invention, the terms "image" and "picture" may sometimes be used interchangeably. It should be noted that, without emphasizing the distinction between them, they convey the same meaning. Similarly, the terms "of," "corresponding (relevant)," and "corresponding" may sometimes be used interchangeably. It should be noted that, without emphasizing the distinction between them, they convey the same meaning.

[0017] In this embodiment of the invention, sometimes a subscript such as W1 may be written in a non-subscript form such as W1. When the difference is not emphasized, the meaning they express is the same.

[0018] To make the technical problems, technical solutions and advantages of the present invention clearer, a detailed description will be given below in conjunction with the accompanying drawings and specific embodiments.

[0019] This invention provides a network scheduling method that integrates graph neural networks and discrete event-driven scheduling. This method can be implemented by a network scheduling device that integrates graph neural networks and discrete event-driven scheduling, which can be a terminal or a server. Figure 1 The flowchart shown illustrates a method for scheduling networks that integrates graph neural networks and discrete event-driven methods. The processing flow of this method may include the following steps: S1. Based on physical link connectivity, construct a four-layer computing network topology including terminals, access network, backbone network, and cloud. Establish latency assessment models and energy consumption assessment models, generate streaming tasks with dependency constraints, and initialize resource requirements and tolerable latency. Collect historical data offline and train a graph neural network model to enable it to output candidate node matching prior probability distributions.

[0020] In one feasible implementation, real network data is parsed, and a computing network topology model with a four-layer structure including terminal devices, metropolitan area access networks, backbone core networks, and the cloud is constructed based on physical link connectivity and actual routing constraints, eliminating idealized path assumptions that are detached from underlying physical constraints; the geographical location and heterogeneous computing resource attributes of each node are recorded, and a full-path latency and energy consumption assessment model is established that coordinates access network transmission, backbone network forwarding, node computing time, and actual execution power consumption; at the same time, the terminal devices dynamically generate task flows with sequential dependencies and initialize the resource requirements and maximum tolerable latency attributes of the tasks.

[0021] During the system initialization phase, the platform constructs a multi-level computing twin network topology that includes... Terminal devices distributed geographically across Taiwan and Taiwan's distributed cloud-edge servers. For terminal devices. The system records its latitude and longitude, memory capacity, storage capacity, and clock frequency, and maps them to the access network nodes in its respective region via Cellular, Wi-Fi, or Ethernet. For cloud-edge servers... The system independently establishes resource availability matrices for three heterogeneous processor units: CPU, GPU, and FPGA.

[0022] For any heterogeneous task that arrives dynamically according to a Poisson distribution Its physical characteristic parameter model is precisely defined as a quintuple, as shown in equation (1): (1) in, The timestamps for the arrival of tasks in a streaming manner; The length of the task data; For memory resource requirements; For link bandwidth requirements; To maximize tolerable latency constraints, topological dependencies between tasks are strictly constrained using a directed acyclic graph (DAG), where a task exists only within the set of all its direct predecessor tasks. Completed, and the current system progress time. Only then can it be activated and moved into the ready queue.

[0023] Optionally, the latency assessment model consists of four cascaded levels: access network transmission latency, backbone network transmission latency, node processing latency, and queuing latency. The access network transmission delay is determined by both the propagation delay corresponding to the access method and the access network bandwidth transmission delay. Backbone network transmission latency is determined by both the fiber optic propagation latency corresponding to the geographical distance between the access node and the cloud server and the backbone network bandwidth transmission latency. The node processing latency is determined by both the amount of task data and the node clock frequency. The queuing delay is determined by the maximum of the waiting times caused by insufficient node resources and incomplete predecessor tasks. The total end-to-end latency of the entire path is the sum of the latency at all four levels.

[0024] In one possible implementation, when the task Unload to remote cloud edge server During execution, the engine accurately calculates the total end-to-end latency of the entire path. It consists of four cascaded time consumption segments, as shown in equation (2): (2) (1) Access network transmission delay This refers to the latency incurred during the transmission of task data from the terminal device to its corresponding access network node via access methods such as Cellular, Wi-Fi, or Ethernet. It is composed of the access network propagation latency and the access network bandwidth transmission latency. The propagation latency is set to approximately 1–10 ms for Cellular, 1–5 ms for Wi-Fi, and 1–2 ms for Ethernet, depending on the access method. The bandwidth transmission latency is determined by the amount of task data and the access network link bandwidth. The final expressions are as follows: (3)-(4) (3) (4) in, Indicates task The data length, in bits; This refers to the access network bandwidth, measured in Mbps.

[0025] (2) Backbone network transmission delay This refers to the latency incurred when task data is transmitted from the access network node to the cloud server node, consisting of backbone network propagation latency and backbone network bandwidth transmission latency. Backbone network propagation latency depends on the access node. With cloud servers The actual geographical distance between them is calculated, and it is assumed that the signal propagation speed in the optical fiber is about 2 / 3 of the speed of light in a vacuum. The calculation method for bandwidth transmission delay is basically the same as that for the access network. The final expression is as follows: (5)-(6): (5) (6) Where d is the distance between nodes in meters, and c ≈ 3 10⁸ m / s is the speed of light in a vacuum. This refers to backbone network bandwidth, measured in Mbps.

[0026] (3) Handling latency : refers to the time required for task data to be processed on the cloud edge server, and its expression is as follows (7): (7) in, Indicates task The task length, in bits. This represents the number of clock cycles required to compute each bit of data in the task; this value is a fixed value of 1. , This indicates the clock frequency of the cloud-edge server, in units of... .

[0027] (4) Waiting delay Once a task is initiated, it is added to the scheduling queue. If the cloud edge node resources are insufficient or all its predecessor tasks have not yet been completed, the task will be temporarily placed in the waiting queue. The platform begins to record and accumulate the delay of this queuing period until the task is approved for execution. The waiting delay expression is as follows (8): (8) in, Indicates task At the node The actual start time of execution Indicates task Reaching the node The moment (time of joining the team). Indicates task Precursor Mission Collection In At the node Completion time on This represents the current time variable of the platform, used to find the minimum satisfying time on the available resource function.

[0028] In summary, the overall latency is determined as follows: .

[0029] Optionally, the total energy consumption calculated by the energy consumption assessment model consists of two parts: transmission and computation, which can be expressed as follows (9): (9) in, It is the energy consumption coefficient related to equipment and signal transmission. It is the energy consumption coefficient related to cloud edge server processing. This is the ideal maximum power of the terminal. This is the ideal maximum power for cloud-edge servers.

[0030] Optionally, the offline learning process based on graph neural networks includes steps such as data acquisition, time window division, dynamic subgraph construction, feature update and graph convolution processing, and supervised learning of task-resource matching scores. For the specific execution method, please refer to the specific execution method of step S3 below.

[0031] S2. Advance system time by popping the earliest triggered event from the continuously maintained min-heap priority queue and identify the event type. If it is a resource scheduling event, execute S3; if it is a resource release event, execute S6.

[0032] Alternatively, each event unit in the min-heap event queue is represented as follows (10): (10) in, Indicates the trigger time of the event and serves as the priority for sorting the queue. ∈{SCHEDULE,RELEASE} represents the event type, corresponding to task scheduling and resource release, respectively. This is the task identifier associated with the event. This represents a set of tasks, used for state transfer during scheduling and execution.

[0033] In one feasible implementation, the scheduling module adopts a discrete event-driven paradigm and is a core component of this platform. The system maintains a min-heap priority queue sorted by trigger time. Each event is represented by the above equation (10).

[0034] The system advances the scheduling process by continuously popping the earliest triggered event from the queue and executing the corresponding logic based on the event type.

[0035] When identifying event types, =SCHEDULE indicates that the event type is a resource scheduling event. The system merges all scheduling events triggered at the same time into a batch for unified processing. For each task in the batch... The system first assesses the executability on the terminal side: if resources are sufficient and computation latency is acceptable, local resources are allocated and a corresponding RELEASE event is generated, and then execution of S3 is initiated; otherwise, the task enters the cloud-edge offloading evaluation process. If cloud-edge resources, link bandwidth, and latency constraints are all met, cloud-edge resources are allocated and a RELEASE event is created; if resources are temporarily unavailable, the task enters a waiting state; if latency constraints are not met, the task is deemed a failure and handled by the retry mechanism.

[0036] =RELEASE indicates that the event type is a resource release event, and proceed to execute S6.

[0037] The complete execution logic of the scheduling process is shown in Algorithm 1 in Table 1 below. First, the system generates terminal devices based on terminal configuration and geographical distribution, and constructs a multi-layer network topology (line 2–3); then, it generates task sequences according to Poisson distribution, initializes the event queue Ω, and constructs all tasks without predecessors as the initial SCHEDULE event (line 4–9).

[0038] With the event queue not empty, the system enters the main loop: each round of scheduling retrieves the event with the earliest trigger time from Ω and merges all scheduling events that occur at the same time to form a batch (lines 12–13). For each task in the batch... The system sequentially performs local feasibility assessments and cloud-edge feasibility assessments, generating corresponding RELEASE events, waiting states, or failure flags based on the assessment results (lines 15–24). When a RELEASE event is triggered, the system reclaims resources and wakes up subsequent tasks (lines 26–27). When all tasks are completed, the simulation process terminates, and the resource monitoring module summarizes and outputs the scheduling results and performance metrics.

[0039] Table 1

[0040]

[0041] S3. Using the current task to be scheduled as the anchor point, extract the local heterogeneous subgraph from the four-layer computing power network topology, collect the real-time utilization rate of nodes and the historical scheduling frequency, input them into the trained graph neural network, and obtain the structured prior probability distribution of the current task for each candidate node.

[0042] In one feasible implementation, during scheduling decisions, a local subgraph is constructed using the current task to be scheduled as the anchor point to isolate irrelevant nodes; the historical trend of load change of each node is extracted using a gated recurrent unit, and a congestion penalty term based on the real-time utilization rate of the node and the historical scheduling frequency is added to the link features; subsequently, feature aggregation is performed through a graph convolutional network to output a prior probability distribution reflecting the matching quality between the current task and each candidate node.

[0043] Optionally, in S3, the local heterogeneous subgraph uses the current task to be scheduled as the anchor point, and extends downwards along the reachable network topology to terminal nodes and upwards to reachable cloud edge server nodes, pruning it to obtain a local subgraph containing only network elements reachable by the current task to isolate the state interference of irrelevant network elements. A congestion penalty term is injected into the edge features of the local heterogeneous subgraph. The congestion penalty term decays and spreads hop by hop along the upstream access path during the edge feature aggregation process, so that the congestion effect propagates backwards along the link to all upstream nodes.

[0044] The penalty is calculated as follows (11): (11) in, and These are penalty coefficients used to adjust the relative impact of resource consumption and scheduling pressure. Represents the target node Current real-time resource utilization. Represents the target node The cumulative frequency of scheduling within the historical sliding window. It is the hyperbolic tangent activation function.

[0045] Message passing in a graph neural network is performed according to the following equation (12): (12) in, Indicates the first From neighboring nodes in the layer Passed to the target node The characteristic message. Representing neighboring nodes In the Hidden state characteristics of the layer. Represents a node arrive It integrates the directed edge features of link latency, bandwidth, and congestion penalty terms. An adjustment parameter for controlling the contribution of edge features.

[0046] Node feature updates are performed according to the following formula (13): (13) in, For the target node The next layer of features after aggregation. It is a non-linear activation function. This is a layer normalization operation. This is the residual scaling factor. This represents the set of different relation types in a heterogeneous subgraph. Represents a node In relationship The set of neighboring nodes. This represents the aggregation operator for this relation.

[0047] In one feasible implementation method, Figure 2 The offline learning process based on graph neural networks is demonstrated, including data acquisition, time window division, dynamic subgraph construction, feature update and graph convolution processing, and supervised learning of task-resource matching scores, as detailed below.

[0048] First, during the offline phase, the system continuously collects multi-source data on tasks and resources from the real operating environment, including task characteristics such as task arrival time, request size, application type, and maximum tolerable latency, as well as status indicators such as resource utilization, queue length, link latency, and bandwidth usage of cloud nodes and network devices. It also synchronously records scheduling decisions and actual completion latency as monitoring signals. To obtain the temporal variation characteristics of network load, the system uses a sliding time window to continuously sample the operation process.

[0049] While constructing samples, the system calculates the QoS performance of task-node pairs based on real scheduling results and generates matching score labels for supervised training. The matching score is determined by three factors: (1) latency performance, reflecting the acceptability of task path latency relative to its maximum tolerable latency; (2) bandwidth adaptability, combining link bandwidth satisfaction and node bandwidth margin; and (3) node load status, characterizing the current resource pressure and availability of cloud nodes. The three factors are weighted and fused to form the final matching score: During offline training and online inference, the system uses a sliding time window to collect network state data. For the currently scheduled task, it uses the task node as an anchor point to connect downwards to terminals and extend to reachable cloud and edge servers, constructing a dynamic local heterogeneous subgraph. The model uses a matching score that includes latency, bandwidth, and load fitness. As the target label for supervised learning, it is as follows (14): (14) in, These represent the weighting coefficients for latency, bandwidth, and node load, respectively. This represents the satisfaction score of the end-to-end delay relative to the maximum tolerable delay; This indicates the score for link bandwidth adequacy. This represents the load health score of the current computing resources on the cloud-edge server. This comprehensive score quantifies the overall matching quality between tasks and nodes.

[0050] During the graph feature aggregation stage, the model uses gated recurrent units (GRUs) to update the state of computing nodes in a time series and injects explicit load congestion penalty terms into the edge features of the subgraph. The expression is as shown in equation (11) above, where, This is used to nonlinearly map and constrain the congestion pressure caused by historical frequency within a reasonable range (denominator 20 is a smoothing scaling factor).

[0051] This penalty term, acting as link resistance, attenuates and diffuses along the upstream access path. Subsequently, features are aggregated through a multi-layer edge-aware graph convolutional network. The neighbor message passing formula for a layer is shown in equation (12) above.

[0052] Next, an update formula with layer normalization and residual connections is used to prevent over-smoothing of features, and its expression is shown in equation (13) above, where, This represents a set of different relationship types in a heterogeneous subgraph, such as terminal-metropolitan area network (MAN) or MAN-backbone network (BR). This indicates an aggregation operator for this relation, such as calculating the mean or weighted sum.

[0053] Finally, the fusion network outputs the current task. For each candidate node Structured prior probability distribution .

[0054] S4. Embed the prior probability distribution into the heuristic algorithm and output the optimal target node for the current task to be scheduled.

[0055] Optionally, the heuristic algorithm is a genetic algorithm.

[0056] S4 embeds a prior probability distribution into a heuristic algorithm to output the optimal target node for the current task to be scheduled, including: The prior probability distribution is embedded into the genetic algorithm, and the search direction is guided by probability bias during population initialization, crossover and recombination and mutation resampling, and the optimal target node of the current task to be scheduled is output iteratively.

[0057] The population initialization of the genetic algorithm abandons the random generation strategy, adopts multiple task topology sorting rules to generate the execution sequence, and uses a weighted roulette wheel algorithm based on prior probability distribution to assign initial nodes to tasks, so that the initial individuals fall into a solution space with high matching degree and low congestion.

[0058] During crossover recombination, parent chromosomes undergo segment crossover, and the inheritance direction of high-quality gene segments is determined based on the magnitude of the prior probability distribution. This is supplemented by the historical usage frequency of nodes and the size of the feasible domain for decay smoothing.

[0059] During mutation resampling, the mutation rate is dynamically adjusted, and the target nodes of the mutation sites are resampled strictly according to the prior probability distribution to replace the spatial uniform random walk.

[0060] In one feasible implementation, the present invention uses a combination of GNN and genetic algorithm as the downstream core scheduling algorithm.

[0061] During the algorithm evolution stage, the prior probability distribution The traditional operator is reconstructed as follows: (1) Prior-guided population initialization: Abandoning the random generation strategy, multiple task topology sorting rules are used cyclically to generate execution sequences, and a system based on... The weighted roulette wheel algorithm assigns initial nodes to tasks, ensuring that the initial individuals fall directly into the solution space with high success rate and low congestion.

[0062] (2) Topology-aware crossover and recombination: When the parent chromosomes cross over segments, the system determines the inheritance direction of high-quality gene segments based on the size of the structured prior distribution, and uses the historical usage frequency of nodes and the feasible domain size to perform attenuation smoothing, ensuring that crossover and recombination can be carried out stably among network elements with obvious topological advantages.

[0063] (3) Directed mutation of posterior resampling: Gene mutations no longer undergo spatially uniform random walks; the algorithm dynamically adjusts the mutation rate and strictly follows the... The posterior probability distribution is used to resample the target server at the mutation site.

[0064] With the aforementioned modular guidance, the underlying algorithm can avoid congested links with very few iterations and output a near-optimal scheduling strategy that satisfies multiple constraints, which is then precisely executed by the discrete event-driven engine.

[0065] S5. Calculate the total path delay from the current scheduled task to the optimal target node using the latency evaluation model, and compare it with the maximum tolerable latency of the current scheduled task. If the latency meets the constraint, allocate the corresponding computing resources and generate a resource release event according to the task completion time, while updating the node utilization. If the constraint is not met, move the task to the waiting queue or mark it as failed.

[0066] Optionally, after calling the latency evaluation model in S5 to calculate the total path latency of the current task to be scheduled to be assigned to the optimal target node, the scheduling scheme is comprehensively evaluated using the multi-objective fitness function of the following formula (15): (15) in, To improve the success rate of the task, To normalize the system energy consumption and calculate it using the energy consumption assessment model in S1, For load balancing, The time delay redundancy ratio, and the weights of each objective. Based on the current optimization pressure of each indicator Dynamically updated via a pressure-driven Softmax mechanism, as shown in equation (16): (16) in, Indicates the first The optimization pressure value for each optimization objective; the lower the objective score, the higher the corresponding pressure value. The larger. For sensitivity adjustment parameters, Used to amplify the differences between different pressure values.

[0067] S6. Reclaim the computing resources associated with the resource release event, check the successor tasks according to the dependencies of the directed acyclic graph, and construct the successor tasks that satisfy the condition that all predecessors have been completed as new resource scheduling events and push them into the min-heap event queue.

[0068] Optionally, the computational resources associated with the resource reclamation and release event of S6 are checked for successor tasks based on the dependencies in the directed acyclic graph. Successor tasks that satisfy the condition that all predecessors have been completed are constructed as new resource scheduling events and pushed into the min-heap event queue, including: The system reclaims and releases the computing resources and network bandwidth associated with the resource release event, and traverses all successor tasks that depend on the current task according to the dependency relationship of the directed acyclic graph. It checks whether all direct predecessor tasks of each successor task have been completed. Only when all predecessors have been completed is the successor task of the current task constructed as a new resource scheduling event and pushed into the min-heap event queue, thereby ensuring the continuous progress of the workflow on the dependency chain.

[0069] S7. Repeat S2 to S6 until the min-heap event queue is empty, then terminate scheduling and output the scheduling scheme for all tasks.

[0070] This invention provides a scheduling foundation environment and a high-concurrency discrete event scheduling mechanism that conforms to the physical constraints of existing networks. By constructing a multi-level network topology based on physical connectivity, it abandons idealized path assumptions detached from the underlying layers and unifies the dynamic evaluation model of full-path latency and actual execution energy consumption, ensuring the engineering feasibility of the scheduling strategy. Simultaneously, it introduces a discrete event-driven engine to precisely advance the timeline, synchronizing task status and resource reclamation in real time, effectively solving the resource awareness lag and scheduling errors that easily occur in traditional static centralized scheduling under high concurrency. Furthermore, this invention significantly improves the solution efficiency and overall performance of various scheduling algorithms in complex, multi-constraint networks. By dynamically constructing local subgraphs and introducing a congestion penalty term that integrates node utilization and historical scheduling frequency, the system possesses the network awareness capability to identify and proactively bypass congested links in advance. More importantly, it uses the prior probability distribution output by the graph neural network as a general structured guiding plugin, seamlessly embedding it into the initial solution generation, branch decision, or iterative optimization processes of various downstream core scheduling algorithms, effectively reducing ineffective blind searches in the vast solution space.

[0071] Figure 3 This is a block diagram of a network scheduling device that integrates graph neural networks and discrete event-driven methods, provided by an embodiment of the present invention. The device is used in a network scheduling method that integrates graph neural networks and discrete event-driven methods. (Refer to...) Figure 3The device includes a construction unit 310, an identification unit 320, a priori extraction unit 330, a node filtering unit 340, a latency evaluation unit 350, a resource recycling unit 360, and a scheduling unit 370. Among them: Building unit 310 is used to construct a four-layer computing network topology including terminals, access networks, backbone networks and cloud based on physical link connectivity, establish latency assessment models and energy consumption assessment models, generate streaming tasks with dependency constraints and initialize resource requirements and tolerable latency; collect historical data offline and train a graph neural network model to enable it to output candidate node matching prior probability distribution. The identification unit 320 is used to advance system time by popping the earliest triggered event from the continuously maintained min-heap priority queue, and to identify the event type. If it is a resource scheduling event, the prior extraction unit is executed; if it is a resource release event, the resource reclamation unit is executed. The prior extraction unit 330 is used to extract local heterogeneous subgraphs from the four-layer computing power network topology with the current task to be scheduled as the anchor point, collect the real-time utilization rate of nodes and historical scheduling frequency, input them into the trained graph neural network, and obtain the structured prior probability distribution of the current task for each candidate node. The node selection unit 340 is used to embed the prior probability distribution into the genetic algorithm, guide the search direction according to the probability bias in population initialization, crossover and recombination and mutation resampling, and iteratively output the optimal target node of the current task to be scheduled. The latency evaluation unit 350 is used to call the latency evaluation model to calculate the full path latency of the current task to be scheduled to be allocated to the optimal target node, and compare it with the maximum tolerable latency of the current task to be scheduled. If the latency meets the constraints, the corresponding computing resources are allocated and a resource release event is generated according to the task completion time, while the node utilization rate is updated. If the constraints are not met, the task is moved to the waiting queue or marked as failed. Resource recycling unit 360 is used to recycle computing resources associated with resource release events. It checks subsequent tasks according to the dependencies of the directed acyclic graph and constructs new resource scheduling events into the min-heap event queue for subsequent tasks that satisfy the condition that all predecessors have been completed. The scheduling unit 370 is used to repeatedly execute the identification unit to the resource reclamation unit until the minimum heap event queue is empty, and then terminate the scheduling and output the scheduling scheme for all tasks.

[0072] This invention provides a scheduling foundation environment and a high-concurrency discrete event scheduling mechanism that conforms to the physical constraints of existing networks. By constructing a multi-level network topology based on physical connectivity, it abandons idealized path assumptions detached from the underlying layers and unifies the dynamic evaluation model of full-path latency and actual execution energy consumption, ensuring the engineering feasibility of the scheduling strategy. Simultaneously, it introduces a discrete event-driven engine to precisely advance the timeline, synchronizing task status and resource reclamation in real time, effectively solving the resource awareness lag and scheduling errors that easily occur in traditional static centralized scheduling under high concurrency. Furthermore, this invention significantly improves the solution efficiency and overall performance of various scheduling algorithms in complex, multi-constraint networks. By dynamically constructing local subgraphs and introducing a congestion penalty term that integrates node utilization and historical scheduling frequency, the system possesses the network awareness capability to identify and proactively bypass congested links in advance. More importantly, it uses the prior probability distribution output by the graph neural network as a general structured guiding plugin, seamlessly embedding it into the initial solution generation, branch decision, or iterative optimization processes of various downstream core scheduling algorithms, effectively reducing ineffective blind searches in the vast solution space.

[0073] Figure 4 This is a schematic diagram of the structure of a network scheduling device that integrates graph neural networks and discrete event-driven methods, as provided in an embodiment of the present invention. Figure 4 As shown, a network scheduling device that integrates graph neural networks and discrete event-driven scheduling can include the above-mentioned... Figure 3 The illustrated device is a network scheduling apparatus that integrates graph neural networks and discrete event-driven scheduling. Optionally, the network scheduling apparatus 410 that integrates graph neural networks and discrete event-driven scheduling may include a first processor 2001.

[0074] Optionally, the network scheduling device 410, which integrates graph neural networks and discrete event-driven systems, may also include a memory 2002 and a transceiver 2003.

[0075] The first processor 2001, memory 2002, and transceiver 2003 can be connected via a communication bus.

[0076] The following is combined with Figure 4 The components of the network scheduling device 410, which integrates graph neural networks and discrete event-driven scheduling, are described in detail below: The first processor 2001 is the control center of the network scheduling device 410 that integrates graph neural networks and discrete event-driven processes. It can be a single processor or a collective term for multiple processing elements. For example, the first processor 2001 can be one or more central processing units (CPUs), application-specific integrated circuits (ASICs), or one or more integrated circuits configured to implement embodiments of the present invention, such as one or more digital signal processors (DSPs), or one or more field-programmable gate arrays (FPGAs).

[0077] Optionally, the first processor 2001 can perform various functions of the network scheduling device 410 that integrates graph neural networks and discrete event-driven systems by running or executing software programs stored in memory 2002 and calling data stored in memory 2002.

[0078] In a specific implementation, as one example, the first processor 2001 may include one or more CPUs, for example... Figure 4 CPU0 and CPU1 are shown in the diagram.

[0079] In a specific implementation, as one example, the network scheduling device 410 that integrates graph neural networks and discrete event-driven processes may also include multiple processors, for example... Figure 4 The first processor 2001 and the second processor 2004 are shown in the diagram. Each of these processors can be a single-core processor or a multi-core processor. Here, a processor can refer to one or more devices, circuits, and / or processing cores used to process data (such as computer program instructions).

[0080] The memory 2002 is used to store the software program that executes the present invention, and is controlled by the first processor 2001 to execute it. The specific implementation method can be referred to the above method embodiment, and will not be repeated here.

[0081] Optionally, the memory 2002 may be a read-only memory (ROM) or other type of static storage device capable of storing static information and instructions, random access memory (RAM) or other type of dynamic storage device capable of storing information and instructions, or electrically erasable programmable read-only memory (EEPROM), compact disc read-only memory (CD-ROM) or other optical disc storage, optical disc storage (including compressed optical discs, laser discs, optical discs, digital universal optical discs, Blu-ray discs, etc.), magnetic disk storage media or other magnetic storage devices, or any other medium capable of carrying or storing desired program code in the form of instructions or data structures and accessible by a computer, but not limited thereto. The memory 2002 may be integrated with the first processor 2001 or may exist independently, and may be connected via an interface circuit between a fused graph neural network and a discrete event-driven network scheduling device 410. Figure 4 (Not shown in the image) is coupled to the first processor 2001, and this embodiment of the invention does not specifically limit this.

[0082] The transceiver 2003 is used to communicate with network devices or with terminal devices.

[0083] Alternatively, transceiver 2003 may include a receiver and a transmitter. Figure 4 (Not shown separately). The receiver is used to implement the receiving function, and the transmitter is used to implement the transmitting function.

[0084] Optionally, the transceiver 2003 can be integrated with the first processor 2001 or exist independently, and can be connected to the interface circuit of the discrete event-driven network scheduling device 410 via a fused graph neural network. Figure 4 (Not shown in the image) is coupled to the first processor 2001, and this embodiment of the invention does not specifically limit this.

[0085] It should be noted that, Figure 4 The structure of the fused graph neural network and discrete event-driven network scheduling device 410 shown in the figure does not constitute a limitation on the router. The actual fused graph neural network and discrete event-driven network scheduling device may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0086] Furthermore, the technical effects of the network scheduling device 410 that integrates graph neural networks and discrete event-driven scheduling can be referred to the technical effects of the network scheduling method that integrates graph neural networks and discrete event-driven scheduling described in the above method embodiments, and will not be repeated here.

[0087] It should be understood that the first processor 2001 in the embodiments of the present invention may be a central processing unit (CPU), or it may be other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. The general-purpose processor may be a microprocessor, or it may be any conventional processor, etc.

[0088] It should also be understood that the memory in the embodiments of the present invention can be volatile memory or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory can be read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory can be random access memory (RAM), which is used as an external cache. By way of example, but not limitation, many forms of random access memory (RAM) are available, such as static RAM (SRAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), double data rate synchronous DRAM (DDR SDRAM), enhanced synchronous DRAM (ESDRAM), synchronous linked DRAM (SLDRAM), and direct rambus RAM (DR RAM).

[0089] The above embodiments can be implemented, in whole or in part, by software, hardware (such as circuits), firmware, or any other combination thereof. When implemented using software, the above embodiments can be implemented, in whole or in part, as a computer program product. The computer program product includes one or more computer instructions or computer programs. When the computer instructions or computer programs are loaded or executed on a computer, all or part of the processes or functions described in the embodiments of the present invention are generated. The computer can be a general-purpose computer, a special-purpose computer, a computer network, or other programmable device. The computer instructions can be stored in a computer-readable storage medium or transmitted from one computer-readable storage medium to another. For example, the computer instructions can be transmitted from one website, computer, server, or data center to another website, computer, server, or data center via wired (e.g., infrared, wireless, microwave, etc.) means. The computer-readable storage medium can be any available medium that a computer can access or a data storage device such as a server or data center that includes one or more sets of available media. The available medium can be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium. A semiconductor medium can be a solid-state drive.

[0090] It should be understood that the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. A and B can be singular or plural. Additionally, the character " / " in this article generally indicates an "or" relationship between the preceding and following related objects, but it can also represent an "and / or" relationship. Please refer to the context for a more accurate understanding.

[0091] In this invention, "at least one" means one or more, and "more than one" means two or more. "At least one of the following" or similar expressions refer to any combination of these items, including any combination of a single item or a plurality of items. For example, at least one of a, b, or c can represent: a, b, c, ab, ac, bc, or abc, where a, b, and c can be a single item or multiple items.

[0092] It should be understood that, in various embodiments of the present invention, the sequence number of each process does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0093] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0094] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the specific working processes of the devices, apparatuses, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0095] In the several embodiments provided by this invention, it should be understood that the disclosed devices, apparatuses, and methods can be implemented in other ways. For example, the apparatus embodiments described above are merely illustrative; for instance, the division of units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another device, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between devices or units may be electrical, mechanical, or other forms.

[0096] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0097] In addition, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit.

[0098] If the aforementioned functions are implemented as software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods described in the various embodiments of this invention. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.

[0099] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A network scheduling method integrating graph neural networks and discrete event-driven methods, characterized in that, The method includes: S1. Based on physical link connectivity, construct a four-layer computing network topology including terminals, access network, backbone network and cloud, establish latency assessment model and energy consumption assessment model, generate streaming tasks with dependency constraints and initialize resource requirements and tolerable latency; collect historical data offline and train a graph neural network model to enable it to output candidate node matching prior probability distribution. S2. Advance system time by popping the earliest triggered event from the continuously maintained min-heap priority queue and identify the event type. If it is a resource scheduling event, execute S3; if it is a resource release event, execute S6. S3. Using the current task to be scheduled as the anchor point, extract the local heterogeneous subgraph from the four-layer computing power network topology, collect the real-time utilization rate of nodes and the historical scheduling frequency, input them into the trained graph neural network, and obtain the structured prior probability distribution of the current task for each candidate node. S4. Embed the prior probability distribution into the heuristic algorithm and output the optimal target node for the current task to be scheduled. S5. Call the latency evaluation model to calculate the full path latency of the current task to be scheduled to be allocated to the optimal target node, and compare it with the maximum tolerable latency of the current task to be scheduled. If the latency meets the constraints, allocate the corresponding computing resources and generate a resource release event according to the task completion time, and update the node utilization rate at the same time. If it does not meet the constraints, move it to the waiting queue or mark it as a failure. S6. Reclaim the computing resources associated with the resource release event, check the successor tasks according to the dependency relationship of the directed acyclic graph, and construct the successor tasks that satisfy the completion of all predecessors as new resource scheduling events and push them into the min-heap event queue. S7. Repeat S2 to S6 until the min-heap event queue is empty, then terminate scheduling and output the scheduling scheme for all tasks.

2. The network scheduling method integrating graph neural networks and discrete event-driven methods according to claim 1, characterized in that, The latency assessment model consists of four cascaded levels: access network transmission latency, backbone network transmission latency, node processing latency, and queuing latency. The access network transmission delay is determined by the propagation delay corresponding to the access method and the access network bandwidth transmission delay. The backbone network transmission latency is determined by the optical fiber propagation latency corresponding to the geographical distance between the access node and the cloud server, and the backbone network bandwidth transmission latency. The node processing latency is determined by both the amount of task data and the node clock frequency. The queuing delay is determined by the maximum value of the waiting time caused by insufficient node resources and the failure of the predecessor task to complete. The total end-to-end latency of the entire path is the sum of the latency at all four levels.

3. The network scheduling method integrating graph neural networks and discrete event-driven scheduling according to claim 1, characterized in that, The local heterogeneous subgraph in S3 uses the current task to be scheduled as the anchor point, associates terminal nodes downwards along the reachable network topology, and extends upwards to reachable cloud edge server nodes. It is then pruned to obtain a local subgraph that only contains network elements reachable by the current task to isolate the state interference of irrelevant network elements. A congestion penalty term is injected into the edge features of the local heterogeneous subgraph. The congestion penalty term decays and spreads hop by hop along the upstream access path during the edge feature aggregation process, so that the congestion effect propagates backward along the link to all upstream nodes. The penalty item is calculated as follows: (1) （1） in, and These are penalty coefficients used to adjust the relative impact of resource consumption and scheduling pressure; Represents the target node Current real-time resource utilization; Represents the target node The cumulative frequency of scheduling within the historical sliding window; It is the hyperbolic tangent activation function; Message passing in a graph neural network is performed according to the following equation (2): （2） in, Indicates the first From neighboring nodes in the layer Passed to the target node Featured messages; Representing neighboring nodes In the Hidden state features of the layer; Represents a node arrive It integrates the directed edge features of link latency, bandwidth, and the congestion penalty term; An adjustment parameter for controlling the contribution of edge features; Node feature updates are performed according to the following formula (3): （3） in, For the target node The next layer of features after aggregation; It is a non-linear activation function; For layer normalization operation; This is the residual scaling factor; This represents a set of different relation types in a heterogeneous subgraph; Represents a node In relation The set of neighboring nodes; This represents the aggregation operator for this relation.

4. The network scheduling method integrating graph neural networks and discrete event-driven scheduling according to claim 1, characterized in that, The heuristic algorithm is a genetic algorithm; The S4 method embeds the prior probability distribution into a heuristic algorithm to output the optimal target node for the currently scheduled task, including: The prior probability distribution is embedded into the genetic algorithm, and the search direction is guided by the probability bias during population initialization, crossover and recombination and mutation resampling, and the optimal target node of the current task to be scheduled is iteratively output. The genetic algorithm abandons the random generation strategy for population initialization, adopts multiple task topology sorting rules to generate execution sequences, and uses a weighted roulette wheel algorithm based on the prior probability distribution to assign initial nodes to tasks, so that the initial individuals fall into a solution space with high matching degree and low congestion. During crossover recombination, parent chromosomes undergo segment crossover, and the inheritance direction of high-quality gene segments is determined based on the magnitude of the prior probability distribution, supplemented by the historical usage frequency of nodes and the size of feasible regions for attenuation smoothing. During mutation resampling, the mutation rate is dynamically adjusted, and the target nodes of the mutation sites are resampled in strict accordance with the prior probability distribution to replace the spatial uniform random walk.

5. The network scheduling method integrating graph neural networks and discrete event-driven scheduling according to claim 1, characterized in that, In S5, after calling the latency evaluation model to calculate the full path latency of the current task to be scheduled to be allocated to the optimal target node, the scheduling scheme is comprehensively evaluated using the multi-objective fitness function of the following formula (4): （4） in, To improve the success rate of the task, To normalize the system energy consumption and calculate it using the energy consumption assessment model in S1, For load balancing, The time delay redundancy ratio, and the weights of each objective. Based on the current optimization pressure of each indicator Dynamically updated via a pressure-driven Softmax mechanism, as shown in equation (5): （5） in, Indicates the first The optimization pressure value for each optimization objective; the lower the objective score, the higher the corresponding pressure value. The larger; For sensitivity adjustment parameters, Used to amplify the differences between different pressure values.

6. The network scheduling method integrating graph neural networks and discrete event-driven scheduling according to claim 1, characterized in that, The computational resources associated with the resource reclamation and release event in S6 are checked for successor tasks based on the dependencies in the directed acyclic graph. Successor tasks that satisfy the condition that all predecessors have been completed are constructed as new resource scheduling events and pushed into the min-heap event queue, including: The system reclaims and releases the computing resources and network bandwidth associated with the resource release event, and traverses all successor tasks that depend on the current task according to the dependency relationship of the directed acyclic graph. It checks whether all direct predecessor tasks of each successor task have been completed. Only when all predecessors have been completed is the successor task of the current task constructed as a new resource scheduling event and pushed into the min-heap event queue, thereby ensuring the continuous progress of the workflow on the dependency chain.

7. The network scheduling method integrating graph neural networks and discrete event-driven scheduling according to claim 1, characterized in that, Each event unit in the min-heap event queue is represented by the following equation (6): （6） in, Indicates the trigger time of the event and serves as the priority for sorting the queue. ∈{SCHEDULE,RELEASE} represents the event type, corresponding to task scheduling and resource release respectively; The task identifier associated with the event; This represents a set of tasks, used for state transfer during scheduling and execution.

8. A network scheduling device that integrates graph neural networks and discrete event-driven scheduling, wherein the network scheduling device integrates graph neural networks and discrete event-driven scheduling is used to implement the network scheduling method integrating graph neural networks and discrete event-driven scheduling as described in any one of claims 1-7, characterized in that, The device includes: The building unit is used to construct a four-layer computing network topology including terminals, access networks, backbone networks and cloud based on physical link connectivity, establish latency assessment models and energy consumption assessment models, generate streaming tasks with dependency constraints and initialize resource requirements and tolerable latency; offline collection of historical data, training of graph neural network models to enable them to output candidate node matching prior probability distributions; The identification unit is used to advance system time by popping the earliest triggered event from the continuously maintained min-heap priority queue, and to identify the event type. If it is a resource scheduling event, the prior extraction unit is executed; if it is a resource release event, the resource reclamation unit is executed. The prior extraction unit is used to extract local heterogeneous subgraphs from the four-layer computing power network topology with the current task to be scheduled as the anchor point, collect the real-time utilization rate of nodes and historical scheduling frequency, input them into the trained graph neural network, and obtain the structured prior probability distribution of the current task for each candidate node. The node selection unit is used to embed the prior probability distribution into the genetic algorithm, guide the search direction according to the probability bias in population initialization, crossover and recombination and mutation resampling, and iteratively output the optimal target node of the current task to be scheduled. The latency evaluation unit is used to call the latency evaluation model to calculate the full path latency of the current task to be scheduled to be allocated to the optimal target node, and compare it with the maximum tolerable latency of the current task to be scheduled. If the latency meets the constraints, the corresponding computing resources are allocated and a resource release event is generated according to the task completion time, while the node utilization is updated. If the constraints are not met, the task is moved to the waiting queue or marked as failed. The resource reclamation unit is used to reclaim the computing resources associated with the resource release event. It checks the successor tasks according to the dependencies of the directed acyclic graph and constructs the successor tasks that satisfy the condition that all predecessors have been completed as new resource scheduling events and pushes them into the min-heap event queue. The scheduling unit is used to repeatedly execute the identification unit to the resource reclamation unit until the minimum heap event queue is empty, and then terminates the scheduling and outputs the scheduling scheme for all tasks.

9. A network scheduling device integrating graph neural networks and discrete event-driven scheduling, characterized in that, The network scheduling device that integrates graph neural networks and discrete event-driven systems includes: processor; A memory storing computer-readable instructions that, when executed by the processor, implement the method as described in any one of claims 1 to 7.

10. A computer-readable storage medium, characterized in that, The computer-readable storage medium contains program code that can be invoked by a processor to execute the method as described in any one of claims 1 to 7.

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