Method and apparatus of video coding, method of storing and transmitting bitstream, and storage medium

Abstract

Methods and apparatuses of video coding, methods of storing and sending bitstreams, and storage media are disclosed. An example method of video decoding includes receiving a video bitstream of video data. The method includes parsing a first indicator that indicates whether a first bit shift operation is to be applied to a color component of the video data. The method includes parsing a first set of at least one bit shift parameter from the video bitstream when the first indicator indicates that the first bit shift operation is to be applied. The video bitstream does not include the first set of at least one bit shift parameter when the first indicator indicates that the first bit shift operation is not to be applied.

Description

[0001] This application claims priority to U.S. Provisional Patent Application No. 63 / 783,945, filed April 4, 2025, entitled “Bit-Depth Shift and Recovery Signaling for Machine Tasks,” and U.S. Patent Application No. 19 / 568,651, filed March 16, 2026, the entire contents of which are incorporated herein by reference. Technical Field

[0002] This application relates to video encoding and decoding technologies, and more particularly to methods and apparatus for video decoding and / or encoding, methods for storing and / or transmitting bit streams, and non-volatile computer-readable storage media. Background Technology

[0003] Digital video is supported by at least two electronic devices, such as digital televisions, laptops or desktop computers, tablets, digital cameras, digital video recording devices, digital media players, video game consoles, smartphones, video conferencing equipment, video streaming devices, etc. These electronic devices transmit and receive digital video data via communication networks or otherwise transmit digital video data, and / or store digital video data on storage devices. Due to the limited bandwidth capacity of communication networks and the limited memory resources of storage devices, video encoding can be used to compress the video data according to at least one video encoding standard before transmission or storage. Video encoding can be performed by hardware and / or software on electronic / client devices or servers providing cloud services.

[0004] Video coding typically uses prediction methods (e.g., inter-frame prediction, intra-frame prediction, etc.) that leverage the inherent redundancy in video data. Video coding aims to compress video data into a form using a lower bitrate while avoiding or minimizing video quality degradation. At least two video codec standards have been developed. For example, High Efficiency Video Coding (HEVC / H.265) is a video compression standard designed as part of the MPEG-H project. The ITU-T and ISO / IEC released the HEVC / H.265 standard in 2013 (Revision 1), 2014 (Revision 2), 2015 (Revision 3), and 2016 (Revision 4), respectively. Universal Video Coding (VVC / H.266) is a video compression standard designed as a successor to HEVC. The ITU-T and ISO / IEC released the VVC / H.266 standard in 2020 (Revision 1) and 2022 (Revision 2), respectively. The Open Media Alliance Video 1 (AV1) is an open video coding format designed as an alternative to HEVC. On January 8, 2019, a validated version 1.0.0 with specification errata table 1 was released. Machine-oriented video coding (VCM) is an exploration of compression techniques specifically designed for automated machine analysis (such as artificial intelligence (AI) / vision tasks) rather than for human viewing. Summary of the Invention

[0005] This disclosure describes various aspects of video encoding and decoding, including methods and systems for bit depth shifting and signal recovery during video encoding and decoding processes. For example, the disclosed embodiments provide techniques for optimizing video for machine tasks, such as AI analytics for object detection or monitoring, rather than human viewing. Bit depth shifting (or truncation) is a preprocessing tool used to reduce data redundancy. Unlike human vision, machine learning algorithms typically do not require high precision such as 10-bit or 12-bit inputs. Reducing the bit depth lowers the overall bit rate, improves efficiency at low bandwidths, and minimizes the impact on accuracy for machine tasks.

[0006] According to some embodiments, a video decoding method includes: (i) receiving a video bitstream of video data; (ii) parsing a first indicator indicating whether a first bit shift operation should be applied to the color components of the video data; and (iii) parsing a first set of at least one bit shift parameter from the video bitstream when the first indicator indicates that the first bit shift operation should be applied, wherein the video bitstream does not include the first set of at least one bit shift parameter when the first indicator indicates that the first bit shift operation should not be applied.

[0007] According to some embodiments, a video encoding method includes: (i) receiving video data comprising at least two color components; (ii) determining whether to apply a first bit shift operation to one of the at least two color components; (iii) when the first bit shift operation is to be applied to the color component, generating a first indicator indicating that the first bit shift operation is to be applied, and generating a first set of at least one bit shift parameter for the first bit shift operation; and (iv) when the first bit shift operation is not applied, not generating the first indicator or the first set of at least one bit shift parameter.

[0008] According to some embodiments, a method for storing a bitstream is provided, the method comprising: performing a video encoding method as described in the embodiments of this application to generate a bitstream; and storing the bitstream.

[0009] According to some embodiments, a method for transmitting a bit stream is provided, the method comprising: performing a video encoding method as described in the embodiments of this application to generate a bit stream; and transmitting the bit stream.

[0010] According to some embodiments, a computing system, such as a streaming system, server system, personal computer system, or other electronic device, is provided. The computing system includes control circuitry and a memory storing at least one set of instructions. The at least one set of instructions includes instructions for performing any of the methods described herein. In some embodiments, the computing system includes an encoder component and a decoder component (e.g., a code converter). The control circuitry executes the at least one set of instructions stored in the memory to perform any of the methods described herein.

[0011] According to some embodiments, a non-volatile computer-readable storage medium is provided, on which a computer program / instructions and a video bitstream are stored. The video bitstream includes: encoding information of at least two color components of video data; and a first indicator indicating whether to apply a bit shift operation to the color components of the video bitstream. When the computer program / instructions are executed by a processor, they implement the video encoding method described in the embodiments of this application to generate the bitstream.

[0012] According to some embodiments, a non-volatile computer-readable storage medium is provided. This non-volatile computer-readable storage medium stores at least one set of instructions executable by a computing device. The at least one set of instructions includes instructions for performing any of the methods described herein.

[0013] Therefore, at least two devices and systems employing methods for encoding and decoding video are disclosed. These methods, devices, and systems can complement or replace conventional methods, devices, and systems used for video encoding / decoding.

[0014] The features and advantages described in the specification are not necessarily all-encompassing. In particular, some additional features and advantages will be apparent to those skilled in the art in light of the accompanying drawings, specification, and claims provided in this disclosure. Furthermore, it should be noted that the language used in the specification has been chosen primarily for readability and instructional purposes, and is not necessarily selected to depict or limit the subject matter described herein. Attached Figure Description

[0015] To gain a more detailed understanding of this disclosure, reference can be made to the features of various embodiments, some of which are illustrated in the accompanying drawings. However, the drawings only illustrate relevant features of this disclosure and should not be considered limiting, as those skilled in the art will understand upon reading this disclosure that other valid features are permissible.

[0016] Figure 1 A block diagram of an example communication system according to some embodiments is shown.

[0017] Figure 2A A block diagram of example elements of an encoder assembly according to some embodiments is shown.

[0018] Figure 2B A block diagram of example elements of a decoder component according to some embodiments is shown.

[0019] Figure 3 A block diagram of an example server system according to some embodiments is shown.

[0020] Figure 4 The processing flow of VCM according to some embodiments is shown.

[0021] Figure 5A An example video decoding process according to some embodiments is shown.

[0022] Figure 5B An example video encoding process according to some embodiments is shown.

[0023] By convention, the various features shown in the accompanying drawings need not be drawn to scale, and the same reference numerals may be used to denote the same features throughout the specification and the accompanying drawings. Detailed Implementation

[0024] Video compression can be used not only by humans but also by machines. Machine-oriented video coding (VCM) represents a video compression method aimed at automating machine analysis tasks, such as object detection and monitoring, rather than human viewing. Bit-depth shifting / truncating and restoration can be employed in VCM and other video coding frameworks. Bit-depth shifting / truncating refers to the encoder reducing the sample precision of the luma and chroma components to a level perceptible to the machine. The encoder applies a right shift to the sample values ​​according to configured truncation parameters, effectively discarding the least significant bits that contribute little to the accuracy of downstream tasks. Since many machine vision models exhibit limited sensitivity to fine-grained quantization, this operation reduces the bit rate with minimal impact on recognition performance. The decoder performs bit-depth restoration, where numerical precision is restored by left-shifting the luma and chroma samples according to signaled parameters. The disclosed embodiments provide methods for signaling and applying bit-depth shifting and restoration. In one example, an enable flag for bit-depth shifting for sequence restoration and / or image restoration can be signaled. An example method for video decoding may include: receiving a video bitstream of video data; parsing a first indicator indicating whether a bit-shifting operation should be applied to the color components of the video data; and parsing a set of at least one bit-shifting parameters from the video bitstream when the first indicator indicates that a bit-shifting operation should be applied. When the first indicator indicates that a bit-shifting operation should not be applied, the video bitstream does not include the set of at least one bit-shifting parameters. The disclosed method can resolve interoperability and conflict mitigation issues between bit-depth truncation and other tools (such as shading and brightness enhancement), thereby improving the overall encoding / decoding efficiency and maintainability of VCM.

[0025] Example systems and devices

[0026] Figure 1 A block diagram of a communication system 100 according to some embodiments is shown. The communication system 100 includes a source device 102 and at least two electronic devices 120 (e.g., electronic devices 120-1 to 120-m) that are communicatively coupled to each other via at least one network. In some embodiments, the communication system 100 is a streaming system, for example, for use with video-enabled applications such as video conferencing applications, digital television applications, and media storage and / or distribution applications.

[0027] Source device 102 includes a video source 104 (e.g., a camera component or media storage) and an encoder component 106. In some embodiments, the video source 104 is a digital camera (e.g., configured to create an uncompressed video sample stream). The encoder component 106 generates at least one encoded video bitstream from the video stream. The video stream from video source 104 may have a higher data volume compared to the encoded video bitstream 108 generated by encoder component 106. Because the encoded video bitstream 108 has a lower data volume (less data) compared to the video stream from video source 104, it requires less bandwidth for transmission and less storage space for storage compared to the video stream from video source 104. In some embodiments, source device 102 does not include encoder component 106 (e.g., configured to transmit uncompressed video to at least one network 110).

[0028] At least one network 110 refers to any number of networks that transmit information between source device 102, server system 112, and / or electronic device 120, including, for example, wired (wired) and / or wireless communication networks. At least one network 110 can exchange data in circuit-switched and / or packet-switched channels. Representative networks include telecommunications networks, local area networks, wide area networks, and / or the Internet.

[0029] At least one network 110 includes a server system 112 (e.g., a distributed / cloud computing system). In some embodiments, the server system 112 is or includes a streaming server (e.g., configured to store and / or distribute video content, such as an encoded video stream from source device 102). The server system 112 includes a codec component 114 (e.g., configured to encode and / or decode video data). In some embodiments, the codec component 114 includes an encoder component and / or a decoder component. In various embodiments, the codec component 114 is instantiated as hardware, software, or a combination thereof. In some embodiments, the codec component 114 is configured to decode the encoded video bitstream 108 and re-encode the video data using different encoding standards and / or methods to generate encoded video data 116. In some embodiments, the server system 112 is configured to generate at least two video formats and / or encodings from the encoded video bitstream 108. In some embodiments, the server system 112 serves as a Media Aware Network Element (MANE). For example, server system 112 can be configured to trim encoded video bitstream 108 to tailor a bitstream that may differ from at least one tailor in electronic device 120. In some embodiments, MANE is provided separately from server system 112.

[0030] Electronic device 120-1 includes a decoder component 122 and a display 124. In some embodiments, the decoder component 122 is configured to decode encoded video data 116 to generate an output video stream that can be rendered on a display or other type of rendering device. In some embodiments, at least one of the electronic devices 120 does not include a display component (e.g., communicatively coupled to an external display device and / or includes media storage). In some embodiments, the electronic device 120 is a streaming client. In some embodiments, the electronic device 120 is configured to access a server system 112 to obtain the encoded video data 116.

[0031] The source device and / or at least two electronic devices 120 are sometimes referred to as “terminal devices” or “user devices”. In some embodiments, at least one of the source device 102 and / or electronic devices 120 is an example of a server system, a personal computer, a portable device (e.g., a smartphone, tablet, or laptop), a wearable device, a video conferencing device, and / or other types of electronic devices.

[0032] In an example operation of communication system 100, source device 102 transmits an encoded video bitstream 108 to server system 112. For example, source device 102 may encode a stream of images captured by the source device. Server system 112 receives the encoded video bitstream 108 and may decode and / or encode the encoded video bitstream 108 using codec component 114. For example, server system 112 may apply encoding to the video data that is more suitable for network transmission and / or storage. Server system 112 may transmit encoded video data 116 (e.g., at least one encoded video bitstream) to at least one of electronic devices 120. Each electronic device 120 may decode the encoded video data 116 and optionally display video images.

[0033] Figure 2AA block diagram of example elements of an encoder assembly 106 according to some embodiments is shown. The encoder assembly 106 receives video data (such as a source video sequence) from a video source 104. In some embodiments, the encoder assembly includes a receiver (e.g., transceiver) assembly configured to receive the source video sequence. In some embodiments, the encoder assembly 106 receives the video sequence from a remote video source (e.g., a video source that is a component of a device different from the encoder assembly 106). The video source 104 may provide a source video sequence in the form of a digital video sample stream, which may have any suitable bit depth (e.g., 8-bit, 10-bit, or 12-bit), any color space (e.g., BT.601 YCrCB or RGB), and any suitable sampling structure (e.g., YCrCB 4:2:0 or YCrCB 4:4:4). In some embodiments, the video source 104 is a storage device storing previously acquired / prepared video. In some embodiments, the video source 104 is a camera that acquires local image information as a video sequence. The video data may be provided as at least two separate images, which are given motion when viewed sequentially. An image itself can be constructed as a spatial pixel array, where each pixel can include at least one sample, depending on the sampling structure, color space, etc. The relationship between pixels and samples can be easily understood by someone skilled in the art.

[0034] Encoder component 106 is configured to encode and / or compress images of a source video sequence into an encoded video sequence 216 in real time or under other time constraints required by the application. In some embodiments, encoder component 106 is configured to perform a conversion between the source video sequence and a bitstream of visual media data (e.g., a video bitstream). Implementing an appropriate encoding rate is a function of controller 204. In some embodiments, controller 204 controls and is functionally coupled to other functional units described below. Parameters set by controller 204 may include rate control-related parameters (e.g., image skipping, quantizer, and / or the λ value of rate-distortion optimization techniques), image size, group of pictures (GOP) layout, maximum motion vector search range, etc. Other functions of controller 204 will be readily recognizable to those skilled in the art, as these functions may relate to encoder component 106 optimized for a particular system design.

[0035] In some embodiments, encoder component 106 is configured to operate within an encoding loop. In a simplified embodiment, the encoding loop includes a source encoder 202 (e.g., responsible for creating symbols, such as a symbol stream, based on the input image to be encoded and a reference image) and a (local) decoder 210. Decoder 210 reconstructs the symbols in a manner similar to that of a (remote) decoder to create sample data (when compression between the symbols and the encoded video bitstream is lossless). The reconstructed sample stream (sample data) is input to reference image memory 208. Because decoding of the symbol stream produces bit-accurate results regardless of the decoder's location (local or remote), the contents of reference image memory 208 are also bit-accurately corresponding between the local encoder and the remote encoder. Thus, the reference image samples "interpreted" by the encoder's prediction portion are exactly the same sample values ​​that the decoder will "interpret" during the prediction process.

[0036] The operation of decoder 210 can be combined with, for example, the following text. Figure 2B The decoder component 122 described in detail is the same as the "remote" decoder. However, a brief reference is provided. Figure 2B When symbols are available and the entropy encoder 214 and the parser 254 are able to encode / decode the symbols into an encoded video sequence without loss, the entropy decoding portion of the decoder component 122, including the buffer memory 252 and the parser 254, may not be fully implemented in the local decoder 210.

[0037] Aside from parsing / entropy decoding, the decoder techniques described herein can exist in the corresponding encoders with essentially the same functionalities. For this reason, this application focuses on decoder operations. Furthermore, the description of the encoder techniques can be simplified, as the encoder techniques are inverses of the decoder techniques.

[0038] As part of the operation, the source encoder 202 can perform motion-compensated predictive coding. The motion-compensated predictive coding predictively encodes the input frame with reference to at least one previously encoded frame from the video sequence designated as a "reference frame." In this way, the encoding engine 212 encodes the differences between pixel blocks of the input frame and pixel blocks of the reference frame, which can be selected as a prediction reference for the input frame. The controller 204 can manage the encoding operations of the source encoder 202, including, for example, setting parameters and subgroup parameters for encoding the video data.

[0039] Decoder 210 decodes encoded video data of frames that can be designated as reference frames, based on symbols created by source encoder 202. Encoding engine 212 can operate as a lossy process. When encoded video data is processed by video decoder (… Figure 2AWhen the source video sequence (not shown) is decoded, the reconstructed video sequence can be a copy of the source video sequence with some errors. Decoder 210 replicates the decoding process, which can be performed on the reference frame by a remote video decoder, and the reconstructed reference frame can be stored in reference image memory 208. In this way, encoder component 106 locally stores a copy of the reconstructed reference frame, which shares the same content (no transmission errors) as the reconstructed reference frame to be obtained by the remote video decoder.

[0040] Predictor 206 can perform a prediction search against encoding engine 212. That is, for a new frame to be encoded, predictor 206 can search the reference image memory 208 for sample data (as candidate reference pixel blocks) or certain metadata, such as reference image motion vectors, block shapes, etc., that can serve as appropriate prediction references for the new image. Predictor 206 can operate pixel-by-pixel based on the sample blocks to find suitable prediction references. As determined by the search results obtained by predictor 206, the input image may have prediction references obtained from at least two reference images stored in the reference image memory 208.

[0041] The outputs of all the aforementioned functional units can be entropy encoded in the entropy encoder 214. The entropy encoder 214 performs lossless compression on the symbols generated by the various functional units according to techniques known to those skilled in the art (e.g., Huffman coding, variable-length coding, and / or arithmetic coding), thereby converting the symbols into an encoded video sequence.

[0042] In some embodiments, the output of entropy encoder 214 is coupled to a transmitter. The transmitter can be configured to buffer the encoded video sequence created by entropy encoder 214 in preparation for transmission via communication channel 218, which may be a hardware / software link to a storage device storing the encoded video data. The transmitter can be configured to combine the encoded video data from source encoder 202 with other data to be transmitted, such as encoded audio data and / or auxiliary data streams (source not shown). In some embodiments, the transmitter may transmit additional data while transmitting the encoded video. Source encoder 202 may include such data as part of the encoded video sequence. Additional data may include temporal / spatial / SNR enhancement layers, other forms of redundant data such as redundant pictures and slices, supplementary enhancement information (SEI) messages, fragments of visual usability information (VUI) parameter sets, etc.

[0043] Controller 204 manages the operation of encoder component 106. During encoding, controller 204 can assign a specific type of encoded picture to each encoded picture, but this may affect the encoding technique applied to the corresponding picture. For example, pictures can be assigned as intra-pictures (I-pictures), predictive pictures (P-pictures), or bidirectional predictive pictures (B-pictures). Intra-pictures can be encoded and decoded without using any other frames in the sequence as prediction sources. Some video codecs allow different types of intra-pictures, including, for example, Independent Decoder Refresh (IDR) pictures. Variations of I-pictures and their corresponding applications and characteristics are familiar to those skilled in the art, and therefore will not be repeated here. Predictive pictures can be encoded and decoded using intra-prediction or inter-prediction, which uses at most one motion vector and reference index to predict sample values ​​for each block. Bidirectional predictive pictures can be encoded and decoded using intra-prediction or inter-prediction, which uses at most two motion vectors and reference indexes to predict sample values ​​for each block. Similarly, at least two predictive images can be used with more than two reference images and associated metadata to reconstruct a single block.

[0044] The source image is typically spatially subdivided into at least two sample blocks (e.g., 4×4, 8×8, 4×8, or 16×16 sample blocks), and encoded block by block. These blocks can be predictively coded with reference to other (already coded) blocks, which are determined based on the coding assignment of the corresponding images applied to the blocks. For example, blocks of an I-image can be non-predictively coded, or the blocks can be predictively coded (spatial prediction or intra-frame prediction) with reference to already coded blocks of the same image. Pixel blocks of a P-image can be non-predictively coded with reference to a previously coded reference image via spatial prediction or temporal prediction. Blocks of a B-image can be non-predictively coded with reference to one or two previously coded reference images via spatial prediction or temporal prediction.

[0045] Video can be captured as at least two source images (video images) in a time series. Intra-frame image prediction (often simplified to intra-frame prediction) utilizes spatial correlations within a given image, while inter-frame image prediction utilizes (temporal or other) correlations between images. In an embodiment, a specific image being encoded / decoded is segmented into blocks, referred to as the current image. When a block in the current image resembles a reference block in a previously encoded and still buffered reference image in the video, the block in the current image can be encoded using a vector called a motion vector. The motion vector points to the reference block in the reference image, and when using at least two reference images, the motion vector may have a third dimension that identifies the reference image.

[0046] Encoder component 106 can perform encoding operations according to a predetermined video coding technique or standard (such as any of the techniques or standards described herein). In its operation, encoder component 106 can perform various compression operations, including predictive coding operations that utilize temporal and spatial redundancy in the input video sequence. Therefore, the encoded video data can conform to the syntax specified by the video coding technique or standard used.

[0047] Figure 2B A block diagram of example elements of decoder component 122 according to some embodiments is shown. Figure 2B The decoder component 122 is coupled to the channel 218 and the display 124. In some embodiments, the decoder component 122 includes a transmitter coupled to the loop filter 256 and configured to transmit data to the display 124 (e.g., via a wired or wireless connection).

[0048] In some embodiments, decoder component 122 includes a receiver coupled to channel 218 and configured to receive data from channel 218 (e.g., via a wired or wireless connection). The receiver may be configured to receive at least one encoded video sequence to be decoded by decoder component 122. In some embodiments, decoding of each encoded video sequence is independent of other encoded video sequences. Each encoded video sequence may be received from channel 218, which may be a hardware / software link to a storage device storing the encoded video data. The receiver may receive encoded video data along with other data (e.g., encoded audio data and / or auxiliary data streams), which may be forwarded to their respective user entities (not depicted). The receiver may separate the encoded video sequences from other data. In some embodiments, the receiver receives additional (redundant) data accompanying the encoded video. The additional data may be included as part of at least one encoded video sequence. Decoder component 122 may use the additional data to decode the data and / or more accurately reconstruct the original video data. The additional data may be in the form of, for example, temporal, spatial, or SNR enhancement layers, redundant slices, redundant pictures, forward error correction codes, etc.

[0049] According to some embodiments, decoder component 122 includes buffer memory 252, parser 254 (sometimes also called entropy decoder), scaler / inverse transform unit 258, intra-frame prediction unit 262, motion compensation prediction unit 260, aggregator 268, loop filter unit 256, reference image memory 266, and current image memory 264. In some embodiments, decoder component 122 is implemented as an integrated circuit, a series of integrated circuits, and / or other electronic circuits. Decoder component 122 may be implemented at least partially in software.

[0050] Buffer memory 252 is coupled between channel 218 and parser 254 (e.g., to combat network jitter). In some embodiments, buffer memory 252 is decoupled from decoder component 122. In some embodiments, a separate buffer memory is provided between the output of channel 218 and decoder component 122. In some embodiments, a separate buffer memory is provided outside decoder component 122 (e.g., to combat network jitter) in addition to buffer memory 252 inside decoder component 122 (e.g., configured to handle playback timing). Buffer memory 252 may not be necessary or may be small when receiving data from a store / forward device with sufficient bandwidth and controllability or from an isochronous network. Buffer memory 252 may be necessary for use on best-effort packet networks such as the Internet. Buffer memory 252 may be relatively large and / or may have an adaptive size and may be implemented at least partially outside decoder component 122 in an operating system or similar component.

[0051] Parser 254 is configured to reconstruct symbols 270 from the encoded video sequence. Symbols may include, for example, information for managing the operation of decoder component 122, and / or information for controlling rendering devices such as display 124. Control information for at least one rendering device may be in the form of, for example, Supplemental Enhancement Information (SEI) messages or Video Availability Information (VUI) parameter set fragments (not depicted). Parser 254 parses (entropy decodes) the encoded video sequence. The encoding of the encoded video sequence may be based on video coding techniques or standards and may follow principles well known to those skilled in the art, including variable-length coding, Huffman coding, arithmetic coding with or without context sensitivity, etc. Parser 254 may extract a set of subgroup parameters from the encoded video sequence for at least one subgroup of pixels in the video decoder based on at least one parameter corresponding to that set. Subgroups may include picture groups (GOPs), pictures, tiles, slices, macroblocks, coding units (CUs), blocks, transform units (TUs), prediction units (PUs), etc. The parser 254 can also extract information such as transform coefficients, quantizer parameter values, and motion vectors from the encoded video sequence.

[0052] The reconstruction of symbol 270 may involve at least two distinct units, depending on the type of encoded video picture or its portion (e.g., inter-frame and intra-frame pictures, inter-frame and intra-frame blocks) and other factors. Which units are involved and how they are involved can be controlled by subgroup control information, which is parsed from the encoded video sequence by parser 254. For clarity, the flow of this subgroup control information between parser 254 and the following at least two units is not depicted.

[0053] The decoder component 122 can be conceptually subdivided into at least two functional units, which in some embodiments interact closely with each other and can be at least partially integrated with each other. However, for clarity, this document retains the conceptual subdivision of the functional units.

[0054] The scaler / inverse transform unit 258 receives quantized transform coefficients and control information (e.g., transform to be used, block size, quantization factor, and / or quantization scaling matrix) as at least one symbol 270 from the parser 254. The scaler / inverse transform unit 258 can output blocks comprising sample values, which can be input to the aggregator 268. In some cases, the output samples of the scaler / inverse transform unit 258 belong to intra-coded blocks; that is, blocks that do not use prediction information from previously reconstructed images but can use prediction information from previously reconstructed portions of the current image. Such prediction information can be provided by the intra-prediction unit 262. The intra-prediction unit 262 can use surrounding reconstructed information obtained from the current (partially reconstructed) image in the current image memory 264 to generate blocks with the same size and shape as the blocks in the reconstruction. The aggregator 268 can add the prediction information already generated by the intra-prediction unit 262 to the output sample information provided by the scaler / inverse transform unit 258 on a per-sample basis.

[0055] In other cases, the output samples of the scaler / inverse transform unit 258 belong to inter-frame encoded blocks that may have undergone motion compensation. In this case, the motion compensation prediction unit 260 can access the reference image memory 266 to obtain samples for prediction. After motion compensation of the obtained samples according to the symbols 270 belonging to the block, the aggregator 268 can add these samples to the output of the scaler / inverse transform unit 258 (referred to as residual samples or residual signals in this case) to generate output sample information. The address at which the motion compensation prediction unit 260 obtains the predicted samples from the reference image memory 266 can be controlled by motion vectors. Motion vectors can be provided to the motion compensation prediction unit 260 in the form of symbols 270, which may have, for example, X, Y, and reference image components. Motion compensation may also include interpolation of sample values ​​obtained from the reference image memory 266 when using subsampled precise motion vectors, motion vector prediction mechanisms, etc.

[0056] The output samples of aggregator 268 can undergo various loop filtering techniques in loop filter unit 256. Video compression techniques may include in-loop filtering controlled by parameters contained in the encoded video bitstream and provided to loop filter unit 256 as symbols 270 from parser 254, but may also be in response to metadata obtained during decoding of previous (in decoding order) portions of the encoded picture or encoded video sequence, and to sample values ​​obtained from previous reconstruction and loop filtering. The output of loop filter unit 256 may be a sample stream, which can be output to a rendering device such as display 124, or stored in reference picture memory 266 for use in future inter-frame prediction.

[0057] Once certain encoded images are reconstructed, they can be used as reference images for future predictions. Once an encoded image is reconstructed and has been identified as a reference image (e.g., by parser 254), the current reference image can become part of the reference image memory 266, and a new current image memory can be reallocated before starting the reconstruction of the next encoded image.

[0058] Decoder component 122 can perform decoding operations according to a predetermined video compression technique, which may be documented in a standard, such as any of the standards described herein. The encoded video sequence may conform to the syntax specified by the video compression technique or standard used; in this sense, it follows the syntax of the video compression technique or standard as specified in the video compression technique document or standard, particularly the syntax specified in the configuration file document. Furthermore, the complexity of the encoded video sequence can be within the range defined by the level of the video compression technique or standard to conform to certain video compression techniques or standards. In some cases, the level limits the maximum image size, maximum frame rate, maximum reconstruction sampling rate (e.g., measured in megasamples per second), maximum reference image size, etc. In some cases, the limitations set by the level can be further restricted by the HRD specifications and metadata used for the management of the hypothetical reference decoder (HRD) buffer, which are signaled in the encoded video sequence.

[0059] Figure 3 A block diagram of a server system 112 according to some embodiments is shown. The server system 112 includes control circuitry 302, at least one network interface 304, memory 314, a user interface 306, and at least one communication bus 312 for interconnecting these components. In some embodiments, the control circuitry 302 includes at least one processor (e.g., CPU, GPU, and / or DPU). In some embodiments, the control circuitry includes at least one field-programmable gate array (FPGA), a hardware accelerator, and / or at least one integrated circuit (e.g., an application-specific integrated circuit).

[0060] At least one network interface 304 can be configured to interface with at least one communication network (e.g., wireless, wired, and / or optical network). The communication network can be local, wide area, metropolitan area, vehicular and industrial, real-time, latency-tolerant, etc. Examples of communication networks include local area networks such as Ethernet, wireless LANs, cellular networks including GSM, 3G, 4G, 5G, LTE, etc., cable or wireless wide area digital television networks including cable television, satellite television, and terrestrial broadcast television, vehicular and industrial networks including CANbus, etc. Such communication can be unidirectional (e.g., broadcast television), unidirectional (e.g., to a CAN bus of some CAN bus device), or bidirectional (e.g., to other computer systems using a local area digital network or a wide area digital network). Such communication can include communication to at least one cloud computing network.

[0061] User interface 306 includes at least one output device 308 and / or at least one input device 310. Input device 310 may include at least one of the following: keyboard, mouse, touchpad, touch screen, data glove, joystick, microphone, scanner, camera, etc. At least one output device 308 may include at least one of the following: audio output device (e.g., speaker), visual output device (e.g., display or monitor), etc.

[0062] Memory 314 may include high-speed random access memory (such as DRAM, SRAM, DDR RAM, and / or other random access solid-state memory devices) and / or non-volatile memory (such as at least one disk storage device, optical disk storage device, flash memory device, and / or other non-volatile solid-state storage devices). Memory 314 may optionally include at least one storage device remote from control circuitry 302. Alternatively, memory 314 or at least one non-volatile solid-state storage device within memory 314 may include a non-volatile computer-readable storage medium. In some embodiments, memory 314 or the non-volatile computer-readable storage medium of memory 314 stores programs, modules, instructions, and data structures, or subsets or supersets thereof:

[0063] ● Operating system 316, which includes programs for handling various basic system services and for performing hardware-related tasks;

[0064] ● Network communication module 318, which is used to connect server system 112 to other computing devices via at least one network interface 304 (e.g., via wired and / or wireless connection);

[0065] ● Codec module 320, which performs various functions related to encoding and / or decoding data (e.g., video data). In some embodiments, codec module 320 is an instance of codec component 114. Codec module 320 includes, but is not limited to, at least one of the following:

[0066] ○ Decoding module 322, which performs various functions related to decoding encoded data, such as those previously described concerning decoder component 122; and

[0067] ○ Encoding module 340, which performs various functions related to encoded data, such as those previously described concerning encoder component 106; and

[0068] ● Image memory 352 is used to store images and image data, for example, for use by the encoding / decoding module 320. In some embodiments, image memory 352 includes at least one of the following: reference image memory 208, buffer memory 252, current image memory 264, and reference image memory 266.

[0069] In some embodiments, the decoding module 322 includes a parsing module 324 (e.g., configured to perform the various functions previously described regarding the parser 254), a transformation module 326 (e.g., configured to perform the various functions previously described regarding the scaler / inverse transformation unit 258), a prediction module 328 (e.g., configured to perform the various functions previously described regarding the motion compensation prediction unit 260 and / or the intra-frame prediction unit 262), and a filter module 330 (e.g., configured to perform the various functions previously described regarding the loop filter 256).

[0070] In some embodiments, the encoding module 340 includes a code module 342 (e.g., configured to perform the various functions previously described regarding the source encoder 202 and / or encoding engine 212) and a prediction module 344 (e.g., configured to perform the various functions previously described regarding the predictor 206). In some embodiments, the decoding module 322 and / or the encoding module 340 includes... Figure 3 A subset of the modules shown. For example, both decoding module 322 and encoding module 340 use a shared prediction module.

[0071] Each of the modules described above, stored in memory 314, corresponds to a set of instructions for performing the functions described herein. These modules (e.g., instruction sets) do not need to be implemented as separate software programs, programs, or modules; therefore, various subsets of these modules can be combined or otherwise rearranged in various embodiments. For example, the codec module 320 may optionally not include separate decoding and encoding modules, but instead use the same set of modules to perform both sets of functions. In some embodiments, memory 314 stores a subset of the modules and data structures described above. In some embodiments, memory 314 stores additional modules and data structures not described above.

[0072] although Figure 3 A server system 112 according to some embodiments is shown, but Figure 3 This is intended more as a functional description of various features that can exist in at least one server system, rather than a structural diagram of the embodiments described herein. In practice, items shown individually may be combined, and some items may be separate. For example, Figure 3 Some items shown individually can be implemented on a single server, and a single item can be implemented by at least one server. The actual number of servers used to implement server system 112 and how features are allocated among them will vary depending on the implementation method and, optionally, in part, depend on the amount of data traffic handled by the server system during peak and average usage periods.

[0073] Example encoding techniques

[0074] The encoding processes and techniques described below can be performed at the aforementioned devices and systems (e.g., source device 102, server system 112, and / or electronic device 120). According to some embodiments, systems and methods for bit-depth shifting and recovery signaling for video compression in machine-task video codecs (e.g., VCM) are disclosed. Existing methods recover the bit depth of the decoded sequence at the decoder based on a signaling syntax and by employing quality enhancement. Some embodiments of this disclosure improve flexibility and signaling efficiency by signaling an enable flag for bit-depth shifting for sequence recovery and / or image recovery.

[0075] Figure 4 A VCM processing flow 400 according to some embodiments is shown.

[0076] Given input video 402, VCM encoder 404 (e.g., encoder 106) performs temporal resampling 406 to reduce the frame rate by identifying and discarding frames that do not contribute new semantic information. In some embodiments, inter-frame similarity is evaluated through object detection or foreground-based analysis. In detection-based mode, similarity is measured by comparing the bounding boxes of objects with the same detection ID and calculating their intersection-over-union (IoU). Frames with sufficient correspondence are grouped into a similar picture group (GoS), from which only the first frame is retained. In detection-based mode, temporal sampling is dynamically adjusted according to scene dynamics, where differences in object displacement, coverage, and brightness drive determine the sampling interval. In some embodiments, decisions including GoS configuration and the number of skipped frames are explicitly signaled in the bitstream to enable reconstruction of discarded frames at the decoder.

[0077] Spatial resampling 408 uses the object occupancy distribution (OOD) computed across candidate scaling factors to select the optimal resolution for each image. Downsampling can be performed via a reference image resampling filter, resulting in adaptively scaled images that preserve object integrity for machine perception while reducing spatial redundancy.

[0078] Region of Interest (ROI) processing 410 enables VCM to focus coding resources on semantically relevant regions. For example, in... Figure 4 In image 420, which shows star-shaped regions 422 and cone-shaped regions 424, downstream tasks may only require the star-shaped regions, thus background content can be removed to reduce bandwidth requirements. ROI processing 410 can begin with ROI extraction using a defined detection network, followed by edge expansion to address localization uncertainties. Spatially adjacent ROIs are merged based on horizontal and vertical proximity. Accumulating ROIs over a fixed window achieves temporal stability.

[0079] Bit depth truncation 412 (e.g., bit depth shift) reduces the sample precision of the luminance and chrominance components to a level sufficient for machine perception. Encoder 404 applies a right shift to the sample values ​​according to configured truncation parameters, effectively discarding the least significant bits that contribute little to the accuracy of downstream tasks. Since many machine vision models exhibit limited sensitivity to fine-value quantization, this operation reduces the bit rate with minimal impact on recognition performance. To preserve luminance characteristics when needed, optional enhancement modules, including patch-based histogram equalization and contrast normalization, can be applied. In some embodiments, the preprocessed frames can be encoded 414 using a video codec such as AVC, HEVC, or VVC, while embedding all VCM-specific auxiliary information as metadata.

[0080] In decoding process 428, VCM decoder 426 (e.g., decoder 122) first restores numerical accuracy in bit-depth recovery step 430 by left-shifting luminance and chrominance samples according to parameters signaled. ROI recovery 432 reconstructs the spatial layout of the frames. Rows and columns removed during ROI redirection are re-inserted using the transmitted ROI grid. Spatial recovery 434 upsamples the reconstructed frames to their target resolution using a reference image resampling filter. Temporal recovery 436 synthesizes frames discarded during temporal resampling. Depending on whether adaptive sampling or scalar ratio sampling is applied, a learned interpolation network estimates intermediate frames by correcting the motion field and fusion mask at at least two levels. Finally, the reconstructed video is fed into AI model 438 to obtain predictions for the desired task.

[0081] Figure 5A A flowchart of a video decoding method 500 according to some embodiments is shown. Method 500 may be executed at a computing system (e.g., server system 112, source device 102, or electronic device 120) including control circuitry and memory storing instructions executed by the control circuitry. In some embodiments, method 500 is executed by executing instructions stored in memory (e.g., memory 314) of the computing system.

[0082] The computer system receives (502) a video bitstream of video data. The system parses (504) a first indicator that indicates whether a bit shift operation should be applied to the color components of the video data. When the first indicator indicates that a bit shift operation should be applied, the system parses (506) a set of at least one bit shift parameter from the video bitstream. When the first indicator indicates that a bit shift operation should not be applied, the video bitstream does not include the set of at least one bit shift parameter.

[0083] In some embodiments, a signal is sent to indicate the enable flag for bit depth shifting used for Sequence Restore (SRD) and Picture Restore (PRD). When the bit depth shift enable flag is equal to 1, the bit depth shift syntax is signaled. Otherwise, the bit depth shift syntax is not signaled. The number of bits for right shift of luminance at the encoder and the number of bits for left shift of chroma at the decoder are signaled in the bitstream. When the number of bits for right shift of luminance at the encoder is greater than 0, the enable flags for the bit depth restoration method and the luminance enhancement method are signaled. If the bit depth restoration enable flag is equal to 0, the number of bits for left shift of luminance at the decoder is signaled.

[0084] Table 1 shows the example SRD syntax. `srd_bit_depth_shift_enabled_flag` is the enable flag for bit depth shifting in the SRD. `srd_bit_depth_shift_enabled_flag` equal to 1 indicates that bit depth shifting is enabled, while `srd_bit_depth_shift_enabled_flag` equal to 0 indicates that bit depth shifting is disabled.

[0085]

[0086] Table 1 – Example SRD Syntax

[0087] Table 2 shows the example PRD syntax. prd_bit_depth_shift_enabled_flag is the enable flag for bit depth shifting in the PRD. prd_bit_depth_shift_enabled_flag equal to 1 specifies that bit depth shifting is enabled, while prd_bit_depth_shift_enabled_flag equal to 0 specifies that bit depth shifting is disabled.

[0088]

[0089] Table 2 – Example Image Recovery Syntax

[0090] Table 3 shows example bit depth shift syntax. `bit_depth_right_shift_luma` specifies the number of bits by which the luminance sample value is shifted right by the encoder. When it does not exist, the value of `bit_depth_right_shift_luma` is inferred to be 0. The value of `bit_depth_right_shift_luma` should be in the range of 0 to 7 (inclusive). `bit_depth_restoration_flag` equal to 1 indicates that the bit depth restoration method is enabled. `bit_depth_restoration_flag` equal to 0 indicates that the bit depth restoration method is disabled. `bit_depth_left_shift_luma` specifies the number of bits by which the luminance sample value is shifted left by the decoder. When it does not exist, the value of `bit_depth_left_shift_luma` is inferred to be 0. The value of `bit_depth_left_shift_luma` should be in the range of 0 to 7 (inclusive). The value of `bit_depth_left_shift_luma` should not exceed the value of `bit_depth_right_shift_luma`. `bit_depth_luma_enhance` equal to 1 indicates that luminance enhancement is enabled. `bit_depth_luma_enhance` equal to 0 indicates that luminance enhancement is disabled. When not present, the value of `bit_depth_luma_enhance` is inferred to be 0. `bit_depth_left_shift_chroma` specifies the number of bits by which the chroma sample value is shifted to the left. When not present, the value of `bit_depth_left_shift_chroma` is inferred to be 0. The value of `bit_depth_left_shift_chroma` should be in the range of 0 to 7 (inclusive). The value of `bit_depth_left_shift_chroma` should not exceed the value of `bit_depth_right_shift_chroma`.

[0091]

[0092] Table 3 – Example Bit-Depth Shift Syntax

[0093] In some embodiments, the luminance quality enhancement enable flag is signaled only when the bit depth recovery enable flag is 0, as shown in Table 4.

[0094]

[0095] Table 4

[0096] In some embodiments, the enable flag for luminance quality enhancement is signaled based on the value of the enable flag recovered from the bit depth and / or the number of bits shifted left by the luminance at the decoder. In some embodiments, the enable flag for luminance quality enhancement is signaled only if the value of the number of bits shifted left by the luminance at the decoder is equal to a predefined integer value. This value is predefined or signaled in the bitstream. In one example, the enable flag for luminance quality enhancement is signaled only if the value of the number of bits shifted left by the luminance at the decoder is equal to 0. See Table 5.

[0097]

[0098] Table 5

[0099] In some embodiments, the luminance quality enhancement enable flag is signaled only when the value of the left shift of luminance at the decoder is less than a predefined value. This value is predefined or signaled in the bitstream. In some embodiments, the luminance quality enhancement enable flag is signaled only when the value of the left shift of luminance at the decoder is less than the value of the right shift of luminance at the encoder, as shown in Table 6.

[0100]

[0101] Table 6

[0102] In some embodiments, a signal is always sent to indicate the enable flag for brightness quality enhancement, as shown in Table 7.

[0103]

[0104] Table 7

[0105] In some embodiments, the syntax for luminance quality enhancement is signaled based on the luminance quality enhancement enable flag. In some embodiments, the syntax for luminance quality enhancement is signaled based on the luminance quality enhancement enable flag being equal to 1. In some embodiments, bit_depth_luma_enhance is signaled only when bit_depth_left_shift_luma is equal to 0, and contast_enhance_thresh_ratio is signaled only when bit_depth_luma_enhance is equal to 1. As shown in Table 8.

[0106]

[0107] Table 8

[0108] In Table 8, `contrast_enhance_thresh_ratio` specifies the contrast enhancement threshold based on contrast normalization. The value of `contrast_enhance_threshold_ratio` can be in the range of 0 to 3 (inclusive). When it does not exist, the value of `bit_depth_luma_n_contrast_enhance` is inferred to be equal to 0. When `contrast_enhance_thresh_ratio` is equal to 0, 1, 2, and 3 respectively, the variable `CntrstThRatio` is assigned values ​​of 0, 6, 7, and 8 respectively.

[0109] In some embodiments, the bitstream is signaled to indicate the number of bits for right shift of chroma at the encoder. The bitstream is only signaled to indicate the number of bits for left shift of chroma at the decoder if the number of bits for right shift of chroma at the decoder is greater than 0. In Table 9, bit_depth_right_shift_chroma specifies the number of bits by which the chroma sample value is right-shifted by the encoder. When it does not exist, the value of bit_depth_right_shift_chroma is inferred to be equal to 0. The value of bit_depth_right_shift_chroma can be in the range of 0 to 7 (inclusive).

[0110]

[0111] Table 9

[0112] In some embodiments, the number of bits shifted right for chroma at the encoder is signaled in the bitstream. An enable flag for the bit depth recovery method for the chroma components is signaled in the bitstream only if the number of bits shifted right for chroma at the encoder is greater than 0. The number of bits shifted left for chroma at the decoder is signaled in the bitstream only if the enable flag for bit depth recovery of chroma is not equal to 0. See Table 10.

[0113]

[0114] Table 10

[0115] In Table 10, a bit_depth_restoration_luma_flag equal to 1 indicates that the bit depth restoration method for the luma component is enabled. A bit_depth_restoration_luma_flag equal to 0 indicates that the bit depth restoration method for the luma component is disabled. A bit_depth_restoration_chroma_flag equal to 1 indicates that the bit depth restoration method for the chroma component is enabled. A bit_depth_restoration_chroma_flag equal to 0 indicates that the bit depth restoration method for the chroma component is disabled.

[0116] In some embodiments, the number of bits for right shift of chroma at the encoder is signaled in the bitstream. An enable flag for the bit depth recovery method for the chroma components is signaled in the bitstream only if the number of bits for right shift of chroma at the encoder is greater than 0. An enable flag for left shift of luminance and luminance quality enhancement is signaled only if the enable flag for bit depth recovery for luminance is 0. See Table 11.

[0117]

[0118] Table 11

[0119] In some embodiments, the number of bits shifted right for chroma at the encoder is signaled in the bitstream. An enable flag for the bit depth recovery method for the chroma components is signaled in the bitstream only if the number of bits shifted right for chroma at the encoder is greater than 0. The number of bits shifted left for luminance is signaled only if the enable flag for bit depth recovery for luminance is 0. In some embodiments, an enable flag for luminance quality enhancement is signaled based on the value of the number of bits shifted left for luminance at the decoder. In some embodiments, an enable flag for luminance quality enhancement is signaled only if the value of the number of bits shifted left for luminance at the decoder is an integer value. This value is predefined or signaled in the bitstream. In some embodiments, an enable flag for luminance quality enhancement is signaled only if the value of the number of bits shifted left for luminance at the decoder is 0. See Table 12.

[0120]

[0121] Table 12

[0122] In some embodiments, the luminance quality enhancement enable flag is signaled only when the value of the left shift of luminance at the decoder is less than an integer value. This value is predefined or signaled in the bitstream. In some embodiments, the luminance quality enhancement enable flag is signaled only when the number of left shifts of luminance at the decoder is less than the number of right shifts of luminance at the encoder, as shown in Table 13.

[0123]

[0124] Table 13

[0125] In some embodiments, if the number of bits shifted right at the luminance level or the number of bits shifted right at the chrominance level at the encoder is not equal to 0, an enable flag for the bit depth recovery method is signaled in the bitstream, as shown in Table 14.

[0126]

[0127] Table 14

[0128] In some embodiments, if the number of bits for right shift of luminance or chrominance at the encoder is not equal to 0, an enable flag for the bit depth recovery method is signaled in the bitstream. An enable flag for left shift of luminance and luminance quality enhancement is signaled only if the number of bits for right shift of luminance at the encoder is greater than 0 and the enable flag for the bit depth recovery method is equal to 0. See Table 15.

[0129]

[0130] Table 15

[0131] In some embodiments, if the number of bits shifted right for luminance at the encoder or the number of bits shifted right for chroma at the encoder is not equal to 0, an enable flag for the bit depth recovery method is signaled in the bitstream. A signal for the number of bits shifted left for luminance is signaled only if the number of bits shifted right for luminance at the encoder is greater than 0 and the enable flag for the bit depth recovery method is equal to 0. In some embodiments, an enable flag for luminance quality enhancement is signaled only if the value of the number of bits shifted left for luminance at the decoder is an integer value. This value is predefined or signaled in the bitstream. In some embodiments, an enable flag for luminance quality enhancement is signaled only if the value of the number of bits shifted left for luminance at the decoder is equal to 0. See Table 16.

[0132]

[0133] Table 16

[0134] In some embodiments, the luminance quality enhancement enable flag is signaled only when the value of the left shift of luminance at the decoder is less than an integer value. This value is predefined or signaled in the bitstream. In some embodiments, the luminance quality enhancement enable flag is signaled only when the number of left shifts of luminance at the decoder is less than the number of right shifts of luminance at the encoder, as shown in Table 17.

[0135]

[0136] Table 17

[0137] In some embodiments, a signal is sent to indicate the enable flag for bit depth recovery / post-filtering according to the bit depth shift syntax. In some embodiments, the enable flag for bit depth recovery / post-filtering in `sequence_restoration_data_rbsp()` and / or `picture_restoration_data_rbsp()` is described in the following embodiments. In some embodiments, the enable flag for bit depth recovery / post-filtering is signaled when the enable flag for bit depth shifting in the sequence recovery data rbsp is equal to 1. In Table 18, `srd_bit_depth_shift_enabled_flag` equal to 1 indicates that bit depth shifting is enabled. `srd_bit_depth_shift_enabled_flag` equal to 0 indicates that bit depth shifting is disabled. `srd_bit_depth_restoration_enabled_flag` equal to 1 indicates that bit depth recovery / post-filtering is enabled. `srd_bit_depth_restoration_enabled_flag` equal to 0 indicates that bit depth recovery / post-filtering is disabled.

[0138]

[0139] Table 18

[0140] In some embodiments, when the bit depth shift enable flag in the image recovery data RBSP is equal to 1, a signal is sent to indicate the bit depth recovery / post-filtering enable flag. As shown in Table 19: `prd_bit_depth_shift_enabled_flag` equal to 1 indicates bit depth shift is enabled. `prd_bit_depth_shift_enabled_flag` equal to 0 indicates bit depth shift is disabled. `prd_bit_depth_restoration_enabled_flag` equal to 1 indicates bit depth recovery / post-filtering is enabled. `prd_bit_depth_restoration_enabled_flag` equal to 0 indicates bit depth recovery / post-filtering is disabled.

[0141]

[0142] Table 19

[0143] In some embodiments, the bit depth recovery / post-filtering enable flag is signaled in the bit depth shift syntax. In some embodiments, the bit depth recovery / post-filtering enable flag is signaled when the luminance sample value is shifted left by the decoder by a number of bits equal to 1. As shown in Table 20.

[0144]

[0145] Table 20

[0146] In Table 20, `bit_depth_right_shift_luma` specifies the number of bits by which the luma sample value is shifted right by the encoder. When it does not exist, the value of `bit_depth_right_shift_luma` is inferred to be equal to 0. If enabled, this value is used to perform a temporary left shift during shading. The value of `bit_depth_right_shift_luma` can be in the range of 0 to 7 (inclusive). `bit_depth_left_shift_luma` specifies the number of bits by which the luma sample value is shifted left by the decoder. When it does not exist, the value of `bit_depth_left_shift_luma` is inferred to be equal to 0. The value of `bit_depth_left_shift_luma` should be in the range of 0 to 7 (inclusive). The value of `bit_depth_left_shift_luma` should not exceed the value of `bit_depth_right_shift_luma`. `bit_depth_right_shift_chroma` specifies the number of bits by which the chroma sample value is shifted right by the encoder. When it does not exist, the value of `bit_depth_right_shift_chroma` is inferred to be equal to 0. The value of `bit_depth_right_shift_chroma` can be in the range of 0 to 7 (inclusive). `bit_depth_left_shift_chroma` specifies the number of bits by which the chroma sample values ​​are shifted to the left. When it does not exist, the value of `bit_depth_left_shift_chroma` is inferred to be 0. The value of `bit_depth_left_shift_chroma` can be in the range of 0 to 7 (inclusive). The value of `bit_depth_left_shift_chroma` should not exceed the value of `bit_depth_right_shift_chroma`. `bit_depth_restoration` equal to 1 indicates that post-filtering is enabled. `bit_depth_restoration` equal to 0 indicates that post-filtering is disabled. When it does not exist, the value of `bit_depth_restoration` is inferred to be 0.

[0147] In some embodiments, when the luminance sample value is shifted right by the encoder by a number of bits equal to 1, a signal is sent to indicate the enable flag for bit depth recovery / post-filtering, as shown in Table 21.

[0148]

[0149] Table 21

[0150] In some embodiments, when the chroma sample value is shifted right by the encoder by 0 bits, a signal is sent to indicate the enable flag for bit depth recovery / post-filtering, as shown in Table 22.

[0151]

[0152] Table 22

[0153] In some embodiments, the bit depth recovery / post-filtering enable flag is signaled when all or some of the conditions in the examples above are met. In some embodiments, the bit depth recovery / post-filtering enable flag is signaled when the number of bits shifted right by the encoder for the luminance sample value is equal to 1, the number of bits shifted left by the decoder for the luminance sample value is equal to 1, and the number of bits shifted right by the encoder for the chrominance sample value is equal to 0. As shown in Table 23.

[0154]

[0155] Table 23

[0156] In some embodiments, when the luminance sample value is shifted right by the encoder by 1 bit and the luminance sample value is shifted left by the decoder by 1 bit, a signal is sent to indicate the enable flag for bit depth recovery / post-filtering, as shown in Table 24.

[0157]

[0158] Table 24

[0159] In some embodiments, the recovery function is used for luminance and / or chroma bit depth recovery. In some embodiments, the same recovery function is used for all pixels in each color channel. In some embodiments, the recovered pixel value at position (x, y) in at least one color channel is recovered as:

[0160]

[0161] In equation 1, It is the original pixel value at position (x, y) in a color channel. It is the maximum pixel value at the current color channel. The target depth to be restored to.

[0162] In some embodiments, different restoration functions are applied based on the pixel position within the current color channel. In some embodiments, different restoration functions are applied based on the pixel value. In some embodiments, different restoration functions are applied to different color channels. In some embodiments, different restoration functions are applied based on any combination of pixel position, pixel value, and color channel type.

[0163] In some embodiments, machine learning algorithms and / or deep learning networks are employed to learn the restoration for luminance and / or chrominance bit depth recovery. In some embodiments, a hybrid approach combining machine learning algorithms and / or deep learning networks with a restoration function is used for the same color channel.

[0164] In some embodiments, a coloring process is applied based on the bit depth shift and / or bit depth recovery / post-filtering syntax value. In some embodiments, a coloring process is applied based on the bit depth recovery / post-filtering enable flag. In some embodiments, a coloring process is applied only if the bit depth recovery / post-filtering enable flag is equal to 0. In some embodiments, a coloring process is applied based on the value of bit_depth_right_shift_luma. In some embodiments, a coloring process is applied only if bit_depth_right_shift_luma is not equal to 0. In some embodiments, a coloring process is applied based on the values ​​of bit_depth_right_shift_luma and bit_depth_left_shift_luma. In some embodiments, a coloring process is applied only if bit_depth_left_shift_luma is not equal to bit_depth_right_shift_luma. In some embodiments, a coloring process is applied based on the bit depth shift and bit depth recovery / post-filtering syntax. In some embodiments, a coloring process is applied only if bit_depth_right_shift_luma is not equal to 0 and the bit depth recovery / post-filtering enable flag is equal to 0.

[0165] The above embodiments and examples can be combined or used individually in any order.

[0166] Figure 5B A flowchart of a video encoding method 550 according to some embodiments is shown. Method 550 may be executed at a computing system (e.g., server system 112, source device 102, or electronic device 120) including control circuitry and memory storing instructions executed by the control circuitry. In some embodiments, method 550 is executed by executing instructions stored in the memory of the computing system (e.g., memory 314). In some embodiments, method 550 is executed by the same system as method 500 described above.

[0167] The system receives (552) video data comprising at least two color components. The system determines (554) whether to apply a bit-shift operation to one of the at least two color components. When a bit-shift operation is to be applied to that color component, the system generates (556) a first indicator indicating the application of the bit-shift operation and generates a set of at least one bit-shift parameter for the bit-shift operation. When no bit-shift operation is applied, the system does not (558) generate (e.g., abandons generation) the first indicator or the set of at least one bit-shift parameter. As previously stated, the encoding process may reflect the decoding process described herein (e.g., bit-depth shifting / truncating and restoration). For brevity, these details are not repeated here.

[0168] although Figure 5A and 5B At least two logical stages are shown in a specific order, but stages independent of the order can be reordered, and other stages can be combined or decomposed. Some reorderings or other groupings not specifically mentioned will be obvious to those skilled in the art, and therefore the orderings and groupings presented herein are not exhaustive. Furthermore, it should be recognized that these stages can be implemented in hardware, firmware, software, or any combination thereof.

[0169] Now let's turn to some example implementations.

[0170] (A1) In one aspect, some embodiments include a method for video decoding (e.g., method 500). In some embodiments, the method is performed at a computing system (e.g., server system 112) including memory and control circuitry. In some embodiments, the method is performed at an encoding / decoding module (e.g., encoding / decoding module 320). In some embodiments, the method is performed at a source encoding component (e.g., source encoder 202), an encoding engine (e.g., encoding engine 212), and / or an entropy encoder (e.g., entropy encoder 214). The method includes: (i) receiving a video bitstream of video data; (ii) parsing a first indicator indicating whether a bit shift operation (also referred to as a first bit shift operation) is to be applied to the color components of the video data; and (iii) parsing a set of at least one bit shift parameter (also referred to as a first set of at least one bit shift operation) from the video bitstream when the first indicator indicates that the bit shift operation is to be applied, wherein the video bitstream does not include the set of at least one bit shift parameter when the first indicator indicates that the bit shift operation is not to be applied. In this way, an enable flag for bit depth shifting for sequence recovery and / or image recovery is signaled. In some embodiments, the color component is a luminance component. In some embodiments, the color component is a chromaticity component.

[0171] (A2) In some embodiments of A1, the first indicator is signaled at the sequence level in the video bitstream. In some embodiments, the first indicator indicates whether a bit shift operation should be applied to a specific sequence in the video bitstream. In some embodiments, the first indicator is signaled in `sequence_restoration_data_rbsp()`. In some embodiments, the first indicator is a single bit flag (e.g., `srd_bit_depth_shift_enabled_flag`). In some embodiments, bit depth shifting is enabled for the sequence when the first indicator is equal to 1, and bit depth shifting is disabled for the sequence when the first indicator is 0. In some embodiments, the first indicator is signaled at the picture level in the video bitstream. In some embodiments, the first indicator is signaled in `picture_restoration_data_rbsp()`. In some embodiments, the first indicator at the picture level is a single bit flag (e.g., `prd_bit_depth_shift_enabled_flag`).

[0172] (A3) In some embodiments of A2, the method further includes: parsing a second indicator indicating whether a bit shift operation (also referred to as a second bit shift operation) should be applied, wherein the second indicator is signaled at the picture level in the video bitstream. When the second indicator indicates that the bit shift operation should be applied, the method further includes: parsing a second set of at least one bit shift parameter from the video bitstream. In some embodiments, the second set of bit shift parameters overrides the first set of bit shift parameters for data corresponding to a specific picture of the video data. In some embodiments, for a specific picture, picture-level parameters may selectively override sequence-level parameters, while other pictures continue to use sequence-level default values. In some embodiments, when the second indicator indicates that a bit shift operation should not be applied, the video bitstream does not include the second set of at least one bit shift parameter. In some embodiments, the second indicator is signaled in picture_restoration_data_rbsp() and may be a single bit flag (e.g., prd_bit_depth_shift_enabled_flag).

[0173] (A4) In some embodiments of any of A1-A3, the color component of the video data is a luminance component, and the at least one shift bit parameter (also referred to as the first set of at least one shift bit parameter) for the luminance component is included in the video bitstream when a third indicator indicates that a bit shift operation (also referred to as a third bit shift operation) has occurred at an encoding component (such as an encoder). For example, the number of bits of the luminance shift bit (e.g., bit_depth_left_shift_luma) is signaled only when the encoded shift bit indicator (e.g., bit_depth_right_shift_luma) is greater than 0. In some embodiments, the at least one shift bit parameter for the luminance component includes bit_depth_left_shift_luma and / or bit_depth_luma_enhance. In some embodiments, the encoded shift bit indicator (e.g., bit_depth_right_shift_luma) specifies the number of bits by which the luminance sample value is right-shifted by the encoder. In some embodiments, when the encoded shift bit indicator is not present, the value of bit_depth_right_shift_luma is inferred to be equal to 0. In some embodiments, the values ​​of bit_depth_right_shift_luma and / or bit_depth_left_shift_luma can be in the range of 0 to 7, inclusive. The encoded shift indicator is the third indicator.

[0174] (A5) In some embodiments of A4, the first set of at least one shift bit parameters for the luminance component are included in the video bitstream only when the third indicator indicates that the third shift operation has occurred at the encoding component and the recovery indicator indicates that recovery should be performed. For example, the luminance quality enhancement enable flag is signaled only when the bit depth recovery enable flag is 0. For example, if the third indicator is greater than 0 and the recovery indicator (e.g., bit_depth_restoration_flag) is equal to 0, the video bitstream includes luminance recovery parameters (e.g., bit_depth_left_shift_luma and / or bit_depth_luma_enhance). In some embodiments, when the recovery indicator (e.g., bit_depth_restoration_flag) is equal to 1, the bit depth recovery method is enabled, and the number of bits shifted left by the luminance (e.g., bit_depth_left_shift_luma) is not explicitly signaled. In some embodiments, the luminance enhancement flag (e.g., bit_depth_luma_enhance) and the contrast enhancement threshold ratio (e.g., contast_enhance_thresh_ratio) are conditionally signaled based on these indicators. In some embodiments, the number of bits shifted to the left and the luminance quality enhancement flag are signaled only when the enable flag for bit depth recovery for luminance is 0.

[0175] (A6) In some embodiments of any of A1-A5, the method further includes: parsing a fourth indicator that indicates a quality enhancement operation to be performed on the color component when the first indicator indicates that the first bit shift operation should be applied. For example, the enable flag for luminance quality enhancement is signaled based on the value of a bit depth recovery enable flag and / or the number of bits shifted left by the luminance. In some embodiments, the quality enhancement indicator (i.e., the fourth indicator) is bit_depth_luma_enhance. In some embodiments, when the quality enhancement indicator is enabled (e.g., bit_depth_luma_enhance equals 1), additional quality enhancement parameters, such as contast_enhance_thresh_ratio, are signaled. In some embodiments, a contrast enhancement threshold specifies a parameter for enhancement based on contrast normalization. In some embodiments, the value of contast_enhance_thresh_ratio is in the range of 0 to 3, including 0 and 3.

[0176] (A7) In some embodiments of any of A1-A6, the method further includes: parsing a fourth indicator that indicates a quality enhancement operation to be performed on the color component. For example, an enable flag for luminance quality enhancement may always be signaled. In some embodiments, the fourth indicator is bit_depth_luma_enhance. In some embodiments, luminance enhancement is enabled when the quality enhancement indicator (i.e., the fourth indicator) is equal to 1, and luminance enhancement is disabled when the quality enhancement indicator is equal to 0. In some embodiments, the value of bit_depth_luma_enhance is inferred to be equal to 0 when it does not exist. In some embodiments, the quality enhancement indicator is signaled outside of any conditional box that depends on the recovery flag.

[0177] (A8) In some embodiments of A7, the fourth indicator is included in the video bitstream when the number of bits to be shifted for the color component is equal to a specific value. For example, the luminance quality enhancement enable flag is signaled only when the number of bits shifted left by the luminance at the decoder is equal to the specific value. In some embodiments, the specific value is a predefined integer value or an integer value signaled in the bitstream. In some embodiments, the specific value is equal to zero. In some embodiments, the fourth indicator (e.g., bit_depth_luma_enhance) is signaled only when bit_depth_left_shift_lima is equal to 0 and bit_depth_restoration_flag is equal to 0. In some embodiments, conditional signaling reduces bitstream overhead when quality enhancement is not applicable.

[0178] (A9) In some embodiments of A7, the fourth indicator is included in the video bitstream when the number of bits to be shifted for the color component is less than a specific value. For example, a signal to enable luminance quality enhancement is only sent if the value of the number of bits shifted left at the decoder is less than the specific value. In some embodiments, this specific value is a predefined integer value or an integer value signaled in the bitstream. As an example, a signal to enable luminance quality enhancement is only sent if the value of the number of bits shifted left at the decoder (e.g., bit_depth_left_shift_luma) is less than the value of the number of bits shifted right at the encoder (e.g., bit_depth_right_shift_luma). In some embodiments, this condition ensures that quality enhancement is signaled only when partial bit depth recovery is performed.

[0179] (A10) In some embodiments of any of A7-A9, the method further includes: parsing a set of at least one quality enhancement parameter when the fourth indicator indicates that the quality enhancement operation should be performed on the color component. For example, signaling the syntax of luminance quality enhancement based on an enable flag for luminance quality enhancement. As an example, signaling the syntax of luminance quality enhancement based on an enable flag for luminance quality enhancement being equal to 1. As another example, signaling bit_depth_luma_enhance only when bit_depth_left_shift_lima is equal to 0, and signaling contast_enhance_thresh_ratio only when bit_depth_luma_enhance is equal to 1. In some embodiments, the quality enhancement parameter includes contast_enhance_thresh_ratio. In some embodiments, the value of contast_enhance_thresh_ratio is in the range of 0 to 3, inclusive. In some embodiments, when it does not exist, the value of contast_enhance_thresh_ratio is inferred to be equal to 0. In some embodiments, when contast_enhance_thresh_ratio is equal to 0, 1, 2 and 3 respectively, the variable CntrstThRatio is assigned the values ​​0, 6, 7 and 8 respectively.

[0180] (A11) In some embodiments of any of A1-A10, the first indicator is included in the video bitstream when a bit shift operation (also referred to as a fourth bit shift operation) occurs at the encoding component. For example, the bit shift of chroma at the decoder is signaled in the bitstream only if the number of bits shifted right at the encoder is greater than 0. In some embodiments, the bit shift of chroma at the encoder is signaled in the bitstream. In some embodiments, bit_depth_right_shift_chroma specifies the number of bits by which the chroma sample value is shifted right by the encoder. In some embodiments, the value of bit_depth_right_shift_chroma is inferred to be equal to 0 when it does not exist. In some embodiments, the value of bit_depth_right_shift_chroma is in the range of 0 to 7, including 0 and 7. In some embodiments, an enable flag (e.g., bit_depth_restoration_chroma_flag) for the bit depth restoration method for the chroma components is signaled only if bit_depth_right_shift_chroma is greater than 0.

[0181] (B1) In one aspect, some embodiments include a method for video encoding (e.g., method 550). In some embodiments, the method is performed at a computing system (e.g., server system 112) including memory and control circuitry. In some embodiments, the method is performed at a codec module (e.g., codec module 320). The method includes: (i) receiving video data comprising at least two color components; (ii) determining whether to apply a bit shift operation (also referred to as a first bit shift operation) to one of the at least two color components; (iii) when the bit shift operation is to be applied to the color component, generating a first indicator indicating that the bit shift operation is to be applied, and generating a set of at least one bit shift parameter (also referred to as a first set of at least one bit shift parameter) for the bit shift operation; and (iv) when the bit shift operation is not applied, not generating the first indicator or the set of at least one bit shift parameter.

[0182] (B2) In some embodiments of B1, the method further includes: signaling the first indicator at the sequence level in the video bitstream. In some embodiments, the first indicator is signaled in sequence_restoration_data_rbsp(). In some embodiments, the first indicator is a single bit flag (e.g., srd_bit_depth_shift_enabled_flag). In some embodiments, bit depth shifting is enabled for the sequence when the first indicator is equal to 1, and bit depth shifting is disabled for the sequence when the first indicator is equal to 0. In some embodiments, when the first indicator is equal to 1, the syntax of bit depth shifting (e.g., bit_depth_shift()) is signaled in the video bitstream.

[0183] (B3) In some embodiments of B2, the method further includes: signaling a second indicator at the picture level in the video bitstream, the second indicator indicating that a second bit shift operation should be applied, and generating a second set of at least one shift bit parameter for the second bit shift operation, wherein the second set of at least one shift bit parameter overrides the first set of at least one shift bit parameter for a corresponding picture in the video data. In some embodiments, the second indicator is signaled in picture_restoration_data_rbsp(). In some embodiments, the second indicator is a single bit flag (e.g., prd_bit_depth_shift_enabled_flag). In some embodiments, for a particular picture, the picture-level parameters selectively override the sequence-level parameters, while other pictures continue to use the sequence-level default values. In some embodiments, when the second indicator indicates that the second bit shift operation should not be applied, the video bitstream does not include the second set of at least one shift bit parameter.

[0184] (B4) In some embodiments of any of B1-B3, the method further includes: encoding the color components, including performing a bit right shift operation on the color components. In some embodiments, the bit right shift operation reduces the sample precision of the luminance and / or chrominance components. In some embodiments, the encoder applies a right shift to the sample values ​​according to a configured truncation parameter, thereby effectively discarding the least significant bit. In some embodiments, the number of bits for the luminance right shift (e.g., bit_depth_right_shift_luma) specifies the number of bits by which the luminance sample value is shifted right by the encoder. In some embodiments, the value of bit_depth_right_shift_luma is in the range of 0 to 7, including 0 and 7.

[0185] (B5) In some embodiments of B4, the method further includes: signaling the execution of the bit right shift operation in the video bitstream. In some embodiments, the execution of the bit right shift operation is signaled by including bit_depth_right_shift_luma and / or bit_depth_right_shift_chroma in the video bitstream. In some embodiments, bit_depth_right_shift_chroma specifies the number of bits by which the chroma sample value is shifted right by the encoder. In some embodiments, the value of bit_depth_right_shift_chroma is in the range of 0 to 7, including 0 and 7. In some embodiments, when not present, the values ​​of bit_depth_right_shift_luma and bit_depth_right_shifd_chroma are inferred to be equal to 0.

[0186] (B6) In some embodiments of any of B1-B5, the method further includes: signaling in the video bitstream whether a quality enhancement operation is performed on the color component. In some embodiments, the quality enhancement operation includes luminance enhancement. In some embodiments, the method includes signaling in the video bitstream an enable flag for luminance quality enhancement (e.g., bit_depth_luma_enhance). In some embodiments, luminance enhancement is enabled when bit_depth_luma_enhance equals 1, and luminance enhancement is disabled when bit_depth_luma_enhance equals 0. In some embodiments, when bit_depth_luma_enhance equals 1, additional quality enhancement parameters, such as contast_enhance_thresh_ratio, are signaled. In some embodiments, the value of contast_enhance_thresh_ratio is in the range of 0 to 3, inclusive.

[0187] In one aspect, some embodiments include a method for storing a bitstream, the method comprising: performing a video encoding method as described in embodiments of this application to generate a bitstream; and storing the bitstream.

[0188] In one aspect, some embodiments include a method for transmitting a bitstream, the method comprising: performing a video encoding method as described in embodiments of this application to generate a bitstream; and transmitting the bitstream.

[0189] In another aspect, some embodiments include a computing system (e.g., server system 112) including control circuitry (e.g., control circuitry system 302) and a memory (e.g., memory 314) coupled to the control circuitry, the memory storing one or more sets of instructions configured to be executed by the control circuitry, the set of instructions including instructions for performing any of the methods described herein (e.g., A1-A11 and B1-B6). In some embodiments, the computing system includes an encoder component and a decoder component (e.g., a code converter). The control circuitry executes at least one set of instructions stored in the memory to perform any of the methods described herein.

[0190] In another aspect, some embodiments include a non-volatile computer-readable storage medium storing one or more sets of instructions executable by control circuitry of a computing system, the set of instructions including instructions for performing any of the methods described herein (e.g., A1-A11 and B1-B6). In some embodiments, the memory or non-volatile computer-readable storage medium stores a computer program / instructions and a video bitstream including any features disclosed herein (e.g., syntax and encoding information). The video bitstream includes: encoding information for at least two color components of video data; and a first indicator indicating whether a bit shift operation is to be applied to the color components of the video bitstream; the computer program / instructions, when executed by a processor, implement the video encoding method described in the embodiments of this application to generate the bitstream.

[0191] Unless otherwise stated, any syntax element described herein can be a High-Level Syntax (HLS). As used herein, HLS signals at a level higher than the block level. For example, HLS can correspond to the sequence level, frame level, slice level, or tile level. As another example, HLS elements can signal in Video Parameter Sets (VPS), Sequence Parameter Sets (SPS), Picture Parameter Sets (PPS), Adaptive Parameter Sets (APS), slice headers, picture headers, tile headers, and / or CTU headers.

[0192] It should be understood that although the terms “first,” “second,” etc., may be used herein to describe various elements, these elements should not be limited by these terms. These terms are used only to distinguish one element from another. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit the claims. As used in the description of the embodiments and the appended claims, the singular forms “a,” “an,” and “the” are also intended to include the plural forms, unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and covers any and all possible combinations of at least one of the associated listed items. It should be further understood that when the terms “comprises” and / or “comprising” are used in this specification, it indicates the presence of the stated features, integers, steps, operations, elements, and / or components, but does not exclude the presence or addition of at least one other feature, integer, step, operation, element, component, and / or group thereof.

[0193] As used herein, depending on the context, the term "if" can be interpreted as meaning "when" or "at" or "in response to determination" or "according to determination" or "in response to detection," where the stated prerequisite is true. Similarly, depending on the context, the phrases "if it is determined [the stated prerequisite is true]" or "if [the stated prerequisite is true]" or "when [the stated prerequisite is true]" can be interpreted as meaning "at" or "in response to determination" or "according to determination" or "in response to detection," where the stated prerequisite is true.

[0194] For purposes of explanation, the above description has been described with reference to specific embodiments. However, the foregoing illustrative discussion is not intended to be exhaustive or to limit the claims to the precise forms disclosed. Many modifications and variations are possible in light of the foregoing teachings. The embodiments were chosen and described in order to best explain the principles of operation and practical application, thereby enabling others skilled in the art to understand.

Claims

1. A method for video decoding, characterized in that, The method includes: The video bitstream that receives video data; Parse the first indicator, which indicates whether to apply a first bit shift operation to the color components of the video data; and When the first indicator indicates that the first bit shifting operation should be applied, at least one set of first bit shifting parameters is parsed from the video bitstream, wherein when the first indicator indicates that the first bit shifting operation should not be applied, the video bitstream does not include at least one set of first bit shifting parameters.

2. The method according to claim 1, characterized in that, The first indicator is signaled at the sequence level in the video bitstream.

3. The method according to claim 2, characterized in that, Further includes: Parse the second indicator, which indicates whether to apply the second bit shift operation, wherein the second indicator is signaled at the picture level in the video bitstream; When the second indicator indicates that the second bit shifting operation should be applied, at least one second set of bit shifting parameters is parsed from the video bitstream.

4. The method according to claim 1, characterized in that, The color component of the video data is a luminance component, and when the third indicator indicates that a third bit shift operation has occurred at the encoding component, at least one bit shift parameter of the first group for the luminance component is included in the video bitstream.

5. The method according to claim 4, characterized in that, The first set of at least one shift bit parameter for the luminance component is included in the video bitstream only when the third indicator indicates that the third shift operation has occurred at the encoding component and the recovery indicator indicates that recovery should be performed.

6. The method according to claim 1, characterized in that, Further includes: When the first indicator indicates that the first bit shift operation should be applied, the fourth indicator is parsed, which indicates that a quality enhancement operation should be performed on the color component.

7. The method according to claim 1, characterized in that, Further includes: The fourth indicator is parsed, indicating that a quality enhancement operation should be performed on the color component.

8. The method according to claim 7, characterized in that, When the number of bits to be shifted for the color component is less than or equal to a specific value, the fourth indicator is included in the video bitstream.

9. The method according to claim 7, characterized in that, Further includes: When the fourth indicator indicates that the quality enhancement operation should be performed on the color component, at least one set of quality enhancement parameters is parsed.

10. The method according to claim 1, characterized in that, When a fourth bit shift operation occurs at the encoding component, the first indicator is included in the video bitstream.

11. A video encoding method, characterized in that, The method includes: Receive video data that includes at least two color components; Determine whether to apply a first bit shift operation to one of the at least two color components; When the first bit shift operation is to be applied to the color component, a first indicator is generated, indicating that the first bit shift operation is to be applied, and a first set of at least one bit shift parameter is generated for the first bit shift operation; and When the first bit shift operation is not applied, the first indicator or at least one bit shift parameter of the first group is not generated.

12. The method according to claim 11, characterized in that, Further includes: The first indicator is signaled at the sequence level in the video bitstream.

13. The method according to claim 12, characterized in that, Further includes: A second indicator is signaled at the image level in the video bitstream to indicate that a second bit shift operation should be applied, and a second set of at least one bit shift parameter is generated for the second bit shift operation, wherein the second set of at least one bit shift parameter overrides the first set of at least one bit shift parameter for the corresponding image in the video data.

14. The method according to claim 11, characterized in that, Further includes: Encoding the color components includes performing a bit right shift operation on the color components.

15. The method according to claim 14, characterized in that, Further includes: The execution of the bit right shift operation is notified by a signal sent in the video bitstream.

16. The method according to claim 11, characterized in that, Further includes: A signal is sent in the video bitstream to notify whether to perform a quality enhancement operation on the color component.

17. A method for storing a bit stream, characterized in that, The method of video encoding according to any one of claims 11-16 generates a bitstream; and the bitstream is stored.

18. A method for transmitting a bit stream, characterized in that, The method of video encoding according to any one of claims 11-16 generates a bitstream; and transmits the bitstream.

19. A non-volatile computer-readable storage medium storing computer programs / instructions and video bitstreams thereon, characterized in that, The video bitstream includes: The encoded information of at least two color components of the video data; and The first indicator indicates whether to apply a bit shift operation to the color components of the video bitstream; When the computer program / instructions are executed by the processor, they implement the video encoding method according to any one of claims 11-16 to generate the bitstream.

20. A computing system, characterized in that, It includes a control circuit and a memory storing at least one set of instructions; the control circuit executes at least one set of instructions stored in the memory to perform the method according to any one of claims 1-16.

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