Image protection method, embedded chip and embedded device

Abstract

The application provides an image protection method, an embedded chip and an embedded device. The embedded device comprises the embedded chip and an acquisition unit, and the embedded chip comprises a processing unit and a hardware encryption unit connected with each other. When the processing unit obtains an image to be protected acquired by the acquisition unit, the hardware encryption unit is driven to start working: based on a chip number of the embedded chip, a manufacturer number of the embedded device and the image to be protected, an overall hash value of the image to be protected is calculated; finally, the processing unit acquires an encryption chip number and an encryption manufacturer number and writes the overall hash value together into a tail part of the image to be protected to obtain encrypted image data, which is used for being cached to an external memory or uploaded to a cloud. In this way, the encrypted image data is directly obtained according to the chip number and the manufacturer number at the acquisition end, and tamper-proof processing of the acquisition end is realized.

Description

Technical Field

[0001] This invention relates to the field of embedded development technology, and more specifically, to an image protection method, an embedded chip, and an embedded device. Background Technology

[0002] Currently, embedded devices such as security monitoring, IoT terminals, and industrial cameras are widely used in various industries. However, the images collected by these embedded devices, as original evidence data, face serious risks of tampering to ensure their authenticity and integrity. These risks include, but are not limited to, pixel content redrawing, JPEG re-encoding, structural segment splicing, and metadata tampering.

[0003] Current technologies generally involve post-processing of images in the cloud for anti-counterfeiting. This can only prevent images from being tampered with during transmission from the cloud to the client, but it cannot prevent images from being tampered with during transmission from the acquisition point to the cloud. Summary of the Invention

[0004] The purpose of this invention is to provide an image protection method, an embedded chip, and an embedded device to improve the problems existing in the prior art.

[0005] The embodiments of the present invention can be implemented as follows: In a first aspect, the present invention provides an image protection method applied to an embedded chip in an embedded device, the embedded device further comprising an acquisition unit, and the embedded chip comprising a processing unit and a hardware encryption unit interconnected therewith; the method includes: When the processing unit obtains the image to be protected acquired by the acquisition unit, it drives the hardware encryption unit to start working. The hardware encryption unit calculates the overall hash value of the image to be protected based on the chip number of the embedded chip, the manufacturer number of the embedded device, and the image to be protected. The processing unit obtains the encrypted chip number and encrypted manufacturer number corresponding to the chip number and the manufacturer number, respectively. The processing unit writes the overall hash value, the encryption chip number, and the encryption manufacturer number to the end of the image to be protected to obtain encrypted image data; the encrypted image data is used to cache to external storage or upload to the cloud.

[0006] In an optional implementation, the hardware encryption unit includes an OTP storage module, a key derivation module, and a hash operation module; The step of the hardware encryption unit calculating the overall hash value of the image to be protected based on the chip number of the embedded chip, the manufacturer number of the embedded device, and the image to be protected includes: The key derivation module performs key derivation operations based on the chip number and the manufacturer number read from the OTP storage module to obtain the target key; The hash operation module performs a hash operation based on the target key and the image to be protected to obtain the overall hash value of the image to be protected.

[0007] In an optional implementation, the key derivation module includes a first-level KDF, a second-level KDF, and a third-level KDF; The key derivation module performs key derivation operations based on the chip number and the manufacturer number read from the OTP storage module to obtain the target key, including: After the first-level KDF reads the root key from the OTP storage module, it performs key derivation operations based on the root key and the built-in initial salt value to obtain the first key. After the second-level KDF reads the chip number from the OTP storage module, it performs a key derivation operation based on the chip number and the first key to obtain the second key; After the third-level KDF reads the vendor number from the OTP storage module, it performs a key derivation operation based on the vendor number and the second key to obtain the third key; the target key is the third key.

[0008] In an optional implementation, the hardware encryption unit further includes an encryption module; The step of the processing unit obtaining the encrypted chip number and encrypted manufacturer number corresponding to the chip number and the manufacturer number respectively includes: The processing unit drives the encryption module to work. After the encryption module reads the chip number from the OTP storage module, it performs encryption operation to obtain the encrypted chip number. After the encryption module reads the vendor number from the OTP storage module, it performs encryption operations to obtain the encrypted vendor number.

[0009] In an optional implementation, the root key, the chip number, and the manufacturer number are all N-bit data; each level of KDF includes an M-bit built-in register, an XOR, a bit reordering module, a bit width merger, a byte reordering module, and a hash module. For the i-th level KDF in a three-level KDF, the steps for key derivation include: The XOR operator aligns the first input to the i-th preset position region of the M-bit random value in the built-in register, and then performs an XOR operation to obtain the XOR result; the first input is the root key, the chip number, or the manufacturer number. The bit disordering module performs bit disordering operation on the XOR result to obtain the bit disordered result; The bit-width merger concatenates the bit-disordered result with the second input to obtain concatenated data; the second input is the built-in initial salt value, the first key, or the second key. The byte disordering module performs byte disordering operations on the concatenated data to obtain the byte disordering result; The hash module performs a hash operation on the byte disordered result to obtain output data, which is the first key, the second key, or the third key.

[0010] In an optional implementation, the bit disordering module and the byte disordering module implement disordering operations through a fixed bit permutation method; Alternatively, the bit disordering module and the byte disordering module can perform disordering operations through linear congruent permutation.

[0011] In an optional implementation, the bit reordering module and the byte reordering module respectively implement reordering operations based on two dynamically determined reorder lookup tables, and the processing unit obtains the reorder lookup tables in the following manner: Feature data is extracted from the image to be protected, and after deduplication of the feature data, it is encoded and mapped to obtain a feature code array; An array containing K unique elements is randomly generated based on the device serial number to obtain the initial lookup table; K=M or 2M / 8; Based on the feature code array, the initial lookup table is converted into the disordered lookup table.

[0012] In an optional implementation, the step of converting the initial lookup table into the disordered lookup table based on the feature code array includes: Initialize an array with K elements all equal to 0; The L replacement positions in the initial array are sequentially replaced with each element of the feature code array to obtain the array to be filled; the position indices of the L replacement positions all satisfy the preset position determination conditions; In the initial lookup table, each index position that is the same as each element in the feature code array is recorded as the index position to be skipped. The elements at positions 0 in the array to be filled are replaced sequentially with elements at all other index positions in the initial lookup table, excluding the index positions to be skipped, to obtain the disordered lookup table.

[0013] Secondly, the present invention provides an embedded chip for implementing the image protection method described in the first aspect.

[0014] Thirdly, the present invention provides an embedded device, including a data acquisition unit and an embedded chip as described in the foregoing embodiments; The acquisition unit is used to acquire images and then transmits the image to be protected to the embedded chip. The embedded chip is used to process the image to be protected according to the image protection method described in the first aspect above, to obtain encrypted image data; The embedded chip is also used to cache the encrypted image data to an external memory or upload it to the cloud.

[0015] Compared with existing technologies, this invention provides an image protection method, an embedded chip, and an embedded device. The embedded device includes an embedded chip and a data acquisition unit. The embedded chip includes a processing unit and a hardware encryption unit interconnected with each other. When the processing unit obtains the image to be protected acquired by the acquisition unit, it drives the hardware encryption unit to start working: based on the chip number of the embedded chip, the manufacturer number of the embedded device, and the image to be protected, it calculates the overall hash value of the image to be protected; finally, the processing unit obtains the encryption chip number and encryption manufacturer number, and writes them together with the overall hash value to the end of the image to be protected, obtaining encrypted image data. This encrypted image data is used to cache in external storage or upload to the cloud. Thus, encrypted image data is obtained directly at the acquisition end based on the chip number and manufacturer number, achieving tamper-proof processing at the acquisition end. Attached Figure Description

[0016] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments will be briefly introduced below. It should be understood that the following drawings only show some embodiments of the present invention and should not be regarded as a limitation on the scope. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0017] Figure 1 This is one of the structural schematic diagrams of an embedded device provided in an embodiment of the present invention.

[0018] Figure 2 This is a flowchart illustrating an image protection method provided in an embodiment of the present invention.

[0019] Figure 3 This is a second schematic diagram of an embedded device provided in an embodiment of the present invention.

[0020] Figure 4 A schematic diagram of the hardware encryption unit provided in an embodiment of the present invention.

[0021] Figure 5 This is a schematic diagram of the structure of each level of KDF provided in an embodiment of the present invention.

[0022] Icons: 1000 - Embedded device; 10 - Acquisition unit; 20 - Embedded chip; 21 - Processing unit; 22 - Hardware encryption unit; 221 - Encryption module; 222 - OTP storage module; 223 - Key derivation module; 224 - Hash operation module. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the embodiments of the present invention clearer, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. The components of the embodiments of the present invention described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0024] Therefore, the following detailed description of the embodiments of the invention provided in the accompanying drawings is not intended to limit the scope of the claimed invention, but merely to illustrate selected embodiments of the invention. All other embodiments obtained by those skilled in the art based on the embodiments of the invention without inventive effort are within the scope of protection of the invention.

[0025] It should be noted that similar labels and letters in the following figures indicate similar items. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures.

[0026] Furthermore, the terms "first" and "second" are used only to distinguish descriptions and should not be interpreted as indicating or implying relative importance.

[0027] It should be noted that, where there is no conflict, the features in the embodiments of the present invention can be combined with each other.

[0028] Here, we will first introduce the keywords or key terms involved in this invention: 1. Salt: Random data used in cryptography to enhance the security of cryptographic storage.

[0029] 2. OTP (One-Time Programmable): A type of non-volatile memory (NVM, data is not lost when power is off). Its core feature is "write once, read countless times".

[0030] 3. KDF (Key Derivation Function): A key derivation function is an algorithm that generates secure encryption keys based on a password or master key. Its main function is to enhance key security and prevent brute-force attacks or rainbow table attacks. The first-level KDF, second-level KDF, and third-level KDF mentioned in this application are all hardware implementations.

[0031] Most existing technologies involve post-processing of images in the cloud for anti-spoofing. This can only prevent images from being tampered with during transmission from the cloud to the client, but it cannot prevent images from being tampered with during transmission from the acquisition end to the cloud. In other words, attackers can obtain the transmitted images through a link attack and then transmit them to the cloud, or directly fabricate images and transmit them to the cloud.

[0032] Furthermore, cloud-based anti-counterfeiting processes mostly employ complex digital watermarking technologies and AI fault-tolerant hashing, which involve complex software and hardware processing and consume high levels of processor performance and system storage resources. Meanwhile, the acquisition end mostly uses low-power embedded devices 1000 with limited resources and performance, so cloud-based anti-counterfeiting technologies cannot be directly ported to the acquisition end.

[0033] Based on the discovery of the aforementioned technical problems, the inventors, through creative labor, proposed the following technical solutions to solve or improve these problems. It should be noted that the deficiencies in the solutions of the prior art are all results derived by the inventors after practical experience and careful research. Therefore, the discovery process of the aforementioned problems and the solutions proposed in the embodiments of this application below should be considered contributions made by the inventors to this application during the inventive process, and should not be construed as technical content known to those skilled in the art.

[0034] Please refer to Figure 1 , Figure 1 This is a schematic diagram of an embedded device provided in an embodiment of the present invention. Figure 1 The embedded device 1000 includes an embedded chip 20 and a data acquisition unit 10 that are interconnected.

[0035] The acquisition unit 10 is used to acquire images and transmit the images to be protected to the embedded chip 20. Embedded chip 20 is used to process the image to be protected according to the image protection method provided by the present invention to obtain encrypted image data; Embedded chip 20 is also used to cache encrypted image data to external storage or upload it to the cloud.

[0036] Optionally, the embedded device 1000 may be, but is not limited to, security surveillance cameras, IoT terminal cameras, industrial cameras, road surveillance cameras, drones, security / patrol robots, and other devices.

[0037] Please refer to Figure 2 , Figure 2 This is a flowchart illustrating an image protection method provided in an embodiment of the present invention. The execution entity of this method can be the aforementioned embedded chip 20, such as... Figure 1 The embedded chip 20 includes a processing unit 21 and a hardware encryption unit 22 that are interconnected.

[0038] like Figure 2 The image protection method may include the following steps S1 to S4: S1. When the processing unit 21 obtains the image to be protected collected by the acquisition unit 10, it drives the hardware encryption unit 22 to start working. S2. The hardware encryption unit 22 calculates the overall hash value of the image to be protected based on the chip number of the embedded chip 20, the manufacturer number of the embedded device 1000, and the image to be protected. S3. Processing unit 21 obtains the encrypted chip number and encrypted manufacturer number corresponding to the chip number and manufacturer number, respectively. S4. Processing unit 21 writes the overall hash value, encryption chip number and encryption manufacturer number to the end of the image to be protected to obtain encrypted image data.

[0039] In this embodiment, encrypted image data can be cached to external storage or uploaded to the cloud via a data cable or USB flash drive.

[0040] Optionally, taking a JPEG image as an example, the overall hash value, encryption chip number, and encryption vendor number are combined into a protection information segment. This segment can be written into the reserved padding space after the EOI marker (0xffd9) in the image data to be protected. This padding space is within the reserved space allowed by the JPEG standard and does not damage the image structure. The resulting encrypted image data still maintains the standard JPEG format and can be opened and displayed normally by any general-purpose image viewer. At the same time, the protection information coexists with the image itself, preventing separation or misalignment during transmission.

[0041] The image protection method provided in this invention involves the processing unit obtaining the image to be protected from the acquisition unit, and then driving the hardware encryption unit to start working: Based on the embedded chip's chip number, the embedded device's manufacturer number, and the image to be protected, the overall hash value of the image is calculated; finally, the processing unit obtains the encryption chip number and encryption manufacturer number, and writes them together with the overall hash value to the end of the image to be protected, obtaining encrypted image data. This encrypted image data is used to cache in external storage or upload to the cloud. Thus, encrypted image data is obtained directly at the acquisition end based on the chip number and manufacturer number, achieving tamper-proof processing at the acquisition end.

[0042] Existing image anti-counterfeiting solutions mostly run on PCs, with keys generated by software and stored in memory, making them vulnerable to theft or copying. Furthermore, the keys are not bound to chip or manufacturer serial numbers, making device traceability impossible. Hash calculations rely on general-purpose CPUs, which are difficult to perform in real-time and lack side-channel protection. This allows the same key to be reused on different devices, making it difficult to pinpoint image authenticity to specific hardware.

[0043] In this application, the hardware encryption unit 22 is not implemented by a general-purpose processor executing software algorithms, but is integrated into the embedded chip 20 as an application-specific integrated circuit. Please refer to [link to application-specific integrated circuit]. Figure 3 The hardware encryption unit 22 may include an encryption module 221, an OTP storage module 222, a key derivation module 223, and a hash operation module 224 that are connected to each other via hardwire.

[0044] The OTP storage module 222 can be an eFuse. The OTP storage module 222 has an immutable root key, chip ID, and vendor ID permanently stored in it. The OTP storage module 222 is programmed at the factory and cannot be modified after programming. During operation, it can only be read by hardware, and software reading this area will always return all zeros, thus physically blocking the key leakage path.

[0045] Therefore, combined Figure 3 The implementation process of step S2 above may include the following sub-steps S21~S22: S21. The key derivation module 223 performs key derivation operations based on the chip number and manufacturer number read from the OTP storage module 222 to obtain the target key. S22, Hash operation module 224 performs hash operation based on the target key and the image to be protected to obtain the overall hash value of the image to be protected.

[0046] In this embodiment, the key derivation module 223 does not load parameters from memory, but directly reads the chip number and manufacturer number from the OTP storage module 222, and performs key derivation operations based on these two parameters to obtain the target key. The entire process involves data flow that does not pass through system memory; input and output are transmitted directly via hardwired connections, and the software remains completely invisible and uninterruptible throughout.

[0047] Therefore, combined Figure 3 The implementation process of step S3 above may include the following sub-steps S21~S22: S31. After reading the chip number from the OTP storage module 222, the encryption module 221 performs encryption operations to obtain the encrypted chip number. S32. After reading the manufacturer number from the OTP storage module 222, the encryption module 221 performs encryption operations to obtain the encrypted manufacturer number.

[0048] In this embodiment, after the encryption module 221 reads the chip number (ChipID) from the OTP storage module 222, it performs the encryption operation internally and outputs the encrypted chip number (ChipID_enc); similarly, after reading the vendor number (VendorID), it also performs the encryption operation internally and outputs the encrypted vendor number (VendorID_enc).

[0049] Optionally, the encryption algorithm used by the encryption module 221 may be, but is not limited to, asymmetric encryption algorithms such as RSA or SM2 national cryptographic algorithm. The private key required for encryption may be stored in the internal register of the encryption module 221 and may not be exported or debugged, while the public key may be made public for use by the backend system for verification.

[0050] Optionally, in actual implementation, the hardware encryption unit 22 may have only one encryption module 221, which is used to read the chip number (ChipID) and the manufacturer number (VendorID) sequentially for encryption operations; or, the hardware encryption unit 22 may have two encryption modules 221, which read the chip number (ChipID) and the manufacturer number (VendorID) respectively for encryption operations.

[0051] To reduce computational overhead, the encryption module 221 can be driven to work when the embedded device 1000 is powered on, i.e., when the processing unit 21 is powered on and started, in order to obtain the encryption chip number (ChipID_enc) and the encryption vendor number (VendorID_enc) and store them in memory. When subsequent images need to be encrypted and protected, the processing unit 21 can directly read them from memory.

[0052] In optional scenarios, instead of encrypting the chip ID and vendor ID, the processor can directly write both along with the overall hash value to the end of the image to be protected.

[0053] Among the optional implementation methods, in Figure 3 Based on this, please refer to Figure 4 The key derivation module 223 is not a single-level operation structure, but a dedicated hardware circuit consisting of three levels of KDFs connected in series: a first-level KDF, a second-level KDF, and a third-level KDF. Each KDF operates independently, and intermediate results are transmitted between levels via hardwired connections, without passing through system memory or software registers.

[0054] In the OTP storage module 222, the root key, chip ID, and vendor ID are all N-bit data, while the built-in initial salt value and the output of each KDF stage are M-bit data. The following example uses N=32 bits and M=256 bits. However, when OTP resources are sufficient, N can be 64, and this is not limited here.

[0055] Combination Figure 4 The implementation process of step S21 above may include the following sub-steps S211 to S213.

[0056] S211. After the first-level KDF reads the root key from the OTP storage module 222, it performs key derivation operation based on the root key and the built-in initial salt value to obtain the first key.

[0057] In this process, the first-level KDF reads the 32-bit root key from the OTP storage module 222, and uses it together with the built-in initial salt value (INIT_salt) as input to perform key derivation operations, outputting a 256-bit first key (Key1). This initial salt value is a fixed built-in value that cannot be configured or read, and only participates in the operations of this level.

[0058] S212. After the second-level KDF reads the chip number from the OTP storage module 222, it performs a key derivation operation based on the chip number and the first key to obtain the second key.

[0059] The second-level KDF reads the 32-bit chip ID from the OTP storage module 222, uses it and the first key as input, performs the next-level key derivation operation, and outputs a 256-bit second key (Key2). Here, the chip ID is a unique identifier written to the OTP at the chip's factory; the software cannot read its plaintext, but can only trigger the hardware module to complete internal calculations.

[0060] S213. After the third-level KDF reads the manufacturer number from the OTP storage module 222, it performs key derivation operation based on the manufacturer number and the second key to obtain the third key.

[0061] The third-level KDF reads the 32-bit vendor ID from the OTP storage module 222, uses it and the second key as input, performs the final-level key derivation operation, and outputs a 256-bit third key (Key3); this third key is the target key, which is directly sent to the hash operation module 224 for use.

[0062] Combination Figure 4In this invention, the key obtained after the first-level KDF and second-level KDF operations will wait for a random delay of 0-5 microseconds before being input into the next-level KDF to resist external energy detection attacks based on changes in current or radiation. The specific delay duration can be a hardware random number generated by the RNG module (such as a true random number generator) of the embedded chip 20.

[0063] Optional, combined Figure 4 The hash operation module 224 can be implemented using SHA operation under the HMAC (Hash-based Message Authentication Code) algorithm framework.

[0064] The hash operation module 224 can accelerate the operation through multi-stage pipeline and hardware-fixed constants. In the interval between each round of SHA operation (when M=256, the SHA operation will compress data of any length into 256 bits), a random delay of 0-3 microseconds is also inserted to resist external energy detection attacks based on changes in current or radiation.

[0065] The image to be protected can be stored in the RAM (Random Access Memory) of the embedded chip 20. The hash operation module 224 can be read into the RAM or register through a high-speed bus such as AXI (Advanced eXtensible Interface) and participate in the operation. The final hash value (Hash_ALL) can be written to the RAM or register through a bus such as AXI or APB (Advanced Peripheral Bus) for use by the processing unit 21.

[0066] In the optional implementation, each level of the KDF can use the same hardware structure and operate on the same principle. Please refer to [link / reference]. Figure 5 Each level of KDF includes an M-bit built-in register, an XOR unit, a bit reordering module, a bit width merger, a byte reordering module, and a hash module.

[0067] Combination Figure 5 For the i-th level KDF (i=1, 2 or 3) in a three-level KDF, the key derivation operation can include the following steps a1 to a5.

[0068] Step a1: After aligning the first input to the i-th preset position region of the M-bit random value in the built-in register, the XOR operator performs an XOR operation to obtain the XOR result.

[0069] like Figure 5The first input is a 32-bit root key, chip ID, or vendor ID. The three preset location regions are three independent bit regions located at M bit positions. For example: When i=1, the first preset position region can be bits 0 to 31. That is, in the first-level KDF, the 32-bit root key is aligned with bits 0 to 31 of the 256-bit random value in the built-in register, and an XOR operation is performed to obtain an XOR result; When i=2, the second preset location region can be bits 96-127. That is, in the second-level KDF, the 32-bit chip ID is aligned with bits 96-127 of the 256-bit random value in the built-in register, and an XOR operation is performed to obtain an XOR result; When i=3, the third preset location region can be bits 224-255. That is, in the third-level KDF, the 32-bit vendor ID is aligned with bits 224-255 of the 256-bit random value in the built-in register, and an XOR operation is performed to obtain an XOR result. Similarly, if N=64 bits, then the three preset location regions can be: bits 0-63, bits 96-159, and bits 192-255. The random values ​​in the built-in registers of the three-level KDF can be the same. It should be noted that the above examples are merely illustrative and are not intended to be limiting.

[0070] Step a2: The bit disordering module performs bit disordering operation on the XOR result to obtain the bit disordered result.

[0071] Step a3: The bit-width merger concatenates the bit-disordered result and the second input to obtain the concatenated data.

[0072] like Figure 5 The second input is either the built-in initial salt value (INIT_salt), the first key (Key2), or the second key (Key2).

[0073] Step a4: The byte disordering module performs byte disordering operations on the concatenated data to obtain the byte disordering result.

[0074] Step a5: The hash module performs a hash operation on the byte disordered result to obtain the output data.

[0075] like Figure 5The output data is either the first key (Key2), the second key (Key2), or the third key (Key3). The hash module can operate on the principle of hash algorithms such as SHA256 or SM3 (Chinese national cryptographic standard).

[0076] Optionally, the reordering principle used by the bit reordering module and the byte reordering module can be determined based on the actual situation.

[0077] In one alternative scenario, if chip cost is taken into consideration, both the bit reordering module and the byte reordering module can implement reordering operations through fixed bit permutation / linear congruent permutation, or according to a preset reordering principle (e.g., shifting each bit forward or backward by a fixed bit, swapping the positions of connected odd and even bits, etc.).

[0078] In another alternative scenario, if security and computational performance are considered, the bit disordering module and the byte disordering module can respectively implement disordering operations based on two dynamically determined disordering lookup tables. The two disordering lookup tables can be dynamically determined by the processing unit 21 based on the feature data displayed in the image to be protected, so as to realize that each acquired image dynamically corresponds to its own disordering lookup table.

[0079] Optionally, the processing unit 21 can obtain the out-of-order lookup table through the following steps b1 to b3.

[0080] Step b1: Extract feature data from the image to be protected, and encode and map the feature data after deduplication to obtain a feature code array.

[0081] The feature data can be a string displayed in the image to be protected (which may consist of at least one of Chinese characters, numbers, and letters). When performing encoding mapping, numbers and letters can use ASCII codes, while Chinese characters can use custom fixed mapping rules or character encoding methods (such as GBK encoding or UTF-8 encoding).

[0082] For example, if the embedded device 1000 is a camera specifically designed to capture license plates, then the license plate number can be extracted from the image to be protected. After deduplication of the letters and numbers in the license plate number, it can be converted into ASCII codes to obtain a feature code array. This example is merely illustrative and is not intended to be limiting.

[0083] Step b2: Randomly generate an array containing K unique elements based on the device serial number to obtain the initial lookup table.

[0084] Specifically, for the out-of-order lookup table required by the bit out-of-order module, K=M; while for the out-of-order lookup table required by the byte out-of-order module, K=2M / 8.

[0085] Step b3: Based on the feature code array, convert the initial lookup table into a randomized lookup table.

[0086] Specifically, the elements of the feature code array can be evenly inserted into the initial lookup table to obtain a randomized lookup table containing K unique elements. That is, the implementation process of step b3 may include: Step b31: Initialize an array with K elements all equal to 0; Step b32: Replace the L replacement positions in the initial array with each element of the feature code array in turn to obtain the array to be filled.

[0087] The L replacement positions all satisfy a preset position determination condition. This condition can be that the difference between the position indices of any two adjacent replacement positions equals a set value, which can be flexibly set based on the values ​​of L and K. For example, if the set value is 5, then the position indices of the L replacement positions are: 0, 5, 10, ..., 5*L-1.

[0088] Step b33: Record each index position in the initial lookup table that is the same as each element in the feature code array as the index position to be skipped.

[0089] Step b34: Replace each element position that is 0 in the array to be filled with an element at each index position in the initial lookup table, except for each index position to be skipped, to obtain a disordered lookup table.

[0090] For example, taking K=256, L=3, and a set value of 5 as an example, assume the initial lookup table is... Feature code array (11,33,14), initial array .if , , Then the initial array Convert to an out-of-order lookup table The method is as follows: (1) For the initial array First Replace them with 11, 33, and 14 respectively to obtain the array to be filled. ; (2) Fill the array to be filled Each element that is 0 is replaced sequentially with the initial lookup table. Each element in the text, but needs to be skipped. , , This yields a disordered lookup table. .

[0091] This ensures that the unordered lookup table is maintained. The system ensures that any two elements are of different sizes, thus correctly guiding the implementation of out-of-order processing. It should be noted that the above example is merely illustrative and is not intended to limit the scope of the problem.

[0092] It should be noted that the execution order of each step in the above method embodiments is not limited to that shown in the attached figures, and the execution order of each step shall be subject to the actual application situation.

[0093] Compared with the prior art, the embodiments of the present invention have the following beneficial effects: Firstly, this application achieves key derivation through a three-level KDF to obtain the target key. The entire process is implemented in hardware to make the key invisible to software. Furthermore, a random delay is introduced at the end of each KDF operation to prevent attacks, greatly increasing the cost of attacking and cracking the key. During the key derivation process, ChipID and VendorID are used to support tracing the original acquisition device of each image. Secondly, this application uses hardware acceleration throughout the process, with fewer tasks processed by the software in the processing unit; the encryption and hash algorithms used are mature algorithms, without complex algorithms such as digital watermarking and AI fault tolerance, and can run in real time on low-power embedded devices with limited resources and performance. Thirdly, this application embeds the protection information at the end of the image to be protected, so the image can be viewed without the need for image viewing tools to parse the protection information. It is fully compatible with the image display format, and the original image and protection information are distributed and transmitted together, which can effectively prevent misalignment or partial loss of the two.

[0094] This invention also provides an embedded chip that is used to implement the image protection method described above when the embedded device is running.

[0095] The above are merely specific embodiments of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. An image protection method, characterized in that, An embedded chip used in an embedded device, the embedded device further including a data acquisition unit, the embedded chip including an interconnected processing unit and a hardware encryption unit; the method includes: When the processing unit obtains the image to be protected acquired by the acquisition unit, it drives the hardware encryption unit to start working. The hardware encryption unit calculates the overall hash value of the image to be protected based on the chip number of the embedded chip, the manufacturer number of the embedded device, and the image to be protected. The processing unit obtains the encrypted chip number and encrypted manufacturer number corresponding to the chip number and the manufacturer number, respectively. The processing unit writes the overall hash value, the encryption chip number, and the encryption manufacturer number to the end of the image to be protected to obtain encrypted image data; the encrypted image data is used to cache to external storage or upload to the cloud.

2. The method according to claim 1, characterized in that, The hardware encryption unit includes an OTP storage module, a key derivation module, and a hash operation module; The step of the hardware encryption unit calculating the overall hash value of the image to be protected based on the chip number of the embedded chip, the manufacturer number of the embedded device, and the image to be protected includes: The key derivation module performs key derivation operations based on the chip number and the manufacturer number read from the OTP storage module to obtain the target key; The hash operation module performs a hash operation based on the target key and the image to be protected to obtain the overall hash value of the image to be protected.

3. The method according to claim 1, characterized in that, The key derivation module includes a first-level KDF, a second-level KDF, and a third-level KDF; The key derivation module performs key derivation operations based on the chip number and the manufacturer number read from the OTP storage module to obtain the target key, including: After the first-level KDF reads the root key from the OTP storage module, it performs key derivation operations based on the root key and the built-in initial salt value to obtain the first key. After the second-level KDF reads the chip number from the OTP storage module, it performs a key derivation operation based on the chip number and the first key to obtain the second key; After the third-level KDF reads the vendor number from the OTP storage module, it performs a key derivation operation based on the vendor number and the second key to obtain the third key; the target key is the third key.

4. The method according to claim 2, characterized in that, The hardware encryption unit also includes an encryption module; The step of the processing unit obtaining the encrypted chip number and encrypted manufacturer number corresponding to the chip number and the manufacturer number respectively includes: The processing unit drives the encryption module to work. After the encryption module reads the chip number from the OTP storage module, it performs encryption operation to obtain the encrypted chip number. After the encryption module reads the vendor number from the OTP storage module, it performs encryption operations to obtain the encrypted vendor number.

5. The method according to claim 3, characterized in that, The root key, the chip number, and the manufacturer number are all N-bit data; each level of KDF includes an M-bit built-in register, an XOR, a bit reordering module, a bit width merger, a byte reordering module, and a hash module. For the i-th level KDF in a three-level KDF, the steps for key derivation operations include: The XOR operator aligns the first input to the i-th preset position region of the M-bit random value in the built-in register, and then performs an XOR operation to obtain the XOR result; the first input is the root key, the chip number, or the manufacturer number. The bit disordering module performs bit disordering operation on the XOR result to obtain the bit disordered result; The bit-width merger concatenates the bit-disordered result and the second input to obtain concatenated data; the second input is the built-in initial salt value, the first key, or the second key. The byte disordering module performs byte disordering operations on the concatenated data to obtain the byte disordering result; The hash module performs a hash operation on the byte disordered result to obtain output data, which is the first key, the second key, or the third key.

6. The method according to claim 5, characterized in that, The bit disordering module and the byte disordering module implement disordering operations through a fixed bit permutation method; Alternatively, the bit disordering module and the byte disordering module can perform disordering operations through linear congruent permutation.

7. The method according to claim 5, characterized in that, The bit reordering module and the byte reordering module respectively implement reordering operations based on two dynamically determined reordering lookup tables. The processing unit obtains the reordering lookup tables in the following way: Feature data is extracted from the image to be protected, and after deduplication of the feature data, it is encoded and mapped to obtain a feature code array; An array containing K unique elements is randomly generated based on the device serial number to obtain the initial lookup table; K=M or 2M / 8; Based on the feature code array, the initial lookup table is converted into the disordered lookup table.

8. The method according to claim 7, characterized in that, The step of converting the initial lookup table into the disordered lookup table based on the feature code array includes: Initialize an array with K elements all equal to 0; The L replacement positions in the initial array are sequentially replaced with each element of the feature code array to obtain the array to be filled; the position indices of the L replacement positions all satisfy the preset position determination conditions; In the initial lookup table, each index position that is the same as each element in the feature code array is recorded as the index position to be skipped. The elements at positions 0 in the array to be filled are replaced sequentially with elements at all other index positions in the initial lookup table, excluding the index positions to be skipped, to obtain the disordered lookup table.

9. An embedded chip, characterized in that, Used to implement the image protection method according to any one of claims 1-8.

10. An embedded device, characterized in that, Includes a data acquisition unit and the embedded chip as described in claim 9; The acquisition unit is used to acquire images and then transmits the image to be protected to the embedded chip. The embedded chip is used to process the image to be protected according to the image protection method according to any one of claims 1-8 to obtain encrypted image data; The embedded chip is also used to cache the encrypted image data to an external memory or upload it to the cloud.

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