A timing calibration system for point-to-point communication

Abstract

The application relates to the technical field of data communication, in particular to a time sequence calibration system for point-to-point communication, which comprises a No. 1 machine and a No. 2 machine connected in communication, both of which transmit and send a single carrier waveform signal at the first packet data position of each frame according to a continuous data frame format, and both of which are provided with a counter for recording the time when the waveform arrives; after receiving the single carrier waveform signal of the No. 2 machine, the No. 1 machine extracts the local counter value and returns the counter value to the No. 2 machine in the form of an FSK modulated waveform signal; the No. 2 machine records the first time counter value after receiving the single carrier waveform signal of the No. 1 machine, analyzes the second time counter value after receiving the FSK modulated waveform signal, and adjusts the self-sending delay time based on the difference between the two counter values to realize the time sequence alignment of the two places. The application realizes the independent and accurate time sequence calibration of the transceivers of the two places with unknown distance without relying on external satellite timing hardware by using the original FSK waveform system and circuit structure, and does not need to increase the hardware cost.

Description

Technical Field

[0001] This application relates to the technical field of data communication, and in particular to a timing calibration system for point-to-point communication. Background Technology

[0002] In point-to-point FSK communication, the receiving frequency of the receiver must strictly correspond in time with the carrier frequency of the data packets transmitted from the remote transmitter in order to correctly demodulate the data. However, due to objective reasons such as asynchronous power-on of remote devices, differences in program initialization time, and unknown electromagnetic wave transmission distance, the timing of the transceivers at the two locations is often misaligned. If the timing error between the receiving frequency and the received transmitting packet frequency is too large, the receiver will not be able to receive the data correctly, resulting in communication failure.

[0003] Currently, the commonly used timing synchronization solutions in the industry mainly rely on the second pulse signals from external satellites such as BeiDou or GPS to force synchronization between clocks at two different locations. However, this requires additional satellite receiving hardware, significantly increasing equipment costs. At the same time, this solution is extremely dependent on the stability of external satellite signals, and is prone to losing synchronization reference in complex environments where signals are blocked or interfered with, leading to system failure and greatly limiting the practical application of the equipment.

[0004] Therefore, the problem that needs to be solved is how to achieve autonomous and accurate timing synchronization between transceivers at two locations with unknown distances, without increasing the cost of timing hardware or relying on external satellite signals. Summary of the Invention

[0005] To achieve autonomous and accurate timing synchronization between FSK transceivers at unknown distances without relying on external satellite timing hardware or adding extra burden to the link implementation, this application provides a timing calibration system for point-to-point communication, employing the following technical solution: It includes Unit 1 and Unit 2, which are communicatively connected. Both Unit 1 and Unit 2 are configured to transmit in a continuous data frame format, and send a single-carrier waveform signal at the first data packet position of each frame; both Unit 1 and Unit 2 are equipped with a counter for recording the arrival time of the waveform; The No. 1 unit is configured to: receive a single-carrier waveform signal sent by the No. 2 unit, extract the local counter value when the single-carrier waveform signal is received, and send an FSK modulated waveform signal carrying the local counter value to the No. 2 unit; The second unit is configured to: receive the single-carrier waveform signal sent by the first unit and record the counter value at the first moment, and receive the FSK modulated waveform signal sent by the first unit and parse the counter value at the second moment, and adjust the transmission delay time of the second unit based on the counter value at the first moment and the counter value at the second moment so that the transmission timing of the second unit is aligned with that of the first unit.

[0006] By adopting the above technical solution, both Unit 1 and Unit 2 transmit a single-carrier waveform signal at the first data packet position of each frame. Taking advantage of the ease of identification and extremely short response processing time of the single-carrier waveform signal, high-precision counting and sampling of the waveform arrival time is achieved. After receiving the single-carrier waveform signal from Unit 2, Unit 1 immediately responds with an FSK modulated waveform signal and transmits its own counter value to Unit 2. Unit 2 can calculate the transmission timing difference between the two locations by comparing its own recorded first-time counter value with the second-time counter value returned by Unit 1. Based on this, it adjusts its own transmission delay. Thus, without relying on external timing hardware such as BeiDou or GPS, the original FSK waveform system and circuit structure are used to achieve autonomous and accurate alignment of the transmission and reception timing between the two locations, without increasing hardware costs or link implementation burden.

[0007] Optionally, the data frame consists of multiple consecutive data packets, each data packet corresponding to a different FSK carrier frequency, wherein the first data packet corresponds to a single carrier waveform signal with a carrier frequency of f1, and the number of bits for other data packets besides the first data packet is determined based on the actual FSK modulation requirements.

[0008] By adopting the above technical solution, the first data packet in the data frame is specially set as a single-carrier waveform signal with carrier frequency f1 as a calibration bit, and the remaining data packets are flexibly configured according to the actual FSK modulation requirements. This not only does not change the overall structure of the original FSK data format, but also allows the calibration signal to be embedded in the normal data frame. The receiving end can easily distinguish the single-carrier waveform and respond quickly, reducing the impact of the calibration process on normal data transmission.

[0009] Optionally, the counters of both the No. 1 and No. 2 machines are configured to start counting from zero when the first packet of data in each frame begins to be sent, and to clear the counters after the last packet of data in the current frame has been sent.

[0010] By adopting the above technical solution, the design of the counter starting at zero at the beginning of each frame and clearing to zero at the end of the frame ensures that the count value of each frame of data always cycles within a certain range, avoiding the problem of counter overflow; at the same time, it makes the counter values ​​of the two locations comparable within the same frame period, which makes it easy for the second unit to directly use the difference between the counter values ​​within the frame to calculate the timing deviation.

[0011] Optionally, the FSK modulated waveform signal sent by the first unit includes a CRC check result obtained by performing a CRC calculation on the local counter value, and the CRC check result is appended to the local counter value and modulated and sent together.

[0012] By adopting the above technical solution, a CRC check result is added to the FSK modulated waveform signal responded by Unit 1. After receiving and parsing the FSK modulated waveform signal, Unit 2 can perform CRC check on the counter value, thereby effectively detecting possible bit errors during transmission and ensuring the reliability of counter value transmission and the accuracy of calibration results.

[0013] Optionally, the second unit adjusts the transmission delay time based on the counter value at the first time moment and the counter value at the second time moment, including: Within the current data frame, if the second unit receives the single-carrier waveform signal first and then the FSK modulated waveform signal, the difference between the counter value at the first moment and the counter value at the second moment is divided by two to obtain the delay adjustment time, and the transmission delay of the next frame is adjusted according to the delay adjustment time.

[0014] By adopting the above technical solution, when the second unit receives the single-carrier waveform signal first and then the FSK modulated waveform signal within the frame, it indicates that the transmission timing deviation between the two locations is within the normal range that can be directly calculated. By dividing the difference between the two counter values ​​by two, the influence of the electromagnetic wave round-trip transmission delay can be eliminated, and the single-trip timing deviation value can be accurately obtained as the delay adjustment amount, so that the transmission timing of the second unit is aligned with that of the first unit.

[0015] Optionally, the second unit is also configured as follows: Within the current data frame, if the second unit receives the FSK modulated waveform signal first and then receives the single-carrier waveform signal, the counter value at the moment the single-carrier waveform signal is received is recorded, and the transmission delay time of the second unit is directly adjusted to this counter value. This process continues until the single-carrier waveform signal is received first in a subsequent data frame, at which point the delay adjustment time calculation is repeated.

[0016] By adopting the above technical solution, when Unit 2 receives the FSK modulated waveform signal first, it indicates that the transmission timing of Unit 2 is far ahead of Unit 1. At this time, the delay is directly adjusted to the counter value at the moment the single-carrier waveform signal is received, which can quickly and significantly narrow the timing difference between the two locations. In subsequent frames after coarse adjustment, Unit 2 will receive the single-carrier waveform signal first, and then complete the precise alignment by dividing the difference by two. This two-stage adjustment strategy takes into account both rapid convergence when there is a large deviation and precise calibration when there is a small deviation.

[0017] Optionally, both the No. 1 and No. 2 units include a transmit link module and a receive link module, and the transmit link module and the receive link module are connected via serial port communication. The transmit link module includes a transmit MCU, a PLL phase-locked loop, and an analog attenuator connected in sequence; the receive link module includes a receive MCU.

[0018] By adopting the above technical solution, each transceiver uses a dual MCU architecture, with the transmit and receive links controlled and processed independently, and data interaction between the transmit and receive links is achieved through a serial port; in the transmit link, the PLL phase-locked loop is responsible for generating the required carrier frequency, and the analog attenuator cooperates to realize the amplitude control of the FSK modulation waveform. This architecture can directly use the original FSK circuit structure to complete the calibration function without adding any additional hardware modules.

[0019] Optionally, the structural logic for generating and transmitting the FSK modulated waveform signal by the No. 1 machine is as follows: The receiving MCU of Unit 1 obtains the counter value of the single carrier waveform sent by Unit 2 at that time by sampling, and sends it to the transmitting MCU of Unit 1 through the serial port; The MCU of the No. 1 unit controls the analog attenuator to periodically switch between full attenuation and non-attenuation outputs, and the presence or absence of the f1 frequency forms the FSK modulated waveform signal representing the counter value.

[0020] By adopting the above technical solution, Unit 1 periodically switches between the full attenuation and non-attenuation states of the analog attenuator, using the presence or absence of the f1 frequency carrier to represent binary 0 and 1, thereby encoding the counter value into an FSK modulated waveform signal. This method of using the presence or absence of the carrier to achieve modulation results in a larger threshold difference in the signal, making it less prone to bit errors and significantly improving the signal-to-noise ratio and reliability of the calibration signal transmission.

[0021] Optionally, both the No. 1 and No. 2 transmitter MCUs are equipped with a calibration flag bit. When the calibration flag bit is high, the transmitter MCU triggers the timing calibration process of single-carrier transmission and delay adjustment. After calibration is completed, the calibration flag bit turns low.

[0022] By adopting the above technical solution, the start and end of the calibration process are controlled by setting a calibration flag, making the calibration process controllable. After calibration, the flag automatically turns low to enter the normal data transmission process. The host computer can also raise the flag at any time as needed to re-trigger the calibration process, realizing flexible scheduling and on-demand start of the calibration function. This facilitates regular timing recalibration according to the actual operating environment to maintain long-term stable synchronization accuracy.

[0023] In summary, this application includes at least one of the following beneficial technical effects: 1. By using the first packet data in the original FSK data frame format as a calibration bit, and through the interactive conversion between the single-carrier waveform signal and the FSK modulated waveform signal, autonomous and accurate transmission and reception timing synchronization between transceivers at unknown distances is achieved without relying on external satellite timing hardware such as BeiDou or GPS, without adding extra hardware costs and link implementation burden. 2. A combined strategy of using a single-carrier waveform signal as the calibration start signal and an FSK modulated waveform signal as the response signal is adopted. The single-carrier waveform is easy to identify and has a very small response delay. The FSK modulated waveform achieves modulation by the presence or absence of a carrier, resulting in a large threshold difference and a high signal-to-noise ratio. Combined with CRC check and multiple cyclic calibration mechanism, the influence of transmission errors is effectively eliminated, ensuring the accuracy and reliability of the calibration results. 3. To address the varying magnitudes of timing deviations between the two locations, a two-stage delay adjustment strategy combining coarse and fine adjustments was designed. This strategy enables rapid convergence under large deviations and precise alignment under small deviations. The timing adjustment is fast, the program is simple to implement, and the entire calibration process can be flexibly controlled via flags, allowing it to be started whenever needed. Attached Figure Description

[0024] Figure 1 This is a schematic diagram showing the data frame format and transmission / reception correspondence between Unit 1 and Unit 2 in this embodiment of the application; Figure 2 This is a schematic diagram of the hardware architecture of a single transceiver in an embodiment of this application; Figure 3 This is a schematic diagram of the calibration interaction when Unit 2 first receives a single-carrier waveform signal in an embodiment of this application; Figure 4 This is a schematic diagram of the calibration interaction when Unit 2 first receives the FSK modulated waveform signal in an embodiment of this application; Figure 5 This is a schematic diagram of timing alignment after calibration and adjustment in an embodiment of this application; Figure 6 This is a schematic diagram of the workflow of Unit 1 in the embodiments of this application; Figure 7 This is a schematic diagram of the workflow of Unit 2 in the embodiments of this application. Detailed Implementation

[0025] The following is in conjunction with the appendix Figure 1 -Appendix Figure 7 This application will be described in further detail below.

[0026] A timing calibration system for point-to-point communication, referring to Figure 1The system includes Unit 1 and Unit 2, which communicate point-to-point via radio electromagnetic waves. Both Unit 1 and Unit 2 are FSK transceivers, operating on the same transceiver program. However, due to asynchronous power-on, differences in program initialization time, and unknown electromagnetic wave transmission distance, there is usually a time difference t between the transmission timings of the two transceivers.

[0027] Reference Figure 1 Both transmitters 1 and 2 transmit in a continuous data frame format. Each data frame consists of six consecutive data packets: FSK Data Transmit 1, FSK Data Transmit 2, FSK Data Transmit 3, FSK Data Transmit 4, FSK Data Transmit 5, and FSK Data Transmit 6. Each data packet corresponds to a carrier frequency in the FSK system; data packets 1 through 6 correspond to six different FSK carrier frequencies. Each data packet has a duration of 1 ms, and frames are transmitted continuously, with the next frame being transmitted immediately after the previous one is completed. The number of bits per data packet is determined by the actual FSK modulation requirements.

[0028] During timing calibration, both Unit 1 and Unit 2 transmit a single-carrier waveform signal with a carrier frequency of f1 at the first data packet of each frame (i.e., FSK transmit data 1). The reason for choosing a single carrier as the calibration start signal is that: single-carrier waveform signals are easy to implement, simple to parse at the receiver, have a small system response delay, and are easy to quickly complete counting and sampling through a counter.

[0029] Reference Figure 2 Unit 1 and Unit 2 each include a transmit link module and a receive link module, which communicate with each other via a serial port. The transmit link module includes a transmit MCU, a PLL (phase-locked loop), and an analog attenuator connected in sequence. The receive link module includes a receive MCU. The receive MCU contains a counter for recording waveform arrival times.

[0030] Each transceiver employs a dual-MCU configuration, with the transmit and receive links independently controlled and processed by their respective MCUs. The transmit and receive MCUs exchange data via a serial port. The transmit MCU controls the carrier frequency required for the PLL (Phase-Locked Loop) output and controls the attenuation of the output signal through an analog attenuator. The PLL generates a precise carrier frequency signal. The analog attenuator controls the attenuation of the carrier signal output from the PLL. During normal single-carrier transmission, it outputs the signal without attenuation; during FSK modulated waveform transmission, it achieves signal modulation through periodic switching between full attenuation and no attenuation.

[0031] Reference Figure 1 and Figure 2Both Unit 1 and Unit 2's counters are configured to start counting from zero when the first data packet of each frame (i.e., FSK data transmission 1) is sent, and to be reset to zero after the last data packet of the current frame (i.e., FSK data transmission 6) is sent. The counters continuously count within each frame period to record the precise moment when the waveform signal from the other end is received within that frame's time range. The accuracy of the counters determines the accuracy of the calibration.

[0032] The following details the interaction process between Unit 1 and Unit 2 during the calibration process.

[0033] Reference Figure 3 Under normal calibration conditions, i.e., when Unit 2 receives the single-carrier waveform signal sent by Unit 1 first in the current data frame, the calibration interaction process is as follows: Unit 1 transmits a single-carrier waveform signal with a carrier frequency of f1 at position 1 of the FSK data transmission in each frame. Simultaneously, Unit 2 also transmits a single-carrier waveform signal with a carrier frequency of f1 at position 1 of its own FSK data transmission in each frame. Due to the electromagnetic wave propagation delay between the two locations, the single-carrier waveform signal reaches the other end after propagation.

[0034] After receiving the single-carrier waveform signal sent by Unit 2, the receiving MCU of Unit 1 immediately samples and obtains the value of the local counter of Unit 1 at that moment. Since the single-carrier waveform signal is easy to identify, the receiving MCU can complete the sampling of the counter value with minimal delay. Then, the receiving MCU of Unit 1 sends the counter value to the transmitting MCU of Unit 1 via the serial port.

[0035] After receiving the counter value from the receiving MCU, the transmitting MCU of Unit 1 first performs a CRC calculation on the counter value to obtain the CRC check result. Then, the transmitting MCU of Unit 1 controls the analog attenuator to periodically switch between full attenuation and no attenuation, using the presence or absence of the f1 frequency carrier to form an FSK modulated waveform signal representing the counter value. Specifically, when the analog attenuator is not attenuating, the output of the f1 frequency carrier represents logic 1; when the analog attenuator is fully attenuated, there is no output, representing logic 0. For example, if the counter value is 29, the corresponding binary code is 011101, and the analog attenuator switches its output sequentially according to the modes of 0 (full attenuation), 1 (no attenuation), 1 (no attenuation), 1 (no attenuation), 0 (full attenuation), 1 (no attenuation). The CRC check result is appended to the encoding of the counter value and modulated together before being transmitted. This FSK modulated waveform signal serves as Unit 1's response to the single-carrier waveform signal transmitted by Unit 2.

[0036] The reason for choosing the FSK modulated waveform signal as the response signal is that FSK modulation can encode and transmit the counter value to the second unit, and by using the presence or absence of the f1 frequency carrier for modulation, the signal threshold difference is larger, making it less prone to bit errors and improving the signal-to-noise ratio. At the same time, the FSK modulation scheme is simpler than other modulation schemes, with lower hardware and software costs.

[0037] After the transmission timing of this frame is started, the receiver MCU of receiver 2 starts counting from zero. Receiver MCU of receiver 2 first receives the single-carrier waveform signal sent by receiver 1 (that is, the first received waveform signal is a single-carrier waveform signal), and records the value of the local counter of receiver 2 at this moment. This value is the counter value t1 at the first moment.

[0038] Subsequently, the receiving MCU of Unit 2 continues to increment its counter within this frame, waiting to receive the FSK modulated waveform signal sent by Unit 1. Once Unit 2 receives the FSK modulated waveform signal, it demodulates it, extracts the counter value from Unit 1, and verifies the data's correctness using a CRC check. This counter value from Unit 1 is the counter value t2 at the second moment, representing the local counter value of Unit 1 when it receives the single-carrier waveform signal sent by Unit 2.

[0039] Since the counter value contained in the FSK modulated waveform signal has no time-related impact on the final calibration calculation result (i.e., the processing speed of the FSK modulated waveform signal received by Unit 2 does not affect the calibration accuracy), a fast processing response is not required.

[0040] Unit 2 subtracts the counter value t1 at the first moment from the counter value t2 at the second moment, and divides the difference by 2 to obtain the delay t when the calibration is not synchronized in a different location. That is: delay adjustment time t = (t1 - t2) / 2.

[0041] Based on the delay adjustment time t, Unit 2 adjusts the transmission delay of the next frame, so that the transmission timing of Unit 2 is closer to that of Unit 1, thereby achieving strict alignment of data transmission between the two locations.

[0042] Reference Figure 4 When the transmission timing of Unit 2 is much ahead of Unit 1, that is, when Unit 2 receives the FSK modulated waveform signal first and then the single-carrier waveform signal in the current data frame, the calibration interaction process is as follows: After starting the transmission timing sequence of data transmission 1 to data transmission 6 for frame 2, its receiving MCU determines the type of the first received waveform signal in each frame. If the first received signal is an FSK modulated waveform signal rather than a single-carrier waveform signal, it indicates that the timing sequence of frame 2 is much earlier than that of frame 1.

[0043] At this point, the receiving MCU of Unit 2 continues counting within this frame and records the counter value 'a' at the moment when it receives the single-carrier waveform signal sent by Unit 1. Unit 2 then directly adjusts its own transmission delay time to this counter value 'a'.

[0044] After the above adjustments, the timing deviation of Unit 2 will be significantly reduced in subsequent data frames. At this point, Unit 2 should receive the single-carrier waveform signal sent by Unit 1 first. Once Unit 2 confirms in subsequent frames that it received the single-carrier waveform signal first, it will re-adjust the delay according to the normal calibration procedure for receiving the single-carrier waveform signal first (i.e., the fine calculation of dividing the difference by two).

[0045] Reference Figure 5 After the above calibration and adjustment, the transmission delay time t of Unit 2 was eliminated, and the transmitted data of Units 1 and 2 were strictly aligned, enabling the transceivers at both locations to operate synchronously. At this time, the frequency timing of the receiving ends at both locations can synchronously receive the corresponding transmitted packet frequency timing, thereby ensuring the correct demodulation of FSK data.

[0046] Reference Figure 6 The workflow of Unit 1 is as follows: Step S101, Power-on and program initialization. After power-on, Unit 1 performs program initialization for the transmitting and receiving MCUs.

[0047] Step S102: Determine the calibration flag. The MCU is configured with a calibration flag (calibration FLAG). Determine if the calibration FLAG is 1 (high level). If the calibration FLAG = 1, proceed to the timing calibration process; if the calibration FLAG ≠ 1, proceed directly to the normal data transmission process.

[0048] In step S103, the MCU controls the PLL phase-locked loop to send a single-carrier waveform signal with a carrier frequency of f1 at position 1 of the FSK data transmission. The analog attenuator does not attenuate during this process, directly outputting the single-carrier waveform signal.

[0049] Step S104: The receiving MCU waits in real time and detects whether it has received a single-carrier waveform signal sent from Unit 2.

[0050] Step S105: When the receiving MCU receives the single-carrier waveform signal sent by the second unit, it immediately records the value of the internal counter of the receiving MCU at that moment and sends the counter value to the transmitting MCU through the serial port.

[0051] Step S106: The MCU performs CRC calculation on the received counter value, obtains the CRC verification result, and appends the CRC verification result to the counter value.

[0052] In step S107, the MCU controls the analog attenuator to periodically switch between full attenuation and no attenuation outputs, and uses the presence or absence of the f1 frequency carrier to form an FSK modulated waveform signal containing the counter value and CRC check result, which is sent out as a response to the single carrier waveform signal of the second unit.

[0053] Step S108: Determine if the preset number of cycles has been reached. If the preset number of calibration cycles has been reached, set the calibration FLAG to 0 (low level) and enter the normal data transmission process; if the number of cycles has not been reached, send the MCU to adjust the output modulation of the analog attenuator according to the cycle value, and return to step S103 to continue the calibration process of the next frame.

[0054] To ensure accuracy, multiple calibrations can be performed as needed, with each calibration following the same procedure and repeated continuously. Multiple calibrations can eliminate the impact of transmission errors. After calibration, the calibration FLAG goes low, ending the calibration process and resuming normal data transmission. The host computer can subsequently restart the calibration process periodically as needed by resetting the calibration FLAG high.

[0055] Reference Figure 7 The workflow of Unit 2 is as follows: Step S201: Power-on and program initialization. After powering on unit number two, the program initialization of the transmitting and receiving MCUs is performed.

[0056] Step S202: Determine the calibration flag. The MCU is configured with a calibration flag (calibration FLAG). Determine if the calibration FLAG is 1 (high level). If the calibration FLAG = 1, proceed to the timing calibration process; if the calibration FLAG ≠ 1, proceed directly to the normal data transmission process.

[0057] Step S203: The MCU controls the PLL phase-locked loop to send a single-carrier waveform signal with a carrier frequency of f1 at the FSK data transmission 1 position.

[0058] Step S204: The MCU waits for and detects the received waveform signal in real time, and at the same time determines whether the first received waveform signal in this frame is a single-carrier waveform signal or an FSK modulated waveform signal.

[0059] Step S205a: If the first signal received in this frame is a single-carrier waveform signal (FSK data 1 sent by Unit 1), then the receiving MCU records the counter value at this moment as the counter value t1 at the first moment.

[0060] In step S206a, the receiving MCU continues to increment the counter within this frame, waiting to receive the FSK modulated waveform signal sent by the first unit.

[0061] In step S207a, after receiving the FSK modulated waveform signal, the receiving MCU demodulates it, extracts the counter value of unit 1 (counter value t2 at the second moment), and verifies the correctness of the data through CRC check. The receiving MCU then provides the demodulated counter value to the transmitting MCU via serial port.

[0062] In step S208a, the transmitting MCU calculates the delay adjustment time based on the counter value t1 at the first moment and the counter value t2 at the second moment: Delay adjustment time = (t1-t2) / 2. The transmitting MCU adjusts the transmission delay of the next frame of the second unit according to this delay adjustment time.

[0063] In step S205b, if the first signal received in this frame is an FSK modulated waveform signal (indicating that the timing of the second unit is much ahead of the first unit), the receiving MCU demodulates the FSK modulated waveform signal, extracts the counter value of the first unit, and provides the counter value to the transmitting MCU through the serial port.

[0064] In step S206b, the MCU records the fact that it has received the FSK modulated waveform signal first, and continues to wait to receive the single-carrier waveform signal.

[0065] Step S207b: When the receiving MCU receives the single-carrier waveform signal sent by Unit 1, it records the counter value a at that moment and provides the value to the transmitting MCU through the serial port.

[0066] In step S208b, the MCU directly adjusts the transmission delay time of the second unit to the counter value a. After this adjustment, the second unit should receive the single-carrier waveform signal first in subsequent frames. At this point, the process proceeds to step S205a to perform fine calibration.

[0067] In step S209, the MCU calculates and adjusts the transmission delay time based on the counter value, and then determines whether the preset number of calibration cycles has been reached. If the number of cycles has been reached, the calibration FLAG is set to 0 (low level), and the normal data transmission process begins; if the number of cycles has not been reached, the process returns to step S203 to continue the calibration process for the next frame.

[0068] Similar to Unit 1, Unit 2 can also perform multiple cyclic calibrations, with each calibration following the same procedure to eliminate the impact of transmission errors. After calibration is complete, the calibration FLAG goes low, ending the calibration process. The host computer can periodically re-trigger the calibration process as needed.

[0069] The calibration principle is further illustrated below with a specific numerical example.

[0070] Assume the one-way propagation delay of electromagnetic waves between Unit 1 and Unit 2 is d, and the timing difference between the two transmission locations is t (i.e., the transmission time of Unit 2 is delayed by time t compared to Unit 1).

[0071] When machine 1 begins transmitting the first packet of its frame, its counter starts from 0. Simultaneously, because machine 2 is delayed by time t, it begins transmitting the first packet of its frame at time t after machine 1, and its counter also starts from 0.

[0072] The single-carrier waveform signal sent by Unit 1 arrives at Unit 2 after a propagation delay of d. At this time, the counter of Unit 2 has counted for (dt) time (assuming d>t), so the counter value t1=dt recorded by Unit 2 at the first moment.

[0073] The single-carrier waveform signal sent by Unit 2 arrives at Unit 1 after a propagation delay of d. At this time, the counter of Unit 1 has counted for (d+t) time, so the counter value recorded by Unit 1 is (d+t). Unit 1 sends this value (d+t) back to Unit 2 via an FSK modulated waveform signal, that is, the counter value t2 = d+t at the second moment.

[0074] The delay adjustment time calculated by Unit 2 is (t1-t2) / 2 = [(dt)-(d+t)] / 2 = -2t / 2 = -t.

[0075] The absolute value of this result is the timing difference t that needs to be calibrated. Unit 2 can achieve timing alignment with Unit 1 by advancing its own transmission timing by t time (or delaying it by -t time).

[0076] The implementation principle of this application embodiment is as follows: This system autonomously calculates the transmission timing difference between the two locations by interacting with single-carrier waveform signals and FSK modulated waveform signals between Unit 1 and Unit 2, combined with the waveform arrival times recorded by their respective counters. Unit 1 provides a response as a reference, while Unit 2 adopts different adjustment strategies based on the order of the received waveform signals—coarse adjustment for large deviations and fine adjustment for small deviations—ultimately ensuring strict alignment of the transmission timing of the transceivers at both locations. The entire calibration process directly utilizes the existing FSK waveform system and circuit structure, without relying on external satellite timing hardware, and does not add extra burden to the link implementation. It features fast calibration speed, high accuracy, and simple implementation.

[0077] The embodiments described in this specific implementation are preferred embodiments of this application and are not intended to limit the scope of protection of this application. Identical components are represented by the same reference numerals. Therefore, all equivalent changes made to the structure, shape, and principle of this application should be covered within the scope of protection of this application.

Claims

1. A timing calibration system for point-to-point communication, characterized in that, It includes Unit 1 and Unit 2, which are communicatively connected. Both Unit 1 and Unit 2 are configured to transmit in a continuous data frame format, and send a single-carrier waveform signal at the first data packet position of each frame; both Unit 1 and Unit 2 are equipped with a counter for recording the arrival time of the waveform; The No. 1 unit is configured to: receive a single-carrier waveform signal sent by the No. 2 unit, extract the local counter value when the single-carrier waveform signal is received, and send an FSK modulated waveform signal carrying the local counter value to the No. 2 unit; The second unit is configured to: receive the single-carrier waveform signal sent by the first unit and record the counter value at the first moment, and receive the FSK modulated waveform signal sent by the first unit and parse the counter value at the second moment, and adjust the transmission delay time of the second unit based on the counter value at the first moment and the counter value at the second moment so that the transmission timing of the second unit is aligned with that of the first unit.

2. The timing calibration system for point-to-point communication according to claim 1, characterized in that, The data frame consists of multiple consecutive data packets, each corresponding to a different FSK carrier frequency. The first data packet corresponds to a single-carrier waveform signal with a carrier frequency of f1. The number of bits for other data packets, excluding the first data packet, is determined based on the actual FSK modulation requirements.

3. The timing calibration system for point-to-point communication according to claim 1, characterized in that, The counters of both Unit 1 and Unit 2 are configured to start counting from zero when the first packet of data in each frame begins to be sent, and to be reset to zero after the last packet of data in the current frame has been sent.

4. The timing calibration system for point-to-point communication according to claim 1, characterized in that, The FSK modulated waveform signal sent by the No. 1 machine includes a CRC check result obtained by performing a CRC calculation on the local counter value. The CRC check result is appended to the local counter value and modulated together before being sent.

5. A timing calibration system for point-to-point communication according to claim 1, characterized in that, The second unit adjusts the transmission delay time based on the counter value at the first moment and the counter value at the second moment, including: Within the current data frame, if the second unit receives the single-carrier waveform signal first and then the FSK modulated waveform signal, the difference between the counter value at the first moment and the counter value at the second moment is divided by two to obtain the delay adjustment time, and the transmission delay of the next frame is adjusted according to the delay adjustment time.

6. A timing calibration system for point-to-point communication according to claim 5, characterized in that, The second unit is also configured as follows: Within the current data frame, if the second unit receives the FSK modulated waveform signal first and then receives the single-carrier waveform signal, the counter value at the moment the single-carrier waveform signal is received is recorded, and the transmission delay time of the second unit is directly adjusted to this counter value. This process continues until the single-carrier waveform signal is received first in a subsequent data frame, at which point the delay adjustment time calculation described in claim 5 is repeated.

7. The timing calibration system for point-to-point communication according to claim 1, characterized in that, Both Unit 1 and Unit 2 include a transmit link module and a receive link module, and the transmit link module and the receive link module are connected via serial communication. The transmit link module includes a transmit MCU, a PLL phase-locked loop, and an analog attenuator connected in sequence; the receive link module includes a receive MCU.

8. A timing calibration system for point-to-point communication according to claim 7, characterized in that, The structural logic for generating and transmitting the FSK modulated waveform signal by Unit 1 is as follows: The receiving MCU of Unit 1 obtains the counter value of the single carrier waveform sent by Unit 2 at that time by sampling, and sends it to the transmitting MCU of Unit 1 through the serial port; The MCU of the No. 1 unit controls the analog attenuator to periodically switch between full attenuation and non-attenuation outputs, and the presence or absence of the f1 frequency forms the FSK modulated waveform signal representing the counter value.

9. A timing calibration system for point-to-point communication according to claim 7, characterized in that, Both Unit 1 and Unit 2 have a calibration flag bit configured in their transmitting MCUs. When the calibration flag bit is high, the transmitting MCU triggers the timing calibration process of single-carrier transmission and delay adjustment. Once calibration is complete, the calibration flag will go low.

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