Bga clip printed circuit board and its processing method

Abstract

This invention relates to a BGA-lined printed circuit board and its processing method in the field of printed circuit board manufacturing. The board includes a top layer, a bottom layer, and at least one auxiliary layer. At least one of the top and bottom layers has BGA pads, and no wiring is provided between the BGA pads on the top and bottom layers. The auxiliary layer is located adjacent to the top or bottom layer and has BGA fan-out wiring. The printed circuit board has through-holes penetrating the top layer, the auxiliary layer, and the bottom layer. The through-hole walls are metallized to achieve electrical communication between the BGA pads and the BGA fan-out wiring. This invention, by transferring the wiring to the auxiliary layer, eliminates pad space occupied by the auxiliary layer, allowing for a wider spacing between holes and lines to meet design requirements. Etching returns to a conventional capability range, avoiding fine side etching lines and etching short circuits. The overall processing follows the conventional flow of material preparation, etching, browning, lamination, drilling, electroplating, outer layer etching, and subsequent processes.

Description

Technical Field

[0001] This invention relates to the field of printed circuit board processing, specifically to a BGA-interface printed circuit board and its processing method. Background Technology

[0002] BGA packages use a ball grid array arranged at the bottom of the package and connected to the PCB surface pads via reflow soldering. As the number of chip I / Os increases and the package area shrinks, the BGA pitch has been continuously compressed from 1.0mm to 0.5mm or even lower. Under a 0.5mm pitch condition, the pitch between adjacent pads is only 0.5mm. The pad diameter is usually designed to be 0.35mm and drilled. The clearance between pads is extremely small. All signal lines need to fan out from the pad array to the area inside the board within a limited stack-up space. The printed circuit board needs to be refined simultaneously in both planar dimensions and stack-up thickness.

[0003] Existing ultra-high density BGA printed circuit boards use a method of interleaving between surface pads to achieve fan-out, with the outer layer simultaneously serving as both pad and interleaving function. The pad diameter of 0.35mm, the line width of 0.05mm, and the line-to-pad spacing of 0.05mm are all close to the limits of the outer layer etching process. During the etching process, it is easy to cause fine side etching lines or open circuits, making it difficult to guarantee production yield. Some solutions use special processes such as negative and positive film combination or ultra-thin copper surface mSAP etching to forcibly achieve surface interleaving, which is complex and has stringent requirements on equipment capabilities.

[0004] In view of this, existing solutions or those that rely on special processes to forcibly implement the wiring on the surface layer are costly and complex, and have failed to solve the reliable fan-out problem of 0.5mm pitch BGA. The coexistence of surface pads and wiring limits the size of the pads to be increased due to the space occupied by the wiring, thus restricting the reliability of pad soldering. It is necessary to provide a printed circuit board structure and its processing method that changes the wiring distribution, allows the surface layer to return to a conventional design, reduces the overall process difficulty, and improves production feasibility. Summary of the Invention

[0005] To address the shortcomings of the prior art, this invention provides a BGA interconnect printed circuit board and its processing method. By placing the interconnects in the inner core board and the via structure in the outer layer, a layered configuration for BGA fan-out functionality is achieved. Only the pads in the surface BGA pad area are etched, and no interconnects are etched between the pads, reducing the difficulty of the outer layer etching process. The inner layer has no via ring structure, freeing up the inner layer wiring space and allowing the inner layer interconnects to be within the range of conventional inner layer etching process capabilities. The overall processing flow uses traditional process equipment, enabling the production of BGA interconnect printed circuit boards using traditional processes.

[0006] The technical solution of this invention is as follows:

[0007] In a first aspect, the present invention provides a BGA-coated printed circuit board, comprising a top layer, a bottom layer, and at least one auxiliary layer; at least one of the top layer and the bottom layer is provided with BGA pads; no cross-connects are provided between the BGA pads of the top layer and the bottom layer; the auxiliary layer is located adjacent to the top layer or the bottom layer, and the auxiliary layer is provided with BGA fan-out cross-connects; the printed circuit board is provided with through-holes penetrating the top layer, the auxiliary layer, and the bottom layer, and the through-hole walls are metallized to achieve electrical communication between the BGA pads and the BGA fan-out cross-connects.

[0008] As a preferred embodiment, there are two auxiliary layers, which are symmetrically distributed with the intermediate core board as the center; the intermediate core board is located between the two auxiliary layers.

[0009] As a preferred embodiment, PP semi-cured sheets are provided between the surface layer and the adjacent auxiliary layer, as well as between adjacent layers.

[0010] As a preferred embodiment, the BGA pad diameter is 0.35mm; the via diameter is 0.25mm; the center distance between adjacent BGA pads is 0.5mm; and the auxiliary layer trace width is 0.05mm.

[0011] As a preferred embodiment, the auxiliary layer clamping line pattern is located within the gap between adjacent through-hole projections; the distance between the auxiliary layer clamping line pattern and the outer edge of the through-hole projection is 0.05mm.

[0012] Secondly, the present invention provides a method for processing BGA-interface printed circuit boards, applicable to ultra-high density BGA scenarios, comprising the following steps:

[0013] S1, cut multiple core boards and outer copper foil according to the preset panel size; the multiple core boards include at least one auxiliary core board and an intermediate core board; the outer copper foil includes a surface copper foil and a bottom copper foil;

[0014] S2, a wire clamping pattern is etched on the auxiliary core board by a pattern transfer process, the wire clamping pattern including BGA fan-out wire clamping; an inner layer reference pattern is etched on the intermediate core board.

[0015] S3, roughen the copper surface of each core board;

[0016] S4, the surface copper foil, bottom copper foil, auxiliary core board and intermediate core board are laminated and pressed with the prepreg to form a multilayer board; the auxiliary core board is located in an adjacent layer of the surface layer or the bottom layer;

[0017] S5, Drill through holes through the multilayer board according to the BGA array design position;

[0018] S6, perform copper plating and full-board electroplating on the hole wall and board surface of the through hole to metallize the through hole;

[0019] S7, an outer layer circuit pattern is formed by etching on the surface copper foil and the bottom copper foil using a pattern transfer process. A hole ring is etched in the surface BGA area corresponding to the via position as a pad, and no interlocking wires are etched between the pads in the surface BGA area.

[0020] S8, in sequence, performs solder mask fabrication, character printing, surface treatment, and molding.

[0021] As a preferred method, in S1, a middle CCL core board and two independent core boards are cut out according to the panel size as auxiliary core boards; the middle CCL core board is copper-clad on both sides; the two independent core boards are used to form L2 and L(N-1) auxiliary layers respectively; the surface copper foil and the bottom copper foil are used to form L1 and LN outer layers respectively.

[0022] As a preferred method, in S2, L3 and L(N-2) inner layer patterns are etched on the copper foils on both sides of the intermediate CCL core board, respectively; and L2 and L(N-1) clamping line patterns are etched on the two independent core boards, respectively.

[0023] As a preferred method, in S4, the outer copper foil, PP prepreg, L2 auxiliary core board, PP prepreg, middle CCL core board, PP prepreg, L(N-1) auxiliary core board, PP prepreg, and bottom copper foil are stacked and pressed together to form an N-layer board; the two sides of the middle CCL core board are etched into L3 and L(N-2) inner layers respectively; where N is an even number not less than 6.

[0024] As a preferred method, in S8, a solder resist layer is coated on the surface of the top layer and the bottom layer and exposed and developed; the solder resist layer is exposed by opening windows at the pad locations.

[0025] According to the above-described solution, the beneficial effects of this invention are as follows:

[0026] This invention places the BGA fan-out traces on an auxiliary layer. Only pads are etched on the surface and bottom layers, and no traces are etched between the pads, achieving functional layering between the traces and the pads. The surface BGA area no longer serves as a trace, and the pad diameter is 0.35mm, improving the reliability of pad soldering. After the traces are transferred to the auxiliary layer, the line width is 0.05mm, the auxiliary layer has no pad space occupied, and the hole-to-line spacing of 0.1mm meets the design requirements. Drilling, lamination, and etching return to the conventional capability range, avoiding fine side etching lines and etching short circuits. The overall processing follows the conventional process of material cutting, etching, browning, lamination, drilling, electroplating, outer layer etching, and subsequent processes. There is no need to introduce special processes such as negative and positive film combination or ultra-thin copper surface mSAP etching, reducing equipment requirements and process complexity, and improving the production yield and process feasibility of ultra-high density BGA trace printed circuit boards.

[0027] BGA pads are set on the outer layers of L1 and LN, and traces are set on the auxiliary layers of L2 and L(N-1). Through-holes run through each layer to achieve electrical connection. The pads and traces belong to different layers, and the pads maintain a normal clearance. The trace width of the auxiliary layer is 0.05mm. The auxiliary layer has a hole-free ring design to release alignment space, and the spacing is widened to the standard etching capability. The stack-up structure is centered on the middle CCL core board, with L2 and L(N-1) symmetrically distributed, and the lamination stress is balanced. The overall structure is compatible with conventional processes through the reconfiguration of the stack-up function, avoiding special process investment and reducing manufacturing costs. Attached Figure Description

[0028] Figure 1 This is a schematic diagram of the method flow of the present invention.

[0029] Figure 2 This is a schematic diagram of the cross-sectional structure of the product of the present invention.

[0030] Figure 3 This is a schematic diagram of the surface structure from above, with the dashed lines representing the projection positions of the intersecting lines. Detailed Implementation

[0031] To better understand the purpose, technical solution, and technical effects of this invention, the invention will be further explained and described below in conjunction with the accompanying drawings and embodiments. It should be noted that similar reference numerals and letters in the following drawings indicate similar items; therefore, once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. It is also stated that the embodiments described below are only for explaining this invention and are not intended to limit this invention.

[0032] It should be noted that when a component is referred to as "fixed to" or "set on" another component, it can be directly on the other component or there may be an intervening component. When a component is referred to as "connected to" another component, it can be directly connected to the other component or there may be an intervening component.

[0033] The indicated orientation or positional relationship is based on the orientation or positional relationship shown in the accompanying drawings, or the orientation or positional relationship in which the product is usually placed when in use, or the orientation or positional relationship in which a person skilled in the art would normally understand it, or the orientation or positional relationship in which the product is usually placed when in use. It is only for the purpose of facilitating the description of this application and simplifying the description, and is not intended to indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Example 1

[0034] like Figure 1As shown, this embodiment provides a BGA-interface printed circuit board and its processing method, applicable to ultra-high density BGA scenarios, including the following steps:

[0035] S1, cut multiple core boards and outer copper foil according to the preset panel size; the multiple core boards include at least one auxiliary core board and an intermediate core board; the outer copper foil includes surface copper foil and bottom copper foil, and at least one layer is provided with BGA pads.

[0036] As a preferred embodiment, in S1, a middle CCL core board and two independent core boards are cut according to the panel size as auxiliary core boards; the middle CCL core board is copper-clad on both sides; the two independent core boards are used to form the L2 and L5 auxiliary layers respectively; the surface copper foil and the bottom copper foil are used to form the L1 and L6 outer layers respectively.

[0037] S2, a wire pattern is etched on the auxiliary core board using a pattern transfer process, the wire pattern including BGA fan-out wires; an inner layer reference pattern is etched on the intermediate core board.

[0038] As a preferred embodiment, in S2, inner layer patterns L3 and L4 are etched on the copper foils on both sides of the middle CCL core board, respectively; L2 and L5 clamping patterns are etched on the two independent core boards, respectively; the L2 and L5 clamping patterns include BGA fan-out clamping lines.

[0039] S3, roughen the copper surface of each core board.

[0040] S4, the surface copper foil, the bottom copper foil, the auxiliary core board and the intermediate core board are laminated with the prepreg and pressed together to form a multilayer board; the auxiliary core board is located in the adjacent layer of the surface or bottom layer.

[0041] As a preferred embodiment, in S4, the layers are stacked and pressed together in the following order: surface copper foil, PP prepreg, L2 auxiliary core board, PP prepreg, middle CCL core board, PP prepreg, L5 auxiliary core board, PP prepreg, and bottom copper foil, forming a 6-layer board; the two sides of the middle CCL core board are etched as L3 and L4 inner layers, respectively.

[0042] S5, drill through-holes through the multilayer board according to the BGA array design position.

[0043] S6 involves applying copper plating and full-board electroplating to the walls and surface of the through holes to metallize them.

[0044] S7, an outer layer circuit pattern is formed by etching on the surface copper foil and the bottom copper foil using a pattern transfer process. A hole ring is etched to form a pad corresponding to the via position in the surface BGA area, and no interlocking lines are etched between the pads in the surface BGA area.

[0045] S8, in sequence, performs solder mask fabrication, character printing, surface treatment, and molding.

[0046] As a preferred embodiment, in S8, a solder resist layer is coated on the surface of the top layer and the bottom layer and exposed and developed; the solder resist layer is exposed by opening windows at the pad locations.

[0047] Specifically, the BGA wire clamping processing method shown in this embodiment mainly includes the following processing steps.

[0048] (1) Cutting: Cut the middle CCL core board, two independent core boards and two outer copper foils according to the panel size; the thickness of the middle CCL core board is 1.0mm, and the copper thickness on both sides is 1 / 2oz; the thickness of the two independent core boards is 0.2mm, and the copper thickness on one or both sides is 1 / 2oz; the thickness of the two outer copper foils is 1 / 2oz; the copper foils on both sides of the middle CCL core board are used to form the L3 and L(N-2) inner layers respectively; the two independent core boards are used to form the L2 and L(N-1) auxiliary layers respectively; the outer copper foils are used to form the L1 and LN outer layers respectively; among them, L1 and LN are the surface layer and the bottom layer, L2 and L(N-1) are auxiliary layers, and L3 and L(N-2) are intermediate reference layers.

[0049] (2) Auxiliary layer pattern fabrication: The pattern transfer process is used to fabricate the clamping pattern on two independent core boards respectively; the two independent core boards are pre-treated, coated with photosensitive ink, exposed and developed in sequence to expose the clamping patterns of L2 and L(N-1), which include BGA fan-out clamping patterns; the copper layer in the non-patterned area is removed by acid etching, and the L2 and L(N-1) auxiliary layer circuits are obtained after stripping; the L2 and L(N-1) auxiliary layers do not have complete hole rings at the corresponding preset via design positions; after the auxiliary layer etching is completed, AOI inspection and line width measurement are performed to confirm that the clamping line width and spacing meet the design specifications, and the defect-free products are sent to the next process.

[0050] (3) Intermediate layer pattern fabrication: The L3 and L(N-2) inner layer patterns are etched on the copper foils on both sides of the intermediate CCL core board respectively; the copper layer in the non-patterned area is removed by acid etching, and the L3 and L(N-2) intermediate layer circuits are obtained after stripping.

[0051] (4) Browning: Micro-etching, acid washing and browning treatment are performed on the copper surface of each core board; the browning solution is used to treat the copper surface for 1 to 3 minutes at 40°C to 60°C to form a micro-rough structure and enhance the interlayer bonding force.

[0052] (5) Lamination: The boards are stacked in the following order: L1 outer copper foil, PP prepreg, L2 independent core board, PP prepreg, intermediate CCL core board, PP prepreg, L(N-1) independent core board, PP prepreg, and LN outer copper foil. During stacking, each core board and copper foil is aligned with positioning pins, and the alignment accuracy between layers is controlled within ±0.05mm. The boards are fed into a vacuum laminator, preheated, prepressed, and hot-pressed. The hot-pressing temperature is controlled between 180℃ and 220℃, the pressure is controlled between 300psi and 500psi, and the holding time is controlled between 60min and 90min. The PP prepreg melts and fills the gaps between layers, and solidifies after cooling to form the N-layer board body. The etched layers on both sides of the intermediate CCL core board constitute the intermediate layers of L3 and L(N-2), respectively. The independent core boards of L2 and L(N-1) are symmetrically distributed with the intermediate CCL core board as the center. N is an even number not less than 6.

[0053] (6) Drilling: According to the BGA array design coordinates, a CNC drilling machine is used to drill through holes on the N-layer board body; when drilling, the optical positioning system is used to align with the target on the edge of the board, and the hole position accuracy is controlled within ±0.025mm; the drilling speed is controlled between 80krpm and 120krpm, and the feed speed is controlled between 0.5m / min and 1.5m / min; the through holes penetrate through each layer from L1 to LN and the middle CCL core board.

[0054] (7) Copper plating: The N-layer board body is treated to remove adhesive residue, and then a thin layer of copper is deposited on the board surface and the wall of the through hole by chemical copper plating. The copper plating thickness is controlled between 0.5μm and 1.5μm; the wall of the through hole is metallized to realize the electrical connection between the L1 to LN layers; after copper plating, a backlight test is performed to check the integrity of the copper layer coverage on the hole wall. The backlight level is greater than 9.

[0055] (8) Full-board electroplating: Electroplating is performed on the N-layer board body in a full-board electroplating manner. The copper layer on the hole wall and the outer copper surface of L1 and LN are thickened on the basis of the copper plating layer. The electroplating current density is controlled between 1.0ASD and 2.0ASD, and the electroplating time is controlled between 20min and 40min. The hole wall copper layer is thickened to 5μm to 8μm, and the outer copper surface of L1 and LN is thickened to the required design thickness. During electroplating, the board edge is clamped by a fixture, and the electroplating current is directly introduced into the outer copper foil.

[0056] (9) Outer layer circuit: Dry or wet film is attached to the outer copper foil of L1 and LN, and the outer layer circuit pattern is formed after exposure and development; the hole rings corresponding to the via positions of the surface BGA area are etched as pads, and no inter-wires are etched between the pads; the copper layer outside the outer layer circuit pattern is removed by acid etching, and the etching solution uses a copper chloride system. The amount of side etching is controlled during the etching process; the L1 and LN outer layer circuits are obtained after the film is removed; after the outer layer etching is completed, the outer layer AOI is checked to confirm that the pads are free of defects and residual copper.

[0057] (10) Post-processing: The entire L1 and LN surfaces are screen-printed with solder resist ink, and the ink thickness is controlled between 15μm and 25μm; windows are formed at the pad positions by exposure and development, and the window size and the alignment accuracy with the pads are controlled within ±0.02mm; then the characters are screen-printed, surface treated and CNC milled; the surface treatment adopts immersion gold or tin spraying process to form a solderable coating on the exposed pad surface; the shape tolerance is controlled within ±0.1mm; after forming, the BGA-lined printed circuit board is obtained.

[0058] The BGA-interface printed circuit board product prepared in this embodiment includes an N-layer board body; such as Figure 2 As shown, the N-layer board body consists of the following layers laminated sequentially: L1 outer layer, PP prepreg, L2 auxiliary layer, PP prepreg, L3 intermediate layer, intermediate CCL core board, L(N-2) intermediate layer, PP prepreg, L(N-1) auxiliary layer, PP prepreg, LN outer layer, and the outermost SM solder mask layer. The L3 intermediate layer is the copper foil etched layer on the upper surface of the intermediate CCL core board, and the L(N-2) intermediate layer is the copper foil etched layer on the lower surface of the intermediate CCL core board. The L2 auxiliary layer and the L(N-1) auxiliary layer are symmetrically distributed with the intermediate CCL core board as the center. Through holes penetrate L1, PP, L2, PP, and L3. The structure consists of a CCL core board, layers L(N-2), PP, L(N-1), PP, and LN. The outer layers of L1 and LN have BGA pads, which are etched rings on the outer copper foil. The BGA pads are coaxially aligned with the vias, and the diameter of the BGA pads is larger than the diameter of the vias. The auxiliary layers L2 and L(N-1) are wire-clamping layers with BGA fan-out wires. The auxiliary layers L2 and L(N-1) do not have complete rings at the via locations; the wires are electrically connected to the via walls through a partial connection structure attached to the via wall. The SM solder mask layer on the outer layers of L1 and LN is exposed at the BGA pad locations.

[0059] When N>6, at least one independent core board can be added as an additional intermediate layer between the intermediate CCL core board and the L2 auxiliary core board, and / or between the intermediate CCL core board and the L(N-1) auxiliary core board, and more layers of N-layer board body can be formed by pressing PP semi-cured sheet.

[0060] like Figure 3 As shown, in the vertical projection direction, the outer diameter of adjacent BGA pads is 0.35mm, the diameter of vias is 0.25mm, and the center distance between adjacent BGA pads is 0.5mm; the clamping patterns of the L2 and L(N-1) auxiliary layers are located within the projection gap of adjacent BGA pads, the clamping width is 0.05mm, and the distance between the clamping pattern and the outer edge of the BGA pad projection is 0.05mm; since the clamping is set in the auxiliary layer, no clamping is arranged between the surface and bottom BGA pads, and only the hole ring structure is retained in the surface and bottom pad areas.

[0061] This embodiment achieves functional layering of the BGA fan-out traces by placing them on an auxiliary layer. Only pads are etched on the surface and bottom layers, and no traces are etched between the pads. The surface BGA area no longer serves as a trace, the pad spacing is increased, and the pad soldering reliability is improved. After the traces are transferred to the auxiliary layer, there are no pads occupying space on the auxiliary layer, the hole and line spacing can be relaxed to the design requirements, and the etching returns to the normal capability range. The overall processing uses traditional process equipment, and the traditional process can be used to produce ultra-high density BGA trace printed circuit boards.

[0062] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0063] The above embodiments merely illustrate several implementation methods of the present invention, and their descriptions are relatively specific and detailed, but they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

Claims

1. A BGA-interface printed circuit board, characterized in that, It includes a surface layer, a bottom layer and at least one auxiliary layer, wherein at least one of the surface layer and the bottom layer has BGA pads, and no wires are provided between the BGA pads of the surface layer and the bottom layer; The auxiliary layer is located adjacent to the surface layer or the bottom layer, and the auxiliary layer is provided with BGA fan-out clamps; The printed circuit board is provided with through holes that penetrate the surface layer, the auxiliary layer and the bottom layer. The walls of the through holes are metallized to achieve electrical connection between the BGA pads and the BGA fan-out clamps.

2. The BGA-interface printed circuit board according to claim 1, characterized in that, There are two auxiliary layers, which are symmetrically distributed with the intermediate core board as the center; the intermediate core board is located between the two auxiliary layers.

3. The BGA-interface printed circuit board according to claim 1, characterized in that, PP semi-cured sheets are provided between the surface layer and the adjacent auxiliary layer, as well as between adjacent layers.

4. The BGA-interface printed circuit board according to claim 1, characterized in that, The diameter of the BGA pad is 0.35 mm; the diameter of the via is 0.25 mm; the center distance between adjacent BGA pads is 0.5 mm; and the line width of the auxiliary layer is 0.05 mm.

5. The BGA-interface printed circuit board according to claim 4, characterized in that, The auxiliary layer clamping line pattern is located within the gap between adjacent through-hole projections; the distance between the auxiliary layer clamping line pattern and the outer edge of the through-hole projection is 0.05mm.

6. A method for processing a BGA-interface printed circuit board, suitable for ultra-high density BGA applications, characterized in that, Includes the following steps: S1, cut multiple core boards and outer copper foil according to the preset panel size; the multiple core boards include at least one auxiliary core board and an intermediate core board; the outer copper foil includes a surface copper foil and a bottom copper foil; S2, a wire clamping pattern is etched on the auxiliary core board by a pattern transfer process, the wire clamping pattern including BGA fan-out wire clamping; an inner layer reference pattern is etched on the intermediate core board. S3, roughen the copper surface of each core board; S4, the surface copper foil, bottom copper foil, auxiliary core board and intermediate core board are laminated and pressed with the prepreg to form a multilayer board; the auxiliary core board is located in an adjacent layer of the surface layer or the bottom layer; S5, Drill through holes through the multilayer board according to the BGA array design position; S6, perform copper plating and full-board electroplating on the hole wall and board surface of the through hole to metallize the through hole; S7, an outer layer circuit pattern is formed by etching on the surface copper foil and the bottom copper foil using a pattern transfer process. A hole ring is etched in the surface BGA area corresponding to the via position as a pad, and no interlocking wires are etched between the pads in the surface BGA area. S8, in sequence, performs solder mask fabrication, character printing, surface treatment, and molding.

7. A method for processing a BGA-interface printed circuit board according to claim 6, characterized in that, In S1, the middle CCL core board and two independent core boards are cut out according to the panel size as auxiliary core boards; The intermediate CCL core board is copper-clad on both sides; The two independent core boards are used to form auxiliary layers L2 and L(N-1), respectively; The surface copper foil and the bottom copper foil are used to form the L1 and LN outer layers, respectively.

8. A method for processing a BGA-interface printed circuit board according to claim 7, characterized in that, In S2, L3 and L(N-2) inner layer patterns are etched on the copper foils on both sides of the intermediate CCL core board, respectively; L2 and L(N-1) clamping line patterns are etched on the two independent core boards, respectively.

9. A method for processing a BGA-interface printed circuit board according to claim 8, characterized in that, In S4, the outer copper foil, PP prepreg, L2 auxiliary core board, PP prepreg, middle CCL core board, PP prepreg, L(N-1) auxiliary core board, PP prepreg, and bottom copper foil are stacked and pressed together to form an N-layer board; the two sides of the middle CCL core board are etched as L3 and L(N-2) inner layers respectively; where N is an even number not less than 6.

10. A method for processing a BGA-interface printed circuit board according to claim 6, characterized in that, In S8, a solder resist layer is coated on the surface of the top layer and the bottom layer and exposed and developed; the solder resist layer is exposed by opening windows at the pad positions.

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