A printed circuit board compensation plating method based on graphic density zoning

Abstract

The application relates to the field of printed circuit board electroplating technology, in particular to a printed circuit board compensation electroplating method based on pattern density zoning. Production data of a printed circuit board with to-be-plated conductive patterns are acquired, and pattern load areas are divided according to copper density variation and pattern boundary; overplating tendency and whole-board pattern load contrast are determined according to the copper density of each area, the conductive boundary density, the density difference of adjacent areas and the plate edge distance; the target selective inhibition coefficient interval of the electroplating solution is determined accordingly, and at least one of the inhibitors, the leveling agents and the accelerators is adjusted, so that the actual selective inhibition coefficient is located in the target interval; then the selective adsorption establishment stage and the main copper layer thickening stage are sequentially executed. The application can reduce the copper thickness difference between dense lines, sparse lines, large copper surfaces and plate edge lines, and improve the pattern electroplating uniformity and continuous production stability.

Description

Technical Field

[0001] This application relates to the field of printed circuit board electroplating technology, and in particular to a printed circuit board compensation electroplating method based on pattern density partitioning. Background Technology

[0002] After the printed circuit board (PCB) undergoes film lamination, exposure, and development, the board surface typically exhibits various conductive patterns to be plated, including dense lines, sparse lines, large copper areas, isolated pads, and edge lines. Due to differences in copper density, conductive pattern boundary length, and distance from the board edge in each area, the local current distribution during electroplating varies significantly. Sparse lines, isolated pads, and edge lines are prone to current concentration, leading to excessively thick copper layers, widening of the line tops, or edge nodules. Dense lines and large copper areas, on the other hand, may result in insufficient current per unit area of ​​plating, leading to lower copper thickness.

[0003] Current pattern plating processes typically set the average current density based on the total area to be plated on the entire board, or improve copper thickness uniformity through fixed baffles, shielding structures, and empirical plating times. This makes it difficult to adapt to different board types and local pattern variations within the same board surface. Furthermore, leveling agents, inhibitors, and accelerators are usually maintained at fixed concentrations or ampere-hours, failing to match the selective inhibition capabilities of the agents in high and low current regions to the specific pattern load differences of the board type. Therefore, a compensatory plating method is needed that can correlate the printed circuit board pattern characteristics, the state of the plating solution agents, and the phased plating conditions. Summary of the Invention

[0004] This application provides a printed circuit board compensation electroplating method based on pattern density partitioning to solve the above problems. The method includes:

[0005] Obtain production data of a printed circuit board with conductive patterns to be plated, and divide the printed circuit board into multiple pattern load areas based on the copper density variation and pattern boundaries of the conductive patterns to be plated.

[0006] Based on the copper density, conductive boundary density, density difference between adjacent areas and board edge distance of each pattern load area, the overplating tendency of each pattern load area is determined, and the overall pattern load contrast is determined based on the overplating tendency distribution of each pattern load area.

[0007] The target selective inhibition coefficient range of the electroplating solution is determined based on the overall plate pattern load contrast. The actual selective inhibition coefficients of the current electroplating solution for high local current regions and low local current regions are obtained. At least one of the inhibitors, leveling agents and accelerators in the current electroplating solution is adjusted so that the actual selective inhibition coefficients are within the target selective inhibition coefficient range.

[0008] The printed circuit board is placed in the adjusted electroplating solution, and the selective adsorption establishment stage and the main copper layer thickening stage are performed sequentially. The average current density and / or processing time of the selective adsorption establishment stage are determined according to the overall pattern load contrast of the board. The average current density of the main copper layer thickening stage is higher than the average current density of the selective adsorption establishment stage.

[0009] Optionally, the pattern load area includes at least three of the following: dense line area, sparse line area, large copper area, isolated pad area, board edge line area, and pattern density abrupt change area.

[0010] The pattern density abrupt change region is a strip-shaped region located on both sides of the boundary line of the two adjacent pattern load regions and no more than 5 mm away from the boundary line when the difference in copper density between two adjacent pattern load regions is not less than 15 percentage points.

[0011] Optionally, regions with a pattern load density that is less than 80% of the average copper density of the entire board and a conductive boundary density that is more than 120% of the average conductive boundary density of the entire board are identified as regions with a high overplating tendency.

[0012] The patterned load area with a copper cladding density higher than 120% of the average copper cladding density of the entire board and a conductive boundary density lower than 80% of the average conductive boundary density of the entire board is identified as a low deposition tendency area.

[0013] Sparse line areas or isolated pad areas no more than 10mm from the edge of the printed circuit board are defined as areas where the board edge is higher than the plating tendency.

[0014] Optionally, the actual selective suppression coefficient is determined by a standard pattern response test piece, which includes a dense line test area and a sparse line test area, and the difference between the total areas to be plated in the two test areas does not exceed 5% of the larger total area to be plated.

[0015] Using the aforementioned electroplating solution, at an electroplating solution temperature of 22–28°C and an A / dm³ / dt, 2 Under the same average current density and the same electroplating solution cycling conditions, the standard pattern response test piece was electroplated for 30–90 s;

[0016] At least five measurement points are selected in the dense line test area and the sparse line test area respectively to determine the average copper thickness increment of the two test areas, and the ratio of the average copper thickness increment of the dense line test area to the average copper thickness increment of the sparse line test area is determined as the actual selective suppression coefficient.

[0017] Optionally, when the actual selective inhibition coefficient is lower than the lower limit of the target selective inhibition coefficient range, a leveling agent is first added to the current electroplating solution; if the actual selective inhibition coefficient is still lower than the lower limit after adding the leveling agent and retesting, an inhibitor is then added.

[0018] When the actual selective inhibition coefficient is higher than the upper limit of the target selective inhibition coefficient range, stop adding the leveling agent and add an accelerator to the current electroplating solution;

[0019] The total replenishment amount is determined based on the effective volume of the electroplating tank and the deviation between the actual selective inhibition coefficient and the target selective inhibition coefficient range. The initial replenishment amount is 40% to 70% of the total replenishment amount, and the remaining replenishment amount is added in one or more batches based on the retest results. The last replenishment amount is the remaining replenishment amount. After each replenishment, the current electroplating solution is circulated for 5 to 20 minutes, and the standard graphic response test piece is electroplated again until the actual selective inhibition coefficient is within the target selective inhibition coefficient range.

[0020] Optionally, the selective adsorption establishment stage is carried out at an electroplating bath temperature of 20–30°C, using an average current density of 0.2–0.8 A / dm³. 2 The processing time is 20–120 seconds for either direct current or unidirectional pulse current.

[0021] When the unidirectional pulse current is used, the pulse duty cycle is 20% to 60% and the pulse frequency is 1 to 50 Hz.

[0022] Optionally, after completing the selective adsorption establishment phase, the average current density is increased to 1.0–3.0 A / dm³. 2 To perform the main copper layer thickening stage;

[0023] The average current density during the copper layer thickening stage is 2 to 8 times that during the selective adsorption establishment stage, and electroplating is performed using direct current, unidirectional pulse current, or periodic commutation pulse current until the average copper layer thickness of the conductive pattern to be plated reaches 15 to 35 μm.

[0024] Optionally, during the selective adsorption establishment stage and the main copper layer thickening stage, the electroplating solution is continuously circulated, and the printed circuit board is moved back and forth in a direction perpendicular to the surface of the electroplating solution.

[0025] The flow rate of the electroplating solution on the board surface during the selective adsorption establishment stage is 0.1–0.4 m / s, and the flow rate of the electroplating solution on the board surface during the main copper layer thickening stage is 0.3–0.8 m / s.

[0026] The reciprocating speed of the printed circuit board during the main copper layer thickening stage is 1.2 to 2.5 times that of the reciprocating speed of the printed circuit board during the selective adsorption establishment stage.

[0027] Optionally, after completing the main copper layer thickening stage, at least five measurement points are selected in the dense line area, sparse line area and board edge line area respectively to detect the copper layer thickening amount, and the average copper layer thickening amount of each measurement point is determined as the regional copper layer thickening amount of the corresponding area.

[0028] The sparse circuit region and the edge circuit region are compared with the dense circuit region, and the region with the larger absolute value of the copper thickness difference is identified as the deviation target region. When the absolute values ​​of the copper thickness difference are equal, the edge circuit region is identified as the deviation target region. When the copper plating thickness increase of the deviation target region is higher than that of the dense circuit region, and the difference between the two is greater than 3 μm, the leveling agent replenishment amount of the next batch of the same type of production is increased by 5% to 15%, and / or the processing time of the selective adsorption establishment stage is extended by 10 to 30 seconds.

[0029] When the increase in copper plating thickness in the target deviation area is lower than that in the dense circuit area, and the difference between the increase in copper plating thickness in the dense circuit area and the increase in copper plating thickness in the target deviation area is greater than 3 μm, the leveling agent replenishment amount in the next production batch of the same type will be reduced by 5% to 15%, and / or the processing time of the selective adsorption establishment stage will be shortened by 10 to 30 seconds; the benchmark for the increase or decrease is the benchmark replenishment amount of leveling agent for the corresponding maintenance cycle of the previous production batch of the same type.

[0030] Optionally, the next production batch of the same type is a production batch that uses the same printed circuit board pattern data, the same panelization method and the same target electroplating thickness.

[0031] Based on the adjusted leveling agent replenishment amount and / or the processing time of the selective adsorption establishment stage, the next batch of the same type of production is subjected to compensatory electroplating, and the increase in copper plating thickness in the dense line area, sparse line area and board edge line area is re-inspected after the electroplating is completed.

[0032] When the absolute value of the copper thickness difference between the sparse line area and the dense line area, and the absolute value of the copper thickness difference between the board edge line area and the dense line area are both no greater than 3μm, the current leveling agent replenishment amount and the processing time of the selective adsorption establishment stage are maintained for subsequent electroplating processing of the same printed circuit board.

[0033] Through the above technical solution, this application has the following beneficial effects:

[0034] This application not only determines the overplating tendency of each pattern area based on the area of ​​copper to be plated, but also combines the conductive boundary density, density difference between adjacent areas and board edge position. It can identify line areas with similar areas to be plated but different pattern topologies, thus improving the accuracy of compensation object identification.

[0035] The target selective inhibition coefficient range is determined based on the overall pattern load contrast. By adjusting the working state of inhibitors, leveling agents, and accelerators, the actual production plating solution is matched with the specific printed circuit board type, avoiding reliance solely on fixed reagent concentrations or empirical replenishment amounts.

[0036] The selective adsorption stage with low average current density establishes a differentiated inhibition state for the reagent in sparse lines, isolated pads, board edge lines, and areas with abrupt changes in pattern density. Then, the deposition efficiency is improved through the thickening stage of the main copper layer with higher average current density, achieving synergistic compensation between the reagent state and the current process.

[0037] It can suppress excessive thickening of sparse lines and edge lines, while improving the relative under-deposition of dense lines and large copper areas, reducing the copper thickness difference between different patterned load areas, and reducing defects such as line top widening, copper nodules, and board edge roughness. In the embodiment, the maximum copper thickness difference between different patterned areas can be controlled within 1.1 to 1.4 μm.

[0038] Based on the copper thickness test results of the actual production boards, the amount of leveling agent added and the selective adsorption establishment time can be adjusted for subsequent production batches with the same graphic data, panelization method and target electroplating thickness. This can form stable process parameters suitable for continuous processing of the same board type and improve the consistency between batches. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the accompanying drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 A flowchart illustrating the overall process of a printed circuit board compensation electroplating method based on pattern density partitioning, provided in an embodiment of this application.

[0041] Figure 2 A schematic diagram illustrating the division of the patterned load area on a printed circuit board according to an embodiment of this application;

[0042] Figure 3 A schematic diagram of the structure of a standard graphic response test piece provided in an embodiment of this application;

[0043] Figure 4 This is a flowchart of electroplating solution selective inhibition state detection and reagent response adjustment provided in one embodiment of this application;

[0044] Figure 5 A schematic diagram of a two-stage compensation electroplating process provided in an embodiment of this application, wherein, Figure 5 (a) is a schematic diagram of the selective adsorption establishment stage. Figure 5 (b) is a schematic diagram of the main copper layer thickening stage;

[0045] Figure 6 A flowchart illustrating the feedback adjustment process for a similar production batch provided in one embodiment of this application. Detailed Implementation

[0046] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.

[0047] Furthermore, the term "and / or" in this article is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, the character " / " in this article, unless otherwise specified, generally indicates that the preceding and following related objects have an "or" relationship.

[0048] The embodiments of this application will now be described in further detail with reference to the accompanying drawings.

[0049] The following description, in conjunction with the technical solution of this application, further illustrates a method for compensating electroplating of printed circuit boards based on pattern density partitioning. It should be noted that the following embodiments are used to illustrate the technical principles and implementation process of this application and are not intended to limit the scope of protection of this application. Printed circuit board pretreatment, pattern transfer, electroplating equipment operation, and copper thickness detection steps not specifically described can be completed using conventional processes in the art.

[0050] The printed circuit board processed in this embodiment is a production board that has already undergone film lamination, exposure, and development, and has formed conductive patterns to be plated on its surface. The conductive patterns to be plated include circuits to be plated, pads to be plated, large copper surfaces, process conductive edges, and other copper surfaces that are connected to the electroplating power supply. After undergoing at least one conventional pattern pre-plating treatment of degreasing, micro-etching, pickling, and water washing, the printed circuit board enters the compensation electroplating process of this embodiment.

[0051] This implementation method mainly includes acquiring the pattern data to be plated, dividing the pattern load area, determining the pattern load contrast of the whole board, detecting the selective inhibition state of the electroplating solution, adjusting the reagent response, establishing selective adsorption, thickening the main copper layer, detecting the copper thickness, and adjusting the feedback from similar production batches.

[0052] I. Acquisition of Graphic Data to be Plated

[0053] Obtain the production data of the printed circuit board to be patterned and electroplated. The production data may be derived from Gerber data, ODB++ data, CAM engineering data, or other data that can represent the position and size of the conductive pattern to be plated, used for pattern transfer of the printed circuit board.

[0054] Production data should include at least:

[0055] The production board's external dimensions, panel boundaries, location of circuits to be plated, location of solder pads to be plated, location of large copper surfaces, location of anti-plating film openings, location of process conductive edges, and location of clamping areas.

[0056] Production data is preprocessed to remove characters, solder mask graphics, positioning marks, and non-conductive graphics that are not involved in this plating process. For process edges, test leads, and auxiliary conductive strips, their inclusion in the conductive pattern to be plated is determined based on whether they are connected to the plating power supply.

[0057] This embodiment uses the copper surface that is actually exposed and participates in electroplating after development as the object of pattern analysis, rather than directly using the area of ​​the final finished circuit as the area to be plated, so that the pattern analysis results correspond to the actual electroplating state.

[0058] II. Division of Graphic Load Area

[0059] Based on the changes in copper density and the boundaries of the conductive patterns to be plated, the printed circuit board surface is divided into multiple pattern load areas.

[0060] In one implementation, the printed circuit board surface is first divided into multiple initial analysis units according to a preset initial size, and then the projected area, total boundary length and distance to the edge of the production board of the conductive pattern to be plated in each initial analysis unit are calculated respectively.

[0061] When any initial analysis unit contains multiple graphic portions with significantly different copper density, the initial analysis unit is further subdivided. When the copper density and conductive boundary density of adjacent analysis units are within the same preset range, the adjacent analysis units can be merged. This results in graphic load regions with relatively consistent internal graphic distribution and identifiable differences in graphic load between adjacent areas.

[0062] The resulting pattern load regions include at least three of the following: dense line regions, sparse line regions, large copper surface regions, isolated pad regions, board edge line regions, and regions with abrupt changes in pattern density.

[0063] in:

[0064] A densely packed line area refers to an area with multiple lines to be plated distributed within a unit area, and the spacing between adjacent lines is relatively small.

[0065] Sparse circuit area refers to an area with a relatively small number of circuits or pads to be plated and a relatively low proportion of copper surface area to be plated per unit area.

[0066] The large copper surface area refers to an area consisting mainly of continuous copper surfaces to be plated, and where the area of ​​the continuous copper surface reaches the preset proportion of the corresponding area.

[0067] An isolated pad area refers to an area where multiple pads to be plated are distributed in an insulating space, spaced apart from each other.

[0068] The board edge circuit area refers to the area where the circuit to be plated or the pad to be plated is located no more than the preset board edge distance from the edge of the production board.

[0069] A pattern density abrupt change region refers to a strip-shaped region located on both sides of the boundary line of two adjacent pattern load regions and not more than a preset influence distance from the boundary line when the difference in copper density between two adjacent pattern load regions is not less than a preset density difference threshold.

[0070] In one optional embodiment, the preset density difference threshold is 15 percentage points, and the preset influence distance is 5 mm, meaning that the strip-shaped area within 5 mm on both sides of the boundary line is considered as the pattern density abrupt change area. These values ​​can be adjusted according to the printed circuit board size, the fineness of the circuit lines, and the electric field distribution within the electroplating bath.

[0071] III. Determination of Graphic Load Parameters and Overplating Tendency

[0072] For each patterned load area, the copper density, conductive boundary density, density difference between adjacent areas, and board edge distance are determined separately.

[0073] The copper plating density is the ratio of the projected area of ​​the conductive pattern to be plated within the corresponding pattern load area to the area of ​​the pattern load area. The average copper plating density of the entire board is the ratio of the total projected area of ​​the conductive patterns to be plated within all effective analysis areas to the total area of ​​the effective analysis areas.

[0074] The conductive boundary density is the ratio of the total length of the boundaries of the circuits, pads, and copper surfaces to be plated within the corresponding pattern load area to the area of ​​the pattern load area. The average conductive boundary density of the entire board is the ratio of the total length of the boundaries of the conductive patterns to be plated within all effective analysis areas to the total area of ​​the effective analysis areas; the effective analysis area is the board surface area participating in this pattern electroplating and used for pattern load analysis, excluding the clamping area and the process edge area that is not connected to the electroplating power supply.

[0075] The density difference between adjacent regions is the absolute value of the difference between the copper density of the corresponding graphic load region and the area-weighted average copper density of the adjacent graphic load regions within 5 mm of its boundary; when there are multiple adjacent graphic load regions, the area of ​​each adjacent graphic load region within the 5 mm neighborhood is used as the weight.

[0076] The plate edge distance is the minimum distance from the conductive pattern to be plated within the corresponding graphic load area to the edge of the production plate.

[0077] The overplating tendency of each pattern load area is determined based on the above pattern load parameters.

[0078] In one embodiment, a patterned load region with a copper density lower than 80% of the average copper density of the entire board and a conductive boundary density higher than 120% of the average conductive boundary density of the entire board is defined as a region with a high overplating tendency.

[0079] Patterned load areas with copper cladding density higher than 120% of the average copper cladding density of the entire board and conductive boundary density lower than 80% of the average conductive boundary density of the entire board are identified as low deposition tendency areas.

[0080] Sparse circuit areas or isolated pad areas no more than 10mm from the edge of the production board are identified as areas where the board edge tends to be higher than the plating thickness. Among them, the circuit area at the board edge belongs to the pattern load area type, and the circuit area or isolated pad area at the board edge that meets the aforementioned distance and pattern conditions is further identified as an area where the board edge tends to be higher than the plating thickness.

[0081] When the patterned load area does not meet the above criteria for determining a high over-plating tendency area or a low deposition tendency area, it is identified as a conventional patterned load area.

[0082] It should be noted that the above ratio is used to provide one feasible method for regional classification. In other implementations, the regional determination threshold can be calibrated based on the production board size, line width, line spacing, target copper thickness, and historical copper thickness data of the production line.

[0083] Based on the overplating tendency distribution of each pattern load area, the overall pattern load contrast of the printed circuit board is determined. The overall pattern load contrast is used to characterize the pattern load differences between areas with high overplating tendency, areas with normal pattern load, and areas with low deposition tendency in the same production board.

[0084] The overall graphic load contrast can be represented using a pre-defined hierarchy. For example, the graphic load distribution can be divided into low contrast level, medium contrast level, and high contrast level.

[0085] In one feasible method for determining the contrast rating, the difference between the maximum and minimum values ​​of the copper density in each patterned load area is first determined, and the proportion of the total area of ​​areas with high overplating tendency (including areas with high overplating tendency at the board edge) to the total area of ​​the effective analysis area is calculated. When the difference between the maximum and minimum values ​​is less than 20 percentage points, the total area proportion is less than 5%, and there are no areas with high overplating tendency at the board edge, it is determined to be a low contrast rating. When the difference between the maximum and minimum values ​​is not less than 40 percentage points, or the total area proportion is not less than 15%, or both areas with high overplating tendency at the board edge and areas with low deposition tendency exist simultaneously, it is determined to be a high contrast rating. All other cases are determined to be medium contrast ratings.

[0086] IV. Determination of the target selectivity inhibition coefficient range

[0087] Based on the overall pattern load contrast, the target selective suppression coefficient range for pattern electroplating of the printed circuit board is determined.

[0088] The target selectivity inhibition coefficient range is used to represent the degree of differential inhibition of the electroplating solution on high local current regions and low local current regions.

[0089] When the overall pattern load contrast of a printed circuit board is low, a lower selective suppression target is used to avoid over-suppression of sparse line areas or isolated pad areas.

[0090] When the overall board pattern load contrast is high, the target selectivity suppression degree is improved, which enhances the relative suppression effect of the electroplating solution on sparse line areas, isolated pad areas, board edge line areas, and areas with abrupt changes in pattern density.

[0091] In one optional calibration result, the total range of target selective suppression coefficients for low contrast level, medium contrast level, and high contrast level are 0.82–0.94, 0.88–1.00, and 0.92–1.04, respectively. For a specific electroplating production line, a continuous sub-interval is selected from the corresponding total range as the target selective suppression coefficient interval through standard printed circuit board tests. During production, the corresponding target interval is selected according to the contrast level of the printed circuit board to be processed.

[0092] V. Composition of Electroplating Solution

[0093] The electroplating solution used in this embodiment is an acidic copper plating solution suitable for electroplating printed circuit board patterns.

[0094] The electroplating solution includes a copper ion source, an acidic conductive medium, chloride ions, and a group of organic additives.

[0095] The copper ion source can be copper sulfate or other soluble copper salts that can provide copper ions in acidic electroplating solutions.

[0096] Sulfuric acid can be used as an acidic conductive medium.

[0097] The organic additive group includes at least inhibitors, leveling agents, and accelerators.

[0098] Inhibitors are used to form an adsorption layer on the copper-to-plate surface of a printed circuit board, reducing the local copper deposition rate and improving copper layer uniformity. The inhibitor may include at least one of polyether compounds, polyoxyethylene compounds, and polyoxyethylene-polyoxypropylene block copolymers.

[0099] Leveling agents are used to enhance the relative suppression of regions with high local current. The leveling agent may include at least one of nitrogen-containing heterocyclic compounds, quaternary ammonium-containing compounds, and cationic polymers.

[0100] Accelerators are used to promote copper nucleus formation and copper layer growth. The accelerators may include at least one of sulfur-containing organic compounds, disulfide compounds, mercapto derivatives, and sulfonic acid sulfides.

[0101] The electroplating solution may also include a wetting agent to reduce the adhesion of air bubbles in the edges of the circuit, the gaps between the pads, or the micro-recesses.

[0102] This application does not limit itself to a specific additive structure, but rather adjusts the working state of inhibitors, leveling agents, and accelerators to match the actual selective inhibition coefficient of the electroplating solution with the target selective inhibition coefficient range of the printed circuit board to be processed.

[0103] VI. Standard Graphical Response Test Piece

[0104] To determine the actual selective inhibition coefficient of the current electroplating solution, a standard graphic response test piece was set up.

[0105] The standard pattern response test piece is a printed circuit board test piece with a pattern to be plated with copper, including a dense line test area and a sparse line test area.

[0106] The dense circuit test area includes multiple parallel fine circuits to be plated, with a preset spacing between adjacent fine circuits. The sparse circuit test area includes a smaller number of spaced circuits or pads to be plated.

[0107] The difference in the total area to be plated between the dense line test area and the sparse line test area shall not exceed 5% of the larger total area to be plated, thereby reducing the impact of the difference in the total area to be plated on the test results and making the test results mainly reflect the influence of the pattern distribution on the copper deposition state.

[0108] Before testing, the initial copper thickness of the two test areas is measured separately, or the test pieces are made from the same batch of substrates so that the two test areas have the same or similar initial copper thickness.

[0109] Using the current electroplating solution, at a plating temperature of 22–28°C and an A / dm³ / dt, 2 Under the same average current density and the same electroplating solution cycling conditions, the standard graphic response test piece was subjected to electroplating tests for 30–90 seconds.

[0110] After the electroplating test is completed, the test piece is washed and dried. At least five measurement points are selected in the dense line test area and the sparse line test area respectively, and the copper thickness increment at each measurement point is detected.

[0111] Measurement points in each test area should be evenly distributed, avoiding test piece clamping points, process edges, and obvious defect locations. Figure 3 Both test areas are marked with measurement points M1 to M5. Measurement points in the two test areas are selected and counted independently; identical markings do not indicate a one-to-one correspondence between measurement points. Copper thickness can be measured using X-ray fluorescence thickness measurement, or the test results can be verified using cross-sectional metallography.

[0112] The average copper thickness increment in the dense circuit test area and the sparse circuit test area were calculated separately, and the ratio of the average copper thickness increment in the dense circuit test area to the average copper thickness increment in the sparse circuit test area was determined as the actual selective inhibition coefficient of the current electroplating solution.

[0113] When the actual selective inhibition coefficient is low, it indicates that the copper deposition rate in the sparse line test area is higher than that in the dense line test area, and the current electroplating solution has insufficient selective inhibition effect on the high local current area.

[0114] A higher actual selective inhibition coefficient indicates a stronger relative inhibition effect on the sparse line test area.

[0115] VII. Adjustment of Drug Response

[0116] The actual selective inhibition coefficient of the current electroplating solution is compared with the target selective inhibition coefficient range determined based on the overall plate pattern load contrast.

[0117] When the actual selective inhibition coefficient is lower than the lower limit of the target selective inhibition coefficient range, leveling agent is first added to the current electroplating solution; if the actual selective inhibition coefficient is still lower than the lower limit after adding leveling agent and retesting, then inhibitor is added to enhance the relative inhibition effect of sparse line areas, isolated pad areas and board edge line areas.

[0118] When the actual selective inhibition coefficient is higher than the upper limit of the target selective inhibition coefficient range, stop adding leveling agent and add accelerator to the current electroplating solution to avoid excessive inhibition of high local current areas.

[0119] The amount of reagent to be added is determined based on the effective volume of the electroplating tank, the current reagent concentration, and the degree to which the actual selective inhibition coefficient deviates from the target selective inhibition coefficient range.

[0120] To avoid the electroplating solution state exceeding the target range due to a single replenishment, the calculated total replenishment amount will be added in multiple installments. The initial replenishment amount will be 40% to 70% of the determined total replenishment amount. The remaining replenishment amount will be added in one or more installments based on the retest results, with the final installment being the remaining amount.

[0121] After each addition of reagent, circulate the current electroplating solution for 5–20 minutes to ensure the added reagent is thoroughly mixed within the electroplating tank. Then, re-test the electroplating using a standard graphic response test piece to determine the actual selective inhibition coefficient.

[0122] Repeat the process of adding reagents, circulating plating solution, and electroplating test pieces until the actual selective inhibition coefficient is within the target selective inhibition coefficient range.

[0123] When it is necessary to add both leveling agents and inhibitors simultaneously, the leveling agent can be added first, followed by cycling and retesting. If the actual selective inhibition coefficient is still lower than the target selective inhibition coefficient range, then the inhibitor can be added. This reduces mutual interference caused by adjusting multiple agents simultaneously.

[0124] After the electroplating solution reaches the target selective inhibition state, the production board is then placed into the electroplating tank for compensatory electroplating.

[0125] VIII. Selective Adsorption Establishment Stage

[0126] The printed circuit board that has completed the routine pattern electroplating pretreatment is mounted on the electroplating fixture, and the process conductive edge of the production board is connected to the cathode of the electroplating power supply.

[0127] The printed circuit board is immersed in an electroplating solution that has been matched with the chemical response, the electroplating solution is kept circulating, and the printed circuit board is moved back and forth relative to the electroplating solution.

[0128] The first step is to perform the selective adsorption establishment phase.

[0129] The selective adsorption setup stage was carried out at a plating bath temperature of 20–30°C, using an average current density of 0.2–0.8 A / dm³. 2 The processing time is 20–120 seconds, consisting of either direct current or unidirectional pulse current.

[0130] When using unidirectional pulse current, the pulse duty cycle is 20% to 60% and the pulse frequency is 1 to 50 Hz.

[0131] The average current density during the selective adsorption build-up phase is lower than that during the bulk copper layer thickening phase. Through this lower average current density and controlled plating bath flow, leveling agents and inhibitors achieve adsorption states adapted to the local current conditions in sparse lines, isolated pads, board edge lines, and areas of abrupt pattern density changes.

[0132] During the selective adsorption setup stage, the flow rate of the electroplating solution on the board surface is controlled at 0.1–0.4 m / s. The printed circuit board moves back and forth in a direction perpendicular to the surface of the electroplating solution, ensuring that all areas of the board surface remain in contact with the electroplating solution and reducing the adhesion of localized air bubbles.

[0133] The specific processing time for the selective adsorption establishment stage is determined based on the overall plate pattern load contrast.

[0134] For printed circuit boards with low pattern load contrast, a relatively short processing time can be used; for printed circuit boards with high pattern load contrast that simultaneously have areas with high overplating tendency at the board edge, sparse line areas, and areas with abrupt changes in pattern density, a relatively long processing time can be used.

[0135] IX. Main Copper Layer Thickening Stage

[0136] After the selective adsorption establishment phase is completed, the average current density is increased to 1.0–3.0 A / dm² without removing the printed circuit board from the electroplating bath. 2 It then enters the stage of thickening the main copper layer.

[0137] The average current density during the thickening stage of the main copper layer is 2 to 8 times that during the selective adsorption establishment stage.

[0138] During the copper layer thickening stage, direct current, unidirectional pulse current, or periodically commutating pulse current can be used. The choice of current type depends on the width of the printed circuit board, the target copper thickness, and the capacity of the electroplating rectifier.

[0139] During the thickening stage of the main copper layer, the electroplating solution is continuously circulated, and the printed circuit board is kept moving back and forth relative to the electroplating solution.

[0140] The flow rate of the electroplating solution on the board surface during the thickening stage of the main copper layer is 0.3 to 0.8 m / s, which is higher than the flow rate of the electroplating solution on the board surface during the selective adsorption establishment stage.

[0141] The reciprocating speed of the printed circuit board during the main copper layer thickening stage is 1.2 to 2.5 times that of the reciprocating speed during the selective adsorption building stage, so as to improve the mass transfer rate of copper ions to the surface of the conductive pattern to be plated.

[0142] Between the selective adsorption establishment stage and the main copper layer thickening stage, at least one of the following is increased: current density, plate plating solution flow rate, and reciprocating speed of the printed circuit board, so that the differentiated inhibition state formed in the first stage is transformed into copper deposition rate compensation between different patterned load areas in the second stage.

[0143] The copper layer thickening stage continues until the average copper layer thickness of the conductive pattern to be plated reaches the preset target thickness. In one embodiment, the target thickness is 15–35 μm.

[0144] The target electroplating thickness can be controlled by pre-determined electroplating time and cumulative electricity consumption, or it can be corrected during the production process by using test pieces or online thickness measurement results.

[0145] After the main copper layer is thickened, the current is turned off, the printed circuit board is removed from the electroplating tank, and then it undergoes water washing, drying, and subsequent printed circuit board processing steps such as film removal and etching.

[0146] 10. Detection of Copper Layer Thickness in Different Areas

[0147] After the main copper layer thickening is completed, the copper layer thickness is measured in the dense circuit area, sparse circuit area and edge circuit area of ​​the printed circuit board.

[0148] Select at least five measurement points in each area. The measurement points should be distributed at different locations within the corresponding area, avoiding process clamping areas, areas with obvious scratches, and areas with abnormal electroplating defects.

[0149] The thickness increase of the electroplated copper layer at each measurement point was obtained by X-ray fluorescence thickness measurement or cross-sectional metallographic examination, and the average thickness increase of the electroplated copper layer at each measurement point in each region was determined as the regional electroplated copper layer thickness increase for that region. In this paper, the regional copper thickness, average electroplated copper thickness, and copper thickness difference all refer to the thickness increase of the electroplated copper layer and their differences, excluding the base copper thickness; the regional copper thickness variation coefficient was calculated based on all measurement points in each region.

[0150] It can also detect, depending on the needs:

[0151] The amount of copper layer thickness increase in large copper areas, the amount of copper layer thickness increase in areas with abrupt changes in pattern density, the amount of widening at the top of fine lines, the height of copper nodules, and the minimum line spacing after electroplating.

[0152] Compare the increase in copper plating thickness in sparse circuit areas, board edge circuit areas, and dense circuit areas.

[0153] When the increase in copper plating thickness in sparse circuit areas or board edge circuit areas is higher than that in dense circuit areas, and the difference between the former and the latter is greater than the preset allowable copper thickness difference, it indicates that there is still relative overplating in areas with a high tendency to overplating.

[0154] When the increase in copper plating thickness in sparse circuit regions or board edge circuit regions is lower than that in dense circuit regions, and the difference in copper plating thickness between dense circuit regions and the aforementioned regions is greater than the preset allowable copper thickness difference, it indicates that the current degree of selective suppression is too high, or the processing degree in the selective adsorption establishment stage is too large.

[0155] In one embodiment, the preset allowable copper thickness difference is 3 μm.

[0156] XI. Feedback and adjustments for similar production batches

[0157] Based on the regional copper thickness test results of the current production batch, the reagent replenishment amount or selective adsorption establishment stage treatment time for the next production batch of the same type will be adjusted.

[0158] The next production batch of the same type refers to a production batch that uses the same printed circuit board graphic data, the same panelization method, and the same target electroplating thickness.

[0159] The sparse circuit area and the edge circuit area are compared with the dense circuit area, and the area with the larger absolute value of the copper thickness difference is identified as the deviation target area. When the absolute values ​​of the copper thickness difference are equal, the edge circuit area is identified as the deviation target area. When the copper plating thickness increase in the deviation target area is higher than that in the dense circuit area, and the difference is greater than 3 μm, the amount of leveling agent added in the next batch of the same type is increased by 5% to 15%, and / or the processing time of the selective adsorption establishment stage is extended by 10 to 30 seconds.

[0160] When the increase in copper plating thickness in the target deviation area is lower than that in the dense circuit area, and the difference between the increase in copper plating thickness in the dense circuit area and the increase in copper plating thickness in the target deviation area is greater than 3 μm, the leveling agent replenishment amount in the next production batch of the same type will be reduced by 5% to 15%, and / or the processing time of the selective adsorption establishment stage will be shortened by 10 to 30 seconds; the benchmark for the increase or decrease is the benchmark replenishment amount of leveling agent for the corresponding maintenance cycle of the previous production batch of the same type.

[0161] Compensatory electroplating will be performed on the next batch of the same type of production, based on the adjusted leveling agent replenishment amount and / or selective adsorption establishment stage treatment time.

[0162] After electroplating is completed, the amount of copper layer thickness in dense circuit areas, sparse circuit areas, and circuit edge areas is re-inspected.

[0163] When the absolute value of the copper thickness difference between sparse and dense circuit regions and between the edge circuit region and dense circuit region are both no greater than 3μm, the current leveling agent replenishment amount, selective adsorption establishment stage processing time, and main copper layer thickness increase parameters are maintained for subsequent electroplating processing of the same printed circuit board.

[0164] When any absolute value of copper thickness difference still exceeds 3μm, continue to adjust the amount of leveling agent added and / or the selective adsorption establishment stage treatment time according to the copper thickness deviation direction of the target area, until the absolute value of copper thickness difference in areas of the same plate type is within the allowable range.

[0165] To avoid interference between production batches due to plating solution aging, changes in copper ion concentration, or pool contamination, when making feedback adjustments for similar production batches, the copper ion concentration, acid concentration, chloride ion concentration, plating solution temperature, and anode condition in the base plating solution should be kept within the preset production range.

[0166] 12. Determination and Calibration of Process Parameters

[0167] In this embodiment, the pattern density determination threshold, target selectivity suppression coefficient range, electroplating solution replenishment amount, two-stage current parameters, plating solution flow rate, and copper thickness tolerance can be pre-calibrated using a standard printed circuit board.

[0168] During calibration, various test areas with different graphic distributions can be set, including:

[0169] Test areas with the same total area to be plated but different line boundary lengths;

[0170] Test areas with the same copper density but different numbers of isolated pads;

[0171] Abrupt changes in pattern density between dense lines and large copper surfaces;

[0172] Test areas with different distances from the edge of the production board but the same circuit structure.

[0173] Electroplating was performed on the test board using different reagent states and two-stage electroplating parameters. The amount of copper layer thickening, line top widening, and copper nodule height in different areas were detected. Based on this, the area judgment threshold, target selectivity inhibition coefficient range, and electroplating parameter range applicable to the corresponding electroplating production line were determined.

[0174] After calibration, different board types can select the corresponding process parameters according to their graphic load contrast, without the need to set up a dedicated anode baffle or shielding structure for each type of printed circuit board.

[0175] XIII. Explanation of Mechanism of Action

[0176] In conventional pattern electroplating, sparse lines, isolated pads, and board edge lines usually have a higher tendency for local current concentration, while the current per unit area to be plated is relatively low in dense lines or large copper areas.

[0177] This implementation method first identifies different pattern load areas based on the actual pattern to be plated on the printed circuit board, and then determines the differential suppression capability of the current production plating solution for dense and sparse lines through a standard pattern response test piece.

[0178] By adjusting the leveling agent, inhibitor, and accelerator, the selective inhibition state of the electroplating solution is matched with the pattern load difference of the printed circuit board to be processed.

[0179] The selective adsorption establishment stage uses relatively low current density and flow intensity to enable the reagent to establish differentiated adsorption states on the conductive pattern surface under different local current states; the main copper layer thickening stage uses higher current density, plating solution flow rate and plate moving speed to improve copper layer deposition efficiency.

[0180] This reduces excessive thickening in sparse circuit areas, isolated pad areas, and edge circuit areas, while improving the relative deposition capacity in dense circuit areas and reducing copper thickness differences between different pattern areas on the same printed circuit board.

[0181] XIV. Scope of Application of the Implementation Method

[0182] This implementation method is applicable to printed circuit boards with outer layer pattern electroplating, fine line pattern thickening, local copper pattern enhancement, and production boards with mixed pattern density distribution.

[0183] For printed circuit boards containing only a single large copper surface or with a highly uniform pattern distribution, the processing time of the selective adsorption setup stage can be reduced or a lower selective inhibition target can be directly adopted.

[0184] For printed circuit boards that simultaneously feature dense fine lines, isolated pads, large copper surfaces, and sparse lines at the board edges, a complete pattern load analysis, chemical response adjustment, and two-stage compensation electroplating process is preferred.

[0185] The graphic data analysis in this embodiment is used to determine the actual electroplating processing conditions of the printed circuit board. Its final implementation steps include adjusting the reagents of the production plating solution, applying current to the printed circuit board, controlling the flow of the plating solution, and forming the target copper layer. Therefore, the technical focus of this embodiment is the electroplating thickening process of the conductive pattern of the printed circuit board.

[0186] Example 1: Compensation plating for conventional mixed-pattern printed circuit boards

[0187] This embodiment uses an outer printed circuit board that simultaneously includes dense lines, sparse lines, large copper surfaces, isolated pads, and edge lines to verify the implementation effects of pattern load zoning, plating solution selective suppression state adjustment, and two-stage compensation plating. Except for the specific details in this embodiment, all other operations are performed according to the aforementioned general implementation method. This embodiment follows... Figure 1 The overall process shown applies compensatory electroplating to the printed circuit board.

[0188] 1. Printed circuit board and pattern load area

[0189] The printed circuit board used in this embodiment has a size of 500mm × 400mm, a thickness of 1.6mm, an outer base copper thickness of 18μm, and a target electroplating thickness increase of 22μm. The production board adopts a four-panel structure, and the board surface has been coated, exposed, and developed to form a conductive pattern to be plated that is connected to the electroplating power supply.

[0190] Obtain the Gerber data for the production board and divide the pattern load area according to the copper density, conductive boundary density, and distance from the edge of the production board. The main pattern load areas are as follows:

[0191] Area A is a densely packed circuit region with a circuit width and spacing of 75 μm, a copper cladding density of 68%, and a conductive boundary density of 0.42 mm / mm. 2 ;

[0192] Region B is a sparse circuit region with a line width of 150 μm, an adjacent line spacing of 300 μm, a copper density of 28%, and a conductive boundary density of 0.61 mm / mm. 2 ;

[0193] Area C is a large copper surface area with a copper cladding density of 85% and a conductive boundary density of 0.12 mm / mm. 2 ;

[0194] Region D is an isolated pad area with a pad diameter of 0.8 mm, a pad center-to-center spacing of 2.5 mm, a copper density of 24%, and a conductive boundary density of 0.58 mm / mm². 2 ;

[0195] Area E is the edge circuitry area, located 6mm from the edge of the production board, with a copper density of 22% and a conductive boundary density of 0.65mm / mm. 2 ;

[0196] Region F is a region of abrupt change in pattern density. One side is a copper surface area with a copper density of 76%, and the other side is a sparse circuit area with a copper density of 28%. The strip-shaped area within 2.5mm on each side of the boundary between these two regions is defined as Region F. The pattern load area division result of the production board in this embodiment is as follows: Figure 2 As shown.

[0197] The average copper cladding density of this production board is 46%, and the average conductive boundary density is 0.39 mm / mm. 2 .

[0198] The copper density in regions B and D is less than 80% of the average copper density of the entire board, and the conductive boundary density is more than 120% of the average conductive boundary density of the entire board. Therefore, regions B and D are identified as regions with a high tendency to over-plating.

[0199] The copper cladding density in region C is 120% higher than the average copper cladding density of the entire board, and the conductive boundary density is 80% lower than the average conductive boundary density of the entire board. Therefore, region C is identified as a region with low deposition tendency.

[0200] Area E is no more than 10mm from the edge of the production board and belongs to the sparse line area. Therefore, area E is defined as the area where the board edge is higher than the plating tendency.

[0201] Based on the distribution of regions with high overplating tendency, low deposition tendency, and abrupt changes in pattern density throughout the board, the production board of this embodiment is determined to be a high pattern load contrast board type, and its target selective suppression coefficient range is set to 0.92 to 1.00.

[0202] 2. Initial state of the electroplating solution

[0203] This embodiment uses a vertical continuous circulating acidic copper plating bath with an effective volume of 1000L. Before reagent adjustment, the electroplating solution includes the following components:

[0204] Copper sulfate pentahydrate 78 g / L;

[0205] Sulfuric acid 190 g / L;

[0206] Chloride ion 55 mg / L;

[0207] Polyether inhibitor 280 mg / L;

[0208] Nitrogen-containing cationic leveling agent 6.0 mg / L;

[0209] Sulfur-containing accelerator 1.2 mg / L.

[0210] The electroplating solution temperature is controlled at 25±1℃. Phosphorus copper anodes are used during the electroplating process, and the anode bag, circulating filter, and cathode conductive fixture are kept in normal working condition.

[0211] This embodiment does not set up a dedicated anode baffle for the production board, nor does it change the anode arrangement of the original electroplating tank. Instead, it compensates for the pattern load by adjusting the selective inhibition state of the electroplating solution and the two-stage electroplating conditions.

[0212] 3. Detection of the Selectivity Suppression State of the Current Electroplating Solution

[0213] use Figure 3 The standard pattern response test piece shown detects the actual selective inhibition coefficient of the current electroplating solution. The test piece has a dense line test area and a sparse line test area, with a total plating area of ​​12.40 cm² in each area. 2 and 12.02cm 2 The difference in the total area to be plated between the two is 3.1% of the total area to be plated of the larger one.

[0214] The dense circuit test area consists of parallel circuits with a line width and line spacing of 75μm; the sparse circuit test area consists of spaced circuits with a line width of 150μm and a line spacing of 300μm, as well as isolated pads.

[0215] Using the current electroplating solution, at 25℃ and 0.8 A / dm 2 Under the same average current density and the same electroplating solution circulation conditions, a standard pattern response test piece was electroplated for 60 seconds. After electroplating, five evenly distributed measurement points were selected in each of the two test areas, and the copper thickness increment was measured using an X-ray fluorescence thickness gauge.

[0216] The initial test results are as follows:

[0217] The average copper thickness increment in the dense circuit test area was 0.84 μm;

[0218] The average copper thickness increment in the sparse circuit test area was 1.11 μm;

[0219] Therefore, the actual selective inhibition coefficient of the current electroplating solution is determined to be 0.84 / 1.11, or 0.76.

[0220] The actual selective inhibition coefficient is lower than the lower limit of the target selective inhibition coefficient range of 0.92, indicating that the current electroplating solution has insufficient relative inhibition effect on sparse lines and isolated patterns, and it is necessary to improve the selective inhibition effect of the leveling agent.

[0221] 4. Adjustment of electroplating solution chemical response

[0222] This embodiment follows Figure 4 The reagent response adjustment process shown determines the total replenishment amount of concentrated leveling agent replenishment solution to be 180mL based on the effective volume of the electroplating tank, the current leveling agent concentration, and the deviation between the actual selective inhibition coefficient and the target range.

[0223] For the first replenishment, 120 mL of concentrated leveling agent was added to the electroplating tank, accounting for 66.7% of the total replenishment. After the replenishment was completed, the electroplating solution was circulated for 10 minutes, and the electroplating test was repeated using the same standard graphic response test piece and the same test conditions.

[0224] The test results after the first supplement were:

[0225] The average copper thickness increment in the dense circuit test area was 0.88 μm;

[0226] The average copper thickness increment in the sparse circuit test area was 0.99 μm;

[0227] The actual selective inhibition coefficient was 0.89, which is still lower than the lower limit of the target range.

[0228] Then, the remaining 60 mL of concentrated leveling agent was added, and the electroplating solution was circulated for another 10 minutes before the standard graphic response test was performed again.

[0229] The test results after the second supplement were:

[0230] The average copper thickness increment in the dense circuit test area was 0.91 μm;

[0231] The average copper thickness increment in the sparse circuit test area was 0.96 μm;

[0232] The actual selective inhibition coefficient was 0.95, which falls within the target selective inhibition coefficient range of 0.92 to 1.00.

[0233] This confirms that the current electroplating solution has reached a selective suppression state that matches the high graphic load contrast plate type of this embodiment.

[0234] 5. Pretreatment before electroplating of printed circuit boards

[0235] The production board is subjected to degreasing, water washing, micro-etching, water washing and acid immersion treatment in sequence to keep the exposed copper surface after development clean and free of obvious oxide film.

[0236] The pre-treated production plate is mounted on the cathode fixture, ensuring a reliable connection between the process conductive edge of the production plate and the electroplating power source. The production plate is then immersed in the electroplating solution, which has undergone reagent response adjustment, and the circulating filtration device and the plate reciprocating movement mechanism are activated.

[0237] 6. Selective Adsorption Establishment Stage

[0238] like Figure 5 As shown in (a), the selective adsorption establishment phase is performed first.

[0239] The electroplating solution temperature during this stage is 25℃, and a unidirectional pulsed current is used with an average current density of 0.5A / dm³. 2 The pulse duty cycle is 40%, the pulse frequency is 10Hz, and the processing time is 60s.

[0240] During the selective adsorption setup stage, the flow rate of the electroplating solution on the plate surface is 0.25 m / s. The production plate moves back and forth in a direction perpendicular to the surface of the electroplating solution at a speed of 0.10 m / s and a single-pass distance of 80 mm.

[0241] During this stage, the electroplating solution is kept in continuous circulation without adding any leveling agents, inhibitors, or accelerators.

[0242] 7. Main Copper Layer Thickening Stage

[0243] like Figure 5 As shown in (b), after the selective adsorption establishment stage is completed, the current density is increased and the main copper layer thickening stage is entered without removing the production board from the electroplating tank.

[0244] Direct current was used during the thickening stage of the main copper layer, with an average current density of 1.8 A / dm². 2 This is 3.6 times the average current density during the selective adsorption establishment phase.

[0245] At the same time, the flow rate of the electroplating solution on the board surface is increased to 0.55 m / s, and the reciprocating speed of the production board is increased to 0.18 m / s. The reciprocating speed is 1.8 times that of the reciprocating speed during the selective adsorption establishment stage.

[0246] The main copper layer thickening stage lasts for 58 minutes. After the main copper layer thickening is completed, the electroplating power supply is turned off, the production board is removed from the electroplating tank, and then washed and dried.

[0247] 8. Copper layer thickness inspection

[0248] On the production board that has completed electroplating, five evenly distributed measurement points are selected from area A to area F respectively. The thickness of the electroplated copper layer is detected by an X-ray fluorescence thickness gauge, and the average value of the five measurement points in each area is taken as the average electroplated copper thickness of the corresponding area.

[0249] The test results are as follows:

[0250] The average copper plating thickness in region A, i.e. the dense circuit area, is 22.1 μm;

[0251] The average copper plating thickness in region B, i.e. the sparse circuit region, is 22.8 μm.

[0252] The average copper plating thickness in region C, i.e. the large copper surface area, is 21.7 μm.

[0253] The average copper plating thickness in region D, i.e., the isolated pad region, is 22.6 μm.

[0254] The average copper plating thickness in region E, i.e. the circuit edge area, is 23.0 μm.

[0255] The average copper plating thickness in region F, i.e. the region of abrupt change in pattern density, is 22.4 μm.

[0256] The average copper plating thickness in the six regions was 22.43 μm, and the difference between the copper thickness of the maximum and minimum regions was 1.3 μm, which was lower than the preset allowable copper thickness difference of 3 μm; the coefficient of variation of the average copper thickness in the six regions was 2.0%.

[0257] The copper thickness difference between the sparse and dense circuit regions was 0.7 μm, and the copper thickness difference between the edge circuit region and the dense circuit region was 0.9 μm. Neither of these met the criteria for requiring process correction for the next batch of the same type of production.

[0258] To verify the X-ray fluorescence thickness measurement results, metallographic cross-sections were fabricated at representative locations in regions A, B, and E. The deviations between the measured copper plating thickness and the X-ray fluorescence thickness measurement results were all within 0.6 μm.

[0259] 9. Circuit pattern quality inspection

[0260] Microscopic inspection was performed on the dense line areas, sparse line areas, and areas with abrupt changes in pattern density after electroplating.

[0261] The average line top widening in densely packed line areas is 6.8 μm;

[0262] The average line top widening in sparse line regions is 7.6 μm;

[0263] The average top width of the line in the edge area is 8.1 μm;

[0264] The maximum copper nodule height detected in the region of pattern density abrupt change was 2.3 μm;

[0265] The minimum line spacing retention rate after electroplating is 89.2%.

[0266] No obvious scorching, dendritic crystals, abnormal nodules at the edges of the circuits, or large-area roughness were found on the surface of the production board.

[0267] 10. Implementation Results Analysis

[0268] In this embodiment, without changing the anode arrangement of the electroplating tank and without setting a special pattern baffle, the target selective inhibition coefficient range is determined according to the pattern load distribution of the production board. The actual electroplating solution is tested using a standard pattern response test piece, and the leveling agent is added in stages, thereby increasing the actual selective inhibition coefficient from 0.76 to 0.95.

[0269] Based on this, through the selective adsorption establishment stage with low average current density and the main copper layer thickening stage with higher average current density, the excessive deposition in sparse line areas, isolated pad areas and board edge line areas is suppressed, while maintaining the copper layer thickening capability in dense line areas and large copper surface areas.

[0270] Ultimately, the maximum copper thickness difference between different patterned load areas was controlled at 1.3 μm, and the copper thickness difference between sparse line areas and board edge line areas relative to dense line areas was less than 1 μm. This indicates that patterned load zoning, reagent selective inhibition state matching, and two-stage electroplating can form a synergistic effect, thereby improving the uniformity of electroplated copper thickness in different patterned areas of the same printed circuit board.

[0271] Example 2: Compensating Electroplating for Printed Circuit Boards with High Pattern Load Difference

[0272] This embodiment uses an outer printed circuit board with large differences in pattern density and a high proportion of sparse patterns at the board edge to verify the compensation effect on copper thickness differences in different pattern areas after improving the selective inhibition of the reagent, extending the selective adsorption establishment stage, and enhancing the mass transfer conditions during the body thickening stage. Except for the board structure, reagent adjustment parameters, and electroplating parameters described below, the rest of the operation is the same as in Example 1.

[0273] 1. Printed Circuit Board and Pattern Load Characteristics

[0274] The printed circuit board used in this embodiment has a size of 520mm×420mm, a thickness of 1.6mm, an outer base copper thickness of 18μm, and a target electroplating thickness increase of 25μm.

[0275] This production board includes high-density fine lines, large-area continuous copper surfaces, low-density isolated pads, sparse lines at the board edges, and areas of abrupt density changes where large copper surfaces are adjacent to fine lines. Based on the Gerber data of the production board, the main patterns to be plated are divided into the following areas:

[0276] Region G is a dense, fine-line area with a line width and spacing of 60 μm, a copper density of 82%, and a conductive boundary density of 0.55 mm / mm. 2 ;

[0277] Region H is a sparse circuit region with a line width of 120 μm, a line spacing of 450 μm, a copper density of 18%, and a conductive boundary density of 0.78 mm / mm. 2 ;

[0278] Region I is a large copper surface area with a copper cladding density of 92% and a conductive boundary density of 0.08 mm / mm. 2 ;

[0279] Region J is an isolated pad area with a pad diameter of 0.65 mm, a pad center-to-center spacing of 3.0 mm, a copper density of 20%, and a conductive boundary density of 0.72 mm / mm. 2 ;

[0280] Region K is a sparsely populated area along the board edge. The minimum distance from the line to be plated to the edge of the production board is 4mm, the copper density is 16%, and the conductive boundary density is 0.81mm / mm. 2 ;

[0281] Region L is a region of abrupt change in pattern density. One side is a continuous copper surface with a copper density of 88%, and the other side is a fine-line area with a copper density of 20%. The strip-shaped area within 1.8 mm on each side of the boundary between these two regions is defined as region L. This embodiment follows the same principle as... Figure 2 The same partitioning principle is used to divide the regions G to L as shown above.

[0282] The average copper cladding density of this production board is 44%, and the average conductive boundary density is 0.43 mm / mm. 2 .

[0283] The copper cladding density in regions H, J, and K is all less than 80% of the average copper cladding density of the entire board, and the conductive boundary density is all higher than 120% of the average conductive boundary density of the entire board. Region K is less than 10mm from the edge of the production board. Therefore, regions H and J are identified as regions with a high tendency to over-plating, and region K is identified as a region with a high tendency to over-plating at the edge of the board.

[0284] The copper cladding density in region I is 120% higher than the average copper cladding density of the entire board, and the conductive boundary density is less than 80% of the average conductive boundary density of the entire board. Therefore, region I is identified as a region with low deposition tendency.

[0285] Because the production board has a large copper area, a high-density fine line area, multiple areas with high overplating tendency and an area with high overplating tendency at the board edge, and the copper density on both sides of the L area differs by 68 percentage points, the production board is determined to be a high pattern load contrast board type.

[0286] Based on the pre-defined correspondence between the graphics load level and the target selectivity suppression coefficient, the target selectivity suppression coefficient range of this embodiment is determined to be 0.96 to 1.04.

[0287] 2. Initial state of electroplating solution and detection of selective inhibition

[0288] This embodiment uses an acidic copper plating bath with an effective volume of 1000L. The concentrations of copper sulfate, sulfuric acid, and chloride ions in the electroplating solution are all controlled within the ranges described in Example 1.

[0289] Before the chemical adjustments, the concentration of polyether inhibitors in the electroplating solution was 275 mg / L, the concentration of nitrogen-containing cationic leveling agent was 5.6 mg / L, and the concentration of sulfur-containing accelerator was 1.3 mg / L.

[0290] use Figure 3 The standard graphic response test piece shown is tested at 25℃ and 0.8 A / dm. 2 Electroplating was tested for 60 seconds at an average current density.

[0291] Before the reagent adjustment, the average copper thickness increment in the dense circuit test area was 0.82 μm, and the average copper thickness increment in the sparse circuit test area was 1.14 μm. Based on this, the actual selective inhibition coefficient was determined to be 0.72, which is lower than the lower limit of the target selective inhibition coefficient range.

[0292] The results indicate that, under the current reagent conditions, the copper deposition rate of sparse patterns is significantly higher than that of dense patterns, making it difficult to meet the compensation requirements of the high pattern load difference board type in this embodiment.

[0293] 3. Adjustment of electroplating solution chemicals

[0294] This embodiment follows Figure 4 The drug response adjustment procedure shown determines the total replenishment volume of the concentrated leveling agent replenishment solution to be 220 mL based on the deviation between the actual selective inhibition coefficient and the target range, and determines the expected replenishment volume of the polyether inhibitor replenishment solution to be 80 mL.

[0295] For the first time, 140 mL of concentrated leveling agent was added to the electroplating tank. After circulating the electroplating solution for 12 minutes, the electroplating test was repeated.

[0296] After the first addition, the average copper thickness increase in the dense line test area was 0.86 μm, and the average copper thickness increase in the sparse line test area was 1.00 μm. The actual selective suppression coefficient was 0.86, which was still lower than the target range.

[0297] Then, the remaining 80 mL of concentrated leveling agent was added, along with 50 mL of polyether inhibitor. The electroplating solution was circulated for 15 minutes before the electroplating test was performed again.

[0298] After the second addition, the average copper thickness increment in the dense line test area was 0.91 μm, the average copper thickness increment in the sparse line test area was 0.92 μm, and the actual selective suppression coefficient was 0.99, which is within the target range of 0.96 to 1.04.

[0299] Therefore, no further addition of the remaining polyether inhibitor solution is needed to avoid excessive inhibition of sparse lines and isolated pads.

[0300] 4. Selective Adsorption Establishment Stage

[0301] After completing the routine pretreatment for electroplating of the production board, according to Figure 5 As shown in (a), the production board is placed in the adjusted electroplating solution.

[0302] Considering that the pattern load difference of the plate type in this embodiment is higher than that in embodiment 1, a lower average current density and a longer processing time are used in the selective adsorption establishment stage.

[0303] The electroplating solution temperature during this stage is 25℃, and a unidirectional pulsed current is used with an average current density of 0.35A / dm³. 2 The pulse duty cycle is 30%, the pulse frequency is 8Hz, and the processing time is 90s.

[0304] During the selective adsorption setup stage, the flow rate of the electroplating solution on the plate surface is 0.18 m / s. The production plate moves back and forth in a direction perpendicular to the surface of the electroplating solution at a speed of 0.08 m / s and a single-pass distance of 80 mm.

[0305] During this stage, the electroplating solution is kept in continuous circulation without adding any reagents.

[0306] 5. Main copper layer thickening stage

[0307] like Figure 5 As shown in (b), after the selective adsorption setup stage is completed, the average current density is increased to 2.2 A / dm² without removing the production plate from the electroplating bath. 2 It then enters the stage of thickening the main copper layer.

[0308] The average current density during the thickening stage of the main copper layer was 6.29 times that during the selective adsorption establishment stage.

[0309] In this embodiment, direct current is used during the copper layer thickening stage, and the flow rate of the electroplating solution on the board surface is increased to 0.70 m / s, while the reciprocating speed of the production board is increased to 0.18 m / s. The reciprocating speed during the copper layer thickening stage is 2.25 times that during the selective adsorption establishment stage.

[0310] By increasing the flow rate and movement speed of the board during the thickening stage, the mass transfer of copper ions on the surface of large copper areas and dense fine lines is enhanced, reducing the deposition hysteresis caused by insufficient current distribution per unit conductive area.

[0311] The copper layer thickening stage lasts for 61 minutes. Electroplating stops after the preset cumulative charge is reached, and the production board is then washed and dried.

[0312] 6. Area Copper Thickness Detection

[0313] Five uniformly distributed measurement points were selected in regions G to L, and the thickness of the electroplated copper layer was detected using an X-ray fluorescence thickness gauge.

[0314] The test results are as follows:

[0315] The average copper plating thickness in region G, i.e. the dense fine line region, is 24.8 μm.

[0316] The average copper plating thickness in region H, i.e. the sparse circuit region, is 25.4 μm.

[0317] The average copper plating thickness in region I, i.e. the large copper surface area, is 24.5 μm.

[0318] The average copper plating thickness in region J, i.e., the isolated pad region, is 25.2 μm.

[0319] The average copper plating thickness in the K region, i.e. the sparse circuit area at the edge of the board, is 25.6 μm.

[0320] The average copper plating thickness in region L, i.e. the region of abrupt change in pattern density, is 25.0 μm.

[0321] The average copper plating thickness in the six regions was 25.08 μm, the difference between the maximum and minimum copper thickness was 1.1 μm, and the coefficient of variation of the average copper thickness in the six regions was 1.46%.

[0322] in:

[0323] The copper thickness difference between the sparse line region and the dense fine line region is 0.6 μm;

[0324] The copper thickness difference between the sparse circuit area and the dense fine circuit area at the board edge is 0.8 μm;

[0325] The copper thickness difference between the isolated pad area and the dense fine line area is 0.4 μm;

[0326] The copper thickness difference between the large copper surface area and the dense fine line area is 0.3 μm.

[0327] The copper thickness difference between each region is less than the preset allowable copper thickness difference of 3μm;

[0328] Metallographic sections were fabricated at representative locations in regions G, H, K, and L. The maximum deviation between the metallographic test results and the X-ray fluorescence thickness measurement results was 0.5 μm.

[0329] 7. Circuit pattern quality inspection

[0330] Microscopic inspection was performed on the production boards that had completed electroplating, and the results are as follows:

[0331] The average line top widening in dense fine-line regions is 6.2 μm;

[0332] The average line top widening in sparse line regions is 7.1 μm;

[0333] The average line top widening in the sparse line region at the edge of the board is 7.7 μm;

[0334] The maximum copper nodule height detected in the region of abrupt change in pattern density was 2.0 μm;

[0335] The minimum line spacing retention rate after electroplating is 88.7%.

[0336] No scorching, dendrites, or continuous copper nodules were found in the sparse line area at the edge of the board; no obvious local abnormal thickening was found in the area of ​​abrupt change in pattern density adjacent to the large copper surface and the fine line.

[0337] After the production board was stripped and etched, no overlap of adjacent lines occurred in the dense fine line area due to excessive widening at the top, and the sidewalls of the lines in the sparse line area and the board edge line area remained continuous.

[0338] 8. Verification of different topological regions with the same area

[0339] To further verify the influence of conductive pattern distribution on the thickness of electroplated copper, two verification areas with similar total plating area were selected on the production board.

[0340] The first verification area has an area of ​​15.2 cm². 2 It consists of a continuous copper surface, with a total conductive boundary length of 19.6cm;

[0341] The second verification area consists of multiple fine lines and isolated pads, with a total area to be plated of 15.0 cm². 2 The total length of the conductive boundary is 82.4 cm.

[0342] The total area to be plated in the two verification areas differs by 1.3%, but the total length of the conductive boundary in the second verification area is 4.2 times that of the first verification area.

[0343] After the compensation electroplating in this embodiment is completed, the average copper plating thickness in the first verification area is 24.7 μm, the average copper plating thickness in the second verification area is 25.3 μm, and the difference in copper thickness between the two is 0.6 μm.

[0344] The results show that when the total area to be plated is basically the same but the length of the pattern boundary is significantly different, adjusting the selective suppression state of the plating solution according to the difference in pattern load and adopting two-stage plating can reduce the influence of pattern topological differences that cannot be identified solely based on the total area to be plated on the uniformity of copper thickness.

[0345] 9. Implementation Results Analysis

[0346] The production board used in this embodiment has a lower local copper density, a higher conductive boundary density, a more obvious pattern density abrupt change, and sparser lines closer to the edge of the production board. Its pattern load difference is greater than that in Embodiment 1.

[0347] In view of the above-mentioned plate characteristics, this embodiment increases the actual selective inhibition coefficient from 0.72 to 0.99, and reduces the average current density and extends the processing time in the selective adsorption establishment stage compared to Example 1, while increasing the flow rate of the electroplating solution on the plate surface and the reciprocating speed of the production plate in the main copper layer thickening stage.

[0348] The test results show that even though the production board has a large copper surface area with a copper density of 92% and a sparse line area at the board edge with a copper density of 16%, the maximum copper thickness difference between each pattern area is still controlled within 1.1μm, and no obvious burning or abnormal nodules occur in the sparse line area at the board edge.

[0349] The above results indicate that by increasing the selective inhibition of the agent based on the pattern load difference and by using different current and mass transfer conditions during the selective adsorption establishment stage and the main copper layer thickening stage, synergistic compensation can be achieved for large copper surfaces, dense lines, sparse lines, isolated pads, and edge lines in printed circuit boards with high pattern load differences.

[0350] Example 3: Feedback compensation electroplating in continuous production batches of the same plate type

[0351] This embodiment uses the same printed circuit board pattern data, the same panelization method, and the same target electroplating thickness increase, and performs compensatory electroplating in three consecutive production batches to verify that adjusting the leveling agent addition amount and the selective adsorption establishment stage processing time based on the copper thickness deviation in the first batch can improve the copper thickness uniformity of subsequent similar production batches. Except for the production board characteristics, parameter adjustments, and test results described below, the remaining operations are the same as in Example 1.

[0352] 1. Production board and graphic area

[0353] The printed circuit board used in this embodiment has a size of 480mm×420mm, a thickness of 1.6mm, an outer base copper thickness of 18μm, and adopts a four-panel structure with a target electroplating thickness increase of 24μm.

[0354] Based on the pattern to be plated on the production board, the main inspection areas are divided into:

[0355] Region M is a densely packed circuit area, with a line width and line spacing of 75μm and a copper density of 72%.

[0356] Region N is a sparse circuit region with a line width of 150μm, a line spacing of 400μm, and a copper density of 24%.

[0357] Area O is the board edge circuit area. The minimum distance between the circuit to be plated and the edge of the production board is 5mm, and the copper coverage density is 20%.

[0358] Area P is a large copper surface area with a copper cladding density of 88%.

[0359] The Q region is an isolated pad region with a pad diameter of 0.7 mm and a pad center-to-center spacing of 2.8 mm.

[0360] Regions N and Q were identified as regions with high overplating tendency, region O was identified as a region with high overplating tendency at the board edge, and region P was identified as a region with low deposition tendency.

[0361] The target selectivity inhibition coefficient range corresponding to this plate type is set to 0.94 to 1.02.

[0362] 2. First production batch

[0363] Before the first production batch begins, adopt Figure 3 The standard graphic response test piece shown is used to test the current electroplating solution.

[0364] The average copper thickness increment in the dense circuit test area was 0.90 μm, and the average copper thickness increment in the sparse circuit test area was 0.95 μm. The actual selective inhibition coefficient was 0.95, which is within the target selective inhibition coefficient range. Therefore, no additional reagent adjustments were made to the electroplating solution.

[0365] The first production batch according to Figure 5 The electroplating process is a two-stage compensation method, wherein the selective adsorption establishment stage uses a unidirectional pulsed current with an average current density of 0.5 A / dm³. 2 The pulse duty cycle is 40%, the pulse frequency is 10Hz, and the processing time is 60s; the flow rate of the electroplating solution on the board surface is 0.25m / s, and the reciprocating speed of the production board is 0.10m / s.

[0366] The main copper layer thickening stage uses 1.8A / dm. 2 The DC current is 0.55 m / s, the flow rate of the electroplating solution on the board surface is 0.18 m / s, the reciprocating speed of the production board is 0.18 m / s, and the processing time is 63 min.

[0367] After electroplating is completed, five evenly distributed measurement points are selected in regions M to Q, and the thickness of the electroplated copper layer is detected by an X-ray fluorescence thickness gauge.

[0368] The test results for the first production batch are as follows:

[0369] Table 1. Test results of the first production batch in Example 3.

[0370]

[0371] The copper thickness difference between region N and region M is 3.3 μm, and the copper thickness difference between region O and region M is 3.8 μm. Both are greater than the preset allowable copper thickness difference of 3 μm, indicating that there is still relative overplating in the sparse line area and the board edge line area in the first production batch.

[0372] The maximum copper thickness difference across the five regions in the first production batch was 4.1 μm, and the coefficient of variation for the average copper thickness across the regions was 6.9%.

[0373] Although the actual selective suppression coefficient measured by the standard pattern response test piece is within the target range, the proportion of edge lines and the number of isolated patterns in the production board are higher than those of the standard test piece. Therefore, it is still necessary to use the copper thickness detection results of the production board area to further modify the process parameters of the same board type.

[0374] 3. Parameter correction for the second production batch

[0375] The second production batch uses the exact same printed circuit board pattern data, panelization method, base copper thickness, and target electroplating thickness as the first production batch.

[0376] according to Figure 6 The feedback adjustment process is as follows: based on the detection results that the N and O regions are thicker than the M region in the first production batch, the second production batch will be supplemented with an additional 10% of the plate leveling agent, with the standard replenishment amount of 1000mL as the benchmark, and the processing time of the selective adsorption establishment stage will be extended from 60s to 80s.

[0377] Specifically, before the start of the second production batch, an additional 100 mL of concentrated leveling agent was added to the electroplating tank with an effective volume of 1000 L. After circulating the electroplating solution for 12 min, the standard graphic response test piece was used again for testing.

[0378] After adding leveling agent, the average copper thickness increase in the dense line test area was 0.93 μm, and the average copper thickness increase in the sparse line test area was 0.94 μm. The actual selective inhibition coefficient was 0.99, which is still within the target selective inhibition coefficient range.

[0379] The selective adsorption setup stage for the second production batch uses the same average current density, pulse duty cycle, pulse frequency, plate electroplating solution flow rate, and plate reciprocating speed as the first production batch, only extending the processing time to 80s.

[0380] The average current density, electroplating solution flow rate, and reciprocating speed of the production board during the main copper layer thickening stage were the same as those of the first production batch. To keep the average copper thickness within the target range, the processing time for the main copper layer thickening stage was adjusted to 61 minutes.

[0381] 4. Test results of the second production batch

[0382] After electroplating was completed in the second production batch, the copper thickness was measured using the same measurement locations and methods as in the first production batch. The results are as follows:

[0383] Table 2 Test results of the second production batch in Example 3

[0384]

[0385] The copper thickness difference between region N and region M decreased from 3.3 μm in the first production batch to 1.0 μm, the copper thickness difference between region O and region M decreased from 3.8 μm to 1.4 μm, and the copper thickness difference between region Q and region M was 0.9 μm.

[0386] The maximum copper thickness difference in the five regions of the second production batch was 1.7 μm, which is lower than the preset allowable copper thickness difference of 3 μm; the average copper thickness of the five regions was 24.40 μm, and the coefficient of variation of the average copper thickness of the regions was 2.7%.

[0387] Metallographic sections were prepared for regions M, N, and O. The maximum deviation between the metallographic results and the X-ray fluorescence thickness measurement results was 0.5 μm. Microscopic inspection showed that no obvious scorching or dendrites were found in the edge circuitry area of ​​the second production batch. The average top widening of the edge circuitry decreased from 11.6 μm in the first production batch to 7.9 μm, and the maximum copper nodule height at the abrupt change in pattern density decreased from 3.8 μm to 2.2 μm.

[0388] 5. Stability verification of the third production batch

[0389] Since the copper thickness difference between the sparse circuit area and the board edge circuit area and the dense circuit area in the second production batch is no greater than 3μm, it has entered the production phase. Figure 6 As shown in the permissible range, the third production batch maintains the same leveling agent replenishment method, selective adsorption establishment stage processing time, and main copper layer thickness parameters as the second production batch.

[0390] The third production batch used the same plate type for electroplating, and the test results are as follows:

[0391] Table 3. Test results of the third production batch in Example 3

[0392]

[0393] The maximum copper thickness difference in the third production batch was 1.4 μm, and the coefficient of variation for the average copper thickness in the regions was 2.2%. The copper thickness difference between region N and region M was 1.0 μm, and the copper thickness difference between region O and region M was 1.2 μm, which is close to the test results of the second production batch, indicating that the adjusted reagent dosage and the treatment time for the selective adsorption establishment stage have repeatability and stability.

[0394] 6. Comparison of continuous production results

[0395] The main process parameters and test results for the three production batches are as follows:

[0396] Table 4 Comparison of continuous production batches in Example 3

[0397]

[0398] Compared to the first production batch, the maximum area copper thickness difference was reduced by 58.5% in the second production batch and by 65.9% in the third production batch.

[0399] 7. Implementation Results Analysis

[0400] This embodiment shows that the standard pattern response test piece can reflect the overall selective inhibition state of the electroplating solution. However, for specific production boards with a high proportion of overplating tendency areas on the board edge or a large number of isolated patterns, there may still be local overplating phenomena that the standard test piece does not fully reflect.

[0401] By measuring the copper thickness in densely packed, sparsely packed, and edge-mounted circuit areas of the first production batch, the direction of copper thickness deviation can be clearly identified. Based on this, the amount of leveling agent added in the next similar production batch can be increased, and the selective adsorption setup time can be extended. After parameter correction, the maximum regional copper thickness difference in the second production batch decreased from 4.1 μm to 1.7 μm, and in the third production batch, while maintaining the same parameters, it further stabilized at 1.4 μm.

[0402] Therefore, combining the reagent response matching of standard test pieces with the regional copper thickness feedback of actual production boards can reduce the difference between standard test conditions and specific printed circuit board pattern loads, and form electroplating process parameters that can be reused in subsequent production of the same board type.

[0403] Comparative Example 1: Conventional single-stage electroplating is performed only on the entire plate area to be plated.

[0404] This comparative example uses the same printed circuit board production board, base electroplating solution, and target electroplating thickness as Example 1, but does not perform pattern load partitioning, does not detect or adjust the actual selective inhibition coefficient of the current electroplating solution, and does not set a selective adsorption establishment stage.

[0405] Based on the total area of ​​the conductive pattern to be plated on the entire board, an average current density of 1.8 A / dm² is adopted. 2 A single-stage electroplating process was performed using a direct current. The electroplating solution temperature was 25℃, the flow rate of the electroplating solution on the board surface was 0.55m / s, the reciprocating speed of the production board was 0.18m / s, and the electroplating time was 59min.

[0406] After electroplating, the average copper thicknesses of regions A through F were 20.5 μm, 24.0 μm, 19.8 μm, 23.7 μm, 25.1 μm, and 23.2 μm, respectively. The maximum copper thickness difference among the six regions was 5.3 μm, and the coefficient of variation for the average copper thickness of the regions was 8.8%. The copper thickness difference between the sparse and dense circuit regions was 3.5 μm, and the copper thickness difference between the edge circuit region and the dense circuit region was 4.6 μm.

[0407] Microscopic inspection results showed that the average top width of the lines in the dense line area, sparse line area, and board edge line area were 8.5μm, 13.8μm, and 15.2μm, respectively. The maximum copper nodule height in the area of ​​abrupt change in pattern density was 5.7μm, and the minimum line spacing retention rate after electroplating was 82.6%. Slight roughness and nodules appeared in some areas of the board edge line area, while insufficient copper thickness was found in the large copper surface area and dense line area.

[0408] The above results indicate that setting the average current density based solely on the total area to be plated on the entire board cannot reflect the differences in local current distribution between sparse lines, isolated pads, board edge lines, and large copper surfaces.

[0409] Comparative Example 2: Performing graphic load partitioning without adjusting the selective inhibition state of the electroplating solution.

[0410] This comparative example uses the same production board as Example 1, and divides areas A to F in the same manner as in Example 1. The test results of the standard pattern response test piece are as follows: the average copper thickness increment in the dense line test area is 0.84 μm, the average copper thickness increment in the sparse line test area is 1.11 μm, and the actual selective suppression coefficient is 0.76, which is lower than the target selective suppression coefficient range of 0.92 to 1.00.

[0411] This comparative example does not add leveling agents, inhibitors, or accelerators; it directly uses the above-mentioned electroplating solution for two-stage electroplating. The current, flow rate, board movement speed, and processing time for the selective adsorption establishment stage and the main copper layer thickening stage are the same as in Example 1.

[0412] After electroplating, the average copper thicknesses of regions A through F were 21.4 μm, 23.9 μm, 20.9 μm, 23.5 μm, 24.7 μm, and 22.9 μm, respectively. The maximum copper thickness difference among the six regions was 3.8 μm, and the coefficient of variation for the average copper thickness of the regions was 6.4%. The copper thickness difference between the sparse and dense circuit regions was 2.5 μm, and the copper thickness difference between the edge circuit region and the dense circuit region was 3.3 μm.

[0413] The average line top width in dense line areas, sparse line areas, and board edge line areas were 7.7μm, 10.9μm, and 12.1μm, respectively. The maximum copper nodule height in the area of ​​abrupt change in pattern density was 4.1μm, and the minimum line spacing retention rate after electroplating was 85.7%.

[0414] The results show that the pattern load partitioning can identify different areas to be plated, but if the identification results are not used to adjust the selective suppression state of the actual production plating solution, it is still difficult to fully suppress the relative over-plating of the edge lines and sparse lines.

[0415] Comparative Example 3: Adjusting the selective inhibition state of the electroplating solution without setting a selective adsorption establishment stage.

[0416] This comparative example uses the same production board and pattern load area division method as Example 1, and follows the reagent response adjustment process of Example 1 to make the average copper thickness increment of the dense line test area and the sparse line test area 0.91μm and 0.96μm respectively, with an actual selective inhibition coefficient of 0.95, which is within the target selective inhibition coefficient range.

[0417] After completing the reagent response adjustment, instead of performing the selective adsorption establishment phase with low average current density, the pretreated production plate is directly placed in the electroplating bath, using an average current density of 1.8 A / dm³. 2 A single-stage electroplating process was performed for 59 minutes using a DC current, a plate electroplating solution flow rate of 0.55 m / s, and a production plate reciprocating speed of 0.18 m / s.

[0418] After electroplating, the average copper thicknesses of regions A through F were 21.7 μm, 23.6 μm, 21.1 μm, 23.3 μm, 24.2 μm, and 22.8 μm, respectively. The maximum copper thickness difference among the six regions was 3.1 μm, and the coefficient of variation for the average copper thickness of the regions was 5.0%. The copper thickness difference between the sparse and dense circuit regions was 1.9 μm, and the copper thickness difference between the edge circuit regions and the dense circuit regions was 2.5 μm.

[0419] The average line top width in dense line areas, sparse line areas, and board edge line areas were 7.4μm, 9.8μm, and 10.7μm, respectively. The maximum copper nodule height in the area of ​​abrupt change in pattern density was 3.4μm, and the minimum line spacing retention rate after electroplating was 86.8%.

[0420] The results indicate that although the electroplating solution has reached the target selective inhibition state, when the production board directly enters the high current density body thickening process, the differential inhibition effect of the agent in different pattern load areas has not been fully established, and therefore the same regional copper thickness uniformity as in Example 1 cannot be obtained.

[0421] Summary of Comparative Results

[0422] The main detection results of Example 1 and Comparative Examples 1-3 are as follows:

[0423] Table 5. Main detection results of Example 1 and Comparative Examples 1-3

[0424]

[0425] Compared with Comparative Example 1, the maximum regional copper thickness difference in Example 1 decreased from 5.3 μm to 1.3 μm, a reduction of 75.5%; the regional copper thickness variation coefficient decreased from 8.8% to 2.0%.

[0426] Comparative Examples 2 and 3 illustrate that simply performing patterned load partitioning without adjusting the selective inhibition state of the electroplating solution, or simply adjusting the selective inhibition state of the electroplating solution without setting a selective adsorption establishment stage, cannot achieve the compensation effect of Example 1. Patterned load partitioning, reagent response matching, and the selective adsorption establishment stage together constitute a continuous electroplating process chain.

[0427] Comprehensive performance test

[0428] To comprehensively evaluate the impact of this application on the electroplating quality of printed circuit board patterns, the printed circuit boards obtained in Examples 1-3 and Comparative Examples 1-3 were tested for regional copper thickness uniformity, circuit pattern quality, adaptability to different pattern topologies, continuous production stability, subsequent etching compatibility, and thermal shock reliability. Unless otherwise specified, three printed circuit boards manufactured under the same process conditions were selected for each scheme for retesting, and no fewer than five measurement points were selected for each pattern load area.

[0429] 1. Regional copper thickness uniformity and process repeatability

[0430] The thickness increase of electroplated copper layer in different patterned load areas was detected by X-ray fluorescence thickness gauge, and the measurement results of some dense line areas, sparse line areas and board edge line areas were verified by cross-sectional metallography.

[0431] Example 1, Example 2, and Comparative Example 1 each produced three identical printed circuit boards of their respective types. The maximum copper thickness difference in each board area is as follows:

[0432] Table 6 Results of Electroplating Process Repeatability Test

[0433]

[0434] In both Examples 1 and 2, none of the three test boards showed a maximum copper thickness difference exceeding 3 μm, and the range of repeated tests was 0.3 μm and 0.2 μm, respectively, indicating that the compensation electroplating process of this application has good repeatability.

[0435] 2. Experiment with different pattern topologies for the same plating area

[0436] A first verification area and a second verification area are set up. The first verification area consists of a continuous copper surface, with a total area to be plated of 15.2 cm². 2 The total length of the conductive boundary is 19.6 cm; the second verification area consists of multiple thin lines and isolated pads, with a total area to be plated of 15.0 cm². 2 The total length of the conductive boundary is 82.4 cm. The total area to be plated in the two regions differs by 1.3%, but the total length of the conductive boundary in the second verification region is 4.2 times that of the first verification region. Another production board with the same board type as in Example 2 was taken and processed under the single-stage conditions of Comparative Example 1 as a conventional single-stage verification group.

[0437] Table 7. Copper thickness detection results for different graphic topology regions.

[0438]

[0439] When using conventional single-stage electroplating, a copper thickness difference of 3.7 μm still occurs between two areas with essentially the same total plating area. After using the compensation electroplating method of Example 2, the copper thickness difference between the two areas is reduced to 0.6 μm, a reduction of 83.8%. This result demonstrates that pattern load parameters such as conductive boundary density can identify pattern topological differences that cannot be reflected by the plating area alone.

[0440] 3. Reagent response matching and two-stage electroplating synergistic experiment

[0441] Example 1 was compared with Comparative Examples 2 and 3. Comparative Example 2 included a selective adsorption setup phase but did not perform reagent response matching, while Comparative Example 3 included reagent response matching but did not include a selective adsorption setup phase. Example 1 employed both measures simultaneously.

[0442] The maximum copper thickness difference in Comparative Examples 2, 3, and 1 was 3.8 μm, 3.1 μm, and 1.3 μm, respectively, and the top width of the board edge traces was 12.1 μm, 10.7 μm, and 8.1 μm, respectively. Compared with Comparative Example 2, the maximum copper thickness difference in Example 1 was reduced by 65.8%; compared with Comparative Example 3, the maximum copper thickness difference in Example 1 was reduced by 58.1%.

[0443] The above results indicate that reagent response matching enables the production plating solution to achieve high and low current region difference suppression capability adapted to the plate shape, while the selective adsorption establishment stage is used to implement the difference suppression capability onto the actual plated surface before the main body thickens. The two have a synergistic relationship.

[0444] 4. Stability of continuous production of the same plate type

[0445] In Example 3, the first production batch is used to obtain the actual copper thickness deviation in the region. The second production batch increases the amount of leveling agent added and extends the selective adsorption establishment stage based on the results of the first production batch. The third production batch keeps the parameters of the second production batch unchanged.

[0446] The maximum regional copper thickness differences for the first, second, and third production batches were 4.1 μm, 1.7 μm, and 1.4 μm, respectively, with regional copper thickness variation coefficients of 6.9%, 2.7%, and 2.2%, respectively. The maximum regional copper thickness difference between the second and third production batches differed by 0.3 μm, indicating that the leveling agent replenishment amount and selective adsorption establishment time determined by the regional copper thickness feedback of the production board can be used for subsequent production of the same board type.

[0447] 5. Subsequent film removal and etching compatibility test

[0448] The printed circuit boards obtained in Examples 1, 2, and 1 were subsequently processed under the same stripping and alkaline etching conditions. Twenty lines were selected from the dense line area, sparse line area, and edge line area of ​​each board, and the top width, bottom width, minimum line spacing, and line overlap of the etched lines were tested.

[0449] Table 8 Results of subsequent film removal and etching compatibility tests

[0450]

[0451] In Comparative Example 1, due to excessive copper layer thickness at the top of sparse and edge lines, four areas of residual copper or insufficient spacing between adjacent lines appeared after etching. In Examples 1 and 2, no line overlap or continuous residual copper was found, indicating that the uniform electroplated copper layer formed in this application can improve the consistency of line dimensions during subsequent etching processes.

[0452] 6. Copper layer bonding condition and thermal shock test

[0453] Samples were selected from the production boards obtained in Example 1, Example 2, and Comparative Example 1 for cross-sectional observation and thermal shock testing. The thermal shock test was conducted in a solder bath at 288±5℃, with each immersion lasting 10 seconds, followed by removal and cooling to room temperature, and the process was repeated 3 times.

[0454] Table 9 Copper layer bonding status and thermal shock test results

[0455]

[0456] The electroplated copper layers in Examples 1 and 2 showed continuous bonding with the base copper. No blistering, peeling, or through cracks were found in the copper layer after thermal shock, indicating that the uniformity of copper thickness was achieved through reagent response adjustment and two-stage electroplating without significantly affecting the reliability of the copper layer bonding.

[0457] 7. Comprehensive Analysis

[0458] Comprehensive tests show that, compared with Comparative Example 1, the maximum copper thickness difference in Example 1 was reduced by 75.5%; the maximum copper thickness difference in Example 2 was 1.1 μm.

[0459] In two verification regions with the same area but a conductive boundary length that differs by a factor of 4.2, the difference in copper thickness in the region decreased from 3.7 μm to 0.6 μm, indicating that the patterned load partitioning can identify patterned topological differences outside the area to be plated.

[0460] Comparative Examples 2 and 3 show that the graphic load analysis, reagent response matching and selective adsorption establishment stages sequentially complete plate type identification, plating solution state adjustment and plate surface inhibition state establishment, and have a synergistic relationship.

[0461] This application thereby improves the uniformity of copper thickness in different patterned load areas, the adaptability to subsequent etching, and the stability of continuous production.

Claims

1. A printed circuit board compensation electroplating method based on pattern density partitioning, characterized in that, include: Obtain production data of a printed circuit board with conductive patterns to be plated, and divide the printed circuit board into multiple pattern load areas based on the copper density variation and pattern boundaries of the conductive patterns to be plated. Based on the copper density, conductive boundary density, density difference between adjacent areas and board edge distance of each pattern load area, the overplating tendency of each pattern load area is determined, and the overall pattern load contrast is determined based on the overplating tendency distribution of each pattern load area. The target selective inhibition coefficient range of the electroplating solution is determined based on the overall plate pattern load contrast. The actual selective inhibition coefficients of the current electroplating solution for high local current regions and low local current regions are obtained. At least one of the inhibitors, leveling agents and accelerators in the current electroplating solution is adjusted so that the actual selective inhibition coefficients are within the target selective inhibition coefficient range. The printed circuit board is placed in the adjusted electroplating solution, and the selective adsorption establishment stage and the main copper layer thickening stage are performed sequentially. The average current density and / or processing time of the selective adsorption establishment stage are determined according to the overall pattern load contrast of the board. The average current density of the main copper layer thickening stage is higher than the average current density of the selective adsorption establishment stage.

2. The method according to claim 1, characterized in that, The graphic load area includes at least three of the following: dense line area, sparse line area, large copper area, isolated pad area, board edge line area, and graphic density abrupt area. The pattern density abrupt change region is a strip-shaped region located on both sides of the boundary line of the two adjacent pattern load regions and no more than 5 mm away from the boundary line when the difference in copper density between two adjacent pattern load regions is not less than 15 percentage points.

3. The method according to claim 2, characterized in that, The patterned load area with a copper cladding density lower than 80% of the average copper cladding density of the entire board and a conductive boundary density higher than 120% of the average conductive boundary density of the entire board is identified as a region with a high overplating tendency. The patterned load area with a copper cladding density higher than 120% of the average copper cladding density of the entire board and a conductive boundary density lower than 80% of the average conductive boundary density of the entire board is identified as a low deposition tendency area. Sparse line areas or isolated pad areas no more than 10mm from the edge of the printed circuit board are defined as areas where the board edge is higher than the plating tendency.

4. The method according to claim 1, characterized in that, The actual selective inhibition coefficient is determined by a standard pattern response test piece, which includes a dense line test area and a sparse line test area. The difference between the total areas to be plated in the two test areas does not exceed 5% of the larger total area to be plated. Using the aforementioned electroplating solution, at an electroplating solution temperature of 22–28°C and an A / dm³ / dt, 2 Under the same average current density and the same electroplating solution cycling conditions, the standard pattern response test piece was electroplated for 30–90 s; At least five measurement points are selected in the dense line test area and the sparse line test area respectively to determine the average copper thickness increment of the two test areas, and the ratio of the average copper thickness increment of the dense line test area to the average copper thickness increment of the sparse line test area is determined as the actual selective suppression coefficient.

5. The method according to claim 4, characterized in that, When the actual selective inhibition coefficient is lower than the lower limit of the target selective inhibition coefficient range, a leveling agent is first added to the current electroplating solution; if the actual selective inhibition coefficient is still lower than the lower limit after adding the leveling agent and retesting, an inhibitor is then added. When the actual selective inhibition coefficient is higher than the upper limit of the target selective inhibition coefficient range, stop adding the leveling agent and add an accelerator to the current electroplating solution; The total replenishment amount is determined based on the effective volume of the electroplating tank and the deviation between the actual selective inhibition coefficient and the target selective inhibition coefficient range. The initial replenishment amount is 40% to 70% of the total replenishment amount, and the remaining replenishment amount is added in one or more batches based on the retest results. The last replenishment amount is the remaining replenishment amount. After each replenishment, the current electroplating solution is circulated for 5 to 20 minutes, and the standard graphic response test piece is electroplated again until the actual selective inhibition coefficient is within the target selective inhibition coefficient range.

6. The method according to claim 2, characterized in that, The selective adsorption establishment stage is carried out at an electroplating bath temperature of 20–30°C, using an average current density of 0.2–0.8 A / dm³. 2 The processing time is 20–120 seconds for either direct current or unidirectional pulse current. When the unidirectional pulse current is used, the pulse duty cycle is 20% to 60% and the pulse frequency is 1 to 50 Hz.

7. The method according to claim 6, characterized in that, After completing the selective adsorption establishment phase, the average current density is increased to 1.0–3.0 A / dm³. 2 To perform the main copper layer thickening stage; The average current density during the copper layer thickening stage is 2 to 8 times that during the selective adsorption establishment stage, and electroplating is performed using direct current, unidirectional pulse current, or periodic commutation pulse current until the average copper layer thickness of the conductive pattern to be plated reaches 15 to 35 μm.

8. The method according to claim 7, characterized in that, During the selective adsorption establishment stage and the main copper layer thickening stage, the electroplating solution is continuously circulated, and the printed circuit board is moved back and forth in a direction perpendicular to the surface of the electroplating solution. The flow rate of the electroplating solution on the board surface during the selective adsorption establishment stage is 0.1–0.4 m / s, and the flow rate of the electroplating solution on the board surface during the main copper layer thickening stage is 0.3–0.8 m / s. The reciprocating speed of the printed circuit board during the main copper layer thickening stage is 1.2 to 2.5 times that of the reciprocating speed of the printed circuit board during the selective adsorption establishment stage.

9. The method according to claim 7, characterized in that, After completing the main copper layer thickening stage, at least five measurement points are selected in the dense line area, sparse line area and board edge line area respectively to detect the copper layer thickening amount, and the average copper layer thickening amount of each measurement point is determined as the corresponding area copper layer thickening amount. The sparse circuit region and the edge circuit region are compared with the dense circuit region, and the region with the larger absolute value of the copper thickness difference is identified as the deviation target region. When the absolute values ​​of the copper thickness difference are equal, the edge circuit region is identified as the deviation target region. When the copper plating thickness increase of the deviation target region is higher than that of the dense circuit region, and the difference between the two is greater than 3 μm, the leveling agent replenishment amount of the next batch of the same type of production is increased by 5% to 15%, and / or the processing time of the selective adsorption establishment stage is extended by 10 to 30 seconds. When the increase in copper plating thickness in the target deviation area is lower than that in the dense circuit area, and the difference between the increase in copper plating thickness in the dense circuit area and the increase in copper plating thickness in the target deviation area is greater than 3 μm, the leveling agent replenishment amount in the next similar production batch will be reduced by 5% to 15%, and / or the processing time of the selective adsorption establishment stage will be shortened by 10 to 30 seconds; the benchmark for increasing or decreasing is the leveling agent benchmark replenishment amount for the corresponding maintenance cycle of the previous similar production batch.

10. The method according to claim 9, characterized in that, The next production batch of the same type is a production batch that uses the same printed circuit board graphic data, the same panelization method, and the same target electroplating thickness increase. Based on the adjusted leveling agent replenishment amount and / or the processing time of the selective adsorption establishment stage, the next batch of the same type of production is subjected to compensatory electroplating, and the increase in copper plating thickness in the dense line area, sparse line area and board edge line area is re-inspected after the electroplating is completed. When the absolute value of the copper thickness difference between the sparse line area and the dense line area, and the absolute value of the copper thickness difference between the board edge line area and the dense line area are both no greater than 3μm, the current leveling agent replenishment amount and the processing time of the selective adsorption establishment stage are maintained for subsequent electroplating processing of the same printed circuit board.

Images