Capacitor, capacitor manufacturing method, and memory device manufacturing method

Abstract

A capacitor manufacturing method includes forming a lower electrode having a first electrode layer, a second electrode layer formed inside the first electrode layer, and a third electrode layer formed inside the second electrode layer, and a support member supporting an outer wall of the lower electrode, removing the first electrode layer of the lower electrode at an exposed side wall, forming a dielectric film on an outer surface of the lower electrode, and forming an upper electrode on the dielectric film, according to one embodiment of the present invention.

Description

Technical Field

[0001] This invention relates to capacitors and methods for manufacturing capacitors, as well as methods for manufacturing storage devices. More specifically, it relates to capacitors formed by partially removing a portion of the lower electrode and creating a metal oxide having a high work function, methods for manufacturing the same, and methods for manufacturing storage devices. Background Technology

[0002] Currently, ongoing research is being conducted on MIM (metal / insulator / metal) capacitors using metal electrodes in DRAM devices. Titanium nitride (TiN) films, with their low resistivity and high stability, are currently widely used as electrode materials.

[0003] With the continuous integration of semiconductor devices, the size of capacitors used in semiconductor devices is constantly shrinking. Various studies are underway to improve the capacitance of dielectric films such as HfO2 and ZrO2 within limited space. To promote the crystallization of dielectric films, methods using materials with high work functions, such as Nb2O5, as seed layers have been proposed.

[0004] This method allows for the formation of crystal structures with high dielectric constants even at relatively low temperatures. However, a problem exists: the seed layer deposits not only where it should be deposited but also on the support (silicon nitride, SiN), leading to leakage current. Therefore, selective deposition is required.

[0005] Recently, another approach has been proposed to improve the crystallization of dielectric films by replacing the TiN electrode with high work function materials such as NbN, TaN, or MoN. While these materials are high work function materials that promote dielectric film crystallization, they also have high resistivity, leading to poor contact resistance when directly deposited on contact plugs (W, tungsten). Therefore, they cannot be used alone but rather as composite electrodes of TiN / NbN / TiN.

[0006] When depositing a TiN / NbN / TiN composite electrode, Nb diffuses into the TiN electrode below through heat treatment, forming a doped TiN film, which has the same effect as depositing Nb₂O₅ in improving crystallinity. However, the effect is smaller compared to directly depositing Nb₂O₅ on the TiN electrode. To further improve the dielectric constant, a process is needed that can selectively deposit Nb₂O₅ only on the TiN electrode. Summary of the Invention

[0007] The technical problem that the invention aims to solve:

[0008] The purpose of this invention is to provide a method for manufacturing capacitors and memory devices that can improve the properties of thin films.

[0009] Other objects and advantages of the present invention will become clearer from the following detailed description.

[0010] Technical solutions to the technical problems:

[0011] According to one embodiment of the present invention, a capacitor manufacturing method includes: forming a lower electrode comprising a first electrode layer, a second electrode layer formed inside the first electrode layer, and a third electrode layer formed inside the second electrode layer, and a support member supporting the outer wall of the lower electrode; removing the first electrode layer located on the exposed sidewall of the lower electrode; forming a dielectric film on the outer surface of the lower electrode; and forming an upper electrode on the dielectric film.

[0012] The first and third electrode layers may include at least one of the following: a tetravalent metal nitride film containing TiN, a pentavalent metal nitride film containing NbN or TaN, a hexavalent metal nitride film containing MoN or WN, and a tetravalent quasi-metal nitride film containing SiN or TiSiN.

[0013] The second electrode layer can have a higher work function than the first electrode layer.

[0014] The second electrode layer may include at least one of a tetravalent metal nitride film containing TiN, a pentavalent metal nitride film containing NbN or TaN, and a hexavalent metal nitride film containing MoN or WN.

[0015] The process of removing the first electrode layer can be wet etching, dry etching, or ALE (atomic layer etching).

[0016] The step of removing the first electrode layer may include: removing the first electrode layer from the outer wall of the lower electrode to expose the second electrode layer; and retaining the first electrode layer inside the support and adjacent to the contact plug.

[0017] The dielectric film may include a trivalent metal oxide film containing Al2O3, a tetravalent metal oxide film containing ZrO2 and HfO2, a pentavalent metal oxide film containing Ta2O5, or a combination thereof.

[0018] The steps of forming a dielectric film may include: oxidizing a second electrode layer located on the exposed sidewall of the lower electrode to form an interface layer.

[0019] The step of removing the first electrode layer may include: oxidizing the second electrode layer located on the exposed sidewall of the lower electrode to form an interface layer.

[0020] The steps of forming the interface layer may include: retaining a second electrode layer located inside the support and above the contact plug in the lower electrode.

[0021] The interface layer may include at least one of titanium oxide (TiOx), niobium oxide (NbOx), tantalum oxide (TaOx), molybdenum oxide (MoOx), and tungsten oxide (WOx).

[0022] According to one embodiment of the present invention, a method for manufacturing a storage device may include the capacitor manufacturing method described above.

[0023] According to one embodiment of the present invention, the capacitor includes: a contact plug on a substrate; a lower electrode on the contact plug; a support member supporting the outer wall of the lower electrode; a dielectric layer on the lower electrode; an upper electrode on the dielectric layer; and an interface layer between the lower electrode and the dielectric layer, wherein the lower electrode is continuously deposited in first to third electrode layers inside the support member and on the upper part of the contact plug.

[0024] The lower electrode may further include a second and a third electrode layer continuously stacked within the interface layer at the outer wall.

[0025] According to one embodiment of the present invention, the capacitor can be formed into a dielectric film with a high dielectric constant.

[0026] Invention effects:

[0027] According to one embodiment of the present invention, the capacitor can form a dielectric film with a high dielectric constant, thereby not only forming a high dielectric constant thin film, but also shortening the entire capacitor manufacturing process and improving the performance and manufacturing yield of semiconductor devices. Attached Figure Description

[0028] Figure 1 This is a schematic cross-sectional view of a capacitor according to an embodiment of the present invention.

[0029] Figure 2A and Figure 2B This is a schematic view illustrating the capacitor manufacturing method of Comparative Example 1.

[0030] Figure 3A and Figure 3B This is a schematic view illustrating the capacitor manufacturing method of Comparative Example 2.

[0031] Figures 4A to 4C This is a schematic view illustrating the capacitor manufacturing method of Comparative Example 3.

[0032] Figures 5A to 5E This is a schematic view illustrating a capacitor manufacturing method according to an embodiment of the present invention. Detailed Implementation

[0033] Preferred embodiments of the present invention will now be described in more detail with reference to the accompanying drawings.

[0034] Figure 1This is a schematic cross-sectional view of a capacitor according to an embodiment of the present invention.

[0035] like Figure 1 As shown, the capacitor may include a lower electrode 101, an interface layer 102, a dielectric layer 103, and an upper electrode 104.

[0036] The lower electrode 101 may include silicon, a metal, a metal compound, or a combination thereof. The metal compound may include a metal, a metal nitride, a metal silicon nitride, a conductive metal oxide, a metal silicide, a noble metal, or a combination thereof. The lower electrode 101 may include at least one of titanium (Ti), titanium nitride (TiN), titanium silicon nitride (TiSiN), niobium nitride (NbN), tantalum (Ta), tantalum nitride (TaN), titanium aluminum nitride (TiAlN), tungsten (W), tungsten nitride (WN), ruthenium (Ru), ruthenium oxide (RuO2), iridium (Ir), iridium oxide (IrO2), platinum (Pt), molybdenum (Mo), and molybdenum nitride (MoN), or a combination thereof. Furthermore, the lower electrode 101 may also include a silicon compound. The lower electrode 101 may include a silicon layer, a silicon-germanium layer, or a combination thereof. Although... Figure 1 The lower electrode 101 is shown as having a flat shape, but the shape of the lower electrode 101 is not limited to this.

[0037] An interface layer 102 can be formed between the lower electrode 101 and the dielectric layer 103. The interface layer 102 can be formed by partially removing the lower electrode 101 using wet cleaning etch, dry cleaning etch, or ALE (Atomic Layer Etch) processes, or by transforming a metal nitride film into a metal oxide film during the formation of the dielectric film after removal. Metal oxides with high work function can improve the electrical characteristics of capacitors such as leakage current and dielectric constant.

[0038] The interface layer 102 may include metal oxides, such as titanium oxide (TiOx), niobium oxide (NbOx), tantalum oxide (TaOx), molybdenum oxide (MoOx), and tungsten oxide (WOx).

[0039] The dielectric layer 103 may include a metal oxide. The dielectric layer 103 may include, but is not limited to, aluminum oxide (Al2O3), titanium oxide (TiO2), hafnium oxide (HfO2), zirconium oxide (ZrO2), tantalum oxide (Ta2O5), or combinations thereof.

[0040] The upper electrode 104 may include metal nitrides such as titanium nitride (TiN), niobium nitride (NbN), tantalum nitride (TaN), molybdenum nitride (MoN), and tungsten nitride (WN), or combinations thereof, and may also include silicon-containing materials. Although Figure 1 The upper electrode 104 is shown as having a flat shape, but the shape of the upper electrode 104 is not limited to this.

[0041] As described above, in a capacitor according to an embodiment of the present invention, by partially removing the lower electrode 101 and forming a metal oxide with a high work function, a dielectric layer 103 with a larger dielectric constant can be obtained, thereby enabling the formation of a capacitor with improved electrical characteristics.

[0042] Figure 2A and Figure 2B This is a schematic view illustrating the capacitor manufacturing method of Comparative Example 1.

[0043] A capacitor structure with a lower electrode 201 and a support member 205 is shown. (Example) Figure 2A As shown, the lower electrode 201 can be pillar-shaped and uses titanium nitride (TiN) with low resistivity and high stability. The support 205 can include silicon nitride (Si3N4) or silicon carbonitride (SiCN) to support the lower electrode 201 and prevent it from collapsing. Figure 2B As shown, the interface layer 202 is deposited on the lower electrode 201, which facilitates the crystallization of the dielectric film subsequently formed. When the interface layer 202 is deposited on the lower electrode 201, a crystalline structure with a high dielectric constant can be formed even at lower temperatures. However, when the interface layer 202 is deposited on the support 205, there is an issue of increased leakage current. Therefore, a high-selectivity interface layer 202 deposition process is required, selectively depositing the interface layer 202 only on the lower electrode 201 and not on the support 205. Furthermore, even with selective deposition of the interface layer 202, if a portion remains on the support 205, there is still a possibility of increased leakage current. Therefore, a process is needed to completely remove the interface layer 202 remaining on the support 205. This selective interface layer 202 deposition or removal process delays the entire capacitor manufacturing process and leads to a decrease in UPH (Ultra-High Power).

[0044] Figure 3A and Figure 3B This is a schematic view illustrating the capacitor manufacturing method of Comparative Example 2.

[0045] The lower electrode 301 includes a composite structure of a first electrode layer 301-1 and a second electrode layer 301-2. The first electrode layer 301-1 uses a metal nitride with a high work function, such as niobium nitride (NbN), and the second electrode layer 301-2 can use a titanium nitride (TiN) with low resistivity, and can be formed inside the first electrode layer 301-1.

[0046] like Figure 3BAs shown, a dielectric film 303 is formed on the lower electrode 301. With the formation of the dielectric film 303, the first electrode layer 301-1 is oxidized to form an interface layer 302. The interface layer 302 acts as an oxidation prevention film to prevent the second electrode layer 301-2 from being oxidized.

[0047] The interface layer 302 helps the dielectric film 303 to crystallize, thereby facilitating the formation of a crystalline structure with a high dielectric constant. However, since the lower contact plug (W, tungsten) interface is still in contact with the high-resistance first electrode layer 301-1, the contact resistance increases, resulting in a decrease in the electrical characteristics of the capacitor.

[0048] Figures 4A to 4C This is a schematic view illustrating the capacitor manufacturing method of Comparative Example 3.

[0049] The lower electrode 401 includes a composite structure of a first electrode layer 401-1 and a second electrode layer 401-2. The first electrode layer 401-1 uses a metal nitride such as titanium nitride (TiN) with low resistivity, and the second electrode layer 401-2 uses a metal nitride such as niobium nitride (NbN), which can be used as a dopant. The second electrode layer 401-2 can be formed inside the first electrode layer 401-1.

[0050] like Figure 4B As shown, a doped region 401-1d can be formed by moving the dopant present in the second electrode layer 401-2 into the first electrode layer 401-1. For example, by raising the temperature of the first electrode layer 401-1 and the second electrode layer 401-2, the dopant in the second electrode layer 401-2 can diffuse into the first electrode layer 401-1 to form the doped region 401-1d. After the doped region 401-1d is formed, the second electrode layer 401-2 can be removed, and a third electrode layer 401-3 can be deposited inside the doped region 401-1d to form the lower electrode 401. The third electrode layer 401-3 can use a metal nitride such as titanium nitride (TiN) with low resistivity, or it can contain silicon-containing materials.

[0051] like Figure 4C As shown, a dielectric film 403 is formed on the lower electrode 401 having doped regions 401-1d. Since the resistivity of the doped regions 401-1d of the lower electrode 401 is lower than that of niobium nitride (NbN), the contact resistance does not increase significantly even when in contact with the lower contact plug (W, tungsten). Furthermore, crystallization of the dielectric film 403 can be promoted, forming a crystalline structure with a higher dielectric constant than that without doped regions. However, the effect is expected to be lower compared to directly depositing niobium oxide (Nb2O5) or similar materials with high work functions on the lower electrode 401. Therefore, to further improve the dielectric constant, a process capable of selectively depositing niobium oxide (Nb2O5) or similar materials only on the lower electrode 401 is needed.

[0052] Figures 5A to 5E This is a schematic view illustrating a capacitor manufacturing method according to an embodiment of the present invention.

[0053] The lower electrode 501 comprises a composite structure of a first electrode layer 501-1, a second electrode layer 501-2, and a third electrode layer 501-3. The lower electrode 501 can be pillar-shaped. The bottom surface of the lower electrode 501 contacts a contact plug (W, tungsten), which penetrates the insulating layer formed on the substrate and is connected to the substrate. The contact plug (W, tungsten) can be referred to as a storage node contact plug and may include semiconductor materials, metals, metal nitrides, metal silicides, or combinations thereof. Specifically, it may include polysilicon, tungsten, tungsten nitrides, titanium nitrides, titanium silicon nitrides, titanium silicides, cobalt silicides, or combinations thereof. The lower electrode 501 may include silicon, metals, metal compounds, or combinations thereof, but is not limited thereto.

[0054] The first electrode layer 501-1 can be at least one of the following: a tetravalent metal nitride film containing TiN, a pentavalent metal nitride film containing NbN or TaN, a hexavalent metal nitride film containing MoN or WN, or a tetravalent quasi-metal nitride film containing SiN or TiSiN. Specifically, it can include metal nitrides such as titanium nitride (TiN), niobium nitride (NbN), tantalum nitride (TaN), molybdenum nitride (MoN), and tungsten nitride (WN), or combinations thereof, and may also include silicon-containing materials. The first electrode layer 501-1 can be cylindrical.

[0055] The second electrode layer 501-2 is a material with a high work function, and may include at least one of the following: a tetravalent metal nitride film containing TiN, a pentavalent metal nitride film containing NbN or TaN, and a hexavalent metal nitride film containing MoN or WN. Specifically, it may include metal nitrides such as niobium nitride (NbN), tantalum nitride (TaN), molybdenum nitride (MoN), and tungsten nitride (WN), and may be formed inside the first electrode layer 501-1 in a cylindrical shape.

[0056] The third electrode layer 501-3 can be at least one of the following: a tetravalent metal nitride film containing TiN, a pentavalent metal nitride film containing NbN or TaN, a hexavalent metal nitride film containing MoN or WN, or a tetravalent quasi-metal nitride film containing SiN or TiSiN. Specifically, it can include metal nitrides such as titanium nitride (TiN), niobium nitride (NbN), tantalum nitride (TaN), molybdenum nitride (MoN), and tungsten nitride (WN), or combinations thereof, and may also contain silicon-containing materials. The third electrode layer 501-3 can be formed inside the second electrode layer 501-2 and is cylindrical.

[0057] The support 505 may include a plate-like structure extending horizontally to support the outer wall of the adjacent lower electrode 501. The support 505 may include silicon nitride (Si3N4) or silicon carbonitride (SiCN) and may support the lower electrode 501 to prevent collapse.

[0058] like Figure 5B As shown, after forming the lower electrode 501, which includes a first electrode layer 501-1, a second electrode layer 501-2, and a third electrode layer 501-3, the first electrode layer 501-1 located on the sidewall of the lower electrode 501 can be removed. The first electrode layer 501-1 can be removed by methods such as wet cleaning etch, dry cleaning etch, or ALE (Atomic Layer Etch) processes, which can be referred to below. Figure 5C and Figure 5D Please provide an explanation.

[0059] Figure 5C These are the TEM analysis results of the TiN wafer used as the first electrode layer 501-1. Figure 5D These are the TEM analysis results after the ALE procedure.

[0060] like Figure 5D As shown, after the ALE process, an 11.7 Å TiN film was removed. The EPC of the ALE process is approximately 0.23 Å / cycle. The desired thickness of TiN can be controlled and removed by adjusting the number of ALE cycles. The ALE process is one example of TiN removal, but removal methods are not limited to this.

[0061] In summary, by removing the first electrode layer 501-1 located on the sidewall of the lower electrode 501, the second electrode layer 501-2 can be exposed, forming a lower electrode 501 with a composite structure including the second electrode layer 501-2 and the third electrode layer 501-3. The exposed second electrode layer 501-2 is a material with a high work function, which can promote the crystallization of the dielectric film during subsequent dielectric film deposition, contributing to the formation of a crystalline structure with a high dielectric constant. On the other hand, the lower electrode 501 in contact with the lower contact plug (W, tungsten) can form a composite structure including the first electrode layer 501-1, the second electrode layer 501-2, and the third electrode layer 501-3. Due to the structure in which the lower contact plug (W, tungsten) contacts the low-resistance first electrode layer 501-1, the contact resistance of the lower contact plug (W, tungsten) does not increase, and a lower electrode 501 structure with improved sidewall interface characteristics can be formed.

[0062] like Figure 5EAs shown, after removing only the first electrode layer 501-1 located on the sidewall of the lower electrode 501, a dielectric film 503 can be deposited. The dielectric film 503 can be formed on the lower electrode 501 and the support 505. The dielectric film 503 may include a trivalent metal oxide film containing Al2O3, a tetravalent metal oxide film containing ZrO2 and HfO2, a pentavalent metal oxide film containing Ta2O5, or a combination thereof. The second electrode layer 501-2 can be transformed from a metal nitride film to a metal oxide to form the interface layer 502 by removing the first electrode layer 501-1 or by an oxidation process during the deposition of the dielectric film. However, Figure 5E Although it is shown that the second electrode layer 501-2 is completely oxidized to form the interface layer 502, in contrast, the second electrode layer 501-2 may also be partially oxidized to form the interface layer 502, with the remainder remaining inside the interface layer 502. That is, the second electrode layer 501-2 and the interface layer 502 can coexist. The interface layer 502, which has a high work function, promotes crystallization during the deposition of the dielectric film, which helps to form a crystalline structure with a high dielectric constant. This enables the formation of a high dielectric constant film and acts as an oxidation prevention film to prevent the lower electrode 501 from being oxidized, thereby preventing an increase in leakage current due to the oxidation of the lower electrode.

[0063] The interface layer 502 may include, but is not limited to, metal oxides such as titanium oxide (TiOx), niobium oxide (NbOx), tantalum oxide (TaOx), molybdenum oxide (MoOx), and tungsten oxide (WOx).

[0064] Next, an upper electrode can be formed on the dielectric film 503. The upper electrode can fill the space between adjacent lower electrodes 501. The upper electrode can include metal nitrides such as titanium nitride (TiN), niobium nitride (NbN), tantalum nitride (TaN), molybdenum nitride (MoN), tungsten nitride (WN), or combinations thereof, and may also include silicon-containing materials.

[0065] Based on the above description, a capacitor film with a high dielectric constant can be formed. Compared with Comparative Example 1, since no interface layer (502) is formed on the support (505), a selective interface layer (502) formation and removal process is not required, thereby shortening the overall capacitor manufacturing process.

[0066] Furthermore, compared to Comparative Example 2, since the low-resistance TiN is in contact with the lower W interface in this structure, the contact resistance of W will not increase, and a structure that improves the sidewall interface characteristics can be formed.

[0067] Finally, compared to Comparative Example 3, a high work function material can be directly formed on the lower electrode, which helps to form a crystalline structure with a high dielectric constant; and a thicker dielectric film can be deposited within the thickness range of the first electrode layer (501-1) after removal, which is expected to form a thin film with a high dielectric constant.

[0068] The present invention has been described in detail above through embodiments, but other embodiments are also possible. Therefore, the technical concept and scope of the following claims are not limited to the above embodiments.

Claims

1. A capacitor, comprising: Contact plugs on the substrate; The lower electrode on the contact plug; A support member that supports the outer wall of the lower electrode; The dielectric layer on the lower electrode; the upper electrode on the dielectric layer; and the interface layer between the lower electrode and the dielectric layer, wherein the lower electrode has a first to a third electrode layer sequentially stacked inside the support and on the upper part of the contact plug.

2. The capacitor according to claim 1, wherein the lower electrode has a second electrode layer and a third electrode layer stacked sequentially inside the interface layer at the outer wall.

3. The capacitor according to claim 1 or 2, wherein: The first and third electrode layers include at least one of a tetravalent metal nitride film containing TiN, a pentavalent metal nitride film containing NbN or TaN, a hexavalent metal nitride film containing MoN or WN, and a tetravalent quasi-metal nitride film containing SiN or TiSiN; and the second electrode layer has a higher work function than the first electrode layer.

4. The capacitor according to claim 1 or 2, wherein the second electrode layer comprises at least one of a tetravalent metal nitride film containing TiN, a pentavalent metal nitride film containing NbN and TaN, and a hexavalent metal nitride film containing MoN and WN.

5. A method for manufacturing a capacitor for a semiconductor device, comprising: The steps include: forming a lower electrode (located on a contact plug) having a first electrode layer, a second electrode layer formed inside the first electrode layer, and a third electrode layer formed inside the second electrode layer; and a support member supporting the outer wall of the lower electrode; removing the first electrode layer located on the exposed sidewall of the lower electrode; forming a dielectric film on the outer surface of the lower electrode; and forming an upper electrode on the dielectric film.

6. The manufacturing method according to claim 5, wherein the first and third electrode layers comprise at least one of a tetravalent metal nitride film containing TiN, a pentavalent metal nitride film containing NbN and TaN, a hexavalent metal nitride film containing MoN and WN, and a tetravalent quasi-metal nitride film containing SiN and TiSiN.

7. The manufacturing method according to claim 5, wherein the second electrode layer has a higher work function than the first electrode layer.

8. The manufacturing method according to claim 5, wherein the second electrode layer comprises at least one of a tetravalent metal nitride film containing TiN, a pentavalent metal nitride film containing NbN and TaN, and a hexavalent metal nitride film containing MoN and WN.

9. The manufacturing method according to claim 5, wherein the step of removing the first electrode layer can be a wet etching, dry etching, or ALE (atomic layer etching) process.

10. The manufacturing method according to claim 5, wherein the step of removing the first electrode layer comprises: Remove the first electrode layer from the outer wall of the lower electrode to expose the second electrode layer; And retain the interior of the support member and the first electrode layer adjacent to the contact plug.

11. The manufacturing method according to claim 5, wherein the dielectric film comprises a trivalent metal oxide film containing Al2O3, a tetravalent metal oxide film containing ZrO2 and HfO2, a pentavalent metal oxide film containing Ta2O5, or a combination thereof.

12. The manufacturing method according to claim 5, wherein the step of forming the dielectric film comprises: The step of oxidizing the second electrode layer located on the exposed sidewall of the lower electrode to form an interface layer.

13. The manufacturing method according to claim 5, wherein the step of removing the first electrode layer comprises: The step of oxidizing the second electrode layer located on the exposed sidewall of the lower electrode to form an interface layer.

14. The manufacturing method according to claim 12 or 13, wherein the step of forming the interface layer comprises: The step of retaining the second electrode layer located inside the support and above the contact plug in the lower electrode.

15. The manufacturing method according to claim 12 or 13, wherein the interface layer comprises at least one selected from titanium oxide (TiOx), niobium oxide (NbOx), tantalum oxide (TaOx), molybdenum oxide (MoOx), and tungsten oxide (WOx).

16. A method for manufacturing a storage device, comprising a method for manufacturing a capacitor according to any one of claims 5 to 13.

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