Semiconductor structure

Abstract

Embodiments of the present application provide a semiconductor structure. The semiconductor structure comprises: a substrate, the substrate being provided with a first functional region and an isolation region surrounding the first functional region, the first functional region having a first doping element; a first metal electrode provided on the first functional region; and a second metal electrode provided on the isolation region and electrically connected with the first metal electrode. The semiconductor structure in the embodiments of the present application can increase the reverse breakdown voltage of a Schottky diode.

Description

Technical Field

[0001] This application relates to the field of semiconductors, and more particularly to a semiconductor structure. Background Technology

[0002] With the development of semiconductor technology, the applications of various semiconductor structures are becoming increasingly widespread. Among them, diodes are used for both regulation and switching, and typically include ordinary diodes and Schottky diodes. Ordinary diodes include P-type and N-type semiconductors, while Schottky diodes combine semiconductors and metals. Compared to ordinary diodes, they have a faster recovery speed and are widely used in high-frequency applications. However, Schottky diodes often have a relatively low reverse breakdown voltage. Summary of the Invention

[0003] This application provides a semiconductor structure, including:

[0004] A substrate having a first functional region and an isolation region surrounding the first functional region, the first functional region having a first doping element;

[0005] A first metal electrode is disposed on the first functional area;

[0006] A second metal electrode is disposed in the isolation region and electrically connected to the first metal electrode.

[0007] In some possible implementations, a second functional region is disposed on the substrate, the second functional region being disposed on the side of the isolation region away from the first functional region and surrounding the isolation region, the second functional region having a second doping element, the concentration of the second doping element being greater than the concentration of the first doping element, and the first doping element and the second doping element being of the same type;

[0008] The semiconductor structure further includes a third metal electrode disposed on the second functional region.

[0009] In some possible implementations, the semiconductor structure further includes a metal-semiconductor compound layer disposed between the third metal electrode and the second functional region.

[0010] In some possible implementations, the second metal electrode is disposed on the isolation region and spaced apart from the first metal electrode.

[0011] In some possible implementations, the second metal electrode is disposed on the isolation region and extends into the first functional region to contact the first metal electrode.

[0012] In some possible implementations, at least a portion of the second metal electrode is embedded within the isolation region.

[0013] In some possible implementations, the second metal electrode is embedded within the isolation region, and the top surface of the second metal electrode on the side away from the substrate is flush with the top surface of the isolation region.

[0014] In some possible implementations, a portion of the second metal electrode is embedded within the isolation region, with the top surface of the second metal electrode on the side away from the substrate higher than the top surface of the isolation region.

[0015] In some possible implementations, the substrate may further include a third functional region disposed between the first functional region and the isolation region, the third functional region having a third doping element.

[0016] In some possible implementations, the semiconductor structure further includes a fourth metal electrode spaced apart from the second metal electrode, the fourth metal electrode being disposed in the isolation region and electrically connected to the first metal electrode.

[0017] In some possible implementations, the second metal surrounds the first metal electrode. Attached Figure Description

[0018] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.

[0019] Figure 1 This is a schematic diagram of a Schottky diode;

[0020] Figure 2 A schematic diagram of the first Schottky diode provided in this application;

[0021] Figure 3 A schematic diagram of the forward bias of the first Schottky diode provided in this application;

[0022] Figure 4 A schematic diagram of the reverse bias of the first Schottky diode provided in this application;

[0023] Figure 5 A schematic diagram of the forward bias of the second type of Schottky diode provided in this application;

[0024] Figure 6 A reverse-biased schematic diagram of the second type of Schottky diode provided in this application;

[0025] Figure 7 A schematic diagram of the third type of Schottky diode provided in this application;

[0026] Figure 8 A schematic diagram of the fourth type of Schottky diode provided in this application;

[0027] Figure 9 A schematic diagram of the fifth type of Schottky diode provided in this application;

[0028] Figure 10 A schematic diagram of the sixth type of Schottky diode provided in this application;

[0029] Figure 11 A schematic diagram of the seventh type of Schottky diode provided in this application;

[0030] Figure 12 A top view of a Schottky diode provided in this application;

[0031] Figure 13 A top view of another Schottky diode provided in this application;

[0032] Figure 14 A top view of yet another Schottky diode provided in this application;

[0033] Figure 15 A top view of another Schottky diode provided in this application;

[0034] Figure 16 A schematic diagram of the eighth Schottky diode provided in this application.

[0035] Explanation of reference numerals in the attached figures:

[0036] 10-Substrate;

[0037] 21-First Functional Area;

[0038] 22 - Second Functional Area;

[0039] 23-Third Functional Area;

[0040] 24-Isolation Zone;

[0041] 30 - First metal electrode;

[0042] 40 - Second metal electrode;

[0043] 50 - Third metal electrode;

[0044] 60-Metal-semiconductor compound layer;

[0045] 71 - Anode;

[0046] 72-Cathode;

[0047] 80 - Fourth metal electrode. Detailed Implementation

[0048] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with this application. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this application as detailed in the appended claims.

[0049] See Figure 1 In a Schottky diode, the anode 71 is metallic, and the cathode 72 is an N-type region. When a positive voltage is applied to the anode 71, the Schottky diode conducts; when a negative voltage is applied, the Schottky diode is cut off. However, the reverse breakdown voltage of a Schottky diode is relatively low.

[0050] In the semiconductor structure provided in this application, a parasitic transistor is formed on the side of the Schottky diode by providing a second metal electrode in the isolation region, and the second metal electrode is electrically connected to the first metal electrode. When the Schottky diode is forward biased, electrons accumulate in the active region of the parasitic transistor, forming an electron carrier channel and increasing the on-state current. When the Schottky diode is reverse biased, electrons are consumed in the active region of the parasitic transistor, forming a depletion region, which connects to the depletion region of the Schottky diode, increasing the reverse breakdown voltage.

[0051] The technical solution of this application and how the technical solution of this application solves the above-mentioned technical problems are described in detail below with specific embodiments. These specific embodiments can be combined with each other, and the same or similar concepts or processes may not be described again in some embodiments. The embodiments of this application will now be described with reference to the accompanying drawings.

[0052] See Figure 2 The semiconductor structure in this embodiment includes a substrate 10, a first metal electrode 30, and a second metal electrode 40. The substrate 10 can be a single layer or a stacked layer as needed. For example, the material of the substrate 10 includes silicon, such as monocrystalline silicon, polycrystalline silicon, amorphous silicon, silicon-germanium compound, silicon-on-insulator (SOI), etc.

[0053] A first functional region 21 and an isolation region 24 surrounding the first functional region 21 are disposed on the substrate 10. The first functional region 21 has a first doped element to form a first conductivity type. The first functional region 21 may be circular, elliptical, square, rectangular, triangular, etc. The shape of the first functional region 21 is not limited in this embodiment.

[0054] In some embodiments of this application, the first dopant element is phosphorus, arsenic, etc., and the first conductivity type is N-type. For example, the first functional region 21 is a lightly doped N-type region (N-). The concentration of the first dopant element in the first functional region 21 is, for example, 10E10cm⁻¹. -3 ~10E14cm -3 The first functional region 21 can be implanted with a single ion or a combination of multiple ions.

[0055] The isolation zone 24 surrounds the first functional region 21 in a ring shape for isolation. The depth of the isolation zone 24 can be less than the depth of the first functional region 21, and the isolation zone 24 is filled with an insulating material, such as silicon oxide. The isolation zone 24 can be a shallow trench isolation (STI). The shape of the isolation zone 24 is adapted to the shape of the first functional region 21; for example, if the first functional region 21 is rectangular, the isolation zone 24 is a rectangular ring.

[0056] Taking a plane parallel to the surface of the substrate 10 as a cross-section, the cross-sectional shape of the first functional region 21 is annular, and the circumferential width of the first functional region 21 is equal. The depth of the isolation region 24 can be greater than the depth of the first functional region 21 and less than the depth of the substrate 10.

[0057] A first metal electrode 30 is disposed on a first functional region 21, and the first metal electrode 30 and the first functional region 21 it covers form a Schottky diode. A second metal electrode 40 is disposed on an isolation region 24 and electrically connected to the first metal electrode 30, such that a portion of the substrate 10 adjacent to the isolation region 24 forms a conductive channel. A parasitic transistor is formed beside the Schottky diode. The conductive channel serves as the active region of the parasitic transistor, the first metal electrode 30 and the second metal electrode 40 serve as the gate and drain of the parasitic transistor, the third metal electrode 50 serves as the source of the parasitic transistor, and the isolation region 24 serves as the gate insulating layer of the parasitic transistor. (See reference...) Figure 3 When the Schottky diode is forward biased (i.e., the first metal electrode 30 is connected to a positive voltage), the parasitic transistor is turned off, and electrons accumulate in the conductive channel, forming an electron carrier channel and increasing the on-state current. See also... Figure 4 When the Schottky diode is reverse biased (i.e., the first metal electrode 30 is grounded), the parasitic transistor is turned off, the conductive channel consumes electrons, forming a depletion region, which is connected to the depletion region of the Schottky diode, increasing the reverse breakdown voltage.

[0058] A first metal electrode 30 is disposed in the first functional region 21. For example, the first metal electrode 30 is located above the central region of the first functional region 21, such that the first metal electrode 30 and the first functional region 21 overlap, forming a Schottky diode. The shape of the first metal electrode 30 can be adapted to the shape of the first functional region 21; for example, if the first functional region 21 is rectangular, the first metal electrode 30 can also be rectangular. The material of the first metal electrode 30 includes zirconium, nickel, gold, aluminum, copper, tungsten, titanium, and their compounds or mixtures.

[0059] In some embodiments of this application, see Figures 2 to 7 , Figure 10 and Figure 11 A second metal electrode 40 is disposed on the isolation region 24. The orthogonal projection of the second metal electrode 40 onto the substrate 10 covers at least a portion of the isolation region 24, such that at least a portion of the isolation region 24 is in contact with the second metal electrode 40. The second metal electrode 40 is also electrically connected to the first metal electrode 30, that is, the second metal electrode 40 and the first metal electrode 30 are connected to the same voltage, for example, a positive voltage. The material of the second metal electrode 40 includes at least one of zirconium, nickel, and gold.

[0060] In some embodiments of this application, see Figure 2 and Figure 3 A second metal electrode 40 is disposed on the isolation region 24 and spaced apart from the first metal electrode 30. Thus, the second metal electrode 40 and the first metal electrode 30 are independent of each other. The second metal electrode 40 is located outside the first metal electrode 30; for example, the second metal electrode 40 may be completely located on the isolation region 24. The second metal electrode 40 and the first metal electrode 30 are electrically connected by applying the same voltage.

[0061] In some embodiments of this application, see Figures 4 to 6 The second metal electrode 40 is disposed on the isolation area 24 and extends to the first functional area 21 to contact the first metal electrode 30. In this way, the first metal electrode 30 and the second metal electrode 40 form a single electrode, which is convenient to manufacture and also convenient to connect to an external power source.

[0062] The integral electrode formed by the first metal electrode 30 and the second metal electrode 40 can completely cover the first functional area 21 and partially cover the isolation area 24, or it can completely cover the first functional area 21 and partially cover the isolation area 24, or it can partially cover the first functional area 21 and partially cover the isolation area 24.

[0063] In some embodiments of this application, see Figure 7 , Figure 8 and Figure 11At least a portion of the second metal electrode 40 is embedded within the isolation region 24. This increases the length of the active region of the formed parasitic transistor by increasing the contact area between the second metal electrode 40 and the isolation region, thereby enhancing the control effect of the parasitic transistor.

[0064] In some embodiments of this application, see Figure 7 The second metal electrode 40 is embedded in the isolation region 24, and the top surface of the second metal electrode 40 on the side facing away from the substrate 10 is flush with the top surface of the isolation region 24. The second metal electrode 40 is located in the isolation region 24, and the upper surface of the second metal electrode 40 forms a flat surface with the upper surface of the isolation region 24.

[0065] In some embodiments of this application, see Figure 8 and Figure 11 A portion of the second metal electrode 40 is embedded within the isolation region 24, and the top surface of the second metal electrode 40 on the side facing away from the substrate 10 is higher than the top surface of the isolation region 24. The second metal electrode 40 is located within the isolation region 24 and protrudes from it. For example, the top surface of the second metal electrode 40 is flush with the top surface of the first metal electrode 30. This increases the length of the active region, enhances the control effect of the parasitic transistor, and facilitates the external connection of the second metal electrode 40. In this embodiment, the second metal electrode 40 is spaced apart from the first functional region 21.

[0066] In the example where the second metal electrode 40 is disposed within the isolation region 24, the step of etching the isolation region 24 to form a trench accommodating the second metal electrode 40 can be performed simultaneously with the step of etching the dielectric layer in a conventional integrated circuit manufacturing process to form a contact hole accommodating the plug, without adding an extra mask or cost.

[0067] To improve the performance of semiconductor structures, see [reference needed]. Figures 9 to 11 The substrate 10 also includes a third functional region 23 disposed between the first functional region 21 and the isolation region 24, the third functional region 23 having a third doping element. For example, the third doping element includes boron, aluminum, indium, etc., to form a P-type region in the third functional region 23, depleting the first functional region 21. The third functional region 23 can be a heavily P-type doped region (P+), and the concentration of the third functional region 23 is, for example, 10. 18 cm -3 .

[0068] The top surface of the third functional area 23 is flush with the top surface of the first functional area 21. The depth of the third functional area 23 is less than the depth of the isolation area 24, and the third functional area 23 is located on the sidewall of the isolation area 24. In some possible examples, such as... Figure 9 and Figure 11 As shown, the second metal electrode 40 is spaced apart from the third functional region 23. In some other possible examples, such as Figure 10As shown, the second metal electrode 40 also extends onto the third functional region 23, covering at least a portion of the third functional region 23.

[0069] See Figures 12 to 15 In some possible examples, the second metal electrode 40 is disposed in the isolation region 24 and spaced apart from the first metal electrode 30. Figure 3 and Figure 13 The second metal electrode 40 surrounds the first metal electrode 30, that is, the second metal electrode 40 is in a ring shape, and the first metal electrode 30 is located within the area enclosed by the second metal electrode 40. The second metal electrode 40 may be located at one end of the isolation region 24 adjacent to the first metal electrode 30.

[0070] In some embodiments of this application, combined with Figure 3 and Figure 12 The semiconductor structure also includes a fourth metal electrode 80, which is spaced apart from the second metal electrode 40. The fourth metal electrode 80 is disposed in the isolation region 24 and electrically connected to the first metal electrode 30. The arrangement of the fourth metal electrode 80 in the isolation region 24 can refer to the arrangement of the second metal electrode 40 in the isolation region 24. For example, the fourth metal electrode 80 can be disposed on or embedded in the isolation region 24, which will not be elaborated further here.

[0071] The arrangement of the fourth metal electrode 80 in the isolation region 24 is not limited and can be flexibly arranged as needed. It can also be combined with the arrangement of the second metal electrode 40 to increase the flexibility of the semiconductor structure. For example, one fourth metal electrode 80 and one second metal electrode 40 are respectively provided and are symmetrically arranged relative to the first metal electrode 30.

[0072] In some embodiments of this application, combined with Figure 5 and Figure 16 The second metal electrode 40 surrounds the first metal electrode 30 and is integrally connected with the first metal electrode 30. The outer periphery of the integral electrode formed by the second metal electrode 40 and the first metal electrode 30 is completely located within the isolation region 24, that is, the integral electrode completely covers the first functional region 21.

[0073] In some embodiments of this application, at least one of the second metal electrode 40 and the fourth metal electrode 80 is connected to the first metal electrode 30. For example, the second metal electrode 40, the fourth metal electrode 80, and the first metal electrode 30 are integrated into one unit. Wherein, combined with Figure 5 and Figure 14 Each of the second metal electrode 40 and the fourth metal electrode 80 is provided, and both are integrated with the first metal electrode 30. The integral electrode formed by the second metal electrode 40, the fourth metal electrode 80 and the first metal electrode 30 covers part of the first functional area and part of the isolation area 24.

[0074] In some embodiments of this application, the second metal electrode 40 is connected to the first metal electrode 30, and the fourth metal electrode 80 is spaced apart from the second metal electrode 40 and the first metal electrode 30; or the fourth metal electrode 80 is integrated with the first metal electrode 30, and the second metal electrode 40 is spaced apart from the fourth metal electrode 80 and the first metal electrode 30.

[0075] Continue reading Figures 3 to 15 The substrate 10 also has a second functional region 22, which is located on the side of the isolation region 24 away from the first functional region 21 and surrounds the first functional region 21. The second functional region 22 has a second doped element. The second doped element is of the same type as the first doped element, and the concentration of the second doped element is greater than the concentration of the first doped element. The semiconductor structure also includes a third metal electrode 50, which is disposed on the second functional region 22, and the third metal electrode 50 and the second functional region 22 form an ohmic contact.

[0076] In this way, on the one hand, by setting the second functional area 22 and the third metal electrode 50, the first functional area 21 can be externally connected, for example, by connecting a negative voltage; on the other hand, by setting the second functional area 22, unnecessary Schottky diodes are avoided between the substrate 10 and the third metal electrode 50, thus ensuring the performance of the semiconductor structure.

[0077] An isolation region 24 is provided between the second functional region 22 and the first functional region 21, separating the first functional region 21 and the second functional region 22. The concentration of the second dopant element in the second functional region 22 is greater than the concentration of the first dopant element in the first functional region 21. For example, the second functional region 22 is an N-type heavily doped region (N+), and the concentration of the second dopant element in the second functional region 22 is, for example, 10E15cm⁻¹. -3 ~10E18cm -3 The second functional region 22 is formed by ion implantation into the substrate 10.

[0078] The third metal electrode 50 is located on the second functional region 22. The third metal electrode 50 is stacked on the second functional region 22 and does not contact the substrate 10 outside the second functional region 22. The third metal electrode 50 forms an ohmic electrode to avoid the formation of an unwanted Schottky diode between the third metal electrode 50 and the substrate 10 outside the second functional region 22.

[0079] The material of the third metal electrode 50 includes zirconium, nickel, gold, tungsten, platinum, aluminum, titanium, and their compounds or mixtures. The third metal electrode 50 is externally connected to a negative voltage. It can be set individually or in multiples. The number of third metal electrodes 50 and the second functional area 22, as well as their relative arrangement, can be adjusted as needed. This embodiment of the application is not limited in this respect.

[0080] To reduce the contact resistance between the third metal electrode 50 and the second functional region 22, see [reference needed]. Figure 16 The semiconductor structure also includes a metal-semiconductor compound layer 60, which is disposed between the third metal electrode 50 and the second functional region 22. The metal-semiconductor compound layer 60 may be disposed within the substrate 10 or on the top surface of the substrate 10, for example, on the top surface of the second functional region 22. The material of the metal-semiconductor compound layer 60 includes at least one of cobalt silicide and nickel silicide.

[0081] The semiconductor structure provided in this application embodiment includes a substrate 10, a first metal electrode 30, and a second metal electrode 40. The substrate 10 has a first functional region 21 and an isolation region 24 surrounding the first functional region 21. The first functional region 21 has a first doped element. The first metal electrode 30 is disposed on the first functional region 21, and the first metal electrode 30 and the first functional region 21 it covers form a Schottky diode. The second metal electrode 40 is disposed in the isolation region 24 and electrically connected to the first metal electrode 30 to form a parasitic transistor beside the Schottky diode. The second metal electrode 40 is also electrically connected to the first metal electrode 30, such that when the Schottky diode is forward biased, electrons accumulate in the active region of the parasitic transistor, forming an electron carrier channel and increasing the on-state current; and when the Schottky diode is reverse biased, electrons are consumed in the active region of the parasitic transistor, forming a depletion region, which connects to the depletion region of the Schottky diode, increasing the reverse breakdown voltage.

[0082] The various embodiments or implementation methods described in this specification are presented in a progressive manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the embodiments can be referred to each other.

[0083] The terms "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with an embodiment or example that are included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0084] Finally, it should be noted that other embodiments of the invention will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This invention is intended to cover any variations, uses, or adaptations of the invention that follow the general principles of the invention and include common knowledge or customary techniques in the art not disclosed herein, and is not limited to the precise structures described above and shown in the accompanying drawings, and various modifications and changes can be made without departing from its scope. The scope of the invention is limited only by the appended claims.

Claims

1. A semiconductor structure, characterized in that, include: A substrate having a first functional region and an isolation region surrounding the first functional region, the first functional region having a first doping element; A first metal electrode is disposed on the first functional area; A second metal electrode is disposed in the isolation region and electrically connected to the first metal electrode.

2. The semiconductor structure according to claim 1, characterized in that, A second functional region is disposed on the substrate, the second functional region being disposed on the side of the isolation region away from the first functional region and surrounding the isolation region, the second functional region having a second doping element, the concentration of the second doping element being greater than the concentration of the first doping element, and the first doping element and the second doping element being of the same type. The semiconductor structure further includes a third metal electrode disposed on the second functional region.

3. The semiconductor structure according to claim 2, characterized in that, The semiconductor structure further includes a metal semiconductor compound layer disposed between the third metal electrode and the second functional region.

4. The semiconductor structure according to any one of claims 1-3, characterized in that, The second metal electrode is disposed on the isolation area and spaced apart from the first metal electrode.

5. The semiconductor structure according to any one of claims 1-3, characterized in that, The second metal electrode is disposed on the isolation area and extends into the first functional area to contact the first metal electrode.

6. The semiconductor structure according to any one of claims 1-3, characterized in that, At least a portion of the second metal electrode is embedded within the isolation region.

7. The semiconductor structure according to claim 6, characterized in that, The second metal electrode is embedded in the isolation region, and the top surface of the second metal electrode on the side away from the substrate is flush with the top surface of the isolation region.

8. The semiconductor structure according to claim 6, characterized in that, A portion of the second metal electrode is embedded within the isolation region, and the top surface of the second metal electrode on the side away from the substrate is higher than the top surface of the isolation region.

9. The semiconductor structure according to any one of claims 1-3, characterized in that, The substrate further includes a third functional region disposed between the first functional region and the isolation region, the third functional region having a third doping element.

10. The semiconductor structure according to any one of claims 1-3, characterized in that, The semiconductor structure further includes a fourth metal electrode spaced apart from the second metal electrode. The fourth metal electrode is disposed in the isolation region and electrically connected to the first metal electrode.

11. The semiconductor structure according to any one of claims 1-3, characterized in that, The second metal surrounds the first metal electrode.

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