A trench gate semi-super junction SiC LIGBT structure
Patent Information
- Application Number
- CN202611103971.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-23
- Publication Date
- 2026-10-16
AI Technical Summary
[0004]本发明目的在于解决上述单一技术问题,提供一种沟槽栅半超结 SiC LIGBT 结构,通过锥形超结搭配凸出式P柱设计,在拓宽电荷不平衡裕度的同时提升击穿电压,实现宽电荷不平衡裕度与高击穿电压的兼顾
[0017]与现有技术相比,本发明具有以下有益效果:采用锥形超结结构拓宽电荷不平衡裕度,通过凸出式P-pillar区,增强P柱与N-bottom区界面电场,平衡超结区与底层电压分配,在保留宽电荷不平衡裕度的同时提升击穿电压,解决传统超结结构电荷不平衡裕度与击穿电压无法兼顾的问题;采用SiC材料与沟槽栅结构,提升器件高温稳定性与开关速度,适配高频、高压功率应用场景。
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Abstract
Description
Technical Field
[0001] This invention belongs to the field of power semiconductor device technology, specifically relating to a trench gate semi-superjunction SiC LIGBT structure. Background Technology
[0002] Power semiconductor devices are core components of power electronic equipment. SiC-based lateral insulated gate bipolar transistors (LIGBTs) are widely used in high-voltage, high-frequency applications such as new energy, rail transportation, and smart grids due to their high temperature resistance, high frequency, and low loss characteristics. Traditional superjunction IGBTs optimize the electric field distribution by introducing an alternating N / P pillar structure in the drift region, utilizing lateral depletion to achieve higher breakdown voltage and larger current density for the same drift region length. They also exhibit faster carrier extraction speed and lower losses during turn-off. However, traditional vertical superjunctions (VSJs) suffer from the core problem of narrow charge imbalance margin, requiring stringent fabrication process tolerances and being highly susceptible to performance degradation or even failure due to doping and dimensional deviations. To broaden the charge imbalance margin, the industry has adopted tapered superjunction (TSJ) structures, which can significantly improve charge imbalance tolerance and reduce fabrication difficulty. However, tapered superjunctions disrupt the internal electric field uniformity of the device, leading to a significant decrease in breakdown voltage, making it impossible to simultaneously meet the dual requirements of wide charge imbalance margin and high breakdown voltage.
[0003] Existing technologies struggle to balance charge imbalance margin and breakdown voltage, hindering the large-scale application of SiC-based superjunction LIGBTs in high-voltage, high-reliability scenarios. Therefore, developing a novel trench-gate semi-superjunction SiC LIGBT structure capable of simultaneously achieving a wide charge imbalance margin and high breakdown voltage has become a pressing technical challenge in this field. Summary of the Invention
[0004] The purpose of this invention is to solve the above-mentioned single technical problem and provide a trench gate semi-superjunction SiC LIGBT structure. By combining a tapered superjunction with a protruding P-pillar design, the breakdown voltage is increased while widening the charge imbalance margin, thus achieving a balance between wide charge imbalance margin and high breakdown voltage.
[0005] To achieve the above objectives, the present invention adopts the following technical solution:
[0006] A trench gate semi-superjunction SiC LIGBT device includes a P-type substrate, on which a SiO2 layer is formed. On the SiO2 layer, a SiO2 gate dielectric, a P-body region, an N-pillar region, and an N-bottom region are formed. The N-pillar region and the P-pillar region are both tapered structures. The P-pillar region protrudes into the interior of the N-bottom region. The P-pillar region, the N-pillar region, and the N-bottom region constitute a tapered superjunction structure.
[0007] An N+ contact region and a cathode P+ contact region are disposed above the P-body region, and a cathode is disposed above the cathode P+ contact region; an anode P+ contact region is disposed above the N-base region, and an anode is disposed above the anode P+ contact region; a polycrystalline silicon gate is disposed on the side of the SiO2 gate dielectric, and a gate electrode is disposed on the polycrystalline silicon gate.
[0008] In a preferred embodiment of the present invention, the protruding end of the P-pillar region forms an interface contact with the N-bottom region.
[0009] In a preferred embodiment of the present invention, the P-pillar region and the N-pillar region are arranged alternately.
[0010] In a preferred embodiment of the present invention, the SiO2 layer covers the P-type substrate and is bonded to the bottom surface of the tapered superjunction structure.
[0011] In a preferred embodiment of the present invention, the P-body region and the N-base region are spaced apart.
[0012] In a preferred embodiment of the present invention, the N+ contact region and the cathode P+ contact region are arranged adjacent to each other.
[0013] In a preferred embodiment of the present invention, the polysilicon gate is tightly bonded to the side of the SiO2 gate dielectric.
[0014] In a preferred embodiment of the present invention, the gate electrode forms an ohmic contact with the polysilicon gate.
[0015] In a preferred embodiment of the present invention, the anode and the anode P+ contact region form an ohmic contact.
[0016] In a preferred embodiment of the present invention, the protrusion length of the P-pillar region is 1 / 5 to 1 / 3 of the thickness of the N-bottom region.
[0017] Compared with existing technologies, the present invention has the following advantages: it adopts a tapered superjunction structure to broaden the charge imbalance margin, and enhances the interface electric field between the P-pillar and N-bottom regions through the protruding P-pillar region, balancing the voltage distribution between the superjunction region and the bottom layer. While maintaining a wide charge imbalance margin, it improves the breakdown voltage, solving the problem that traditional superjunction structures cannot simultaneously achieve both charge imbalance margin and breakdown voltage. It also uses SiC material and trench gate structure to improve the high-temperature stability and switching speed of the device, making it suitable for high-frequency and high-voltage power applications. Attached Figure Description
[0018] To more clearly illustrate the technical solutions in the embodiments or prior art, the drawings used in the description of the embodiments or prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0019] Figure 1 This is a schematic diagram of a traditional SiC lateral LIGBT device structure.
[0020] Figure 2 This invention provides a structural diagram of a trench gate semi-superjunction SiC LIGBT device.
[0021] Figure 3 This invention provides a schematic diagram illustrating the selection of SiC substrate material during the fabrication of a trench gate semi-superjunction SiC LIGBT device.
[0022] Figure 4 This invention provides a schematic diagram of the trench gate fabrication process during the fabrication of a trench gate semi-superjunction SiC LIGBT device.
[0023] Figure 5 This invention provides a schematic diagram of P-body and N-base implantation and annealing during the fabrication of a trench gate semi-superjunction SiC LIGBT device.
[0024] Figure 6 This invention provides a schematic diagram of the formation of tapered superjunctions P-pillar, N-pillar, and N-bottom during the fabrication of a trench gate semi-superjunction SiC LIGBT device using photolithography and high-energy ion implantation.
[0025] Figure 7 This invention provides a schematic diagram of the injection of the anode P+ contact region, N+ region, and cathode P+ contact region during the fabrication of a trench gate semi-superjunction SiC LIGBT device.
[0026] Figure 8This invention provides a schematic diagram of the formation of contact electrodes during the fabrication of a trench gate semi-superjunction SiC LIGBT device. Detailed Implementation
[0027] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only a part of the embodiments of this application, and not all of them. All other embodiments obtained by those skilled in the art based on the embodiments of this application without creative effort are within the scope of protection of this application.
[0028] Figure 2 Combination Figure 1 This invention provides a trench gate semi-superjunction SiC LIGBT device, including a P-type substrate 1, a SiO2 layer 2 formed on the P-type substrate 1, a SiO2 gate dielectric 14, a P-body region 8, an N-pillar region 11, a P-pillar region 12 and an N-bottom region 13 formed on the SiO2 layer 2, the N-pillar region 11 and the P-pillar region 12 are both conical structures, the P-pillar region 12 protrudes and extends into the interior of the N-bottom region 13, the P-pillar region 12, the N-pillar region 11 and the N-bottom region 13 constitute a conical superjunction structure.
[0029] An N+ contact region 7 and a cathode P+ contact region 6 are disposed above the P-body region 8, and a cathode 4 is disposed above the cathode P+ contact region 6; an anode P+ contact region 10 is disposed above the N-base region 9, and an anode 5 is disposed above the anode P+ contact region 10; a polysilicon gate 15 is disposed on the side of the SiO2 gate dielectric 14, and a gate electrode 3 is disposed above the polysilicon gate 15.
[0030] The protruding end of the P-pillar region 12 forms an interface contact with the N-bottom region 13 to enhance the interface electric field and balance the voltage distribution between the superjunction region and the N-bottom region 13. The P-pillar regions 12 and N-pillar regions 11 are arranged alternately. The SiO2 layer 2 covers the P-type substrate 1 and is attached to the bottom surface of the tapered superjunction structure. The material used for the P-type substrate 1 is preferably SiC.
[0031] P-body region 8 and N-base region 9 are spaced apart. N+ contact region 7 and cathode P+ contact region 6 are arranged adjacent to each other. Polysilicon gate 15 is tightly bonded to the side of SiO2 gate dielectric 14. Gate electrode 3 forms an ohmic contact with polysilicon gate 15. Anode 5 and anode P+ contact region 10 form an ohmic contact. The protrusion length of P-pillar region 12 is 1 / 5 to 1 / 3 of the thickness of N-bottom region 13.
[0032] In summary, this invention improves the traditional superjunction P-pillar and N-pillar regions into a tapered superjunction P-pillar region 12, N-pillar region 11, and N-bottom region 13. Simultaneously, the semi-superjunction SiC LIGBT device uses a tapered SJ (TSJ) to achieve a wider charge imbalance. The protruding p-pillars enhance the electric field at the interface between the p-pillars and the n-bottom layer, thereby fully balancing the voltage distribution within the SJ and the n-bottom layer. This design allows for a higher breakdown voltage than the TSJ.
[0033] like Figures 3-8 As shown, the fabrication process of the SiC LIGBT device in this embodiment is as follows: Step 1, select the SiC substrate material and determine the thickness and resistivity of the P-type substrate, the thickness of the BOX layer, and the thickness and resistivity of the N-type epitaxial layer; Step 2, fabricate a trench gate structure on the substrate surface; Step 3, perform ion implantation and high-temperature annealing of the P-body region and N-base region; Step 4, form a tapered P-pillar region, a tapered N-pillar region, and an N-bottom region through photolithography and high-energy ion implantation; Step 5, complete the ion implantation of the anode P+ contact region, the N+ contact region, and the cathode P+ contact region; Step 6, etch the electrode holes, deposit metal, and lead out the electrodes to form the gate electrode, anode, and cathode.
[0034] The working principle of the SiC LIGBT device in this embodiment is as follows: The SiC LIGBT device adopts a tapered superjunction structure, which significantly widens the charge imbalance margin compared to a vertical superjunction. However, the tapered superjunction has the drawback of reduced breakdown voltage. Therefore, the P-pillar region is designed as a protruding structure, extending into the N-bottom region. This enhances the electric field at the interface between the P-pillar and N-bottom regions, balances the voltage distribution between the superjunction and N-bottom regions, and improves the device breakdown voltage to the level of a vertical superjunction. At the same time, it retains the advantage of the wide charge imbalance margin of the tapered superjunction, thus solving the technical problem.
[0035] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited to the above embodiments. The embodiments and descriptions in the specification are merely preferred examples and are not intended to limit the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the present invention as claimed. The scope of protection of the present invention is defined by the appended claims and their equivalents.
Claims
1. A trench-gate semi-superjunction SiC LIGBT device, characterized in that, The system includes a P-type substrate (1), on which a SiO2 layer (2) is formed. On the SiO2 layer (2), a SiO2 gate dielectric (14), a P-body region (8), an N-pillar region (11), a P-pillar region (12), and an N-bottom region (13) are formed. The N-pillar region (11) and the P-pillar region (12) are both conical structures. The P-pillar region (12) protrudes and extends into the interior of the N-bottom region (13). The P-pillar region (12), the N-pillar region (11), and the N-bottom region (13) constitute a conical superjunction structure. An N+ contact region (7) and a cathode P+ contact region (6) are provided above the P-body region (8), and a cathode (4) is provided above the cathode P+ contact region (6); an anode P+ contact region (10) is provided above the N-base region (9), and an anode (5) is provided above the anode P+ contact region (10); a polysilicon gate (15) is provided on the side of the SiO2 gate dielectric (14), and a gate electrode (3) is provided above the polysilicon gate (15).
2. The trench gate semi-superjunction SiC LIGBT device according to claim 1, characterized in that, The protruding end of the P-pillar region (12) forms an interface contact with the N-bottom region (13).
3. The trench gate semi-superjunction SiC LIGBT device according to claim 1, characterized in that, The P-pillar region (12) and the N-pillar region (11) are arranged alternately.
4. The trench gate semi-superjunction SiC LIGBT device according to claim 1, characterized in that, The SiO2 layer (2) covers the P-type substrate (1) and is attached to the bottom surface of the tapered superjunction structure.
5. The trench gate semi-superjunction SiC LIGBT device according to claim 1, characterized in that, The P-body region (8) and the N-base region (9) are spaced apart.
6. The trench gate semi-superjunction SiC LIGBT device according to claim 1, characterized in that, The N+ contact region (7) is arranged adjacent to the cathode P+ contact region (6).
7. The trench gate semi-superjunction SiC LIGBT device according to claim 1, characterized in that, The polysilicon gate (15) is in close contact with the side of the SiO2 gate dielectric (14).
8. The trench gate semi-superjunction SiC LIGBT device according to claim 1, characterized in that, The gate electrode (3) forms an ohmic contact with the polysilicon gate (15).
9. The trench gate semi-superjunction SiC LIGBT device according to claim 1, characterized in that, The anode (5) and the anode P+ contact region (10) form an ohmic contact.
10. The trench gate semi-superjunction SiC LIGBT device according to claim 1, characterized in that, The protrusion length of the P-pillar region (12) is 1 / 5 to 1 / 3 of the thickness of the N-bottom region (13).