Method for forming an igbt field stop layer

Abstract

The application discloses a forming method of an IGBT field termination layer, comprising the following steps: providing a substrate, a front surface of the substrate is provided with a front surface structure of an IGBT device, and a preset preparation process is performed on the substrate, wherein the preset preparation process comprises a back surface thinning process; performing first inclined ion implantation on the back surface of the thinned substrate, an angle of the ion implantation is θ, and a single implantation dose is d; rotating the substrate by an angle β along a first direction after the ion implantation is completed; repeating the ion implantation and the rotating steps for N times, so that a total angle of the substrate after being rotated is 360 degrees, and a total dose of the implantation satisfies D=(N+1)×d. The application is favorable for improving the doping uniformity of the field termination layer and avoiding the IDSS failure problem.

Description

Technical Field

[0001] This application relates to the field of semiconductor devices and integrated circuit technology, and in particular to a method for forming an IGBT field termination layer. Background Technology

[0002] An insulated gate bipolar transistor (IGBT) is a voltage-driven device composed of a metal-oxide-semiconductor field-effect transistor (MOSFET) and a bipolar junction transistor (BJT). It combines the advantages of high input impedance of MOSFET and low on-state voltage drop of BJT, and is widely used in new energy vehicles, rail transportation, power grid converters, industrial motor drives and other fields.

[0003] During the IGBT manufacturing process, especially in the back-side thinning process, minor physical defects (PDs) can easily occur on the back side of the wafer due to equipment malfunctions. For example, equipment malfunctions can cause residual silicon powder generated during grinding, which can contaminate the back side of the wafer and thus produce PDs. These defects can have a significant impact on subsequent manufacturing processes and device performance.

[0004] In the back-side ion implantation process provided by related technologies, a single-angle ion implantation method perpendicular to the wafer is often used to form a field stop layer on the back side of the wafer. Although this method is simple to operate, when there is a PD defect on the back side of the wafer, the implantation of impurity ions will be blocked by the PD, resulting in uneven doping distribution of the field stop (FS) layer. This unevenness will destroy the electric field distribution inside the IGBT device, causing the FS layer to form local punch-through trenches, resulting in the electric field extending outside the FS layer and causing leakage current (IDSS) failure. Summary of the Invention

[0005] This application provides a method for forming an IGBT field termination layer, which can reduce the blocking area of ​​impurity ions by the back side PD of the substrate, which is beneficial to improving the doping uniformity of the field termination layer and thus avoiding IDSS failure problem.

[0006] In view of this, this application provides a method for forming an IGBT field termination layer, comprising:

[0007] S1, a substrate is provided, the front side of which has the front structure of an IGBT device is formed, and a preset fabrication process is performed on the substrate, the preset fabrication process including a back side thinning process;

[0008] S2, the first tilted ion implantation is performed on the back side of the thinned substrate, the ion implantation angle is θ, and the single implantation dose is d;

[0009] S3, after the ion implantation is completed, the substrate is rotated by an angle β along the first direction;

[0010] S4. Repeat steps S2 and S3 for a total of N times, so that the substrate is rotated by a total angle of 360º and the total injected dose satisfies D=(N+1)×d, where N is a positive integer.

[0011] Optionally, during the repeated execution of steps S2 and S3, the energy of ion implantation remains constant each time.

[0012] Optionally, the ion implantation angle θ ranges from 3º to 10º.

[0013] Optionally, the ion implantation angle θ is 7º.

[0014] Optionally, the value of N can be in the range of 1-11.

[0015] Optionally, N is 3, β is 90º, and the single injection dose is 1 / 4 of the total dose.

[0016] Optionally, the first direction is either clockwise or counterclockwise.

[0017] Optionally, the method can be used in the manufacturing process of IGBT devices, and the method further includes annealing the formed field termination layer after performing step S4.

[0018] Optionally, it also includes: after annealing the field termination layer, sequentially forming a collector region and a back metal layer on the back side of the substrate.

[0019] The technical solution of this application has at least the following advantages:

[0020] This application employs a combination of tilted implantation and rotational implantation. First, tilted ion implantation is performed on the back side of the thinned substrate. After ion implantation, the substrate is rotated by an angle β along the first direction. This process is repeated N times, resulting in a total rotation angle of 360º. The total implantation dose satisfies D=(N+1)×d. This reduces the blocking area of ​​impurity ions by tiny physical defects PD on the back side of the substrate without changing the total implantation dose and implantation energy. This makes the distribution of impurity ions in the FS layer more uniform, which helps to improve the "dam-breaking" phenomenon of the electric field lines in the FS layer caused by local defects. It also avoids the appearance of local through-holes in the FS layer, making the electric field distribution more reasonable. This can prevent IDSS failure and improve the reliability of the device. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the specific embodiments of this application or the prior art, the drawings used in the description of the specific embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained from these drawings without creative effort.

[0022] Figure 1 This is a process flow diagram of a method for forming an IGBT field termination layer provided in an exemplary embodiment of this application;

[0023] Figure 2 This is a schematic cross-sectional view of the substrate provided in the method for forming an IGBT field termination layer according to an exemplary embodiment of this application;

[0024] Figure 3 This is an image of the back side of the substrate after a predetermined fabrication process in a method for forming an IGBT field termination layer provided in an exemplary embodiment of this application.

[0025] Figure 4 yes Figure 3 Magnified topographic image of the defect on the back side of the substrate;

[0026] Figure 5 This is a cross-sectional schematic diagram of the FS layer after formation in the method for forming an IGBT field termination layer provided in an exemplary embodiment of this application;

[0027] Figure 6 This is a cross-sectional schematic diagram of the FS layer after formation in an exemplary comparative method for forming an IGBT field termination layer provided in this application;

[0028] Figure 7 This is a cross-sectional schematic diagram showing the formation method of the IGBT field termination layer provided in an exemplary embodiment of this application after forming the back metal layer in the IGBT manufacturing process;

[0029] Figure 8 This is a comparison diagram of the electric field distribution curves of an IGBT device formed in the off state by applying the IGBT field termination layer formation method provided in an exemplary embodiment, comparative example, and comparative example of this application to the IGBT manufacturing process.

[0030] Figure label:

[0031] 10. Substrate; 11. Drift region; 12. Well region; 13. Trench gate; 14. Emitter region; 15. FS layer; 16. Collector region; 17. Back metal layer; 18. Through-hole trench Detailed Implementation

[0032] The technical solutions of this application will now be clearly and completely described with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this application. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0033] In the description of this application, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0034] In the description of this application, it should be noted that, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to fixed connections, detachable connections, or integral connections; they can refer to mechanical connections or electrical connections; they can refer to direct connections or indirect connections through an intermediate medium; they can refer to the internal connection between two components; and they can refer to wireless connections or wired connections. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0035] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0036] The following is combined Figures 1 to 8 This describes an embodiment of the present application.

[0037] refer to Figure 1This illustrates an embodiment of the present application, providing a method for forming an IGBT field termination layer, comprising:

[0038] S1, a substrate 10 is provided, and the front side of the substrate 10 has the front structure of an IGBT device formed thereon. A preset fabrication process is performed on the substrate 10, which includes a back side thinning process.

[0039] For example, the front-side structure of the IGBT device formed on the substrate 10 includes a lightly doped drift region 11 of a first conductivity type, a well region 12 doped with a second conductivity type, a gate structure such as a trench gate 13, and an emitter region 14 heavily doped with a first conductivity type, wherein the first conductivity type is N-type and the second conductivity type is P-type, or the first conductivity type is P-type and the second conductivity type is N-type, see [reference]. Figure 2 The front-side structure of the IGBT device includes a lightly doped N-type drift region 11, a P-type doped well region 12, a gate structure such as a trench gate 13, and a heavily doped N-type emitter region 14. The front-side structure of the IGBT device is typically formed on the front side of the substrate 10 using a front-side process. Since this is prior art, the embodiments of this application will not elaborate further.

[0040] For example, during the back-side thinning process of substrate 10, a minor physical defect PD is generated due to silicon powder contamination on the back side of substrate 10 caused by machine malfunction. See [link to documentation]. Figure 3 and Figure 4 .

[0041] S2, the first tilted ion implantation is performed on the back side of the thinned substrate 10, the ion implantation angle is θ, and the single implantation dose is d.

[0042] For example, the impurity ions used for the first tilted ion implantation can be P-type impurity ions, such as boron ions or gallium ions (Ga). + Indium ions (In) + )wait.

[0043] Adjusting the ion implantation angle can change the incident path of impurity ions, which helps to reduce the blocking area of ​​PD on impurity ions, thereby optimizing the doping uniformity of FS layer 15.

[0044] In some embodiments, the ion implantation angle θ ranges from 3º to 10º.

[0045] For example, θ can be 3º, 5º, 7º, 10º, etc.

[0046] When the ion implantation angle θ is too small, it is easy to induce the channel effect. When the ion implantation angle θ is too large, there is a significant difference between the ion incident angle of the edge region and the center region of the substrate 10, which leads to the deviation of the doping concentration between the edge and the center regions. Adjusting the ion implantation angle θ to 3º-10º is beneficial to further optimize the doping uniformity and electric field distribution of the FS layer 15. Adjusting the ion implantation angle θ to 7º is beneficial to optimize the doping uniformity and electric field distribution of the FS layer 15.

[0047] It should be noted that the ion implantation angle θ refers to the angle between the incident direction of the ion beam and the normal direction of the substrate 10.

[0048] S3, after ion implantation is completed, the substrate 10 is rotated by an angle β along the first direction.

[0049] For example, the first direction is either clockwise or counterclockwise.

[0050] S4. Repeat steps S2 and S3 for a total of N times, so that the substrate 10 is rotated by a total angle of 360º, and the total injected dose satisfies D=(N+1)×d, where N is a positive integer.

[0051] For example, during the repeated execution of steps S2 and S3 N times, the energy of ion implantation remains unchanged each time, and the angle and dose of ion implantation also remain unchanged each time. After each ion implantation is completed, the substrate 10 is rotated along the first direction by the same angle β, β = 360º / (N+1).

[0052] By employing a combination of spin-injection and tilt-injection, the blocking area of ​​impurity ions by the tiny physical defects (PD) on the back side of the substrate 10 can be further reduced without changing the total injection dose and injection energy. This makes the distribution of impurity ions in the FS layer 15 more uniform, which is beneficial to further improve the "dam-break" phenomenon caused by local defects in the electric field lines of the FS layer 15, making the electric field distribution more reasonable. This can further reduce the risk of IDSS failure and further improve the reliability of the device.

[0053] In some embodiments, the value of N ranges from 1 to 11.

[0054] For example, N can be 1, 3, 5, 7, 11, etc.

[0055] When the number of spin-implantation cycles is too low, it cannot effectively compensate for the blocking effect of the tiny PD on the back side of the substrate 10 on impurity ions. When the number of spin-implantation cycles is too high, it will lead to a significant increase in process time and process stability risks. By controlling the number of spin-implantation cycles to 4-6, that is, when the value of N is in the range of 3-5, it is beneficial to optimize the doping uniformity and electric field distribution of the FS layer 15 while balancing process efficiency and process stability. Specifically, when the value of N is 3, β is 90º, and the single implantation dose is 1 / 4 of the total dose; when the value of N is 5, β is 60º, and the single implantation dose is 1 / 6 of the total dose.

[0056] In some embodiments, the method of this application is used in the manufacturing process of IGBT devices, and further includes: annealing the formed field termination layer 15 after performing step S4.

[0057] In some embodiments, the method of this application is used in the manufacturing process of IGBT devices, and further includes: after annealing the field termination layer 15, a collector region 16 and a back metal layer 17 are sequentially formed on the back side of the substrate 10.

[0058] For example, see Figure 7 The method of this application can form a field termination layer on the back side of the substrate 10, perform annealing after forming the field termination layer, and then sequentially form a collector region 16 and a back metal layer 17 on the back side of the substrate 10 to form an IGBT device.

[0059] It should be noted that the formed collector region 16 is closer to the drift region or field termination layer than the back metal layer 17.

[0060] In related technologies, a single-angle ion implantation method perpendicular to the wafer is commonly used to form a field stop layer on the back side of the wafer. Although this method is simple to operate, when there are PD defects on the back side of the wafer, the implantation of impurity ions will be blocked by the PD, resulting in an uneven doping distribution in the field stop (FS) layer. This unevenness will disrupt the electric field distribution inside the IGBT device, causing the FS layer 15 to form a local punch-through 18. See [link to relevant documentation]. Figure 6 The electric field will extend beyond the FS layer 15, causing leakage current (IDSS) failure.

[0061] This application employs a combination of tilted implantation and rotational implantation. First, tilted ion implantation is performed on the back side of the thinned substrate 10. After ion implantation, the substrate 10 is rotated by an angle β along a first direction. This process is repeated N times, resulting in a total rotation angle of 360º for the substrate 10. The total implantation dose satisfies D = (N+1) × d. This reduces the blocking area of ​​impurity ions by tiny physical defects PD on the back side of the substrate 10 without changing the total implantation dose and implantation energy. This leads to a more uniform distribution of impurity ions in the FS layer 15, which helps to mitigate the "dam-breaking" phenomenon caused by local defects in the electric field lines of the FS layer 15. It also prevents the appearance of local through-holes 18 in the FS layer 15, resulting in a more reasonable electric field distribution. See [link to relevant documentation]. Figure 5 This can avoid IDSS failure issues and improve device reliability.

[0062] To further illustrate the technical effects of this application, the inventors applied the methods provided in Example 1, the comparative example, and the comparative example to the manufacturing process of IGBT devices. The resulting IGBT devices in the off-state electric field distribution curves are shown in the comparison diagram. Figure 8 .

[0063] Example 1:

[0064] This embodiment provides a method for forming an IGBT field termination layer, including:

[0065] S1, a substrate 10 is provided, and the front side of the substrate 10 has the front structure of an IGBT device formed thereon. A preset fabrication process is performed on the substrate 10, which includes a back side thinning process.

[0066] In this embodiment, the front structure of the IGBT device formed on the front side of the substrate 10 includes an N-type lightly doped drift region 11, a P-type doped well region 12, a gate structure such as a trench gate 13, and an N-type heavily doped emitter region 14.

[0067] In this embodiment, during the back-side thinning process of substrate 10, silicon micropowder became contaminated on the back side of substrate 10 due to machine malfunction.

[0068] S2, the first tilted ion implantation is performed on the back side of the thinned substrate 10, the ion implantation angle is θ, and the single implantation dose is d.

[0069] In this embodiment, the impurity ion used for ion implantation is boron ion, and the ion implantation angle θ is 7º.

[0070] S3, after ion implantation is completed, the substrate 10 is rotated by an angle β along the first direction.

[0071] In this embodiment, the first direction is clockwise.

[0072] S4. Repeat steps S2 and S3 for a total of N times, so that the substrate 10 is rotated by a total angle of 360º, and the total injected dose satisfies D=(N+1)×d, where N is a positive integer.

[0073] In this embodiment, during the repeated execution of steps S2 and S3 three times, the energy of ion implantation remains unchanged each time, and the angle and dose of ion implantation also remain unchanged each time. After each ion implantation is completed, the substrate 10 is rotated along the first direction by the same angle β, where β is 90º.

[0074] In this embodiment, the single injection dose is 1 / 4 of the total dose.

[0075] The method provided in this embodiment is used in the manufacturing process of IGBT devices to form IGBT devices, and further includes: after annealing the field termination layer, sequentially forming a collector region 16 and a back metal layer 17 on the back side of the substrate 10.

[0076] When the method provided in this embodiment is applied to the manufacturing process of IGBT devices, the electric field distribution curve of the resulting IGBT device is shown in the figure. Figure 8 Curve a.

[0077] Comparative example:

[0078] The only difference between this comparative example and Example 1 is that steps S2-S4 are replaced with: ion implantation is performed on the back side of the thinned substrate 10, the ion implantation angle θ is 0º, the ion implantation energy is the same as in Example 1, and the ion implantation dose is the same as the total ion implantation dose in Example 1.

[0079] When the method provided in this comparative example is applied to the manufacturing process of IGBT devices, the electric field distribution curve of the resulting IGBT device is shown in the figure. Figure 8 Curve b.

[0080] Example for comparison:

[0081] The only difference between this comparative example and Example 1 is that during the back-side thinning process of substrate 10 in step S1, no abnormality occurred in the machine, and the back side of substrate 10 was not contaminated with silicon micropowder after thinning.

[0082] When the method provided in this comparative example is applied to the manufacturing process of IGBT devices, the electric field distribution curve of the resulting IGBT device is shown in the figure. Figure 8 The middle curve is c.

[0083] Depend on Figure 8 It can be seen that after the improved ion implantation process in Example 1, the electric field will be normally cut off in the FS layer 15, while in the comparative example, the electric field cutoff position is deeper, exceeding the range of the FS layer 15, which will cause IDSS leakage failure.

[0084] Obviously, the above embodiments are merely illustrative examples for clear explanation and are not intended to limit the implementation. Those skilled in the art will recognize that other variations or modifications can be made based on the above description. It is neither necessary nor possible to exhaustively list all possible implementations here. However, obvious variations or modifications derived therefrom are still within the scope of protection of this application.

Claims

1. A method for forming an IGBT field termination layer, characterized in that, include: S1, a substrate is provided, the front side of which has the front structure of an IGBT device is formed, and a preset fabrication process is performed on the substrate, the preset fabrication process including a back side thinning process; S2, the first tilted ion implantation is performed on the back side of the thinned substrate, the ion implantation angle is θ, and the single implantation dose is d; S3, after the ion implantation is completed, the substrate is rotated by an angle β along the first direction; S4. Repeat steps S2 and S3 for a total of N times, so that the substrate is rotated by a total angle of 360º and the total injected dose satisfies D=(N+1)×d, where N is a positive integer.

2. The method according to claim 1, characterized in that, During the repeated execution of steps S2 and S3, the energy of ion implantation remains constant each time.

3. The method according to claim 1, characterized in that, The ion implantation angle θ ranges from 3º to 10º.

4. The method according to claim 3, characterized in that, The ion implantation angle θ is 7º.

5. The method according to claim 1, characterized in that, The value of N ranges from 1 to 11.

6. The method according to claim 1, characterized in that, The value of N is 3, β is 90º, and the single injection dose is 1 / 4 of the total dose.

7. The method according to claim 1, characterized in that, The first direction is either clockwise or counterclockwise.

8. The method according to any one of claims 1-7, characterized in that, The method is applied to the manufacturing process of IGBT devices, and the method further includes: annealing the formed field termination layer after performing step S4.

9. The method according to claim 8, characterized in that, Also includes: After annealing the field termination layer, a collector region and a back metal layer are sequentially formed on the back side of the substrate.

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