Semiconductor structure and semiconductor device

Abstract

The present application provides a semiconductor structure and a semiconductor device. The semiconductor structure includes a substrate, a seed layer on the substrate, and a buffer layer on the seed layer. The buffer layer includes a first superlattice portion on the seed layer, a second superlattice portion on the first superlattice portion, and a third superlattice portion on the second superlattice portion. The first superlattice portion, the second superlattice portion, and the third superlattice portion have a first aluminum concentration, a second aluminum concentration, and a third aluminum concentration, respectively. The second aluminum concentration is less than the first aluminum concentration, and the second aluminum concentration is less than the third aluminum concentration.

Description

Technical Field

[0001] This invention relates to semiconductor structures, and more particularly to semiconductor structures and semiconductor devices that can reduce high curvature epitaxial stacking. Background Technology

[0002] In recent years, semiconductor devices have been used in various electronic products, such as high-power devices, computers, mobile phones, digital cameras, and other electronic devices. Among these, high-electron mobility transistors (HEMTs) are widely used in light-emitting diodes (LEDs), high-frequency devices, and other applications due to their use of gallium nitride (GaN-based) semiconductor materials, which possess many excellent material properties such as high heat resistance, wide bandgap, and high electron saturation velocity.

[0003] While existing high electron mobility transistor (HEM) devices largely meet their intended applications, they do not completely fulfill all requirements. For example, although epitaxial stacking in current devices can buffer stress, excessive curvature can still lead to substrate cracking, uneven temperature distribution, and non-compliance with equipment specifications. Therefore, developing structures that can further improve the performance and reliability of HEM devices remains a key research focus for the industry. Summary of the Invention

[0004] This invention provides a semiconductor structure comprising a substrate, a seed layer on the substrate, and a buffer layer on the seed layer. The buffer layer includes a first superlattice portion on the seed layer, a second superlattice portion on the first superlattice portion, and a third superlattice portion on the second superlattice portion. The first, second, and third superlattice portions have a first aluminum concentration, a second aluminum concentration, and a third aluminum concentration, respectively. The second aluminum concentration is less than the first aluminum concentration, and the second aluminum concentration is less than the third aluminum concentration.

[0005] In some embodiments, a weighted average aluminum concentration is defined as follows (1): The second aluminum concentration is less than the weighted average aluminum concentration. In some embodiments, the difference between the weighted average aluminum concentration and the second aluminum concentration is greater than 10%. In some specific embodiments, the second aluminum concentration is the same as the first aluminum concentration.

[0006] In some embodiments, the first aluminum concentration is 20% or more and 60% or less, the second aluminum concentration is 10% or more and 45% or less, the third aluminum concentration is 40% or more and 90% or less, and the weighted average aluminum concentration is 40% or more and 80% or less. In some embodiments, the curvature of the buffer layer is greater than 0 km. -1 and less than 60km -1 .

[0007] In some embodiments, the first superlattice portion comprises a plurality of first repeating units stacked m1 times, each comprising an Al layer with a thickness of a1 nanometers. x1 Ga 1-x1 The first sublayer of N and Al located on the first sublayer with a thickness of b1 nanometers y1 Ga 1-y1 The second sublayer of N. Here, m1 is a positive integer, a1>0, b1>0, 0≤x1≤1, 0≤y1≤1. The first aluminum concentration is (a1*x1+b1*y1)*100% / (a1+b1).

[0008] In some embodiments, the second superlattice portion comprises a plurality of second repeating units stacked m² times, each comprising Al with a thickness of a² nanometers. x2 Ga 1-x2 The third sublayer of N and Al located on the third sublayer with a thickness of b2 nanometers y2 Ga 1- y2 The fourth sublayer of N. Here, m2 is a positive integer, a2>0, b2>0, 0≤x2≤1, 0≤y2≤1. The second aluminum concentration is (a2*x2+b2*y2)*100% / (a2+b2).

[0009] In some embodiments, the third superlattice portion comprises a plurality of third repeating units stacked m³ times, each comprising Al with a thickness of a³ nanometers. x3 Ga 1-x3 The fifth sublayer of N and Al located on the fifth sublayer with a thickness of b3 nanometers y3 Ga 1- y3 The sixth sublayer of N. Where m3 is a positive integer, a3>0, b3>0, 0≤x3≤1, 0≤y3≤1. The third aluminum concentration is (a3*x3+b3*y3)*100% / (a3+b3).

[0010] In some embodiments, the rate of change of the tortuosity of the film is defined as the tortuosity slope. The first superlattice portion, the second superlattice portion, and the third superlattice portion each have a first tortuosity slope, a second tortuosity slope, and a third tortuosity slope, respectively. The second tortuosity slope is less than the first tortuosity slope, and the second tortuosity slope is less than the third tortuosity slope. The first tortuosity slope is negative, 0, or positive; the second tortuosity slope is negative; and the third tortuosity slope is positive.

[0011] In some embodiments, the second superlattice portion includes: a first sub-superlattice portion located on the first superlattice portion and having a first sub-aluminum concentration; and a second superlattice portion located on the first sub-superlattice portion and having a second sub-aluminum concentration. The second aluminum concentration is as follows (2):

[0012] In some embodiments, the buffer layer further comprises: a fourth superlattice portion located between the seed layer and the first superlattice portion, and a fifth superlattice portion located on the fourth superlattice portion. The fourth superlattice portion and the fifth superlattice portion have a fourth aluminum concentration and a fifth aluminum concentration, respectively. A weighted average aluminum concentration is defined as the following formula (3): The second aluminum concentration is less than the weighted average aluminum concentration.

[0013] In some embodiments, the fourth aluminum concentration is less than the fifth aluminum concentration. In some specific embodiments, the second aluminum concentration is the same as the fourth aluminum concentration.

[0014] In some embodiments, the buffer layer further includes a sixth superlattice portion located between the fifth superlattice portion and the first superlattice portion, having a sixth aluminum concentration. In some specific embodiments, the sixth superlattice portion is identical to the second superlattice portion (having the same composition and aluminum concentration).

[0015] In some embodiments, the thickness of the second superlattice portion is 100-1200 nanometers (nm). In some embodiments, the thickness of the buffer layer is 2-10 micrometers (μm).

[0016] In some embodiments, the substrate is a QST substrate manufactured by Qromis Technology, Inc., USA. In some embodiments, the substrate comprises a substrate and at least one insulating material covering the substrate.

[0017] This invention provides a semiconductor device comprising the aforementioned semiconductor structure, a channel layer on a buffer layer, a barrier layer on the channel layer, a gate electrode on the barrier layer, and source and drain electrodes located on opposite sides of the gate electrode. This semiconductor device is a high-electron mobility transistor (HEMT). Attached Figure Description

[0018] Figure 1 A schematic cross-sectional view of a semiconductor structure is shown for some embodiments of the present invention.

[0019] Figures 2-1 to 2-4 A schematic diagram illustrating the relationship between the composition and stress of a sublayer in a superlattice section of a semiconductor structure is provided for some embodiments of the present invention.

[0020] Figure 3 A cross-sectional schematic diagram of a semiconductor structure is shown for some other embodiments of the present invention.

[0021] Figure 4 A cross-sectional schematic diagram of a semiconductor structure is shown for further embodiments of the present invention.

[0022] Figure 5 Experimental data diagrams of the curvature of the superlattice portion in a semiconductor structure are shown for further embodiments of the present invention.

[0023] Figure 6 Simulated data diagrams of the curvature of the superlattice portion in a semiconductor structure are shown for further embodiments of the present invention.

[0024] Figure 7 A cross-sectional schematic diagram of a semiconductor structure is shown for some other embodiments of the present invention.

[0025] Figure 8 A schematic cross-sectional view of a semiconductor device is shown for some embodiments of the present invention.

[0026] Symbol explanation:

[0027] 102:Substrate;

[0028] 102C: Substrate;

[0029] 102M: Insulating material;

[0030] 104: Seed layer;

[0031] 104H: High-temperature layer;

[0032] 104L: Low-temperature layer;

[0033] 106: Buffer layer;

[0034] SL1: First superlattice section;

[0035] SLU1: First repeating unit;

[0036] SLU11: First sublayer;

[0037] SLU12: Second sublayer;

[0038] SL2: Second superlattice section;

[0039] SLU2: Second repeating unit;

[0040] SLU21: Third sublayer;

[0041] SLU22: Fourth sublayer;

[0042] SLSU21: First sub-repeating unit;

[0043] SLSU211: First sublayer;

[0044] SLSU212: Second sublayer;

[0045] SLSU22: Second sub-repeating unit;

[0046] SLSU221: Third sublayer;

[0047] SLSU222: Fourth sublayer;

[0048] SL3: Third superlattice section;

[0049] SLU3: Third repeating unit;

[0050] SLU31: Fifth sublayer;

[0051] SLU32: The sixth sublayer;

[0052] SL4: Fourth superlattice section;

[0053] SLU4: Fourth repeating unit;

[0054] SLU41: The seventh sublayer;

[0055] SLU42: Eighth sublayer;

[0056] SL5: Fifth superlattice section;

[0057] SLU5: Fifth repeating unit;

[0058] SLU51: Ninth sublayer;

[0059] SLU52: The tenth sublayer;

[0060] SL6: Sixth superlattice section;

[0061] SLU6: Sixth repeating unit;

[0062] SLU61: Eleventh sublayer;

[0063] SLU62: The twelfth sublayer;

[0064] 108: First compound semiconductor layer;

[0065] 110: Channel layer;

[0066] 112: Barrier layer;

[0067] 114: Second compound semiconductor layer;

[0068] D: Drain electrode;

[0069] G: Gate electrode;

[0070] S: Source electrode. Detailed Implementation

[0071] The semiconductor structure and its formation method of the present invention will be described in detail below. It should be understood that the following description provides different embodiments or examples for implementing different variations of the invention. The specific devices and arrangements described below are merely for illustrative purposes. Of course, these are only examples and not intended to limit the scope of the invention. Furthermore, if the description mentions that a first device is formed on a second device, it may include embodiments where the first and second devices are in direct contact, or embodiments where an additional device is formed between the first and second devices so that they are not in direct contact. In addition, the embodiments of the present invention may repeat reference numerals and / or letters in different examples. Such repetition is for brevity and clarity, and is not intended to indicate a relationship between the different embodiments and / or configurations discussed.

[0072] Furthermore, spatially related terms such as "below," "under," "below," "above," "above," and other similar expressions may be used in the following description to simplify the description of the relationship between a device or component and other devices or components as shown in the figure. These spatially related terms include not only the directions depicted in the figure but also the different orientations of the device during use or operation. The device may be positioned in other directions (rotated 90 degrees or in other orientations), and the spatially related descriptions used herein may be interpreted accordingly.

[0073] The following describes some variations of the embodiments. In embodiments with different figures and descriptions, similar device symbols are used to designate similar devices. It is understood that additional steps may be provided before, during, or after the method, and some described steps may be replaced or omitted for other embodiments of the method.

[0074] Here, the terms "about" or "approximately" generally indicate within 20% of a given value or range, preferably within 10%, and even more preferably within 5%. The quantities given here are approximate, meaning that the meaning of "about" or "approximately" may be implied even without specific specification.

[0075] Embodiments of the present invention provide a semiconductor structure. This semiconductor structure includes a substrate, a seed layer on the substrate, and a buffer layer on the seed layer. The buffer layer includes a first superlattice part, a second superlattice part, and a third superlattice part, each having a first aluminum concentration, a second aluminum concentration, and a third aluminum concentration, respectively. The second aluminum concentration is less than the first aluminum concentration, and the second aluminum concentration is less than the third aluminum concentration.

[0076] During epitaxial growth, insufficient mechanical strength of the substrate can easily lead to a sudden increase in curvature, resulting in problems such as epitaxial or substrate cracking, uneven temperature, and non-compliance with machine specifications. To address this, this invention employs a superlattice section with a lower aluminum concentration placed between two other superlattice sections. This reduces curvature and prevents a sudden increase in curvature in the buffer layer from exceeding the critical value (60 km²). -1 )).

[0077] Furthermore, embodiments of the present invention achieve a predetermined breakdown voltage by setting the aluminum concentration (e.g., weighted average aluminum concentration) of the buffer layer within a specific range. Additionally, embodiments of the present invention adjust the curvature slope of each superlattice section to be positive or negative, enabling the semiconductor device to achieve the predetermined breakdown voltage while simultaneously ensuring the buffer layer curvature remains within a predetermined range, conforming to equipment specifications and preventing epitaxial growth and / or substrate breakage. Furthermore, embodiments of the present invention use a substrate with composite materials to resist greater stress.

[0078] The present invention will now be described in detail through specific embodiments. Figure 1 , Figure 3 , Figure 4 , Figure 7 Exemplary cross-sectional views of the semiconductor structures in the first, second, third, and fourth embodiments of this application are described respectively.

[0079] Figures 2-1 to 2-4 A schematic diagram illustrating the relationship between the composition and stress of the sublayers in the superlattice section of the semiconductor structure in this application.

[0080] Figures 5-6 The experimental and simulated data diagrams illustrate the bending of the semiconductor structure in the third embodiment of this application. Figure 8 An exemplary cross-sectional view of a semiconductor device in the fifth embodiment of this application is shown.

[0081] [First Embodiment]

[0082] like Figure 1As shown, a substrate 102 is provided. In some embodiments, the substrate 102 can be a homogeneous substrate or a composite substrate. For example, the substrate 102 can be a substrate composed of a single material, a composite material, or a multilayer film. In some embodiments, the homogeneous substrate can be a silicon substrate, a sapphire substrate, a ceramic substrate, etc. In some embodiments, the composite substrate can be a QST substrate, silicon-on-insulator (SOI), etc. QST substrate refers to a substrate manufactured by Qromis Technology, Inc. of the United States.

[0083] For example, a QST substrate may include a substrate 102C and an insulating material 102M encapsulating the substrate 102C. The insulating material 102M prevents diffusion of the substrate 102C and also blocks the substrate 102C from interacting with other film layers or process equipment. In some embodiments, the substrate 102C may comprise a ceramic material. The ceramic material comprises a metallic inorganic material. In some embodiments, the substrate 102C may comprise silicon carbide, aluminum nitride (AlN), sapphire, or other suitable materials. The sapphire substrate mentioned above is aluminum oxide. In some embodiments, the insulating material 102M may be a single or multiple insulating material layers covering all surfaces (including the top and bottom surfaces and all sides) of the substrate 102C. The insulating material layers are, for example, oxides, nitrides, or other suitable insulating materials. In some other embodiments, the insulating material 102M covering the periphery of the substrate 102C may include, in addition to multiple insulating material layers, other suitable material layers, such as semiconductor layers. In some embodiments, the semiconductor layers are, for example, polycrystalline silicon layers disposed between the insulating material layers.

[0084] In this embodiment of the invention, a QST substrate is used as substrate 102 for illustration, and for the sake of simplicity, only a single layer of insulating material 102M is shown in the drawings to facilitate a clear explanation of the semiconductor structure formation method.

[0085] like Figure 1As shown, a seed layer 104 is formed on a substrate 102. In some embodiments, the seed layer 104 may be formed of silicon (Si), aluminum nitride (AlN), or other suitable materials. In some embodiments, the seed layer 104 may comprise one or more layers of suitable materials. In some embodiments, the seed layer 104 may comprise a low-temperature layer 104L grown at a low temperature and a high-temperature layer 104H grown at a high temperature on the substrate 102. In some embodiments, both the low-temperature layer 104L and the high-temperature layer 104H are aluminum nitride (AlN). In some embodiments, the low-temperature layer 104L has a thickness of about 0.5 to 2 nanometers (nm), and the high-temperature layer 104H has a thickness of about 100 to 300 nanometers (nm). In some embodiments, island-shaped alumina (low-temperature layer 104L) is first formed at a low temperature, followed by the formation of a higher-quality alumina (high-temperature layer 104H) at a high temperature to reduce the subsequent generation of lattice dislocations.

[0086] In some embodiments, the method for forming the seed layer 104 may include selective areagrowth (SAG), chemical vapor deposition (CVD), molecular-beam epitaxy (MBE), solid-phase epitaxial recrystallization (SPER) after deposition of a doped amorphous semiconductor (e.g., Si), direct seeding, or other suitable processes. The chemical vapor deposition process may be, for example, vapor-phase epitaxy (VPE), low-pressure chemical vapor deposition (LPCVD), ultra-high vacuum chemical vapor deposition (UHV-CVD), or other suitable processes.

[0087] like Figure 1 As shown, a buffer layer 106 is formed on the seed layer 104. The buffer layer 106 can mitigate the strain caused by stress in a subsequent channel layer formed above the buffer layer. In some embodiments, the thickness of the buffer layer 106 can be 2 to 10 micrometers (μm) and can be adjusted according to different voltages. For example, at voltages of 500 to 1500 V, the thickness of the buffer layer 106 can be 2 to 10 micrometers (μm). The curvature of the buffer layer 106 is greater than 0 km. -1 and less than 60km -1To prevent film peeling. That is, the curvature is greater than 60 km. -1 At this time, if the curvature is too large, it will not only fail to meet the machine specifications, but may also easily cause other film layers to peel off along with it. Curvature less than 0 km -1 When the film bends in the opposite direction (e.g., from an upward concave to a downward concave), it is also easy for the film to peel off.

[0088] In some embodiments, the buffer layer 106 includes a plurality of superlattice sections. Figure 1 In one embodiment, there are three superlattice units.

[0089] like Figure 1 As shown, the buffer layer 106 is sequentially disposed on the seed layer 104, comprising a first superlattice portion SL1, a second superlattice portion SL2, and a third superlattice portion SL3. The first superlattice portion SL1 has a first aluminum concentration and a first superlattice portion thickness; the second superlattice portion SL2 has a second aluminum concentration and a second superlattice portion thickness; and the third superlattice portion SL3 has a third aluminum concentration and a third superlattice portion thickness.

[0090] In some embodiments, the thicknesses of the first superlattice portion, the second superlattice portion, and the third superlattice portion may be the same as or different from each other. For example, the thicknesses of the first superlattice portion, the second superlattice portion, and the third superlattice portion may each be independently 100–2000 nanometers (nm); or 150–1500 nanometers (nm).

[0091] In some specific embodiments, the thickness of the second superlattice portion can be less than the thickness of the first superlattice portion, or simultaneously less than the thickness of the third superlattice portion. For example, the thickness of the second superlattice portion is 100–1200 nanometers (nm), and the thicknesses of the first and third superlattice portions are each 500–1300 nanometers (nm). To avoid negative curvature, the thickness of the second superlattice portion is preferably 200–700 nanometers (nm). The effect of the thickness of the second superlattice portion on curvature will be discussed later. Figure 6 Let me explain in detail.

[0092] In some embodiments, the second aluminum concentration is less than the first aluminum concentration, and the second aluminum concentration is less than the third aluminum concentration. In some embodiments, the first aluminum concentration is 20% or more and 60% or less, the second aluminum concentration is 10% or more and 45% or less, and the third aluminum concentration is 40% or more and 90% or less. In some embodiments, the second aluminum concentration is less than the weighted average aluminum concentration. In some embodiments, the difference between the weighted average aluminum concentration and the second aluminum concentration is 10% or more. For example, the first aluminum concentration, the second aluminum concentration, and the third aluminum concentration can be 49%, 38%, and 59%, respectively; or 45%, 35%, and 56%. This prevents a sudden increase in bending degree that exceeds a critical value.

[0093] In some embodiments, the weighted average aluminum concentration is given by the following formula (1):

[0094]

[0095] That is, the weighted average aluminum concentration is given by the following formula (1-1):

[0096] (First aluminum concentration × First superlattice thickness + Second aluminum concentration × Second superlattice thickness + Third aluminum concentration × Third superlattice thickness) / (First superlattice thickness + Second superlattice thickness + Third superlattice thickness) Equation (1-1).

[0097] In some embodiments, the weighted average aluminum concentration is above 40% and below 80% to ensure sufficient breakdown voltage. In some embodiments, the second aluminum concentration is less than the weighted average aluminum concentration, and the difference between the weighted average aluminum concentration and the second aluminum concentration is more than 10%. This prevents a sudden increase in bending that exceeds a critical value.

[0098] The composition of the superlattice and the calculation of the aluminum concentration will be explained in detail below.

[0099] like Figure 1 As shown, the first superlattice section SL1 may include a plurality of first repeating units SLU1. The aforementioned first repeating units SLU1 may be stacked repeatedly m1 times. m1 may be a positive integer. In some embodiments, m1 may be 20 to 120, or 30 to 100, or 40 to 80.

[0100] like Figure 1 As shown, each first repeating unit SLU1 comprises a first sublayer SLU11 and a second sublayer SLU12 located on the first sublayer SLU11. In some embodiments, the first sublayer SLU11 may have a thickness of a1 nanometers, and the second sublayer SLU12 may have a thickness of b1 nanometers. In some embodiments, a1 is greater than 0 and b1 is greater than 0 (a1>0 and b1>0). In some embodiments, a1 may be greater than, equal to, or less than b1, depending on actual needs. In some embodiments, a1 may be 1-50, and b1 may be 1-50.

[0101] In some embodiments, the first sublayer SLU11 may have Al x1 Ga 1-x1 The composition of N, the second sublayer SLU12 can have Al y1 Ga 1-y1 The composition of N. In some embodiments, x1 is 0 or more and 1 or less, and y1 is 0 or more and 1 or less (0 ≤ x1 ≤ 1 and 0 ≤ y1 ≤ 1). That is, the first sub-layer SLU11 and the second sub-layer SLU12 can be, for example, GaN, AlN, Al, etc. 0.5Ga 0.5 N, etc.

[0102] Since the first superlattice SL1 is composed of repeatedly stacked first repeating units SLU1, the first aluminum concentration of the first superlattice SL1 is equivalent to the aluminum concentration of the first repeating unit SLU1. In some embodiments, the aluminum concentration of the first repeating unit SLU1 is determined by the composition and thickness of the first sublayer SLU11 and the second sublayer SLU12. That is, the aluminum concentration of the first repeating unit SLU1 can be defined as (a1*x1+b1*y1)*100% / (a1+b1). For example, the first sublayer SLU11 is AlN with a thickness of 10 nanometers, and the second sublayer SLU12 is AlN with a thickness of 40 nanometers. 0.25 Ga 0.75 If N, then the aluminum concentration (first aluminum concentration) of the first repeating unit SLU1 is (1*10+0.25*40)*100% / (10+40)=40%.

[0103] This application reduces the problem of a sudden increase in curvature by lowering the aluminum concentration in a specific superlattice region to a certain level. Therefore, the aluminum concentration in the superlattice region plays a key role in this invention.

[0104] The following will be through Figures 2-1 to 2-4 This section explains the influence of sublayer composition (aluminum concentration) and thickness on stress in the superlattice.

[0105] First, when the composition of the sublayers in a repeating unit is different, stresses will be generated in different directions. For example, such as... Figure 2-1 As shown, when the first sublayer SLU11 is composed of AlN with an aluminum concentration of 100%, it exhibits outward stress; as Figure 2-2 As shown, when the second sublayer SLU12 is composed of Al with an aluminum concentration of 100x%, x Ga 1-x When N is present (where 0 ≤ x < 1, for example, x can be 0.1, i.e., the aluminum concentration is 10%), it has inward stress. That is, the aluminum concentration determines the direction of stress.

[0106] Furthermore, the stress behavior of the repeating element will be determined by the composition and thickness of the sublayers. For example, the first sublayer SLU11 is composed of 100% AlN, and the second sublayer SLU12 is composed of Al... x1 Ga 1-x1 In the case of N(0≤x<1), such as Figure 2-3 As shown, when the thickness of the second sublayer SLU12 is greater than the thickness of the first sublayer SLU11, the first repeating unit SLU1 will be dominated by inward stress (low aluminum concentration); conversely, as Figure 2-4As shown, when the thickness of the second sublayer SLU12 is less than the thickness of the first sublayer SLU11, the first repeating unit SLU1 will be dominated by outward stress (high aluminum concentration). Since the superlattice is composed of repeatedly stacked repeating units, the stress performance of the superlattice is equivalent to that of the repeating unit.

[0107] Furthermore, in the relationship between curvature and thickness, outward stress (high aluminum concentration) provides a positive change in curvature (positive slope), while inward stress (low aluminum concentration) provides a negative change in curvature (negative slope). Therefore, the stress direction (aluminum concentration) becomes a key factor determining the curvature direction. Further analysis will follow... Figure 5 and Figure 6 Explain in detail the effect of aluminum concentration on the slope of the bend.

[0108] Continue as Figure 1 As shown, the second superlattice SL2 is similar to the first superlattice SL1. Specifically, the second superlattice SL2 comprises a plurality of second repeating units SLU2 stacked m2 times, which contain Al with a thickness of a2 nanometers. x2 Ga 1-x2 The third sublayer SLU21 of N and Al located on the third sublayer SLU21 with a thickness of b2 nanometers y2 Ga 1-y2 The fourth sub-layer of N is SLU22. Where m2 is a positive integer, a2>0, b2>0, 0≤x2≤1, 0≤y2≤1.

[0109] The second repeating unit SLU2 is similar to the first repeating unit SLU1. Its third sub-layer SLU21 and fourth sub-layer SLU22 are similar to the first sub-layer SLU11 and the second sub-layer SLU12. m2, a2, b2, x2, y2 are similar to m1, a1, b1, x1, y1, which will not be elaborated here.

[0110] Furthermore, similar to the first aluminum concentration, the second aluminum concentration is (a2*x2+b2*y2)*100% / (a2+b2).

[0111] Continue as Figure 1 As shown, the third superlattice SL3 is similar to the first superlattice SL1. Specifically, the third superlattice SL3 comprises multiple third repeating units SLU3 stacked m3 times, each containing Al with a thickness of a3 nanometers. x3 Ga 1-x3 The fifth sublayer SLU31 of N and the Al layer located on the fifth sublayer SLU31 with a thickness of b3 nanometers. y3 Ga 1-y3The sixth sub-layer SLU32 of N. Here, m3 is a positive integer, a3>0, b3>0, 0≤x3≤1, 0≤y3≤1. The third repeating unit SLU3 is similar to the first repeating unit SLU1. The fifth sub-layer SLU31 and the sixth sub-layer SLU32 contained in the third repeating unit SLU3 are similar to the first sub-layer SLU11 and the second sub-layer SLU12. m3, a3, b3, x3, and y3 are similar to m1, a1, b1, x1, and y1, and will not be elaborated further here.

[0112] Furthermore, similar to the first aluminum concentration, the third aluminum concentration is (a3*x3+b3*y3)*100% / (a3+b3).

[0113] As mentioned above, the embodiments of the present invention have a second aluminum concentration in the second superlattice portion that is lower than that in the first superlattice portion and lower than that in the third lattice portion, which can reduce the sudden increase in curvature and reduce substrate breakage.

[0114] [Second Embodiment]

[0115] like Figure 3 As shown, the second embodiment is largely the same as the first embodiment, except that... Figure 3 The second superlattice SL2 comprises a first sub-superlattice SLS21 and a second sub-superlattice SLS22. The first sub-superlattice SLS21 has a first sub-aluminum concentration and a first sub-superlattice thickness, and the second sub-superlattice SLS22 has a second sub-aluminum concentration and a second sub-superlattice thickness. That is, the first sub-superlattice SLS21 and the second sub-superlattice SLS22 together constitute the second superlattice SL2.

[0116] In some embodiments, the first sub-aluminum concentration may be the same as or different from the second sub-aluminum concentration. In some embodiments, the first sub-aluminum concentration and the second sub-aluminum concentration may each be independently above 10% and below 45%. In some specific embodiments, the first sub-aluminum concentration is different from the second sub-aluminum concentration to control the aluminum concentration.

[0117] In some embodiments, the second aluminum concentration is as follows (2):

[0118]

[0119] That is, the second aluminum concentration is given by the following formula (2-1):

[0120] (First sub-aluminum concentration × First sub-superlattice thickness + Second sub-aluminum concentration × Second sub-superlattice thickness) / (First sub-superlattice thickness + Second sub-superlattice thickness) Equation (2-1).

[0121] like Figure 3As shown, the first sub-superlattice SLS21 and the second sub-superlattice SLS22 respectively include a first sub-repeating unit SLSU21 and a second sub-repeating unit SLSU22. The first sub-repeating unit SLSU21 includes a first sublayer SLSU211 and a second sublayer SLSU212. The second sub-repeating unit SLSU22 includes a third sublayer SLSU221 and a fourth sublayer SLSU222. The first sub-repeating unit SLSU21 and the second sub-repeating unit SLSU22 are similar to the first repeating unit SLU1, the first sublayer SLSU211 and the third sublayer SLSU221 are similar to the first sublayer SLU11, and the second sublayer SLSU212 and the fourth sublayer SLSU222 are similar to the second sublayer SLU12, which will not be described in detail here.

[0122] Continuing from the above, the aluminum concentration is further adjusted by constructing different sub-superlattice sections in the second superlattice section, thereby preventing a sudden increase in curvature.

[0123] [Third Embodiment]

[0124] like Figure 4 As shown, the third embodiment is largely the same as the first embodiment, except that... Figure 4 The intermediate semiconductor structure also includes a fourth superlattice section SL4 and a fifth superlattice section SL5 between the seed layer 104 and the first superlattice section SL1. The fourth superlattice section SL4 has a fourth aluminum concentration and a fourth superlattice section thickness; the fifth superlattice section SL5 has a fifth aluminum concentration and a fifth superlattice section thickness.

[0125] In some embodiments, similar to the thickness of the first superlattice portion, the thickness of the fourth superlattice portion and the thickness of the fifth superlattice portion may be the same or different, for example, they may each be 100 to 2000 nanometers (nm); or 150 to 1500 nanometers (nm).

[0126] In some embodiments, the fourth aluminum concentration differs from the fifth aluminum concentration. For example, the fourth aluminum concentration may be less than the fifth aluminum concentration. In some embodiments, the fourth aluminum concentration is 10% or more and 45% or less, and the fifth aluminum concentration is 30% or more and 90% or less.

[0127] In some embodiments, the weighted average aluminum concentration is given by the following formula (3):

[0128]

[0129] That is, the weighted average aluminum concentration is given by the following formula (3-1):

[0130] (First aluminum concentration × First superlattice thickness + Second aluminum concentration × Second superlattice thickness + Third aluminum concentration × Third superlattice thickness + Fourth aluminum concentration × Fourth superlattice thickness + Fifth aluminum concentration × Fifth superlattice thickness) / (First superlattice thickness + Second superlattice thickness + Third superlattice thickness + Fourth superlattice thickness + Fifth superlattice thickness) Equation (3-1).

[0131] In some embodiments, the second aluminum concentration and the fourth aluminum concentration may be less than the weighted average aluminum concentration. In some embodiments, the third aluminum concentration and the fifth aluminum concentration may be greater than the weighted average aluminum concentration. In some embodiments, the first aluminum concentration may be less than, equal to, or greater than the weighted average aluminum concentration.

[0132] like Figure 4 As shown, the fourth superlattice SL4 is similar to the first superlattice SL1. Specifically, the fourth superlattice SL4 comprises multiple fourth repeating units SLU4 stacked m4 times, each containing Al with a thickness of a4 nanometers. x4 Ga 1-x4 The seventh sublayer SLU41 of N and Al located on the seventh sublayer SLU41 with a thickness of b4 nanometers y4 Ga 1-y4 The eighth sub-layer of N is SLU42. Where m4 is a positive integer, a4>0, b4>0, 0≤x4≤1, 0≤y4≤1.

[0133] The fourth repeating unit SLU4 is similar to the first repeating unit SLU1. Its seventh sub-layer SLU41 and eighth sub-layer SLU42 are similar to the first sub-layer SLU11 and the second sub-layer SLU12. m4, a4, b4, x4, and y4 are similar to m1, a1, b1, x1, and y1, which will not be elaborated here.

[0134] Furthermore, similar to the first aluminum concentration, the fourth aluminum concentration is (a4*x4+b4*y4)*100% / (a4+b4).

[0135] Continue as Figure 4 As shown, the fifth superlattice SL5 is similar to the first superlattice SL1. Specifically, the fifth superlattice SL5 comprises multiple fifth repeating units SLU5 stacked m5 times, each containing an Al layer with a thickness of a5 nanometers. x5 Ga 1-x5 The ninth sublayer SLU51 of N and Al located on the ninth sublayer SLU51 with a thickness of b5 nanometers y5 Ga 1-y5 The tenth sub-layer of N is SLU52. Where m5 is a positive integer, a5>0, b5>0, 0≤x5≤1, 0≤y5≤1.

[0136] The fifth repeating unit SLU5 is similar to the first repeating unit SLU1. Its ninth sub-layer SLU51 and tenth sub-layer SLU52 are similar to the first sub-layer SLU11 and the second sub-layer SLU12. m5, a5, b5, x5, and y5 are similar to m1, a1, b1, x1, and y1, which will not be elaborated here.

[0137] Furthermore, similar to the first aluminum concentration, the fifth aluminum concentration is (a5*x5+b5*y5)*100% / (a5+b5).

[0138] In some specific embodiments, the thickness of the fourth superlattice portion differs from that of the second superlattice portion, but the fourth aluminum concentration is the same as that of the second aluminum concentration. In other embodiments, the fourth superlattice portion SL4 may be the same as the second superlattice portion SL2.

[0139] then, Figure 5 This is a graph showing experimental data on the curvature of the semiconductor structure according to the third embodiment. The vertical axis represents the curvature (km). -1 The horizontal axis represents time (each division is 30 minutes, and curvature data is recorded every second), corresponding to the various film layers in a semiconductor structure from the substrate upwards. This experiment was monitored in real-time by a device (named EpiCurveTT) installed inside the instrument, which recorded the curvature of the film layers at different time points. This device uses laser light to strike the sample surface and determines the sample's curvature by the amount of reflection displacement of the laser light.

[0140] The aluminum concentration and thickness configurations of each superlattice portion in Experimental Example 1 and Comparative Example 1 are shown in the table below:

[0141] [Table 1]

[0142]

[0143]

[0144] [Table 2]

[0145] Comparative Example 1 Aluminum concentration (%) Thickness (nm) Third superlattice SL3 59 1192 First superlattice SL1 49 921 Fifth superlattice SL5 56 1051 Fourth superlattice SL4 38 836

[0146] In Experimental Example 1, the buffer layer 106 includes a second superlattice portion SL2, has a weighted average aluminum concentration of 49.8%, and a thickness of 4000 nanometers (nm). In Comparative Example 1, the buffer layer 106 does not include a second superlattice portion SL2, has a weighted average aluminum concentration of 51.4%, and a thickness of 4000 nanometers (nm).

[0147] like Figure 5As shown, in the fourth superlattice section SL4 (aluminum concentration 38%), the curvature decreases (curvature slope is negative); in the fifth superlattice section SL5 (aluminum concentration 56%), the curvature increases (curvature slope is positive); in the first superlattice section SL1 (aluminum concentration 49%), the curvature decreases (curvature slope is negative); in the second superlattice section SL2 (aluminum concentration 38%), the curvature decreases (curvature slope is negative); and in the third superlattice section SL3 (aluminum concentration 59%), the curvature increases (curvature slope is positive).

[0148] It can be seen that in Comparative Example 1, which does not have a second superlattice section SL2, the curvature increases sharply by more than 60 km. -1 This can lead to cracking. Therefore, increasing the second superlattice portion SL2 with a lower aluminum concentration below the uppermost film layer of the buffer layer can reduce problems such as cracking caused by a sudden increase in bending without significantly affecting the breakdown voltage.

[0149] then, Figure 6 This is a simulated data graph of the curvature of the semiconductor structure according to the third embodiment. The vertical axis represents the curvature (km). -1 The horizontal axis represents the thickness of the buffer layer (nm). This simulation uses the slope relationship between aluminum concentration and experimental database to calculate and predict the curvature change under different aluminum concentrations in the film.

[0150] Figure 6 In the experiment, Example 1 and Comparative Example 1 were the same Figure 5 The description in the document is as follows. Except that the thickness of the second superlattice portion is changed to 600 nanometers (nm), Experimental Example 2 is the same as Experimental Example 1, with a weighted average aluminum concentration of 48.3% and a thickness of 4000 nanometers (nm) for the buffer layer 106.

[0151] Figure 6 The curvature change is similar to Figure 5 In detail, the fourth superlattice SL4 (aluminum concentration 38%), the fifth superlattice SL5 (aluminum concentration 56%), the first superlattice SL1 (aluminum concentration 49%), the second superlattice SL2 (aluminum concentration 38%), and the third superlattice SL3 (aluminum concentration 59%) have fourth curvature slope, fifth curvature slope, first curvature slope, second curvature slope, and third curvature slope values ​​that are negative, positive, negative, negative, and positive, respectively.

[0152] It can be seen that the higher the aluminum concentration, the more positive the curvature slope, and the greater the slope tends to be. Furthermore, it is also evident that placing the second superlattice portion SL2, with a lower aluminum concentration, below the uppermost film layer of the buffer layer reduces the problem of a sudden increase in curvature. Moreover, as the thickness of the second superlattice portion SL2 increases, the curvature is further reduced, and the sudden increase in curvature can be reduced by more than 60 km.-1 The risks.

[0153] Continuing on the above, embodiments of the present invention may provide a second superlattice portion and a fourth superlattice portion with a lower aluminum concentration in the buffer layer to prevent a sudden increase in curvature while substantially maintaining the collapse voltage.

[0154] [Fourth Embodiment]

[0155] like Figure 7 As shown, the fourth embodiment is largely the same as the third embodiment, except that... Figure 7 The semiconductor structure also includes a sixth superlattice section SL6 between the fifth superlattice section SL5 and the first superlattice section SL1. The sixth superlattice section SL6 has a sixth aluminum concentration and a sixth superlattice section thickness.

[0156] In some embodiments, similar to the thickness of the first superlattice portion, the thickness of the sixth superlattice portion can be, for example, 100–2000 nanometers (nm); or 150–1500 nanometers (nm). In some embodiments, the sixth aluminum concentration is 10% or more and 45% or less.

[0157] In some embodiments, the weighted average aluminum concentration is given by the following formula (4):

[0158]

[0159] That is, the weighted average aluminum concentration is given by the following formula (4-1):

[0160] (First aluminum concentration × First superlattice thickness + Second aluminum concentration × Second superlattice thickness + Third aluminum concentration × Third superlattice thickness + Fourth aluminum concentration × Fourth superlattice thickness + Fifth aluminum concentration × Fifth superlattice thickness + Sixth aluminum concentration × Sixth superlattice thickness) / (First superlattice thickness + Second superlattice thickness + Third superlattice thickness + Fourth superlattice thickness + Fifth superlattice thickness + Sixth superlattice thickness) Equation (4-1).

[0161] In some embodiments, the sixth aluminum concentration is less than the weighted average aluminum concentration.

[0162] like Figure 7 As shown, the sixth superlattice SL6 is similar to the first superlattice SL1. Specifically, the sixth superlattice SL6 comprises multiple sixth repeating units SLU6 stacked m6 times, each containing Al with a thickness of a6 nanometers. x6 Ga 1-x6 The eleventh sublayer SLU61 of N and the Al layer located on the eleventh sublayer SLU61 with a thickness of b6 nanometers y6 Ga 1-y6The twelfth sub-layer of N is SLU62. Where m6 is a positive integer, a6>0, b6>0, 0≤x6≤1, 0≤y6≤1.

[0163] The sixth repeating unit SLU6 is similar to the first repeating unit SLU1. Its eleventh sub-layer SLU61 and twelfth sub-layer SLU62 are similar to the first sub-layer SLU11 and the second sub-layer SLU12. m6, a6, b6, x6, and y6 are similar to m1, a1, b1, x1, and y1, which will not be elaborated here.

[0164] Furthermore, similar to the first aluminum concentration, the sixth aluminum concentration is (a6*x6+b6*y6)*100% / (a6+b6).

[0165] In some specific embodiments, the sixth superlattice portion SL6 is the same as the second superlattice portion SL2. That is, the thickness of the sixth superlattice portion is the same as the thickness of the second superlattice portion, and the aluminum concentration of the sixth superlattice portion is the same as the aluminum concentration of the second superlattice portion.

[0166] Experimental Example 3 is an example of the fourth embodiment. The aluminum concentration and thickness of each superlattice section can be configured as shown in the table below:

[0167] [Table 3]

[0168] Experimental Example 3 Aluminum concentration (%) Thickness (nm) Third superlattice SL3 59 892 Second superlattice SL2 38 300 First superlattice SL1 49 921 Second superlattice SL6 38 300 Fifth superlattice SL5 56 1051 Fourth superlattice SL4 38 836

[0169] In addition to including the sixth superlattice SL6 (with a thickness of 300 nanometers (nm)), Experimental Example 3 is the same as Experimental Example 1, with a weighted average aluminum concentration of 49.1% and a thickness of 4300 nanometers (nm) for the buffer layer 106.

[0170] Continuing from the above, by setting a sixth superlattice portion with a lower aluminum concentration between superlattice portions with a higher aluminum concentration, the aluminum concentration can be further adjusted, thereby more effectively preventing a sudden increase in curvature.

[0171] [Fifth Embodiment]

[0172] like Figure 8 As shown, the semiconductor device of the fifth embodiment uses the semiconductor structure of the first embodiment. That is, Figure 8 The semiconductor device further includes a channel layer 110 and a barrier layer 112 formed on the buffer layer 106. The semiconductor device of the fifth embodiment may be, for example, a high-electron mobility transistor (HEMT).

[0173] like Figure 8As shown, the channel layer 110 is formed on the buffer layer 106. In some embodiments, the channel layer 110 includes an undoped III-V semiconductor material. For example, the channel layer 110 may be formed of undoped gallium nitride (GaN), but the present invention is not limited thereto. In other embodiments, the channel layer 110 is formed of unintentionally doped (UID) gallium nitride (GaN), so that free carriers are present therein. In some other embodiments, the channel layer 110 includes aluminum nitride (AlN), aluminum gallium nitride (AlGaN), gallium arsenide (GaAs), gallium nitride (GaN), indium gallium nitride (InGaN), gallium indium phosphide (GaInP), aluminum gallium arsenide (AlGaAs), indium phosphide (InP), aluminum indium arsenide (InAlAs), indium gallium arsenide (InGaAs), other suitable III-V materials, or a combination of the foregoing. In some embodiments, the channel layer 110 may be formed by molecular beam epitaxy (MBE), hydride vapor phase epitaxy (HVPE), metal-organic chemical vapor deposition (MOCVD), other suitable methods, or a combination of the foregoing methods.

[0174] As Figure 8 shown, the barrier layer 112 is formed on the channel layer 110. In some embodiments, the barrier layer 112 may include a doped or undoped III-V semiconductor material. For example, the barrier layer 112 may be formed of undoped aluminum gallium nitride (Al x Ga 1-x N, where 0<x<1), but the present invention is not limited thereto. In some other embodiments, the barrier layer 112 may also include aluminum nitride (AlN), aluminum gallium nitride (AlGaN), gallium arsenide (GaAs), gallium nitride (GaN), indium gallium nitride (InGaN), gallium indium phosphide (GaInP), aluminum gallium arsenide (AlGaAs), indium phosphide (InP), aluminum indium arsenide (InAlAs), indium gallium arsenide (InGaAs), other suitable III-V materials, or a combination of the foregoing. For example, the barrier layer 112 may be formed on the channel layer 110 using molecular beam epitaxy, metal-organic chemical vapor deposition, hydride vapor phase epitaxy, other suitable methods, or a combination of the foregoing methods.

[0175] In some embodiments, the channel layer 110 and the barrier layer 112 may comprise dissimilar materials, such as gallium nitride (GaN) and aluminum gallium nitride (AlGaN), respectively, to form a heterogeneous interface between the channel layer 110 and the barrier layer 112. The band gap between the dissimilar materials allows a two-dimensional electron gas (2DEG) (not shown) to be formed on this heterogeneous interface. Semiconductor devices formed according to some embodiments, such as high electron mobility transistor (HEMT) devices, can utilize the 2DEG as a conductive carrier.

[0176] In addition to the channel layer 110 and the barrier layer 112, Figure 8 Embodiments may also include a first compound semiconductor layer 108 doped with carbon to improve the breakdown voltage of the semiconductor structure. For example... Figure 8 As shown, a first compound semiconductor layer 108 is formed on the buffer layer 106 to serve as an electrical buffer layer. In some embodiments, the first compound semiconductor layer 108 may be carbon-doped gallium nitride (C-GaN).

[0177] In addition to the channel layer 110 and the barrier layer 112, Figure 8 Embodiments may further include a second compound semiconductor layer 114 to serve as a switch for the semiconductor device. Figure 8 In some embodiments, the fabrication of an enhanced-mode (i.e., normally-off) high electron mobility transistor is used as an example. In some embodiments, the second compound semiconductor layer 114 can be a P-type doped III-V semiconductor material, such as P-type doped aluminum gallium nitride (AlGaN), gallium nitride (GaN), aluminum nitride (AlN), gallium arsenide (GaAs), indium gallium phosphide (GaInP), aluminum gallium arsenide (AlGaAs), indium phosphide (InP), indium aluminum arsenide (InAlAs), indium gallium (InGaAs), other suitable III-V materials, or combinations thereof. In some embodiments, the second compound semiconductor layer 114 can be formed of P-type doped gallium nitride (P-GaN). In some embodiments, the method for forming the second compound semiconductor layer 114 can include atomic layer deposition, chemical vapor deposition, physical vapor deposition, epitaxial processes, ion implantation, or in-situ doping processes.

[0178] also, Figure 8 The embodiments may also include a gate electrode G, and a source electrode S and a drain electrode D formed on opposite sides of the gate electrode G.

[0179] In some embodiments, the gate electrode G is connected to the second compound semiconductor layer 114. A Schottky contact is formed between the gate electrode G and the second compound semiconductor layer 114. In some embodiments, the gate electrode G may comprise a metallic material, a metal silicide, polysilicon, other suitable conductive materials, or a combination thereof. In some embodiments, the gate electrode G may be formed by atomic layer deposition, chemical vapor deposition, physical vapor deposition (such as sputtering), or similar processes.

[0180] In some embodiments, a source electrode S and a drain electrode D are formed on opposite sides of the gate electrode G. In some embodiments, such as Figure 8 As shown, the source electrode S and drain electrode D are located on and electrically contacted with the channel layer 110. In some embodiments, the source electrode S and drain electrode D comprise conductive materials, such as gold (Au), nickel (Ni), platinum (Pt), palladium (Pd), iridium (Ir), titanium (Ti), chromium (Cr), tungsten (W), aluminum (Al), copper (Cu), tantalum nitride (TaN), titanium nitride (TiN), tungsten silicide (WSi2), combinations thereof, or similar materials. In some embodiments, the source electrode S and drain electrode D may be formed by atomic layer deposition, chemical vapor deposition, physical vapor deposition (such as sputtering), electron beam evaporation, or similar processes. In some embodiments, after depositing the material layers to form the source electrode S and drain electrode D, a high-temperature thermal process, such as rapid thermal annealing, is performed to form source and drain ohmic contacts.

[0181] In some embodiments, the semiconductor device may also include other components, such as conductive lines, dielectric layers, etc., as needed, but the present invention is not limited thereto.

[0182] In summary, by placing a superlattice section with a lower aluminum concentration between two other superlattice sections, this invention can reduce curvature while maintaining the breakdown voltage, thereby preventing a sudden increase in curvature in the buffer layer to exceed a critical value. This invention can also adjust the curvature slope (curvature variation per unit thickness) by controlling the aluminum concentration in the superlattice section, ensuring the curvature remains within a predetermined range. Furthermore, this invention uses a QST substrate with composite materials to resist greater stress, thereby improving semiconductor performance.

[0183] The above outlines several embodiments to enable those skilled in the art to understand the viewpoints of the embodiments of the present invention. Those skilled in the art should understand that they can design or modify other processes and structures based on the embodiments of the present invention to achieve the same objectives and / or advantages as the embodiments described herein. Those skilled in the art should also understand that such equivalent processes and structures do not depart from the spirit and scope of the present invention, and that various changes, substitutions, and replacements can be made without departing from the spirit and scope of the present invention.

Claims

1. A semiconductor structure, characterized in that, include: One substrate; A seed layer is located on the substrate; as well as A buffer layer is located on the seed layer, wherein the buffer layer comprises: A first superlattice portion is located on the seed layer and has a first aluminum concentration and a first superlattice portion thickness; A second superlattice portion, located on the first superlattice portion, having a second aluminum concentration and a second superlattice portion thickness; and A third superlattice portion, located on top of the second superlattice portion, has a third aluminum concentration and a third superlattice portion thickness. Wherein, the second aluminum concentration is less than the first aluminum concentration, and the second aluminum concentration is less than the third aluminum concentration.

2. The semiconductor structure according to claim 1, characterized in that, The weighted average aluminum concentration is defined as follows (1): The second aluminum concentration is less than the weighted average aluminum concentration.

3. The semiconductor structure according to claim 2, characterized in that, The difference between the weighted average aluminum concentration and the second aluminum concentration is greater than 10%.

4. The semiconductor structure according to claim 2, characterized in that, The weighted average aluminum concentration is above 40% and below 80%.

5. The semiconductor structure according to claim 1, characterized in that, The first aluminum concentration is 20% or more and 60% or less, the second aluminum concentration is 10% or more and 45% or less, and the third aluminum concentration is 40% or more and 90% or less.

6. The semiconductor structure according to claim 1, characterized in that, The first superlattice section includes a plurality of first repeating units stacked m1 times, the second superlattice section includes a plurality of second repeating units stacked m2 times, and the third superlattice section includes a plurality of third repeating units stacked m3 times. The first repeating unit includes: The first sublayer is an Al layer with a thickness of a1 nanometers. x1 Ga 1-x1 N; and A second sublayer, located on the first sublayer, is an Al layer with a thickness of b1 nanometers. y1 Ga 1-y1 N, Where m1 is a positive integer, a1>0, b1>0, 0≤x1≤1, 0≤y1≤1, The second repeating unit includes: A third sublayer, which is an Al layer with a thickness of a2 nanometers. x2 Ga 1-x2 N; and A fourth sublayer, located on the first sublayer, is an Al layer with a thickness of b2 nanometers. y2 Ga 1-y2 N, Where m2 is a positive integer, a2>0, b2>0, 0≤x2≤1, 0≤y2≤1, The third repeating unit includes: A fifth sublayer, which is an Al layer with a thickness of a3 nanometers. x3 Ga 1-x3 N; and A sixth sublayer, located on the fifth sublayer, is an Al layer with a thickness of b3 nanometers. y3 Ga 1-y3 N, Where m3 is a positive integer, a3>0, b3>0, 0≤x3≤1, 0≤y3≤1.

7. The semiconductor structure according to claim 6, characterized in that, The first aluminum concentration is (a1*x1+b1*y1)*100% / (a1+b1), the second aluminum concentration is (a2*x2+b2*y2)*100% / (a2+b2), and the third aluminum concentration is (a3*x3+b3*y3)*100% / (a3+b3).

8. The semiconductor structure according to claim 1, characterized in that, The curvature of the buffer layer is greater than 0 km. -1 and less than 60km -1 .

9. The semiconductor structure according to claim 1, characterized in that, The first superlattice portion, the second superlattice portion, and the third superlattice portion each include a first curvature slope, a second curvature slope, and a third curvature slope, wherein the second curvature slope is less than the first curvature slope, and the second curvature slope is less than the third curvature slope.

10. The semiconductor structure according to claim 9, characterized in that, The second curvature slope is negative.

11. The semiconductor structure according to claim 1, characterized in that, The first aluminum concentration is the same as the second aluminum concentration.

12. The semiconductor structure according to claim 1, characterized in that, The second superlattice portion includes: A first sub-superlattice portion, located on the first superlattice portion, having a first sub-aluminum concentration and a first sub-superlattice portion thickness; and A second sub-superlattice portion, located on top of the first sub-superlattice portion, has a second sub-aluminum concentration and a second sub-superlattice portion thickness. The second aluminum concentration is given by the following formula (2):

13. The semiconductor structure according to claim 1, characterized in that, The buffer layer further includes: A fourth superlattice portion, located between the seed layer and the first superlattice portion, has a fourth aluminum concentration; and A fifth superlattice portion, located on the fourth superlattice portion, has a fifth aluminum concentration. The weighted average aluminum concentration is defined by the following formula (3): The second aluminum concentration is less than the weighted average aluminum concentration.

14. The semiconductor structure according to claim 13, characterized in that, The fourth aluminum concentration is less than the fifth aluminum concentration.

15. The semiconductor structure according to claim 13, characterized in that, The second aluminum concentration is the same as the fourth aluminum concentration.

16. The semiconductor structure according to claim 13, characterized in that, The buffer layer further includes: A sixth superlattice portion, located between the fifth superlattice portion and the first superlattice portion, has a sixth aluminum concentration. The sixth superlattice portion is the same as the second superlattice portion.

17. The semiconductor structure according to claim 1, characterized in that, The thickness of the second superlattice is 100–1200 nanometers.

18. The semiconductor structure according to claim 1, characterized in that, The thickness of the buffer layer is 2 to 10 micrometers.

19. The semiconductor structure according to claim 1, characterized in that, The substrate includes: a base material and at least one insulating material. The substrate is covered by at least one insulating material.

20. A semiconductor device, characterized in that, include: The semiconductor structure according to claim 1; A channel layer is located on the buffer layer; A barrier layer is located on the channel layer; A gate electrode is located on the barrier layer; and A source electrode and a drain electrode are located on opposite sides of the gate electrode, respectively.

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