A high-efficiency topcon solar cell manufacturing method with superimposed front surface selection emitter process

Abstract

The application discloses a kind of high-efficiency TOPCon solar cell manufacturing methods of superimposed front selection emitter process, first to N-type silicon wafer is pretreated and whole boron diffusion, form global high square resistance doped layer;Subsequently, inkjet printing technology is used, hot melt wax is accurately printed in the preset silver paste printing area of cell front and solidified to form etching mask;Non-protection area is etched in direction, so that the low square resistance structure of protection area is reserved to reduce contact resistance, and high square resistance structure is formed in non-protection area to reduce minority carrier recombination;Finally, hot melt wax is dissolved by alkali stripping, and electrode preparation and finished product forming are completed.The application discards the traditional high-energy laser propulsion process, avoids silicon wafer damage, accurately constructs high-low junction structure, reduces contact resistance, reduces recombination to improve open-circuit voltage of battery, realizes battery efficiency gain;At the same time, process precision is high, energy consumption is low, cost is low, suitable for existing mass production line, easy to popularize and apply, can be widely used in the large-scale production of TOPCon high-efficiency solar cell.

Description

Technical Field

[0001] This invention relates to the field of crystalline silicon solar cell manufacturing technology, and in particular to a method for fabricating high-efficiency TOPCon solar cells using a superimposed front-side selective emitter process. Background Technology

[0002] Currently, TOPCon solar cells have become the mainstream route for high-efficiency development in the photovoltaic industry. The high-low junction structure of its front emitter (i.e., the local low sheet resistance contact area and the high sheet resistance structure of the non-contact area) is the core key to improving cell efficiency, and directly affects the cell's contact resistance, minority carrier recombination rate and open-circuit voltage (VOC).

[0003] The current mainstream high-low junction fabrication process in the industry is as follows: First, the entire surface of the TOPCon cell silicon wafer undergoes boron diffusion treatment to form a uniform high sheet resistance doped layer on the front side of the silicon wafer; then, a high-energy laser process is used to locally heat the silicon surface of the pre-designed silver paste printing area on the front side of the cell (i.e., the subsequent metal electrode contact area), causing the dopant elements to diffuse into the silicon interior a second time.

[0004] This allows the region to form a low sheet resistance p++ structure, ultimately creating a high-low junction with "low sheet resistance in the contact area and high sheet resistance in the non-contact area," thereby reducing contact resistance, decreasing minority carrier recombination in the non-contact area, and improving battery efficiency.

[0005] However, the existing processes mentioned above have many inherent defects, which limit the efficiency ceiling and mass production economics of TOPCon batteries, as follows:

[0006] 1. High energy consumption and damage to silicon wafers during laser process: The high-temperature thermal effect generated during the high-energy laser propulsion diffusion process can easily lead to damage to the surface lattice of silicon wafers and the generation of microcracks. This not only affects the mechanical stability of the battery, but may also introduce additional recombination centers, which can reduce battery performance. At the same time, the operation and maintenance costs and energy consumption of laser equipment remain high, which significantly increases the cost of mass production.

[0007] 2. Limited precision in high-low junction fabrication: The pattern precision of laser point irradiation is limited by equipment performance, making it difficult to achieve precise doping control in the ultra-fine grid area. Problems such as low sheet resistance area offset and size unevenness are prone to occur, resulting in uneven contact resistance distribution and failure to fully utilize the performance advantages of high-low junctions. Furthermore, the depth of laser propulsion is difficult to control precisely, which can easily lead to excessively deep or shallow P+ doping, affecting the open-circuit voltage and fill factor of the battery.

[0008] 3. Poor process compatibility: The existing laser heavy doping process has poor integration with subsequent electrode preparation processes, and has extremely high requirements for the flatness and cleanliness of the silicon wafer surface, which easily leads to poor process adaptation and reduced cell yield. At the same time, this process is difficult to adapt to the requirements of next-generation refined and low-cost electrode preparation, which is not conducive to the long-term upgrade of the production line.

[0009] Based on the above industry pain points, there is an urgent need for a high-low junction fabrication method that is simple, precise, energy-efficient, and highly adaptable to replace the traditional laser propulsion process and further improve the efficiency and mass production economy of TOPCon cells. Summary of the Invention

[0010] The purpose of this invention is to overcome the shortcomings of existing TOPCon cell high-low junction fabrication processes and provide a high-efficiency, low-cost, and easily mass-producible method for manufacturing TOPCon solar cells. By using inkjet-printed hot melt wax as an etching mask, the pre-set electrode contact area on the front of the cell is precisely protected, while the unprotected area is directionally etched to accurately construct the high-low junction structure. This solves the problems of silicon wafer damage, insufficient precision, and excessive energy consumption associated with traditional laser processes. Simultaneously, the high-low junction structure effectively reduces contact resistance and minority carrier recombination, increasing the cell open-circuit voltage (VOC), ultimately achieving a significant gain in the photoelectric conversion efficiency of TOPCon cells. Furthermore, it is compatible with existing mass production lines, reducing technical upgrade costs.

[0011] To achieve the above objectives, the present invention adopts the following technical solution:

[0012] A method for fabricating a high-efficiency TOPCon solar cell using a front-selective emitter process includes the following steps:

[0013] Step 1: Pre-processing of silicon wafers;

[0014] N-type monocrystalline silicon wafers are selected and subjected to conventional TOPCon cell front-end processes such as texturing, cleaning, tunnel oxide deposition, and polycrystalline silicon passivation layer deposition to obtain pre-treated silicon wafers with clean surfaces and uniform passivation layers. This ensures that the silicon wafer surface is free of oil, impurities, and scratches, providing a good substrate for subsequent boron diffusion and wax film printing.

[0015] Step 2: Full-surface boron diffusion to form a high sheet resistance doped layer across the entire surface;

[0016] The pre-treated silicon wafer is fed into a diffusion furnace, where a boron source is used for high-temperature diffusion treatment of the entire surface. The diffusion temperature, holding time, and boron source flow rate are strictly controlled to form a uniform high sheet resistance P-type emitter doped layer across the entire front surface of the silicon wafer. The sheet resistance is controlled within a preset low sheet resistance range, generally less than 60 ohms / sq. This ensures the uniformity of the doped layer and lays the foundation for subsequent high-low structure construction. After diffusion, the edges of the silicon wafer are etched to remove redundant doped layers at the edges and prevent edge leakage.

[0017] Step 3: Inkjet print hot melt wax to form an etched mask;

[0018] The diffused, cleaned, and dried silicon wafer is fed into a high-precision industrial inkjet printer. A vision positioning system precisely aligns the printer with the pre-defined silver paste printing area on the front of the wafer (i.e., the area for subsequent metal electrode contact). A hot-melt wax material, suitable for photovoltaic etching processes, low-temperature curable, and resistant to etching fluid corrosion, is selected and precisely sprayed onto the pre-defined area according to the pre-defined electrode pattern (fine grid, main grid pattern). The printing linewidth is generally between 50-250 micrometers, the printing thickness is uniform and controlled between 5-40 micrometers, with clear edges, no ink overflow, and no missing prints. After printing, the silicon wafer undergoes a low-temperature curing treatment, generally controlling the printing stage temperature to be less than 25 degrees Celsius. When the hot-melt wax is ejected from the inkjet head and falls onto the printing substrate, the low temperature of the stage causes the hot-melt wax to cool and solidify rapidly, adhering tightly to the silicon wafer surface to form a dense and stable etching mask, ensuring that it does not peel off or penetrate during subsequent etching processes.

[0019] Step 4: Directional etching to construct a high-low junction structure;

[0020] The silicon wafer with the hot-melt wax mask is fed into a wet etching machine. An etching solution of preset concentration is used to perform directional etching on the front side of the silicon wafer. The etching temperature, etching time, and etching solution circulation speed are strictly controlled. During the etching process, the hot-melt wax mask completely blocks the contact between the etching solution and the protected area (silver paste printing area), so that the low sheet resistance doped layer in this area is well preserved, and a high and low sheet resistance structure is formed, which reduces the contact resistance for subsequent electrode contact. The low sheet resistance doped layer in the non-hot-melt wax protected area (non-electrode contact area) is slightly etched by the etching solution, which further increases the sheet resistance of this area, reduces minority carrier recombination centers, and reduces minority carrier recombination loss in non-contact areas. After etching, the silicon wafer is immediately rinsed multiple times with pure water to remove residual etching solution from the surface and prevent residual etching solution from corroding the silicon wafer or passivation layer.

[0021] Step 5: Hot melt wax mask peeling and dissolution;

[0022] The etched and rinsed silicon wafers are placed in an alkaline cleaning tank and immersed in a pre-concentrated alkaline solution at a constant temperature. Taking advantage of the properties of hot melt wax, which easily swells and dissolves in alkali, the hot melt wax mask on the surface of the silicon wafer is quickly peeled off and completely dissolved in the alkaline solution. After peeling, the silicon wafers are rinsed and dried again with pure water to ensure that there is no wax residue or alkaline residue on the surface of the silicon wafers, so as not to affect the subsequent electrode preparation process.

[0023] Step 6: Subsequent electrode preparation and finished product molding;

[0024] According to the conventional TOPCon cell mass production process, metal electrodes are prepared in the low sheet resistance area on the front side of the silicon wafer (the original silver paste printing area) (electroplating, screen printing, etc. can be used), and the back side is treated with aluminum back field, passivation layer, and other subsequent processes. After completion, the cells are annealed, tested, sorted, and packaged to finally obtain high-efficiency TOPCon solar cell products.

[0025] Compared with existing technologies, the present invention has the following advantages: Compared with existing laser-driven high-low junction fabrication processes, the core advantages and beneficial effects of the present invention are as follows, and it precisely meets the core needs of industry for cost reduction, efficiency improvement, and high-efficiency mass production:

[0026] 1. Significantly improves battery efficiency and optimizes electrical performance: By precisely constructing a high-low junction structure, the protected area (electrode contact area) forms a low sheet resistance, effectively reducing the contact resistance between the metal electrode and the silicon wafer; the unprotected area (transmitting power generation area) forms a high sheet resistance, significantly reducing minority carrier recombination losses. Under this dual effect, the battery open-circuit voltage (VOC) is significantly improved, thereby achieving a stable gain in battery photoelectric conversion efficiency. Compared with traditional laser technology, battery efficiency can be improved by 0.3%-0.8%.

[0027] 2. Avoid silicon wafer damage and improve battery yield: Abandoning traditional high-energy laser processes, a gentle etching method is used to construct high and low junctions, without high-temperature thermal effects, and will not cause problems such as silicon wafer surface lattice damage and microcracks. This effectively improves the mechanical stability and electrical performance consistency of the battery, and the mass production yield can be improved by 3%-5%.

[0028] 3. High process precision, adaptable to fine requirements: Inkjet printing technology can achieve micron-level pattern control, and the hot melt wax mask is accurately positioned with clear edges, which can adapt to the preparation requirements of ultra-fine grid line electrodes. The high and low junction structures are uniform in size and reasonably distributed, further optimizing the conductivity and photoelectric performance of the battery.

[0029] 4. Low energy consumption and low cost, suitable for mass production: No high-energy laser equipment is required, which greatly reduces equipment operation and maintenance costs and production energy consumption; the cost of hot melt wax material is low and no additional curing equipment is required, which reduces the equipment footprint and energy consumption; and the process steps are simplified, reducing production time and further compressing the mass production cost of TOPCon batteries.

[0030] 5. Strong process compatibility and easy implementation: The entire process can be seamlessly integrated with existing TOPCon battery mass production lines without large-scale modification of existing equipment. Only inkjet printing and wax film peeling equipment need to be added. The technical modification is low-difficulty and requires little investment, making it suitable for large-scale industrial mass production. Detailed Implementation

[0031] The present invention will be further described in detail below with reference to specific embodiments.

[0032] Example 1

[0033] Case Study on the Preparation of SE High- and Low-Junction TOPCon Cells with Inkjet Hot Melt Wax under Conventional Mass Production Conditions

[0034] 1. Project construction overview;

[0035] This embodiment uses 182mm N-type monocrystalline silicon wafers as the substrate and applies them to a conventional mass production line for TOPCon cells. The original process of the production line was laser redoping to prepare the front-side SE high-low junction. In this construction, the original laser redoping process was directly replaced with the inkjet printing hot melt wax etching mask process of this invention. The remaining front-end and back-end processes maintained the original mass production parameters, which was used to verify the adaptability, yield, and electrical gain effect of this process under standard mass production conditions. This construction batch produced 5000 silicon wafers, and a control group of 5000 wafers was set up using the traditional laser redoping process. The construction environment temperature was 25℃ and the humidity was 55%, which fully conforms to the production conditions of a conventional cleanroom in a photovoltaic cell factory.

[0036] Specific construction process: Pre-treatment of silicon wafers;

[0037] Qualified N-type monocrystalline silicon wafers are selected and their surfaces are texturized and acid-alkali cleaned sequentially through a texturing tank and a cleaning tank. Subsequently, a tube furnace is used to prepare the tunnel oxide layer and deposit the polycrystalline silicon layer. The oxide layer thickness is controlled at 1.2~1.5nm and the polycrystalline silicon layer thickness is 120~150nm. The cleanliness of the silicon wafer surface is ensured throughout the process, with no dust, water stains, or oxide spots, and the appearance defect rate is controlled within 0.5%.

[0038] Full-surface boron diffusion construction;

[0039] The pretreated silicon wafers were fed into a high-temperature diffusion furnace, using boron tribromide as the boron source. The diffusion temperature was 945℃, and the holding time was 120min. After diffusion, a uniform P-type doped layer was formed on the front side of the silicon wafer. The measured sheet resistance was stably controlled at 52~58Ω / □, and the overall sheet resistance deviation was ≤±1.5Ω / □. Subsequently, a plasma edge etching device was used to remove the edge doped layer of the silicon wafer to eliminate the risk of edge leakage.

[0040] Inkjet printing of hot melt wax mask application;

[0041] This process utilizes high-precision industrial inkjet printing equipment equipped with a CCD vision automatic alignment system. The printing stage is kept at a constant temperature of 18℃, meeting the requirements for low-temperature rapid curing. Special photovoltaic hot-melt wax ink, resistant to hydrofluoric acid corrosion and capable of low-temperature rapid curing, is selected. The printed pattern precisely matches the trajectory of the main and fine grid electrodes on the front of the battery, with a line width controlled at 90μm and a wax film thickness of 22μm. Hot-melt wax is printed only in the subsequent metal electrode contact areas, leaving non-power-generating, light-transmitting areas blank. After ink jetting, the ink instantly cools and solidifies on the low-temperature stage, resulting in a straight wax film edge without ink overflow or pinholes, and adhesion meeting the requirements for wet etching and rinsing.

[0042] Directional wet etching process;

[0043] The etching solution used was hydrofluoric acid solution with specific mass concentrations. The etching tank temperature was kept constant at 20℃, and the etching immersion time was 180s. During the etching process, the electrode area covered by hot-melt wax completely isolated the etching solution, and the original low sheet resistance doped layer was completely preserved. The surface doping in the unprotected light-transmitting area was slightly etched away, and the sheet resistance in this area increased from 55Ω / □ to 140~145Ω / □, successfully constructing a high-low junction structure of SE with "low sheet resistance in the electrode area and high sheet resistance in the power generation area". After etching, a three-stage pure water overflow rinse was used to remove residual acidic solution from the surface.

[0044] Alkali dewaxing process;

[0045] A 3% sodium hydroxide alkaline solution was used, and the wafer was immersed at a constant temperature of 45℃ for 120 seconds. The hot melt wax swelled, peeled off, and completely dissolved in the alkaline solution, leaving no wax film residue on the silicon wafer surface. After dewaxing, the wafer underwent four-stage pure water rinsing and hot air drying at a temperature of 60℃ to ensure that the silicon wafer surface was dry and free of watermarks.

[0046] Post-processing electrode fabrication and construction;

[0047] In this embodiment, silver paste is screen-printed to prepare the front metal electrode, which is precisely printed on the low sheet resistance protection area. The back side is passivated and aluminum film is deposited. Finally, the battery product is prepared by annealing, sorting and EL detection.

[0048] Construction test results;

[0049] Compared with the control group prepared by traditional laser process, the TOPCon cell prepared in this embodiment has the following characteristics: the open circuit voltage (VOC) is increased by 3.2mV, the series resistance is reduced by 0.7mΩ, and the minority carrier recombination rate is significantly reduced; the average photoelectric conversion efficiency is increased by 0.42%; the production yield is increased from 95.1% in the control group to 98.3%; there are no defective wafers with microcracks or lattice damage caused by laser; the average energy consumption per wafer is reduced by 12%, and the material cost is reduced by 0.018 yuan / wafer.

[0050] Example 2

[0051] Case study of fine chemical engineering construction using ultra-thin silicon wafers and fine grid electrodes;

[0052] Project construction overview;

[0053] This embodiment uses a 166mm ultra-thin N-type silicon wafer, with a thickness of only 110μm, aligning with the industry's trend towards thinner, lighter, and higher-efficiency batteries. The front side of the battery features an ultra-fine grid line design, with a line width of only 55μm. Traditional laser processes suffer from large spot sizes, easy damage to the thin silicon wafer, and poor pattern accuracy. This case study utilizes the inkjet hot-melt wax mask process of this invention, producing 3000 wafers in batches. Compared to laser-processed thin-film batteries under the same conditions, this demonstrates the construction stability and efficiency advantages of this process in thin-film, ultra-fine grid refined SE structures. The construction cleanroom was Class 10,000, with an ambient temperature of 23℃ and humidity of 52%.

[0054] Specific construction process: Pretreatment and diffusion construction;

[0055] The cleaning process for ultrathin silicon wafers is strictly optimized to reduce mechanical damage; the thickness of the tunneling oxide layer is controlled at 1.1~1.3nm; the boron diffusion temperature is lowered to 932℃ and the holding time is 110min, and the sheet resistance after diffusion is controlled at 50~55Ω / □ to ensure uniform doping of the wafer and prevent high-temperature warping.

[0056] Refined inkjet printing process;

[0057] It adopts ultra-high precision inkjet printing equipment with a positioning accuracy of ±15μm; for ultra-fine grid lines, the printing line width is precisely controlled at 75μm and the wax film thickness is 25μm; the stage temperature is set to 20℃, and the hot melt wax solidifies instantly after spraying, resulting in sharp, burr-free wax film edges and no ink diffusion or overflow; for thin silicon wafers, a soft contact adsorption stage is used to eliminate mechanical indentations and fragments.

[0058] Precise, light-touch etching process;

[0059] The etching solution ratio was optimized, the nitric acid concentration was reduced to 6.5%, the etching temperature was 18℃, and the etching time was 200s; the etching reaction intensity was weakened to avoid over-etching and warping of the wafer; after etching, the sheet resistance of the non-protected area was increased to 130~140Ω / □, the high and low junction boundaries were clear, the doping transition was smooth, and there was no abrupt doping layer.

[0060] Gentle dewaxing and subsequent construction;

[0061] The alkaline solution concentration was adjusted to 4%, the soaking time was 95 seconds, and the dewaxing was carried out at a low temperature to protect the passivation layer of the ultrathin silicon wafer. The drying temperature was controlled at 55°C to reduce thermal stress. In this embodiment, the front electrode was prepared by electroplating copper. Based on this process, a low sheet resistance contact area was reserved, resulting in excellent electroplating adhesion and no delamination or plating defects.

[0062] Construction test results;

[0063] In this ultra-thin battery construction case, the fragmentation rate of this process is only 0.8%, while the fragmentation rate of traditional laser process thin sheets is as high as 4.1%; the battery VOC is increased by 4.5mV, and the average conversion efficiency gain is 0.65%; the ultra-fine grid pattern has high consistency, without laser spot deviation or uneven heavy doping issues; the adhesion level of electroplated electrodes reaches the highest industry standard; the entire line does not require laser equipment, significantly reducing production line operation and maintenance costs, and is more suitable for the large-scale mass production of ultra-thin and refined TOPCon batteries.

[0064] Comparative Example

[0065] Case studies of traditional laser heavy doping processes;

[0066] Construction conditions;

[0067] The same 182mm N-type silicon wafer is used, with a sheet resistance of 55Ω / □ after boron diffusion; a fiber laser redoping device with a laser power of 18W and a scanning speed of 6000mm / s is used to perform high-temperature secondary doping on the electrode area.

[0068] There are problems with the construction;

[0069] High-temperature laser irradiation causes microcracks on the surface of silicon wafers, resulting in a microcrack defect rate of 3.2% for ELs; laser edge thermal diffusion leads to blurred boundaries between high and low junctions, and uneven heavy doping depth in some areas; the VOC of the cells is low, resulting in high recombination loss; single-cell energy consumption is high, and equipment maintenance costs are expensive.

[0070] Comprehensive construction summary;

[0071] The above two sets of construction examples demonstrate that the inkjet printing hot melt wax process for preparing SE high and low junctions of the present invention is superior to the traditional laser heavy doping process, whether for the mass production of conventional thick silicon wafers or the production of ultra-thin fine cells. The process has high stability, low fragmentation rate, and significant electrical gain. At the same time, it simplifies the process, reduces energy consumption, and eliminates the need for laser equipment. It is fully compatible with the large-scale mass production of TOPCon cells and has extremely high industrialization and promotion value.

[0072] The above description represents a preferred embodiment of the present invention. For those skilled in the art, any changes, modifications, substitutions, and variations made to the implementation methods without departing from the principles and spirit of the present invention, based on the teachings of the present invention, still fall within the protection scope of the present invention.

Claims

1. A method for fabricating a high-efficiency TOPCon solar cell using a superimposed front-selective emitter process, characterized in that, Includes the following steps: Step 1: Pre-processing of silicon wafers; N-type monocrystalline silicon wafers are selected and subjected to conventional TOPCon cell front-end processes such as texturing, cleaning, tunnel oxide deposition, and polycrystalline silicon passivation layer deposition to obtain pre-treated silicon wafers with clean surfaces and uniform passivation layers. Step 2: Full-surface boron diffusion to form a high sheet resistance doped layer across the entire surface; The pre-treated silicon wafer is sent into a diffusion furnace and subjected to high-temperature diffusion treatment on the entire surface using a boron source. The diffusion temperature, holding time and boron source flow rate process parameters are strictly controlled to form a uniform high sheet resistance P-type emitter doped layer on the entire front surface of the silicon wafer. The sheet resistance is controlled within the preset low sheet resistance range to ensure the uniformity of the doped layer and lay the foundation for subsequent high-low structure construction. After diffusion is complete, the silicon wafer is etched at the edges to remove redundant doped layers at the edges and prevent edge leakage. Step 3: Inkjet print hot melt wax to form an etched mask; The silicon wafers, after diffusion and cleaning and drying, are fed into a high-precision industrial inkjet printer. The printer is precisely aligned with the pre-set silver paste printing area on the front of the silicon wafer using a vision positioning system. A hot melt wax material that is compatible with photovoltaic etching processes, can be cured at low temperatures, and is resistant to etching liquid corrosion is selected and precisely sprayed onto the pre-set area according to the pre-set electrode pattern, with clear edges and no ink overflow or missing prints. After printing, the silicon wafer undergoes a low-temperature curing process. When the hot melt wax is ejected from the inkjet head and falls onto the printing substrate, the low temperature of the stage causes the hot melt wax to cool and solidify rapidly, and it adheres tightly to the surface of the silicon wafer to form a dense and stable etching mask. Step 4: Directional etching to construct a high-low junction structure; The silicon wafer with the hot melt wax mask is fed into a wet etching equipment. An etching solution of a preset concentration is used to perform directional etching on the front side of the silicon wafer. The etching temperature, etching time and etching solution circulation speed are strictly controlled. During the etching process, the hot melt wax mask completely blocks the contact between the etching solution and the protected area, so that the low sheet resistance doped layer in the area is well preserved, and finally a high and low sheet resistance structure is formed, which reduces the contact resistance for subsequent electrode contact; the low sheet resistance doped layer in the non-hot melt wax protected area is slightly etched by the etching solution. After etching is completed, the silicon wafer is immediately rinsed multiple times with pure water to remove residual etching solution from the surface and prevent residual etching solution from corroding the silicon wafer or passivation layer. Step 5: Hot melt wax mask peeling and dissolution; The etched and rinsed silicon wafers are placed in an alkaline cleaning tank and immersed in an alkaline solution of a preset concentration at a constant temperature. Taking advantage of the properties of hot melt wax that easily swells and dissolves in alkali, the hot melt wax mask on the surface of the silicon wafer is quickly peeled off and completely dissolved in the alkaline solution. After peeling, the silicon wafers are rinsed and dried again with pure water to ensure that there is no wax residue or alkaline residue on the surface of the silicon wafers. Step 6: Subsequent electrode preparation and finished product molding; According to the conventional TOPCon cell mass production process, metal electrodes are prepared in the low sheet resistance area on the front side of the silicon wafer, and aluminum back field and passivation layer are applied on the back side. After completion, the cells undergo annealing, testing, sorting and packaging processes to finally obtain high-efficiency TOPCon solar cell products.

2. The method for manufacturing a high-efficiency TOPCon solar cell as described in claim 1, characterized in that, In step 2, the sheet resistance is controlled within the preset low sheet resistance range of less than 60 ohms / sq.

3. The method for manufacturing a high-efficiency TOPCon solar cell as described in claim 1, characterized in that, In step 3, the line width of the print is between 50 and 250 micrometers, and the printing thickness is uniform and controlled between 5 and 40 micrometers.