A heterojunction cell tco stack assembly, a method of making the same, and a photovoltaic device

Abstract

The application provides a heterojunction battery TCO stack component, a preparation method thereof and a photovoltaic device. The heterojunction battery TCO stack component comprises, from the near-silicon base side to the near-electrode side, an oxygen vacancy doped conductive layer, a magnesium-containing conductive layer and a hydrogen doped conductive layer which are sequentially stacked. The application adopts a three-layer TCO composite structure, the bottom layer is a gradient oxygen vacancy doped layer, the middle layer is a high mobility and low resistance conductive layer, and the top layer is an in-situ hydrogen passivation layer. The application solves the contradiction that the conductive property and passivation property of the traditional TCO film layer are difficult to be compatible, significantly reduces the square resistance and reduces the damage of the amorphous silicon layer.

Description

Technical Field

[0001] This application belongs to the field of solar cell technology, and relates to the conductive layer structure of heterojunction cells, and more particularly to a heterojunction cell TCO stacked module, its preparation method and photovoltaic device. Background Technology

[0002] Heterojunction (HJT) solar cells have become the next-generation mainstream technology in the photovoltaic industry due to their advantages such as high conversion efficiency, excellent bifacial power generation capability, and low-temperature fabrication process. In the HJT cell structure, the transparent conductive oxide (TCO) thin film plays a crucial role. It not only needs to collect and laterally transport photogenerated carriers as the front electrode, but also needs to have high light transmittance to reduce optical losses.

[0003] However, the TCO thin film in the existing HJT battery structure presents the following irreconcilable contradictions: (1) The contradiction between conductivity and damage: In order to improve the conductivity of TCO, it is usually necessary to increase the sputtering power or use high-density target materials during the preparation process. However, high-energy particle bombardment will seriously damage the fragile amorphous silicon passivation layer at the bottom, resulting in an increase in interface state density, a decrease in minority carrier lifetime, and a loss of battery open-circuit voltage and fill factor. (2) The contradiction between lateral conductivity and longitudinal resistance: TCO films need to be thick enough (usually >80nm) to reduce lateral resistance, but excessively thick films not only increase optical absorption loss, but also easily lead to excessive stress and cracking. (3) The contradiction of contact recombination: When the metal electrode of the conventional battery structure is in direct contact with the TCO, the metal atoms are prone to diffuse to the TCO grain boundary, forming a high recombination center, which leads to an increase in reverse saturation current.

[0004] Therefore, resolving the aforementioned contradictions is of great significance for further improving the overall electrical performance of HJT batteries. Summary of the Invention

[0005] To address the shortcomings of existing technologies, the purpose of this application is to provide a heterojunction solar cell TCO stacked module, its preparation method, and photovoltaic device, which solves the contradiction between the conductivity and passivation performance of traditional TCO film layers. Furthermore, it significantly reduces sheet resistance while avoiding damage to the amorphous silicon layer by sputtering plasma, effectively improving the cell conversion efficiency.

[0006] To achieve this objective, the following technical solution is adopted in this application: In a first aspect, this application provides a heterojunction solar cell TCO stacked module having a near-electrode side and a near-silicon substrate side. The heterojunction solar cell TCO stacked module includes at least an oxygen-doped vacancy conductive layer, a magnesium-containing conductive layer, and a hydrogen-doped conductive layer sequentially stacked from the near-silicon substrate side to the near-electrode side.

[0007] In this application, the oxygen-doped vacancy conductive layer works synergistically with the silicon substrate to provide longitudinal stepped conduction and act as an interface shield, reducing longitudinal resistance. At the same time, the synergy between the oxygen-doped vacancy conductive layer and the magnesium-containing conductive layer forms a superconducting main channel and potential energy well, preventing electron backflow or diffusion to the surface that could cause recombination. In addition, the hydrogen-doped conductive layer can work synergistically with the metal electrode to form a hydrogen atom sponge and recombination firewall, reducing the recombination rate in the metal contact area and further reducing series resistance.

[0008] As a preferred embodiment of this application, the oxygen-doped vacancy conductive layer comprises a transparent conductive oxide layer doped with oxygen vacancies; the oxygen vacancy concentration in the oxygen-doped vacancy conductive layer decreases in a gradient from the near-silicon side to the near-electrode side.

[0009] In this application, the oxygen-vacancy conductive layer serves as the bottom layer, employing an oxygen vacancy concentration gradient design. This means the layer is oxygen-rich near the silicon substrate and oxygen-deficient further away. The gradient distribution of oxygen vacancies forms a continuous conduction band structure, effectively creating an electron slide between the TCO and silicon substrate interface. This significantly reduces the barrier for electron transitions to the main conductive layer, decreasing longitudinal resistance. Simultaneously, the oxygen-rich structure near the amorphous silicon substrate exhibits higher hardness and fewer defects, effectively buffering against high-energy particle impacts during subsequent fabrication of the magnesium-containing conductive layer and protecting the passivation properties of the amorphous silicon.

[0010] As one embodiment of this application, the oxygen vacancy concentration at the silicon-based end of the oxygen-doped conductive layer is (3~5)×10⁻⁶. 20 cm -3 The vacancy concentration at the near-electrode end of the oxygen-doped vacancy conductive layer is (1~2)×10⁻⁶. 20 cm -3 .

[0011] As a preferred embodiment of this application, the magnesium-containing conductive layer comprises a transparent magnesium oxide conductive layer; the magnesium oxide concentration in the magnesium-containing conductive layer is 1wt%~3wt%.

[0012] This application uses a high-mobility, magnesium-doped transparent conductive oxide as the intermediate layer, maintaining zero oxygen vacancy fluctuations. Dispersed electrons collected in the bottom layer, once entering the intermediate layer, fall into the superconducting main channel composed of high-mobility material. The gradient oxygen vacancy structure of the bottom layer forms a potential well relative to the intermediate layer, confining electrons within the intermediate layer and preventing electron backflow or diffusion to the surface that could cause recombination.

[0013] As one embodiment of this application, the thickness of the magnesium-containing conductive layer is greater than the thickness of the oxygen-doped vacancy conductive layer and the thickness of the hydrogen-doped conductive layer, respectively.

[0014] The intermediate layer of this application has the greatest thickness and undertakes more than 90% of the lateral current transmission task, which greatly reduces the overall TCO sheet resistance.

[0015] As a preferred embodiment of this application, the hydrogen-doped conductive layer comprises a transparent conductive oxide layer doped with hydrogen; the hydrogen concentration in the hydrogen-doped conductive layer is 4 at% to 6 at%.

[0016] This application embeds hydrogen atoms into the lattice and surface of a transparent conductive oxide layer as the top layer. After the metal grid lines are printed and cured, the hydrogen in the top layer diffuses to the transparent conductive oxide or metal interface during heat treatment, saturating the metal-induced dangling bonds and reducing the recombination rate in the metal contact area. Simultaneously, hydrogen passivation can fine-tune the work function of the top layer, making it more compatible with the work function of the metal electrode, forming a better ohmic contact and further reducing series resistance.

[0017] As a preferred technical solution of this application, the oxygen-doped vacancy conductive layer includes an AZO layer with oxygen-doped vacancies; The magnesium-containing conductive layer includes an IMO layer; The hydrogen-doped conductive layer includes a hydrogen-doped ITO layer.

[0018] As one embodiment of this application, the thickness of the magnesium-containing conductive layer is 70nm~100nm.

[0019] As one embodiment of this application, the thickness of the oxygen-doped vacancy conductive layer is 15nm~25nm.

[0020] As one embodiment of this application, the thickness of the hydrogen-doped conductive layer is 10nm~20nm.

[0021] As a preferred embodiment of this application, the refractive indices of the oxygen-doped vacancy conductive layer, the magnesium-containing conductive layer, and the hydrogen-doped conductive layer are different from each other, and satisfy the following conditions: The refractive index of the magnesium-containing conductive layer is greater than that of the hydrogen-doped conductive layer, which in turn is greater than that of the oxygen-doped vacancy conductive layer.

[0022] As a preferred technical solution of this application, the refractive index of the oxygen-doped vacancy conductive layer is 1.85~1.95.

[0023] As one embodiment of this application, the refractive index of the magnesium-containing conductive layer is 2.0~2.2.

[0024] As one embodiment of this application, the refractive index of the hydrogen-doped conductive layer is 1.9 to 2.1.

[0025] In this application, the three-layer structure has different refractive indices. This gradient refractive index design itself constitutes a broadband antireflective film system, reducing light reflection loss. At the same time, the hydrogen-doped conductive layer, as the middle layer, has extremely high conductivity, which allows the hydrogen-doped conductive layer, as the top layer, to be made thinner. The thin transparent conductive oxide layer itself has higher light transmittance, thereby improving photoelectric conversion efficiency.

[0026] In a second aspect, this application provides a method for preparing a heterojunction solar cell TCO stacked module as described in the first aspect, the method comprising sequentially performing a first PVD treatment, a second PVD treatment, a third PVD treatment, and an annealing treatment; In the first PVD process, the first target material is sputtered with a first gas containing oxygen as the reaction gas, and as the sputtering process proceeds, the oxygen content in the first gas is gradually reduced to form an oxygen-doped vacancy conductive layer on the substrate surface. During the secondary PVD process, an inert gas is used to sputter the magnesium-containing target material to form a magnesium-containing conductive layer on the surface of the oxygen-doped vacancy conductive layer. During the three PVD processes, a second target material is sputtered using a second gas containing hydrogen as the reaction gas to form a hydrogen-doped conductive layer on the surface of the magnesium-containing conductive layer.

[0027] This application improves battery conversion efficiency while avoiding damage to the amorphous silicon layer by in-situ continuous control of the reactive gas composition within the PVD chamber. The bottom layer uses an oxygen vacancy concentration gradient to construct a vertical built-in electric field, the middle layer uses a high-mobility material to create a transverse conductive trunk channel, and the top layer uses in-situ injection of hydrogen-containing gas to form a surface passivation barrier.

[0028] As a preferred technical solution of this application, the first gas is a mixture of inert gas and oxygen. As one PVD process is carried out, the flow ratio of inert gas to oxygen in the first gas decreases from 200:(10~15) to 200:(1~1.5).

[0029] As one embodiment of this application, the second gas is a mixture of inert gas and hydrogen, and the flow rate ratio of inert gas to hydrogen in the second gas is 200:(4~6).

[0030] As one embodiment of this application, the first target and the second target are each independently selected from any one of AZO, ITO, IZO, GZO or FTO.

[0031] As one embodiment of this application, the magnesium-containing target is an IMO target.

[0032] As one embodiment of this application, the PVD process satisfies at least one of the following conditions: power density is 10 W / cm². 2 ~14W / cm 2 The deposition pressure is 0.2 Pa to 0.8 Pa, the substrate temperature is 180°C to 220°C, and the deposition time is 10 s to 20 s.

[0033] As one embodiment of this application, the secondary PVD treatment satisfies at least one of the following conditions: power density is 10 W / cm². 2 ~20W / cm 2 The deposition pressure was 0.2 Pa to 0.6 Pa, and the deposition time was 40 to 50 seconds.

[0034] As one embodiment of this application, the three PVD processes satisfy at least one of the following conditions: power density is 13 W / cm². 2~ 17W / cm 2 The deposition pressure was 0.1 Pa to 0.7 Pa, and the deposition time was 5 s to 15 s.

[0035] As one embodiment of this application, the annealing process includes infrared light injection annealing, satisfying at least one of the following conditions: the infrared light wavelength is 900nm~1060nm, and the processing time is 5s~15s.

[0036] Thirdly, this application provides a photovoltaic device, the photovoltaic device comprising a monocrystalline silicon wafer having a first surface and a second surface opposite to each other; the first surface is provided with a first intrinsic amorphous silicon layer, a front P-type amorphous silicon layer, a front TCO layer and a front electrode layer sequentially stacked in a direction away from the monocrystalline silicon wafer; the second surface is provided with a second intrinsic amorphous silicon layer, a back N-type amorphous silicon layer, a back TCO layer and a back electrode layer sequentially stacked in a direction away from the monocrystalline silicon wafer; Both the front TCO layer and the back TCO layer adopt the heterojunction cell TCO stacked assembly described in the first aspect. The oxygen-doped vacancy conductive layer of the heterojunction cell TCO stacked assembly is disposed close to the front P-type amorphous silicon layer or the back N-type amorphous silicon layer, and the hydrogen-doped conductive layer is disposed close to the front electrode layer or the back electrode layer.

[0037] Compared with the prior art, the beneficial effects of this application are as follows: In this application, the oxygen-doped vacancy conductive layer serves as the bottom layer, positioned close to the amorphous silicon substrate. It works synergistically with silicon to provide vertical stepped conduction and act as an interface shield, reducing vertical resistance. Simultaneously, the magnesium-containing conductive layer serves as the intermediate layer, possessing extremely high conductivity. Together with the oxygen-doped vacancy conductive layer, it forms a superconducting main channel and potential well, preventing electron backflow or diffusion to the surface that could cause recombination. Furthermore, the hydrogen-doped conductive layer serves as the top layer, positioned close to the metal electrode. Together with the metal electrode, it forms a hydrogen atom sponge and a recombination firewall, reducing the recombination rate in the metal contact area and further reducing series resistance. This results in an overall module sheet resistance below 25 Ohm / sq, enabling the photovoltaic device to achieve a high conversion efficiency of 25.72%, while also effectively enhancing bifacial power generation capabilities. Attached Figure Description

[0038] Figure 1 This is a schematic diagram of the structure of a photovoltaic device in Examples 1-3.

[0039] Figure 2 This is a schematic diagram of the structure of a photovoltaic device in Comparative Example 1.

[0040] Figure 3 This is a schematic diagram of the structure of a photovoltaic device in Comparative Example 2.

[0041] Figure 4 This is a schematic diagram of the structure of a photovoltaic device in Comparative Example 3.

[0042] Figure 5 This is a schematic diagram of the structure of a photovoltaic device in Comparative Example 4.

[0043] Figure 6 This is a schematic diagram of the structure of a photovoltaic device in Comparative Example 5.

[0044] Among them, 1-N-type monocrystalline silicon wafer; 21-first intrinsic amorphous silicon layer; 22-front P-type amorphous silicon layer; 23-front TCO layer; 24-front electrode layer; 31-second intrinsic amorphous silicon layer; 32-back N-type amorphous silicon layer; 33-back TCO layer; 34-back electrode layer; 231-oxygen-doped vacancy conductive layer; 232-IMO conductive layer; 233-hydrogen-doped conductive layer. Detailed Implementation

[0045] It should be understood that in the description of this application, the terms "center," "longitudinal," "lateral," "upper," "lower," "vertical," "horizontal," "top," "bottom," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. These terms are used only for the convenience of describing this application and for simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. In the description of this application, unless otherwise stated, "a plurality of" or "several" means two or more.

[0046] The scope of this application can be defined by lower and upper limits. The selected lower and upper limits define the boundaries of a specific range. The range defined in this way can be defined by the inclusion or exclusion of endpoints. Any endpoint can be independently selected for inclusion or exclusion, and all lower and upper limits can be arbitrarily combined to form new ranges. That is, any lower limit can be combined with any upper limit to form a valid range. For example, if the ranges of 60~120 and 80~110 are listed for specific parameters, it should be understood that the ranges of 60~110 and 80~120 also fall within the scope of this application. In addition, if the minimum range values ​​1 and 2 are listed, and the maximum range values ​​3, 4 and 5 are also listed, then all ranges of 1~3, 1~4, 1~5, 2~3, 2~4 and 2~5 fall within the scope of this application.

[0047] In this application, unless otherwise specified, the features or solutions corresponding to "and / or" cover any one of two or more related listed items, as well as any and all combinations of the related listed items. The arbitrary and all combinations include any two related listed items, any more related listed items, or a combination of all related listed items. For example, "A and / or B" represents a set consisting of A, B, and combinations of A and B. "Including A and / or B" can be understood, depending on the context of the statement, as including A, including B, or including both A and B.

[0048] All embodiments and optional embodiments of this application, unless otherwise specified and without technical conflict, can be combined to form new technical solutions, and such combinations fall within the scope of this application. The term "embodiment" mentioned in this application means that a specific feature, structure, or characteristic described in conjunction with an embodiment can be included in at least one embodiment or implementation of this application. The appearance of this phrase in various positions in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment mutually exclusive with other embodiments. Those skilled in the art can explicitly and implicitly understand that the embodiments described in this application can be combined with other embodiments without technical conflict. The ordinal numbers such as "first" and "second" in this application are for descriptive purposes only and should not be construed as indicating or implying relative importance or quantity, nor should they be construed as implicitly indicating the importance or quantity of the indicated technical features. They serve only as a non-exhaustive enumeration and do not constitute a closed limitation on quantity.

[0049] In this application, the order in which the steps are written in the methods described in the various embodiments does not imply a strict execution order. The actual execution order of each step should be determined according to its function and possible internal logic. Unless otherwise specified, all steps in this application can be executed in the order they are written, or in any order without technical conflict. For example, if the method includes steps (a) and (b), it means that the method may include steps (a) and (b) executed sequentially, or it may include steps (b) and (a) executed sequentially. If the method also includes step (c), then step (c) can be added to the method in any order without conflict, including but not limited to the execution order of steps (a), (b), and (c), steps (a), (c), and (b), steps (c), (a), and (b), etc.

[0050] The technical solution of this application will be further described below with reference to the accompanying drawings and specific embodiments.

[0051] In one specific embodiment, this application discloses a heterojunction solar cell TCO stacked module having a near-electrode side and a near-silicon substrate side. It includes at least an oxygen-doped vacancy conductive layer, a magnesium-containing conductive layer, and a hydrogen-doped conductive layer sequentially stacked from the near-silicon substrate side towards the near-electrode side. The oxygen-doped vacancy conductive layer serves as the bottom layer, disposed close to the amorphous silicon substrate of the heterojunction solar cell. The magnesium-containing conductive layer serves as the intermediate layer, exhibiting high mobility and low resistance. The hydrogen-doped conductive layer serves as the top layer, disposed close to the metal electrode of the heterojunction solar cell, achieving in-situ hydrogen passivation.

[0052] In some embodiments, the oxygen-doped vacancy conductive layer comprises a transparent conductive oxide layer doped with oxygen vacancies; the oxygen vacancy concentration in the oxygen-doped vacancy conductive layer decreases in a gradient from the near-silicon side to the near-electrode side.

[0053] In one embodiment, the transparent conductive oxide layer includes, but is not limited to, an AZO layer, an ITO layer, an IZO layer, a GZO layer, or an FTO layer, preferably an AZO layer, that is, the oxygen-doped vacancy conductive layer is preferably an AZO layer with oxygen vacancies.

[0054] In one embodiment, the oxygen vacancy concentration at the silicon-based end of the oxygen-doped conductive layer is (3~5)×10⁻⁶. 20 cm -3 For example, it could be 3×10 20 cm -3 3.2×10 20 cm -3 3.5×10 20 cm -3 3.6×10 20 cm -3 3.8×10 20 cm -3 4×10 20 cm -3 4.2×10 20 cm -3 4.5×10 20 cm -3 4.6×10 20 cm -3 4.8×10 20 cm -3 Or 5×10 20 cm -3 However, this is not limited to the listed values; other unlisted values ​​within this range also apply. The vacancy concentration at the near-electrode end of the oxygen-doped vacancy conductive layer is (1~2)×10⁻⁶. 20 cm -3 For example, it could be 1×10 20 cm -3 1.2×10 20 cm -3 1.5×10 20 cm -3 1.6×10 20 cm -3 1.8×10 20 cm -3 Or 2×10 20 cm -3However, this is not limited to the listed values; other unlisted values ​​within this range also apply. The oxygen-doped vacancy conductive layer employs an oxygen vacancy concentration gradient design, meaning it is oxygen-rich near the silicon substrate and oxygen-deficient away from it. This gradient distribution of oxygen vacancies forms a continuous conduction band structure, effectively creating an electron slide between the TCO and silicon substrate interface. This significantly reduces the barrier for electron transitions to the main conductive layer, thus decreasing longitudinal resistance. Simultaneously, the oxygen-rich structure near the amorphous silicon substrate exhibits higher hardness and fewer defects, effectively buffering high-energy particle impacts during subsequent magnesium-containing conductive layer fabrication and protecting the passivation properties of the amorphous silicon.

[0055] In one embodiment, the thickness of the oxygen-doped vacancy conductive layer is 15nm to 25nm, for example, it can be 15nm, 16nm, 17nm, 18nm, 19nm, 20nm, 21nm, 22nm, 23nm, 24nm or 25nm, but it is not limited to the listed values. Other unlisted values ​​within this range are also applicable.

[0056] In one embodiment, the refractive index of the oxygen-doped vacancy conductive layer is 1.85 to 1.95, for example, it can be 1.85, 1.86, 1.87, 1.88, 1.89, 1.90, 1.91, 1.92, 1.93, 1.94 or 1.95, but it is not limited to the listed values, and other unlisted values ​​within this range are also applicable.

[0057] In some embodiments, the magnesium-containing conductive layer comprises a transparent magnesium oxide conductive layer; the magnesium oxide concentration in the magnesium-containing conductive layer is 1wt% to 3wt%, for example, it can be 1wt%, 1.2wt%, 1.5wt%, 1.8wt%, 2wt%, 2.2wt%, 2.5wt%, 2.8wt%, or 3wt%, but is not limited to the listed values; other unlisted values ​​within this range are also applicable. The magnesium-containing conductive layer has high mobility and low resistance, and maintains zero oxygen vacancy fluctuations. Dispersed electrons collected in the bottom layer, once entering the intermediate layer, fall into the superconducting main channel composed of high-mobility material. The gradient oxygen vacancy structure of the bottom layer forms a potential well relative to the intermediate layer, confining electrons within the intermediate layer for transport and preventing electron backflow or diffusion to the surface causing recombination.

[0058] In some embodiments, the magnesium-containing conductive layer is an IMO layer.

[0059] In one embodiment, the thickness of the magnesium-containing conductive layer is 70nm to 100nm, for example, it can be 70nm, 73nm, 75nm, 78nm, 80nm, 82nm, 85nm, 90nm, 92nm, 95nm, 98nm or 100nm, but is not limited to the listed values, other unlisted values ​​within this range are also applicable.

[0060] In one embodiment, the refractive index of the magnesium-containing conductive layer is 2.0 to 2.2, for example, it can be 2.0, 2.02, 2.05, 2.08, 2.1, 2.12, 2.15, 2.16, 2.18, 2.19 or 2.2, but it is not limited to the listed values. Other unlisted values ​​within this range are also applicable.

[0061] In some embodiments, the hydrogen-doped conductive layer comprises a transparent conductive oxide layer doped with hydrogen. The hydrogen concentration in the hydrogen-doped conductive layer is 4 at% to 6 at%, for example, 4 at%, 4.2 at%, 4.5 at%, 4.6 at%, 4.8 at%, 5 at%, 5.2 at%, 5.5 at%, 5.6 at%, 5.8 at%, or 6 at%, but is not limited to the listed values; other unlisted values ​​within this range are also applicable. By embedding hydrogen atoms into the lattice and surface of the transparent conductive oxide layer as the top layer, after the metal grid lines are printed and cured, the hydrogen in the top layer diffuses to the transparent conductive oxide or metal interface during heat treatment, saturating the metal-induced dangling bonds and reducing the recombination rate in the metal contact area. Simultaneously, hydrogen passivation treatment can fine-tune the work function of the top layer to better match the work function of the metal electrode, forming a better ohmic contact and further reducing series resistance.

[0062] As one embodiment, the transparent conductive oxide layer includes, but is not limited to, an AZO layer, an ITO layer, an IZO layer, a GZO layer, or an FTO layer, preferably an ITO layer, that is, the hydrogen-doped conductive layer is preferably an ITO layer doped with hydrogen.

[0063] In one embodiment, the thickness of the hydrogen-doped conductive layer is 10nm to 20nm, for example, it can be 10nm, 11nm, 12nm, 13nm, 14nm, 15nm, 16nm, 17nm, 18nm, 19nm or 20nm, but it is not limited to the listed values. Other unlisted values ​​within this range are also applicable.

[0064] In one embodiment, the refractive index of the hydrogen-doped conductive layer is 1.9 to 2.1, for example, it can be 1.9, 1.93, 1.95, 1.96, 1.98, 2.0, 2.02, 2.05, 2.08 or 2.1, but it is not limited to the listed values. Other unlisted values ​​within this range are also applicable.

[0065] In some embodiments, the thickness of the magnesium-containing conductive layer is greater than the thickness of the oxygen-doped vacancy conductive layer and the thickness of the hydrogen-doped conductive layer, respectively. That is, the thickness is the largest in the three-layer structure, and it undertakes more than 90% of the lateral current transmission task.

[0066] In one embodiment, the thickness of the magnesium-containing conductive layer is 70nm to 100nm, for example, it can be 70nm, 73nm, 75nm, 78nm, 80nm, 82nm, 85nm, 90nm, 92nm, 95nm, 98nm, or 100nm, but is not limited to the listed values; other unlisted values ​​within this range are also applicable. The thickness of the hydrogen-doped conductive layer is 10nm to 20nm, for example, it can be 10nm, 11nm, 12nm, 13nm, 14nm, 15nm, 16nm, 17nm, 18nm, 19nm, or 20nm, but is not limited to the listed values; other unlisted values ​​within this range are also applicable. The thickness of the oxygen-doped vacancy conductive layer is 15nm to 25nm, for example, it can be 15nm, 16nm, 17nm, 18nm, 19nm, 20nm, 21nm, 22nm, 23nm, 24nm or 25nm, but it is not limited to the listed values. Other unlisted values ​​within this range are also applicable.

[0067] In some embodiments, the refractive indices of the oxygen-doped vacancy conductive layer, the magnesium-doped conductive layer, and the hydrogen-doped conductive layer are different from each other, and satisfy the following condition: the refractive index of the magnesium-doped conductive layer > the refractive index of the hydrogen-doped conductive layer > the refractive index of the oxygen-doped vacancy conductive layer. This gradient refractive index design constitutes a broadband antireflection film system, reducing light reflection loss.

[0068] In one embodiment, the refractive index of the oxygen-doped vacancy conductive layer is 1.85 to 1.95, for example, it can be 1.85, 1.86, 1.87, 1.88, 1.89, 1.90, 1.91, 1.92, 1.93, 1.94, or 1.95, but is not limited to the listed values; other unlisted values ​​within this range are also applicable. The refractive index of the magnesium-containing conductive layer is 2.0 to 2.2, for example, it can be 2.0, 2.02, 2.05, 2.08, 2.1, 2.12, 2.15, 2.16, 2.18, 2.19, or 2.2, but is not limited to the listed values; other unlisted values ​​within this range are also applicable. The refractive index of the hydrogen-doped conductive layer is 1.9 to 2.1, for example, it can be 1.9, 1.93, 1.95, 1.96, 1.98, 2.0, 2.02, 2.05, 2.08 or 2.1, but it is not limited to the listed values. Other unlisted values ​​within this range are also applicable.

[0069] In another specific embodiment, this application provides a method for preparing a heterojunction solar cell TCO stacked module as described in one specific embodiment, including a first PVD treatment, a second PVD treatment, a third PVD treatment, and an annealing treatment performed sequentially.

[0070] In the first PVD process, a first gas containing oxygen is used as the reaction gas to sputter the first target material, and as the sputtering process proceeds, the oxygen content in the first gas is gradually reduced to form an oxygen-doped vacancy conductive layer on the substrate surface.

[0071] In one implementation, the first gas is a mixture of an inert gas and oxygen. As one PVD process proceeds, the flow rate ratio of the inert gas to oxygen in the first gas decreases from 200:(10~15) to 200:(1~1.5). The initial flow rate ratio of the inert gas to oxygen in the first gas can be 200:10, 200:10.5, 200:11, 200:11.5, 200:12, 200:12.5, 200:13, 200:13.5, 200:14, 200:14.5, or 200:15, but is not limited to the listed values; other unlisted values ​​within this range are also applicable. The inert gas includes argon (Ar).

[0072] In one embodiment, the first target material is selected from any one of AZO, ITO, IZO, GZO or FTO, preferably AZO target material, wherein the content of Al2O3 is 1wt%~3wt%.

[0073] As one implementation, the PVD process satisfies at least one of the following conditions: power density is 10 W / cm². 2 ~14W / cm 2 For example, it could be 10W / cm 2 10.5W / cm 2 11W / cm 2 11.5W / cm 2 12W / cm 2 12.5W / cm 2 13W / cm 2 13.5W / cm 2 Or 14W / cm 2However, the values ​​are not limited to those listed; other unlisted values ​​within this range also apply. The deposition pressure is 0.2 Pa to 0.8 Pa, for example, 0.2 Pa, 0.25 Pa, 0.3 Pa, 0.35 Pa, 0.4 Pa, 0.45 Pa, 0.5 Pa, 0.55 Pa, 0.6 Pa, 0.65 Pa, 0.7 Pa, 0.75 Pa, or 0.8 Pa, but is not limited to those listed; other unlisted values ​​within this range also apply. The substrate temperature is 180℃ to 220℃, for example, 180℃, 185℃, 190℃, 195℃, 200℃, 205℃, 210℃, 215℃, or ~220℃, but is not limited to those listed; other unlisted values ​​within this range also apply. The deposition time is 10s to 20s, for example, it can be 10s, 11s, 12s, 13s, 14s, 15s, 16s, 17s, 18s, 19s or 20s, but it is not limited to the listed values. Other unlisted values ​​within this range are also applicable.

[0074] During the secondary PVD process, an inert gas is used to sputter a magnesium-containing target to form a magnesium-containing conductive layer on the surface of the oxygen-doped vacancy conductive layer.

[0075] In one embodiment, the second gas is a mixture of an inert gas and hydrogen, wherein the flow rate ratio of the inert gas to hydrogen in the second gas is 200:(4~6), for example, it can be 200:4, 200:4.5, 200:5, 200:5.5 or 200:6, but is not limited to the listed values; other unlisted values ​​within this range are also applicable. The inert gas includes Ar.

[0076] In one embodiment, the magnesium-containing target is an IMO target.

[0077] As one implementation, the secondary PVD treatment satisfies at least one of the following conditions: power density is 10 W / cm². 2 ~20W / cm 2 For example, it could be 10W / cm 2 11W / cm 2 12W / cm 2 13W / cm 2 14W / cm 2 15W / cm 2 16W / cm 2 17W / cm 2 18W / cm 2 19W / cm 2 Or 20W / cm 2However, the values ​​are not limited to those listed; other unlisted values ​​within this range also apply. The deposition pressure is 0.2 Pa to 0.6 Pa, for example, 0.2 Pa, 0.25 Pa, 0.3 Pa, 0.35 Pa, 0.4 Pa, 0.45 Pa, 0.5 Pa, 0.55 Pa, or 0.6 Pa, but is not limited to those listed; other unlisted values ​​within this range also apply. The deposition time is 40 s to 50 s, for example, 40 s, 41 s, 42 s, 43 s, 44 s, 45 s, 46 s, 47 s, 48 ​​s, 49 s, or 50 s, but is not limited to those listed; other unlisted values ​​within this range also apply.

[0078] During the three PVD processes, a second target material is sputtered using a second gas containing hydrogen as the reaction gas to form a hydrogen-doped conductive layer on the surface of the magnesium-containing conductive layer.

[0079] In one embodiment, the second gas is a mixture of an inert gas and hydrogen, wherein the flow rate ratio of the inert gas to hydrogen in the second gas is 200:(4~6), for example, it can be 200:4, 200:4.5, 200:5, 200:5.5 or 200:6, but is not limited to the listed values; other unlisted values ​​within this range are also applicable. The inert gas includes Ar.

[0080] In one implementation, the second target material is independently selected from any one of AZO, ITO, IZO, GZO or FTO.

[0081] As one implementation, the three PVD processes satisfy at least one of the following conditions: power density is 13 W / cm². 2~ 17W / cm 2 For example, it could be 13W / cm 2 14W / cm 2 15W / cm 2 16W / cm 2 Or 17W / cm 2The values ​​are not limited to those listed; other unlisted values ​​within this range also apply. The deposition pressure is 0.1 Pa to 0.7 Pa, for example, 0.1 Pa, 0.15 Pa, 0.2 Pa, 0.25 Pa, 0.3 Pa, 0.35 Pa, 0.4 Pa, 0.45 Pa, 0.5 Pa, 0.55 Pa, 0.6 Pa, 0.65 Pa, or 0.7 Pa, but is not limited to those listed; other unlisted values ​​within this range also apply. The deposition time is 5 s to 15 s, for example, 5 s, 6 s, 7 s, 8 s, 9 s, 10 s, 11 s, 12 s, 13 s, 14 s, or 15 s, but is not limited to those listed; other unlisted values ​​within this range also apply.

[0082] The annealing process includes infrared light injection annealing.

[0083] In one implementation, the annealing process satisfies at least one of the following conditions: the infrared light wavelength is 900nm~1060nm, for example, it can be 900nm, 920nm, 930nm, 940nm, 950nm, 960nm, 970nm, 980nm, 1000nm, 1010nm, 1020nm, 1030nm, 1040nm, 1050nm, or 1060nm, but is not limited to the listed values; other unlisted values ​​within this range are also applicable. The processing time is 5s~15s, for example, it can be 5s, 6s, 7s, 8s, 9s, 10s, 11s, 12s, 13s, 14s, or 15s, but is not limited to the listed values; other unlisted values ​​within this range are also applicable.

[0084] In another specific embodiment, this application provides a photovoltaic device including a monocrystalline silicon wafer having a first surface and a second surface opposite to each other; the first surface is provided with a first intrinsic amorphous silicon layer, a front P-type amorphous silicon layer, a front TCO layer and a front electrode layer sequentially stacked in a direction away from the monocrystalline silicon wafer; the second surface is provided with a second intrinsic amorphous silicon layer, a back N-type amorphous silicon layer, a back TCO layer and a back electrode layer sequentially stacked in a direction away from the monocrystalline silicon wafer; both the front TCO layer and the back TCO layer adopt a heterojunction cell TCO stacked module as described in a specific embodiment, wherein the oxygen-doped vacancy conductive layer of the heterojunction cell TCO stacked module is disposed close to the front P-type amorphous silicon layer or the back N-type amorphous silicon layer, and the hydrogen-doped conductive layer is disposed close to the front electrode layer or the back electrode layer.

[0085] In some embodiments, the thickness of the first intrinsic amorphous silicon layer is 3nm to 7nm, for example, it can be 3nm, 3.5nm, 4nm, 4.5nm, 5nm, 5.5nm, 6nm, 6.5nm, or 7nm, but is not limited to the listed values; other unlisted values ​​within this range are also applicable. The thickness of the front-side P-type amorphous silicon layer is 5nm to 15nm, for example, it can be 5nm, 6nm, 7nm, 8nm, 9nm, 10nm, 11nm, 12nm, 13nm, 14nm, or 15nm, but is not limited to the listed values; other unlisted values ​​within this range are also applicable. The thickness of the second intrinsic amorphous silicon layer is 3nm to 7nm, for example, it can be 3nm, 3.5nm, 4nm, 4.5nm, 5nm, 5.5nm, 6nm, 6.5nm, or 7nm, but is not limited to the listed values; other unlisted values ​​within this range are also applicable. The thickness of the back N-type amorphous silicon layer is 10nm to 20nm, for example, it can be 10nm, 11nm, 12nm, 13nm, 14nm, 15nm, 16nm, 17nm, 18nm, 19nm or 20nm, but it is not limited to the listed values. Other unlisted values ​​within this range are also applicable.

[0086] For example, the method for fabricating the photovoltaic device includes the following steps: S1: Provide a monocrystalline silicon wafer, which is texturized and cleaned, and then a first intrinsic amorphous silicon layer and a second intrinsic amorphous silicon layer are formed on its first surface and second surface respectively by PECVD deposition process. A front P-type amorphous silicon layer is deposited on the first intrinsic amorphous silicon layer and a back N-type amorphous silicon layer is deposited on the second intrinsic amorphous silicon layer. S2: Using a mixture of Ar and O2 with an initial flow ratio of 200:(10~15) as the reactant gas, PVD treatment was performed on the surfaces of the front P-type amorphous silicon layer and the back N-type amorphous silicon layer using an AZO target (1~3wt% Al2O3). As the sputtering time exponential decreased to Ar:O2=200:(1~1.5), an oxygen-doped vacancy conductive layer was obtained, with a power density of 10W / cm². 2 ~14W / cm 2 The deposition pressure is 0.2 Pa to 0.8 Pa, the substrate temperature is 180°C to 220°C, and the deposition time is 10 s to 20 s. S3: A secondary PVD treatment is performed on the surface of the oxygen-doped vacancy conductive layer, and the IMO target is sputtered using argon gas at a flow rate of 150~250 sccm as the reaction gas, with a power density of 10 W / cm². 2 ~20W / cm 2 The deposition pressure is 0.2 Pa to 0.6 Pa, and the deposition time is 40 s to 50 s, forming a magnesium-containing conductive layer; S4: The magnesium-containing conductive layer surface is subjected to three PVD treatments, and the ITO target is sputtered using argon and hydrogen with a flow ratio of 200:(4~6) as the reaction gas, wherein the power density is 13W / cm³. 2 ~17W / cm 2 The deposition pressure is 0.1 Pa to 0.7 Pa, and the deposition time is 5 s to 15 s, forming a hydrogen-doped conductive layer; S5: After deposition, infrared light injection annealing is performed immediately, with the infrared light wavelength being 900nm~1060nm and the annealing time being 5~15s; S6: Print the front metal electrode and the back metal electrode on the hydrogen-doped conductive layers on both sides respectively.

[0087] Example 1 This embodiment provides a photovoltaic device and its fabrication method, such as Figure 1 As shown, the photovoltaic device includes an N-type monocrystalline silicon wafer 1, which has a first surface and a second surface opposite to each other. The first surface is provided with a first intrinsic amorphous silicon layer 21, a front P-type amorphous silicon layer 22, a front TCO layer 23 and a front electrode layer 24, which are stacked sequentially in the direction away from the N-type monocrystalline silicon wafer 1. The second surface is provided with a second intrinsic amorphous silicon layer 31, a back N-type amorphous silicon layer 32, a back TCO layer 33 and a back electrode layer 34, which are stacked sequentially in the direction away from the N-type monocrystalline silicon wafer 1. The front TCO layer 23 and the back TCO layer 33 each independently include an oxygen-doped vacancy conductive layer 231, an IMO conductive layer 232 and a hydrogen-doped conductive layer 233, which are stacked sequentially. The oxygen-doped vacancy conductive layer 231 is disposed close to the front P-type amorphous silicon layer 22 or the back N-type amorphous silicon layer 32, and the hydrogen-doped conductive layer 233 is disposed close to the front electrode layer 24 or the back electrode layer 34.

[0088] The preparation method of this embodiment includes the following steps: S1: A monocrystalline silicon wafer is provided. After texturing and cleaning, a 5nm first intrinsic amorphous silicon layer 21 and a second intrinsic amorphous silicon layer 31 are formed on its first and second surfaces respectively by PECVD deposition process. A 10nm front-side P-type amorphous silicon layer 22 is deposited on the first intrinsic amorphous silicon layer 21, and a 15nm back-side N-type amorphous silicon layer 32 is deposited on the second intrinsic amorphous silicon layer 31. S2: Using a mixture of Ar and O2 with an initial flow ratio of 200:12.5 as the reactant gas, PVD treatment was performed on the surfaces of the front p-type amorphous silicon layer 22 and the back n-type amorphous silicon layer 32 using an AZO target (2wt% Al2O3). As the sputtering time exponent decreased to Ar:O2=200:1.25, a 20nm oxygen-doped vacancy conductive layer 231 was obtained with a refractive index of 1.9 and a power density of 12W / cm². 2The deposition pressure was 0.5 Pa, the substrate temperature was 200 °C, and the deposition time was 15 s. The oxygen vacancy concentration in the oxygen-doped conductive layer 231 decreased in a gradient from the front P-type amorphous silicon layer 22 or the back N-type amorphous silicon layer 32 towards the front electrode layer 24 or the back electrode layer 34, decreasing from 4 × 10⁻⁶. 20 cm -3 Reduced to 1.5×10 20 cm -3 ; S3: A secondary PVD treatment is performed on the surface of the oxygen-doped vacancy conductive layer 231, and the IMO target is sputtered using argon gas at a flow rate of 200 sccm as the reaction gas, with a power density of 15 W / cm². 2 The deposition pressure was 0.4 Pa, the deposition time was 45 s, and an 85 nm IMO layer was formed with a magnesium oxide concentration of 2 wt% and a refractive index of 2.1. S4: The ITO target was sputtered using three PVD treatments on the surface of the IMO conductive layer 232, with Ar and H2 as the reactant gases at a flow ratio of 200:5 and a power density of 15 W / cm². 2 The deposition pressure was 0.4 Pa, the deposition time was 10 s, and a hydrogen-doped conductive layer 233 with a thickness of 15 nm, a hydrogen concentration of 5 at%, and a refractive index of 2.0 was formed. S5: After deposition, infrared light injection annealing is performed immediately, with an infrared light wavelength of 980nm and an annealing time of 10s; S6: Print the front metal electrode and the back metal electrode on the hydrogen-doped conductive layer 233 on both sides respectively.

[0089] Example 2 This embodiment provides a photovoltaic device and its fabrication method, such as Figure 1 As shown, the photovoltaic device includes an N-type monocrystalline silicon wafer 1, which has a first surface and a second surface opposite to each other. The first surface is provided with a first intrinsic amorphous silicon layer 21, a front P-type amorphous silicon layer 22, a front TCO layer 23 and a front electrode layer 24, which are stacked sequentially in the direction away from the N-type monocrystalline silicon wafer 1. The second surface is provided with a second intrinsic amorphous silicon layer 31, a back N-type amorphous silicon layer 32, a back TCO layer 33 and a back electrode layer 34, which are stacked sequentially in the direction away from the N-type monocrystalline silicon wafer 1. The front TCO layer 23 and the back TCO layer 33 each independently include an oxygen-doped vacancy conductive layer 231, an IMO conductive layer 232 and a hydrogen-doped conductive layer 233, which are stacked sequentially. The oxygen-doped vacancy conductive layer 231 is disposed close to the front P-type amorphous silicon layer 22 or the back N-type amorphous silicon layer 32, and the hydrogen-doped conductive layer 233 is disposed close to the front electrode layer 24 or the back electrode layer 34.

[0090] The preparation method of this embodiment includes the following steps: S1: Provide a monocrystalline silicon wafer, which, after texturing and cleaning, forms a 3nm first intrinsic amorphous silicon layer 21 and a second intrinsic amorphous silicon layer 31 on its first and second surfaces respectively through a PECVD deposition process. A 5nm front-side P-type amorphous silicon layer 22 is deposited on the first intrinsic amorphous silicon layer 21, and a 10nm back-side N-type amorphous silicon layer 32 is deposited on the second intrinsic amorphous silicon layer 31. S2: Using a mixture of Ar and O2 with an initial flow ratio of 200:10 as the reactant gas, PVD treatment was performed on the surfaces of the front p-type amorphous silicon layer 22 and the back n-type amorphous silicon layer 32 using an AZO target (1 wt% Al2O3). As the sputtering time exponent decreased to Ar:O2=200:1, a 15 nm oxygen-doped vacancy conductive layer 231 was obtained with a refractive index of 1.85 and a power density of 10 W / cm². 2 The deposition pressure was 0.2 Pa, the substrate temperature was 180 °C, and the deposition time was 10 s. The oxygen vacancy concentration in the oxygen-doped conductive layer 231 decreased in a gradient from the front P-type amorphous silicon layer 22 or the back N-type amorphous silicon layer 32 towards the front electrode layer 24 or the back electrode layer 34, from 5 × 10⁻⁶. 20 cm -3 Reduced to 2×10 20 cm -3 ; S3: A secondary PVD treatment is performed on the surface of the oxygen-doped vacancy conductive layer 231, and the IMO target is sputtered using argon gas at a flow rate of 150 sccm as the reaction gas, with a power density of 10 W / cm². 2 The deposition pressure was 0.2 Pa, the deposition time was 40 s, and a 70 nm IMO layer was formed with a magnesium oxide concentration of 1 wt% and a refractive index of 2.0. S4: The ITO target was sputtered using three PVD treatments on the surface of the IMO conductive layer 232, with Ar and H2 as the reactant gases at a flow ratio of 200:4 and a power density of 13 W / cm². 2 The deposition pressure was 0.1 Pa, the deposition time was 5 s, and a hydrogen-doped conductive layer 233 with a thickness of 10 nm, a hydrogen concentration of 4 at%, and a refractive index of 1.9 was formed. S5: After deposition, infrared light injection annealing is performed immediately, with an infrared light wavelength of 900nm and an annealing time of 5s; S6: Print the front metal electrode and the back metal electrode on the hydrogen-doped conductive layer 233 on both sides respectively.

[0091] Example 3 This embodiment provides a photovoltaic device and its fabrication method, such as Figure 1As shown, the photovoltaic device includes an N-type monocrystalline silicon wafer 1, which has a first surface and a second surface opposite to each other. The first surface is provided with a first intrinsic amorphous silicon layer 21, a front P-type amorphous silicon layer 22, a front TCO layer 23 and a front electrode layer 24, which are stacked sequentially in the direction away from the N-type monocrystalline silicon wafer 1. The second surface is provided with a second intrinsic amorphous silicon layer 31, a back N-type amorphous silicon layer 32, a back TCO layer 33 and a back electrode layer 34, which are stacked sequentially in the direction away from the N-type monocrystalline silicon wafer 1. The front TCO layer 23 and the back TCO layer 33 each independently include an oxygen-doped vacancy conductive layer 231, an IMO conductive layer 232 and a hydrogen-doped conductive layer 233, which are stacked sequentially. The oxygen-doped vacancy conductive layer 231 is disposed close to the front P-type amorphous silicon layer 22 or the back N-type amorphous silicon layer 32, and the hydrogen-doped conductive layer 233 is disposed close to the front electrode layer 24 or the back electrode layer 34.

[0092] The preparation method of this embodiment includes the following steps: S1: A monocrystalline silicon wafer is provided. After texturing and cleaning, a 7nm first intrinsic amorphous silicon layer 21 and a second intrinsic amorphous silicon layer 31 are formed on its first and second surfaces respectively by PECVD deposition process. A 15nm front-side P-type amorphous silicon layer 22 is deposited on the first intrinsic amorphous silicon layer 21, and a 20nm back-side N-type amorphous silicon layer 32 is deposited on the second intrinsic amorphous silicon layer 31. S2: Using a mixture of Ar and O2 with an initial flow ratio of 200:15 as the reactant gas, PVD treatment was performed on the surfaces of the front p-type amorphous silicon layer 22 and the back n-type amorphous silicon layer 32 using an AZO target (3wt% Al2O3). As the sputtering time exponent decreased to Ar:O2=200:1.5, a 25nm oxygen-doped vacancy conductive layer 231 was obtained with a refractive index of 1.95 and a power density of 14W / cm². 2 The deposition pressure was 0.8 Pa, the substrate temperature was 220 °C, and the deposition time was 20 s. The oxygen vacancy concentration in the oxygen-doped conductive layer 231 decreased in a gradient from the front P-type amorphous silicon layer 22 or the back N-type amorphous silicon layer 32 towards the front electrode layer 24 or the back electrode layer 34, with the oxygen vacancy concentration ranging from 3 × 10⁻⁶ to 10⁻⁶. 20 cm -3 Reduced to 1×10 20 cm -3 ; S3: A secondary PVD treatment is performed on the surface of the oxygen-doped vacancy conductive layer 231, and the IMO target is sputtered using Ar as the reactant gas at a flow rate of 250 sccm, with a power density of 20 W / cm². 2 The deposition pressure was 0.6 Pa, the deposition time was 50 s, and a 100 nm IMO layer was formed with a magnesium oxide concentration of 3 wt% and a refractive index of 2.2. S4: The ITO target was sputtered using three PVD treatments on the surface of the IMO conductive layer 232, with Ar and H2 as the reactant gases at a flow ratio of 200:6 and a power density of 17 W / cm². 2 The deposition pressure was 0.7 Pa, the deposition time was 15 s, and a hydrogen-doped conductive layer 233 with a thickness of 20 nm, a hydrogen concentration of 6 at%, and a refractive index of 2.1 was formed. S5: After deposition, infrared light injection annealing is performed immediately, with an infrared light wavelength of 1060nm and an annealing time of 15s. S6: Print the front metal electrode and the back metal electrode on the hydrogen-doped conductive layer 233 on both sides respectively.

[0093] Example 4 This embodiment provides a photovoltaic device and its fabrication method. The difference from Embodiment 1 is that the oxygen vacancy concentration in the oxygen-doped conductive layer 231 is uniform, specifically 3 × 10⁻⁶. 20 cm -3 There is no gradient change, and the rest of the structure, materials and preparation methods are the same as in Example 1.

[0094] Example 5 This embodiment provides a photovoltaic device and its fabrication method. The difference from Embodiment 1 is that the oxygen-doped vacancy conductive layer 231, the IMO conductive layer 232 and the hydrogen-doped conductive layer 233 have the same thickness, which is 20 nm. The remaining structure, materials and fabrication methods are the same as in Embodiment 1.

[0095] Comparative Example 1 This comparative example provides a photovoltaic device and its fabrication method, such as Figure 2 As shown, the photovoltaic device includes an N-type monocrystalline silicon wafer 1, which has a first surface and a second surface opposite to each other; the first surface is provided with a first intrinsic amorphous silicon layer 21, a front P-type amorphous silicon layer 22, a front ITO layer and a front electrode layer 24 sequentially stacked in the direction away from the N-type monocrystalline silicon wafer 1; the second surface is provided with a second intrinsic amorphous silicon layer 31, a back N-type amorphous silicon layer 32, a back ITO layer and a back electrode layer 34 sequentially stacked in the direction away from the N-type monocrystalline silicon wafer 1.

[0096] The preparation method of this comparative example includes the following steps: S1: A monocrystalline silicon wafer is provided. After texturing and cleaning, a 5nm first intrinsic amorphous silicon layer 21 and a second intrinsic amorphous silicon layer 31 are formed on its first and second surfaces respectively by PECVD deposition process. A 10nm front-side P-type amorphous silicon layer 22 is deposited on the first intrinsic amorphous silicon layer 21, and a 15nm back-side N-type amorphous silicon layer 32 is deposited on the second intrinsic amorphous silicon layer 31. S2: Using a mixture of Ar and O2 at a flow ratio of 200:5 as the reaction gas, PVD treatment was performed on the surfaces of the front p-type amorphous silicon layer 22 and the back n-type amorphous silicon layer 32 using an ITO target to form a homogeneous ITO layer of 80 nm; wherein the power density is 12 W / cm². 2 The deposition pressure was 0.5 Pa, the substrate temperature was 200 °C, and the deposition time was 60 s. S3: Print the front metal electrode and the back metal electrode on the homogeneous ITO layers on both sides respectively.

[0097] Comparative Example 2 This comparative example provides a photovoltaic device and its fabrication method, which differs from Example 1 in that: Figure 3 As shown, no oxygen-doped vacancy conductive layer 231 was provided; the rest of the structure, materials, and preparation method were the same as in Example 1.

[0098] Comparative Example 3 This comparative example provides a photovoltaic device and its fabrication method, which differs from Example 1 in that: Figure 4 As shown, the IMO conductive layer 232 is not provided, and the rest of the structure, materials and preparation method are the same as in Example 1.

[0099] Comparative Example 4 This comparative example provides a photovoltaic device and its fabrication method, which differs from Example 1 in that: Figure 5 As shown, no hydrogen-doped conductive layer 233 was provided; the rest of the structure, materials, and preparation method were the same as in Example 1.

[0100] Comparative Example 5 This comparative example provides a photovoltaic device and its fabrication method, which differs from Example 1 in that: Figure 6 As shown, the IMO conductive layer 232 and the hydrogen-doped conductive layer 233 are not provided, and the rest of the structure, materials and preparation methods are the same as in Example 1.

[0101] Comparative Example 6 This comparative example provides a photovoltaic device and its fabrication method. The difference from Example 1 is that the front TCO layer and the back TCO layer independently include sequentially stacked AZO layer, IMO layer and ITO layer, that is, no oxygen vacancies are doped in the bottom layer and no hydrogen element is doped in the top layer. The rest of the structure is the same as that of Example 1.

[0102] The preparation method of this comparative example includes the following steps: S1: Provide a monocrystalline silicon wafer, which, after texturing and cleaning, forms a 5nm first intrinsic amorphous silicon layer and a second intrinsic amorphous silicon layer on its first and second surfaces respectively through PECVD deposition process. A 10nm front-side P-type amorphous silicon layer is deposited on the first intrinsic amorphous silicon layer, and a 15nm back-side N-type amorphous silicon layer is deposited on the second intrinsic amorphous silicon layer. S2: Using a mixture of Ar and O2 at a flow ratio of 200:5 as the reactant gas, PVD treatment was performed on the surfaces of the front-side P-type amorphous silicon layer and the back-side N-type amorphous silicon layer using an AZO target to form a homogeneous AZO layer of 80 nm; wherein the power density is 12 W / cm². 2 The deposition pressure was 0.5 Pa, the substrate temperature was 200 °C, and the deposition time was 60 s. S3: A secondary PVD treatment is performed on the AZO layer surface, followed by sputtering of the IMO target using argon gas at a flow rate of 200 sccm as the reactive gas, with a power density of 15 W / cm². 2 The deposition pressure was 0.4 Pa, the deposition time was 45 s, and an 85 nm IMO layer was formed. S4: The IMO layer surface undergoes three PVD treatments, followed by sputtering of the ITO target with argon gas at a flow rate of 200 sccm as the reactive gas, where the power density is 15 W / cm². 2 The deposition pressure was 0.4 Pa, the deposition time was 10 s, and an ITO layer with a thickness of 15 nm and a refractive index of 2.0 was formed. S5: After deposition, infrared light injection annealing is performed immediately, with an infrared light wavelength of 980nm and an annealing time of 10s; S6: Print the front metal electrode and the back metal electrode on the hydrogen-doped conductive layers on both sides respectively.

[0103] This application conducted IV tests on the photovoltaic devices provided in Examples 1-5 and Comparative Examples 1-6, and the results are shown in Table 1. The IV test methods included the Suns-Voc method and the dual-intensity method.

[0104] Table 1 As shown in Table 1, the photovoltaic devices of Examples 1-5 have excellent overall electrical performance. The bottom layer of their TCO conductive layer uses the oxygen vacancy concentration gradient to construct a vertical built-in electric field, the middle layer uses a high mobility material as the lateral conductive backbone, and the top layer uses in-situ injection of hydrogen-containing gas to form a surface passivation barrier, which takes into account both conductivity and passivation performance, and also effectively improves the cell conversion efficiency.

[0105] Compared to Example 1, the electrical performance of the photovoltaic device in Example 4 is slightly reduced. This is because the thickness of each layer in its TCO stacked structure is equal, which leads to the uniform thickness destroying the optical anti-reflection effect and disrupting the electrical transmission path.

[0106] In Example 5, the electrical performance of the photovoltaic device was also slightly reduced. This is because the oxygen vacancy concentration at the bottom layer is uniform, there is no gradient change, and there is a lack of band gradient, which makes it impossible to effectively block the recombination of minority carriers at the back interface.

[0107] Compared to Example 1, the series resistance and TCO sheet resistance of the photovoltaic devices in Comparative Examples 1-6 all increased to varying degrees, while their overall electrical performance was lower than that of Example 1. This is because there is a synergistic effect between the oxygen-doped vacancy conductive layer, the IMO conductive layer, and the hydrogen-doped conductive layer forming the TCO stacked structure in Example 1. Specifically, the oxygen-doped vacancy conductive layer and the amorphous silicon layer have a synergistic effect. By enriching the oxygen near the silicon side and depleting the oxygen away from the silicon side, a continuous conduction band step is formed, which is equivalent to establishing an electron slide between the TCO and silicon interface. This greatly reduces the potential barrier for electrons to jump to the main conductive layer and reduces the longitudinal resistance. Moreover, the oxygen-rich structure near the amorphous silicon side has higher hardness and fewer defects, protecting the passivation performance of the amorphous silicon. At the same time, the oxygen-doped vacancy conductive layer acts as a potential energy well, and the IMO conductive layer acts as the superconducting trunk. The two work together to confine electrons to transport within the IMO conductive layer, preventing electron backflow or diffusion to the surface that would cause recombination, and also greatly reducing the module sheet resistance. The hydrogen-doped conductive layer interacts with the metal electrode, and hydrogen diffuses to the TCO-metal interface during heat treatment. The dangling bonds induced by the saturated metal reduce the recombination rate in the metal contact area and act as passivators, optimizing the ohmic contact and further reducing series resistance. Furthermore, a gradient refractive index system is formed between the oxygen-doped vacancy conductive layer, the IMO conductive layer, and the hydrogen-doped conductive layer, creating a three-layer synergistic spectral-electrical system. This reduces light reflection loss and increases transmittance, thereby effectively improving photoelectric conversion efficiency.

[0108] The applicant declares that the above description is only a specific implementation of this application, but the protection scope of this application is not limited thereto. Those skilled in the art should understand that any changes or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application fall within the protection and disclosure scope of this application.

Claims

1. A heterojunction solar cell TCO stacked module, having a near-electrode side and a near-silicon substrate side, characterized in that, The heterojunction solar cell TCO stacked assembly includes at least an oxygen-doped vacancy conductive layer, a magnesium-containing conductive layer, and a hydrogen-doped conductive layer, which are sequentially stacked from the near-silicon substrate side to the near-electrode side.

2. The heterojunction solar cell TCO stacked module according to claim 1, characterized in that, The oxygen-doped vacancy conductive layer includes a transparent conductive oxide layer doped with oxygen vacancies. The oxygen vacancy concentration in the oxygen-doped conductive layer decreases in a gradient from the near-silicon side to the near-electrode side. And / or, the oxygen vacancy concentration at the silicon-based end of the oxygen-doped conductive layer is (3~5)×10⁻⁶. 20 cm -3 The vacancy concentration at the near-electrode end of the oxygen-doped vacancy conductive layer is (1~2)×10⁻⁶. 20 cm -3 .

3. The heterojunction solar cell TCO stacked module according to claim 1 or 2, characterized in that, The magnesium-containing conductive layer includes a transparent magnesium oxide conductive layer; The magnesium oxide concentration in the magnesium-containing conductive layer is 1wt%~3wt%; And / or, the thickness of the magnesium-containing conductive layer is greater than the thickness of the oxygen-doped vacancy conductive layer and the thickness of the hydrogen-doped conductive layer, respectively.

4. The heterojunction solar cell TCO stacked module according to claim 1 or 2, characterized in that, The hydrogen-doped conductive layer includes a transparent conductive oxide layer doped with hydrogen. The hydrogen concentration in the hydrogen-doped conductive layer is 4 at% to 6 at%.

5. The heterojunction solar cell TCO stacked module according to any one of claims 2-4, characterized in that, The oxygen-doped vacancy conductive layer includes an AZO layer with oxygen-doped vacancies. The magnesium-containing conductive layer includes an IMO layer; The hydrogen-doped conductive layer includes a hydrogen-doped ITO layer. And / or, the thickness of the magnesium-containing conductive layer is 70nm~100nm; And / or, the thickness of the oxygen-doped vacancy conductive layer is 15nm~25nm; And / or, the thickness of the hydrogen-doped conductive layer is 10 nm to 20 nm.

6. The heterojunction solar cell TCO stacked module according to any one of claims 1-5, characterized in that, The oxygen-doped vacancy conductive layer, the magnesium-containing conductive layer, and the hydrogen-doped conductive layer have different refractive indices and satisfy the following conditions: The refractive index of the magnesium-containing conductive layer is greater than that of the hydrogen-doped conductive layer, which in turn is greater than that of the oxygen-doped vacancy conductive layer.

7. The heterojunction solar cell TCO stacked module according to claim 6, characterized in that, The refractive index of the oxygen-doped vacancy conductive layer is 1.85~1.95; And / or, the refractive index of the magnesium-containing conductive layer is 2.0~2.2; And / or, the refractive index of the hydrogen-doped conductive layer is 1.9 to 2.

1.

8. A method for preparing a heterojunction solar cell TCO tandem module as described in any one of claims 1-7, characterized in that, The preparation method includes sequentially performing a first PVD treatment, a second PVD treatment, a third PVD treatment, and an annealing treatment; In the first PVD process, the first target material is sputtered with a first gas containing oxygen as the reaction gas, and as the sputtering process proceeds, the oxygen content in the first gas is gradually reduced to form an oxygen-doped vacancy conductive layer on the substrate surface. During the secondary PVD process, an inert gas is used to sputter the magnesium-containing target material to form a magnesium-containing conductive layer on the surface of the oxygen-doped vacancy conductive layer. During the three PVD processes, a second target material is sputtered using a second gas containing hydrogen as the reaction gas to form a hydrogen-doped conductive layer on the surface of the magnesium-containing conductive layer.

9. The preparation method according to claim 8, characterized in that, The first gas is a mixture of inert gas and oxygen. As one PVD process proceeds, the flow ratio of inert gas to oxygen in the first gas decreases from 200:(10~15) to 200:(1~1.5). And / or, the second gas is a mixture of inert gas and hydrogen, wherein the flow rate ratio of inert gas to hydrogen in the second gas is 200:(4~6); And / or, the first target and the second target are each independently selected from any one of AZO, ITO, IZO, GZO or FTO; And / or, the magnesium-containing target is an IMO target; And / or, the PVD process satisfies at least one of the following conditions: power density is 10 W / cm². 2 ~14W / cm 2 The deposition pressure is 0.2 Pa to 0.8 Pa, the substrate temperature is 180 °C to 220 °C, and the deposition time is 10 s to 20 s. And / or, the secondary PVD treatment satisfies at least one of the following conditions: power density is 10 W / cm². 2 ~20W / cm 2 The deposition pressure was 0.2 Pa to 0.6 Pa, and the deposition time was 40 to 50 seconds. And / or, the three PVD processes satisfy at least one of the following conditions: power density of 13 W / cm². 2~ 17W / cm 2 The deposition pressure was 0.1 Pa to 0.7 Pa, and the deposition time was 5 s to 15 s. And / or, the annealing process includes infrared light injection annealing, satisfying at least one of the following conditions: the infrared light wavelength is 900nm~1060nm, and the processing time is 5s~15s.

10. A photovoltaic device, characterized in that, The photovoltaic device includes a monocrystalline silicon wafer having a first surface and a second surface opposite to each other; the first surface is provided with a first intrinsic amorphous silicon layer, a front P-type amorphous silicon layer, a front TCO layer and a front electrode layer sequentially stacked in the direction away from the monocrystalline silicon wafer; the second surface is provided with a second intrinsic amorphous silicon layer, a back N-type amorphous silicon layer, a back TCO layer and a back electrode layer sequentially stacked in the direction away from the monocrystalline silicon wafer; Both the front TCO layer and the back TCO layer adopt the heterojunction solar cell TCO stacked assembly according to any one of claims 1-7. The oxygen-doped vacancy conductive layer of the heterojunction solar cell TCO stacked assembly is disposed close to the front P-type amorphous silicon layer or the back N-type amorphous silicon layer, and the hydrogen-doped conductive layer is disposed close to the front electrode layer or the back electrode layer.

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