Display panel, preparation method thereof and display device
Patent Information
- Application Number
- CN202611082339.X
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2026-07-21
- Publication Date
- 2026-10-16
AI Technical Summary
[0007]本申请实施例提供一种显示面板及其制备方法、显示装置,阻挡结构位于第一功能层内,即阻挡结构形成于第一导体层之前。并且阻挡结构中的至少部分位于凹槽结构与第一导体部之间,这样在第一导体层制备过程中,阻挡结构的存在可以阻碍第一导体部所在位置处光刻胶的胶材流动至凹槽结构内,以此增大覆盖第一导体部的光刻胶的厚度。从而提高光刻胶对第一导体部的保护效果,降低第一导体部出现局部宽度过窄甚至发生断裂的风险。这种设计有助于提高显示面板的制备良率,以及当第一导体部用于传输特定信号以实现显示功能时,还可以增强显示面板的显示可靠性。
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Figure CN122935102A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of display device technology, and in particular to a display panel and its manufacturing method, and a display device. Background Technology
[0002] Organic light-emitting diode (OLED) display panels and display panels using light-emitting diode (LED) devices are widely used in various consumer electronics products such as mobile phones, televisions, personal digital assistants, digital cameras, laptops, and desktop computers due to their advantages such as high image quality, energy saving, thin body and wide range of applications, becoming the mainstream of display devices. Summary of the Invention
[0003] This application provides a display panel, a method for manufacturing the same, and a display device, which can enhance the reliability of the display panel.
[0004] In a first aspect, embodiments of this application provide a display panel having a first region and a second region, wherein the transmittance of the first region is greater than that of the second region. The display panel includes a substrate, a first functional layer, and a first conductive layer. The substrate includes a first surface and a recessed groove structure formed by the first surface, the groove structure being located within the first region. The first functional layer is located on one side of the first surface of the substrate and includes a blocking structure disposed within the first region. The first conductive layer is located on the side of the first functional layer facing away from the substrate and includes a first conductive portion disposed within the second region and adjacent to the first region. The orthographic projection of the blocking structure onto the substrate is located outside the groove structure, and at least a portion of the orthographic projection of the blocking structure onto the substrate is located between the orthographic projection of the first conductive portion onto the substrate and the groove structure.
[0005] Secondly, embodiments of this application provide a method for manufacturing a display panel, the display panel having a first region and a second region, the manufacturing method comprising: A partial structure located in the first region of the substrate is removed to form a groove structure in the first region of the substrate. A barrier structure is formed on one side of the substrate. The barrier structure is located within the first region, and the orthogonal projection of the barrier structure onto the substrate is outside the groove structure. A first conductor portion is formed on one side of the substrate. The first conductor portion is located within and adjacent to the second region. At least a portion of the blocking structure in the orthographic projection of the substrate is located between the orthographic projection of the first conductor portion on the substrate and the groove structure.
[0006] Thirdly, embodiments of this application provide a display device, which includes a display panel as described in any of the foregoing embodiments.
[0007] This application provides a display panel and its fabrication method, as well as a display device. A blocking structure is located within a first functional layer, i.e., the blocking structure is formed before the first conductive layer. At least a portion of the blocking structure is located between the groove structure and the first conductive portion. Thus, during the fabrication of the first conductive layer, the presence of the blocking structure can prevent the flow of photoresist material from the location of the first conductive portion into the groove structure, thereby increasing the thickness of the photoresist covering the first conductive portion. This improves the protective effect of the photoresist on the first conductive portion and reduces the risk of localized excessive narrowness or even breakage of the first conductive portion. This design helps improve the fabrication yield of the display panel and enhances the display reliability when the first conductive portion is used to transmit specific signals to achieve display functions. Attached Figure Description
[0008] To more clearly illustrate the technical solutions of the embodiments of this application, the accompanying drawings used in the embodiments of this application will be briefly introduced below. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0009] Figure 1 This is a schematic diagram of the structure of a display panel provided in an embodiment of this application; Figure 2 yes Figure 1 Schematic diagram of the cross-sectional structure at point AA; Figure 3 yes Figure 2 A schematic diagram of the local membrane structure in the image; Figure 4 yes Figure 1 Enlarged structural diagram of region Q in the middle region; Figure 5 yes Figure 4 Schematic diagram of the cross-sectional structure at point BB; Figure 6 This is a cross-sectional structural diagram of a display panel at point AA provided in an embodiment of this application; Figure 7 This is a cross-sectional structural diagram of a display panel at point AA provided in an embodiment of this application; Figure 8 yes Figure 1 Schematic diagram of the cross-sectional structure at the CC point; Figure 9 This is a flowchart illustrating a method for manufacturing a display panel according to an embodiment of this application; Figure 10 is a schematic diagram of the process structure of a method for manufacturing a display panel according to an embodiment of this application; Figure 11 This is a schematic diagram of the structure of a display device provided in an embodiment of this application.
[0010] Marker explanation: 100. Display panel; 200. Display device; 10. Substrate; 11. First substrate; 12. First barrier layer; 13. Second substrate; 14. Second barrier layer; 20. First functional layer; 21. Barrier structure; 211. First sub-section; 212. Second sub-section; 22. Elevation section; 30. First conductor layer; 31. First conductor section; 32. Third conductor section; 40. Second functional layer; 41. Second insulating layer; 42. Raised structure; 50. Third functional layer; 51. First insulating layer; 52. Buffer layer; 60. Planarization layer; 61. First part; 62. Second part; 70. Second conductor layer; 71. Second conductor section; 81. Light-emitting device layer; 811. Light-emitting structure; 811a. First light-emitting structure; 811b. Second light-emitting structure; 82. Anode structure; 83. Cathode structure; 90. Encapsulation layer; 91. First inorganic layer; 92. Second inorganic layer; 93. Organic layer; S, first signal line; S1, first sub-segment; S2, second sub-segment; S3, winding segment; B. Dam structure; P, pixel circuit; P1, first pixel circuit; T1, first transistor; T2, second transistor; Y1, first active structure; Y2, second active structure; A1, Center Area; A11, First Area; A12, Second Area; A2, Border Area; M1, first surface; M2, second surface; H1, groove structure; H2, through-hole structure; X, first direction; Y, second direction; Z, thickness direction. Detailed Implementation
[0011] The features and exemplary embodiments of various aspects of this application will be described in detail below. To make the objectives, technical solutions, and advantages of this application clearer, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be understood that the specific embodiments described herein are only intended to explain this application and not to limit it. For those skilled in the art, this application can be implemented without some of these specific details. The following description of the embodiments is merely to provide a better understanding of this application by illustrating examples.
[0012] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising..." does not exclude the presence of additional identical elements in the process, method, article, or apparatus that includes said element.
[0013] Display panels typically include photosensitive areas to correspond with under-display cameras and infrared sensors. To improve photosensitive accuracy, these photosensitive areas require high transmittance. To increase transmittance, some film layers are removed from these photosensitive areas, resulting in a recessed structure relative to the surrounding areas. However, this recessed structure can affect the fabrication of conductors around the photosensitive area, leading to localized areas that are too narrow or even broken. This negatively impacts the yield rate and reliability of the display panel.
[0014] Regarding the above issues, firstly, please refer to [link / reference needed]. Figures 1 to 3 This application provides a display panel 100, which has a first region A11 and a second region A12, wherein the transmittance of the first region A11 is greater than that of the second region A12. The display panel 100 includes a substrate 10, a first functional layer 20, and a first conductor layer 30. The substrate 10 includes a first surface M1 and a recessed groove structure H1 formed by the first surface M1, the groove structure H1 being located within the first region A11. The first functional layer 20 is located on one side of the first surface M1 of the substrate 10, and includes a blocking structure 21 disposed within the first region A11. The first conductor layer 30 is located on the side of the first functional layer 20 facing away from the substrate 10, and includes a first conductor portion 31 located within the second region A12 and adjacent to the first region A11. The orthographic projection of the blocking structure 21 onto the substrate 10 is located outside the groove structure H1, and at least a portion of the orthographic projection of the blocking structure 21 onto the substrate 10 is located between the orthographic projection of the first conductor portion 31 onto the substrate 10 and the groove structure H1.
[0015] The display panel 100 is used to form the display device 200. In addition to the display panel 100, the display device 200 may also include a photosensitive element, such as an under-display camera and an infrared sensor. The display panel 100 and the photosensitive element work together to enable the display device 200 to integrate multiple functions. The display panel 100 provided in this embodiment can be a liquid crystal display panel 100, or an organic light-emitting display panel 100, or other types of display panels 100. This embodiment does not limit the type of display panel 100. For ease of understanding, this embodiment will subsequently use an organic light-emitting display panel 100 as an example. The display panel 100 includes multiple light-emitting structures 811, and each light-emitting structure 811 includes an organic light-emitting material.
[0016] The display panel 100 includes at least two regions: a first region A11 and a second region A12. The first region A11 can be a photosensitive area, and in the subsequently formed display device 200, the photosensitive element can be correspondingly arranged in the first region A11. The second region A12 surrounds the first region A11 and can be the normal display area of the display panel 100, that is, all or most of the light-emitting elements in the display panel 100 are located within the second region A12. The first region A11 may contain some light-emitting structures 811, or all light-emitting structures 811 may be located outside the first region A11.
[0017] The substrate 10 mainly serves as a support and bearing material. Other film layers are stacked sequentially on the substrate 10. The stacking arrangement mentioned here means that the other film layers are arranged sequentially along the thickness direction Z of the substrate 10, and the thickness direction Z of the other film layers located on one side of the substrate 10 is usually consistent with the thickness direction Z of the substrate 10. For ease of understanding, the thickness direction Z of the substrate 10 and the thickness direction Z of the other film layers will be indicated by the same symbol in this application.
[0018] The first surface M1 is the surface of the substrate 10 used to contact other adjacent film layers. The groove structure H1 is formed by recessing the first surface M1 inward and is located within the first region A11, thereby improving the transmittance of the display panel 100 in the first region A11. The substrate 10 may include multiple stacked film layer structures. Based on this, the groove structure H1 can be formed by selectively removing some of the film layer structures in the substrate 10 within the first region A11.
[0019] In some alternative embodiments, the substrate 10 includes a first substrate 11, a first barrier layer 12, a second substrate 13, and a second barrier layer 14 stacked sequentially, with a first surface M1 located on the side of the second barrier layer 14 facing away from the first substrate 11. Furthermore, the first barrier layer 12 has a through-hole in the first region A11, and the second substrate 13 at least partially fills the through-hole of the first barrier layer 12, thereby creating a groove structure H1 on the substrate 10 at the location of the through-hole.
[0020] The first functional layer 20 is located on one side of the first surface M1, that is, the first functional layer 20 is formed after the substrate 10. The first conductor layer 30 is located on the side of the first functional layer 20 away from the substrate 10. The term "away" here does not mean that the distance between the first conductor layer 30 and the substrate 10 in the thickness direction Z of the substrate 10 is greater than the distance between the first functional layer 20 and the substrate 10, but rather indicates that the first conductor layer 30 is formed after the first functional layer 20.
[0021] The specific film positions of the first functional layer 20 and the first conductor layer 30 are not limited in this embodiment, as long as the first conductor layer 30 includes a conductor material and is formed after the first functional layer 20. The first functional layer 20 can be in direct contact with the first surface M1, or it can be spaced apart from the first surface M1. Similarly, the first conductor layer 30 can be in direct contact with the first surface M1, or it can be spaced apart from the first surface M1.
[0022] The first conductor layer 30 includes a first conductor portion 31, which may or may not be used to transmit a specific signal. The first conductor portion 31 is located within the second region A12 and is adjacent to the first region A11. "Adjacent" here means that the first conductor portion 31 is the structure in the first conductor layer 30 closest to the first region A11, and there is a small distance between the first conductor portion 31 and the first region A11. Furthermore, there is a small distance between the first conductor portion 31 and the groove structure H1.
[0023] During the fabrication of the first conductor layer 30, photoresist is used as a sacrificial layer to protect the first conductor portion 31 and assist in the etching and removal of other conductor materials around the first conductor portion 31. Because the photoresist has a certain degree of fluidity, and the first conductor portion 31 is close to the groove structure H1, some of the photoresist that should cover the first conductor portion 31 easily flows into the groove structure H1. This results in a thinner photoresist layer covering the first conductor portion 31, leading to poorer protection of the first conductor portion 31 under the same exposure conditions. This can easily cause the first conductor portion 31 to experience localized width reduction or even breakage.
[0024] In view of this, this embodiment adds a blocking structure 21, which is located within the first functional layer 20, i.e., the blocking structure 21 is formed before the first conductor layer 30. At least a portion of the blocking structure 21 is located between the groove structure H1 and the first conductor portion 31. Thus, during the fabrication of the first conductor layer 30, the presence of the blocking structure 21 can prevent the photoresist material at the location of the first conductor portion 31 from flowing into the groove structure H1, thereby increasing the thickness of the photoresist covering the first conductor portion 31. This improves the protective effect of the photoresist on the first conductor portion 31 and reduces the risk of the first conductor portion 31 becoming excessively narrow or even breaking. This design helps improve the fabrication yield of the display panel 100, and when the first conductor portion 31 is used to transmit specific signals to achieve display functions, it can also enhance the display reliability of the display panel 100.
[0025] It should be noted that the first functional layer 20 can be a film layer structure that already exists in the conventional display panel 100, while the blocking structure 21 is a part of the structure that is additionally retained in the first functional layer 20 by adjusting the fabrication pattern of the first functional layer 20. Alternatively, the first functional layer 20 may not exist in the conventional display panel 100; instead, the first functional layer 20 is an additional film layer structure added on the basis of the conventional display panel 100 by adding fabrication processes.
[0026] Furthermore, for the blocking structure 21, its orthographic projection onto the substrate 10 can be entirely located between the orthographic projection of the first conductor portion 31 onto the substrate 10 and the groove structure H1. That is, in the direction parallel to the plane of the substrate 10, the blocking structure 21 is sandwiched between the groove structure H1 and the first conductor portion 31, and the blocking structure 21 is spaced apart from both the groove structure H1 and the first conductor portion 31. Alternatively, the orthographic projection of the blocking structure 21 onto the substrate 10 can also be partially located between the orthographic projection of the first conductor portion 31 onto the substrate 10 and the groove structure H1, and partially located within the groove structure H1. This embodiment of the application does not impose any limitations on this.
[0027] In some embodiments, please refer to Figures 1 to 4 The blocking structure 21 is disposed around the groove structure H1 in the orthogonal projection of the substrate 10. In other words, the blocking structure 21 exists at different positions on the periphery of the groove structure H1.
[0028] The blocking structure 21, when projected onto the substrate 10, has a ring-shaped structure. This ring-shaped structure can be a square ring, a circular ring, or other regular or irregular rings. Optionally, the shape of the blocking structure 21 is adapted to the shape of the groove structure H1. For example, if the groove structure H1 is circular, the blocking structure 21, when projected onto the substrate 10, will be a circular ring; if the groove structure H1 is square, the blocking structure 21, when projected onto the substrate 10, will be a square ring. Further optionally, the blocking structure 21 is attached to the edge of the first region A11, that is, the blocking structure 21 extends along the edge of the first region A11 to form an end-to-end shape.
[0029] In this embodiment, the blocking structure 21 is arranged to surround the groove structure H1. In this way, during the fabrication of the first conductor layer 30, the presence of the blocking structure 21 can prevent the photoresist from flowing into the groove structure H1 at different positions around the groove structure H1, thereby further increasing the thickness of the photoresist covering the first conductor portion 31, thereby improving the protective effect of the photoresist on the first conductor portion 31 and reducing the risk of the first conductor portion 31 becoming too narrow in some areas or even breaking.
[0030] In some embodiments, such as Figure 3 As shown, the thickness of the barrier structure 21 is greater than the thickness of the first conductor portion 31. Here, "thickness" refers to the dimension of the structure in the thickness direction Z of the substrate 10.
[0031] The thickness of the barrier structure 21 is usually positively correlated with its blocking effect on the fluid. Therefore, in this embodiment, the thickness of the barrier structure 21 is adjusted to be greater than the thickness of the first conductor portion 31, thereby improving the blocking effect of the barrier structure 21 on the photoresist, improving the flow of photoresist at the corresponding position of the first conductor portion 31, and improving the structural reliability of the first conductor portion 31.
[0032] In some embodiments, such as Figure 3 As shown, the blocking structure 21 includes a first sub-part 211 and a second sub-part 212 stacked together. Both the first sub-part 211 and the second sub-part 212 are made of inorganic materials and the materials are different.
[0033] Taking the second sub-part 212 located on the side of the first sub-part 211 facing away from the substrate 10 as an example, the second sub-part 212 is in contact with the surface of the first sub-part 211 facing away from the substrate 10. The orthographic projections of the first sub-part 211 and the second sub-part 212 onto the substrate 10 can completely overlap or partially overlap. Optionally, the orthographic projections of the first sub-part 211 and the second sub-part 212 onto the substrate 10 coincide, and both are formed together using the same etching process.
[0034] The specific material forms of the first sub-part 211 and the second sub-part 212 are not limited in the embodiments of this application. Optionally, the material of the first sub-part 211 includes silicon oxide, and the material of the second sub-part 212 includes silicon nitride. The barrier structure 21 may include only the first sub-part 211 and the second sub-part 212, or it may include other sub-parts. Optionally, the barrier structure 21 includes a third sub-part located on the side of the second sub-part 212 facing away from the substrate 10, and the third sub-part and the second sub-part 212 are made of different materials, while the third sub-part and the first sub-part 211 are made of the same material.
[0035] In this embodiment, the barrier structure 21 is made of inorganic material. Inorganic material itself is good at absorbing water and oxygen, so this design can improve the water and oxygen transfer between the first region A11 and the second region A12, thereby improving the light emission reliability and lifespan of the display panel 100. Considering that a single inorganic film layer usually has a small thickness, the barrier structure 21 is made of a first sub-part 211 and a second sub-part 212 stacked together, so that the barrier structure 21 is formed by stacking at least a portion of the structure of two inorganic film layers. This increases the overall thickness of the barrier structure 21, reduces the risk of photoresist flowing into the groove structure H1 at the corresponding position of the first conductor part 31 during the fabrication of the first conductor layer 30, and improves the structural reliability of the first conductor part 31.
[0036] In some embodiments, such as Figure 3 As shown, the width of the blocking structure 21 is 'a', where 'a' satisfies: 10μm ≤ a ≤ 30μm; and / or, the thickness of the blocking structure 21 is 'b', where 'b' satisfies: 0.5μm ≤ b ≤ 2μm. For example, the value of 'a' is one of 10μm, 15μm, 20μm, 25μm, and 30μm. The value of 'b' is one of 0.5μm, 0.8μm, 1μm, 1.5μm, and 2μm.
[0037] In this embodiment, setting the width 'a' of the barrier structure 21 to not less than 10 μm, or setting the thickness 'b' of the barrier structure 21 to not less than 0.5 μm, can improve the barrier effect of the barrier structure 21 on the fluid, reduce the risk of photoresist material flowing into the groove structure H1 at the corresponding position of the first conductor portion 31 during the fabrication of the first conductor layer 30, and improve the structural reliability of the first conductor portion 31. Setting the width 'a' of the barrier structure 21 to not more than 30 μm can create a certain distance between the barrier structure 21 and the first conductor portion 31, reducing the risk of large step differences near the first conductor portion 31 and improving the fabrication difficulty of the film structure after the first conductor layer 30. Setting the thickness 'b' of the barrier structure 21 to not more than 2 μm helps to reduce the adverse effect of the presence of the barrier structure 21 on the overall thickness of the display panel 100, which is beneficial for thinner and lighter designs.
[0038] In some embodiments, such as Figure 2 and Figure 3 As shown, the blocking structure 21 is positioned in contact with the first surface M1.
[0039] The contact between the barrier structure 21 and the first surface M1 indicates that the fabrication process of the barrier structure 21 is relatively close to the fabrication process of the substrate 10; in fact, the fabrication of the barrier structure 21 and the fabrication of the substrate 10 can be adjacent but different processes. Based on this, the fabrication process of the barrier structure 21 can precede not only the fabrication of the first conductor layer 30, but also the fabrication of multiple other conductor layers in the display panel 100. Therefore, the barrier structure 21 can not only help improve the structural reliability of the first conductor portion 31, but also help improve the structural reliability of the conductor portions near the groove structure H1 in other conductor layers.
[0040] In some embodiments, please refer to Figure 2 , Figure 3 as well as Figure 6 The display panel 100 also includes a second functional layer 40 located on the side of the first functional layer 20 away from the substrate 10. The second functional layer 40 is partially located in the groove structure H1. The second functional layer 40 covers the blocking structure 21. The second functional layer 40 includes a second surface M2 away from the substrate 10 and a protrusion structure 42 protruding relative to the second surface M2. The orthographic projection of the protrusion structure 42 on the substrate 10 overlaps with the orthographic projection of the blocking structure 21 on the substrate 10.
[0041] The second functional layer 40 is formed after the first functional layer 20, and the second functional layer 40 covers the barrier structure 21, that is, the orthogonal projection of the second functional layer 40 onto the substrate 10 covers and extends beyond the orthogonal projection of the barrier structure 21 onto the substrate 10. Optionally, the second functional layer 40 is in contact with the barrier structure 21, that is, the fabrication process of the second functional layer 40 is relatively close to the fabrication process of the first functional layer 20, and the fabrication process of the second functional layer 40 and the fabrication process of the first functional layer 20 can even be adjacent but different processes.
[0042] The second functional layer 40 extends from the second region A12 into the first region A11 and is partially located within the groove structure H1. The orthographic projection of the second functional layer 40 onto the substrate 10 can cover and extend beyond the orthographic projection of the first conductor portion 31 onto the substrate 10. The second functional layer 40 can be formed before the first conductor layer 30, or the second functional layer 40 can be formed after the first conductor layer 30. Figure 6 The diagram shows the case where the second functional layer 40 is formed before the first conductor layer 30. Figure 2 and Figure 3 The diagram shows the second functional layer 400 formed after the first conductor layer 30.
[0043] In some alternative embodiments, with Figure 6 Taking the structure shown as an example, in addition to the first conductor portion 31, the first conductor layer 30 may also include a third conductor portion 32. The third conductor portion 32 can transmit scanning signals or light emission control signals and is used as the control terminal of the transistor.
[0044] It should be noted that the second functional layer 40 may be a single membrane structure, or the second functional layer 40 may include multiple membrane structures stacked together, and the multiple membrane structures in the second functional layer 40 extend from the second region A12 into the first region A11 and are partially located in the groove structure H1.
[0045] The second surface M2 is the surface of the second functional layer 40 facing away from the substrate 10. Since the thickness of the second functional layer 40 can remain consistent at different locations, and the second functional layer 40 can cover the barrier structure 21, the second functional layer 40 protrudes relatively at the corresponding location of the barrier structure 21, forming a protrusion structure 42. In other words, the presence of the barrier structure 21 allows the portion of the film layer formed thereafter to protrude relatively at the corresponding location. Based on this, even if... Figure 6 As shown, the distance between the first conductor portion 31 and the first surface M1 is greater than the distance between the barrier structure 21 and the first surface M1. This means that during the fabrication of the first conductor layer 30, the barrier structure 21 cannot directly block the photoresist on the first conductor portion 31. However, the insulating layer below the first conductor layer 30 protrudes relatively at the corresponding position of the barrier structure 21, thus blocking the flow of the photoresist. Therefore, the presence of the barrier structure 21 indirectly improves the structural reliability of the first conductor portion 31. The principle behind the barrier structure 21's improvement of the structural reliability of conductor portions in other conductor layers is similar, and will not be elaborated further in this embodiment.
[0046] In summary, in the embodiments of this application, the presence of the blocking structure 21 enables other film layers, including the second functional layer 40, to protrude relatively at corresponding positions. As a result, in the direction parallel to the plane of the substrate 10, the part of the conductor structure located in the first region A11 and adjacent to the groove structure H1 can overlap with the corresponding protruding parts on the protruding structure 42 or other film layers. This reduces the risk of photoresist flowing into the corresponding position of the groove structure H1 during the fabrication of the conductor structure, thereby improving the overall fabrication yield of the display panel 100.
[0047] In some embodiments, such as Figure 2As shown, the display panel 100 further includes a third functional layer 50 disposed on the side of the second functional layer 40 facing away from the substrate 10, and a planarization layer 60 disposed on the side of the third functional layer 50 facing away from the substrate 10. The third functional layer 50 includes a via structure H2 located in the first region A11, and the via structure H2 is overlapped with the groove structure H1 in the orthogonal projection of the substrate 10. The planarization layer 60 includes a first portion 61 located in the first region A11 and a second portion 62 located in the second region A12. The first portion 61 fills the via structure H2, and the thickness of the first portion 61 is greater than the thickness of the second portion 62.
[0048] The third functional layer 50 is formed after the second functional layer 40. Unlike the first functional layer 20, the third functional layer 50 does not extend into the groove structure H1. Instead, the third functional layer 50 forms a through-hole structure H2 at the corresponding position of the groove structure H1. This helps to improve the transmittance of the display panel 100 in the first region A11 and enhances the light sensitivity of the display device 200. The third functional layer 50 may be a single film layer structure, or it may include multiple film layer structures stacked together. Optionally, the third functional layer 50 includes a buffer layer 52 and multiple insulating layers stacked along the direction away from the substrate 10.
[0049] Furthermore, as can be seen from the accompanying drawings, the thickness of individual film layers in the third functional layer 50 is generally consistent at different locations. On this basis, any film layer in the third functional layer 50 protrudes relatively at the corresponding position of the blocking structure 21, and the protruding structure is located on the periphery of the through-hole structure H2. Thus, the protruding structure of at least some film layers in the third functional layer 50 can prevent the adhesive material from flowing into the through-hole structure H2, thereby improving the overall manufacturing yield of the display panel 100.
[0050] The planarization layer 60 is formed after the third functional layer 50. The first portion 61 is the part of the planarization layer 60 located within the first region A11, and the second portion 62 is the part of the planarization layer 60 located within the second region A12. The first portion 61 fills the via structure H2, and its thickness is greater than that of the second portion 62. This allows the first portion 61 to better fill the via structure H2, providing a flat surface for subsequent film layer fabrication and reducing the difficulty of fabricating subsequent film layer structures. Optionally, the material transmittance of the planarization layer 60 can be greater than that of the third functional layer 50, thus balancing the need for higher transmittance in the first region A11 with the need for high yield in the display panel 100 fabrication.
[0051] It should be noted that the surfaces of the first portion 61 and the second portion 62 facing away from the substrate 10 can be coplanar and parallel to the plane of the substrate 10. That is, there is no step difference between the first portion 61 and the second portion 62, thereby improving the fabrication difficulty of other films formed after the planarization layer 60. Alternatively, the surfaces of the first portion 61 and the second portion 62 facing away from the substrate 10 can also be located on different planes, but the distance between these two surfaces in the thickness direction Z of the substrate 10 is smaller than the size of the via structure H2. That is, there is a step difference between the first portion 61 and the second portion 62, and this step difference is smaller than the depth of the via structure H2. This can also improve the fabrication difficulty of other films formed after the planarization layer 60.
[0052] In some embodiments, such as Figure 2 and Figure 3 As shown, the first conductor portion 31 is disposed in contact with the first surface M1. The display panel 100 also includes a pixel circuit P located in the second region A12. The plurality of pixel circuits P include a first pixel circuit P1 adjacent to the first region A11. The orthographic projection of the first conductor portion 31 onto the substrate 10 overlaps with the orthographic projection of the first pixel circuit P1 onto the substrate 10.
[0053] The first conductor portion 31 is in contact with the first surface M1, indicating that the first conductor layer 30 is the conductor layer closest to the substrate 10 among all conductor layers. The pixel circuit P is used to drive and control whether the light-emitting structure 811 emits light. Optionally, the display panel 100 also includes an anode structure 82 and a cathode structure 83. The pixel circuit P is electrically connected to the anode structure 82, and the light-emitting structure 811 is sandwiched between the anode structure 82 and the cathode structure 83. In the cross-sectional view of the display panel 100 shown in this embodiment, only the film layer structure between the cathode structure 83 and the substrate 10 is shown. The side of the cathode structure 83 facing away from the substrate 10 may also include various film layers such as an encapsulation layer 90, a touch layer, and a cover plate. This embodiment does not limit this.
[0054] The pixel circuit P can take various forms. For example, the pixel circuit P can be a 7T1C structure, meaning that the pixel circuit P includes seven transistors and a storage capacitor. Alternatively, the pixel circuit P can also be an 8T1C or 8T2C structure, etc. Both the transistors and the storage capacitor include conductor portions disposed in different conductor layers, and the transistors also include active structures located within semiconductor layers. Furthermore, adjacent conductor portions and adjacent conductor portions and active structures can be spaced and insulated by insulating layers in the third functional layer 50.
[0055] All pixel circuits P are located outside the first region A11, thereby reducing the impact of pixel circuits P on the transmittance of the first region A11 and improving the light-sensing accuracy of the display device 200. The pixel circuits P can be correspondingly arranged with the light-emitting structure 811, meaning the orthographic projection of the light-emitting structure 811 onto the substrate 10 overlaps with the orthographic projection of the corresponding pixel circuit P onto the substrate 10. Alternatively, they can be staggered, meaning the orthographic projection of the light-emitting structure 811 onto the substrate 10 is outside the orthographic projection of the corresponding pixel circuit P onto the substrate 10. Optionally, when the first region A11 includes a portion of the light-emitting structure 811, the light-emitting structure 811 located in the second region A12 is arranged with the pixel circuit P, while the light-emitting structure 811 located in the first region A11 is staggered with the pixel circuit P.
[0056] The first pixel circuit P1 is adjacent to the first region A11, meaning that the first pixel circuit P1 is the pixel circuit P closest to the first region A11 among all pixel circuits P. The first conductor portion 31 is overlapped with the first pixel circuit P1, and the first conductor portion 31 can have various functional forms. For example, the first conductor portion 31 can be used to transmit specific signals to the first pixel circuit P1 to meet the operational needs of the first pixel circuit P1. Alternatively, the first conductor portion 31 may not be used for signal transmission, and it may be located on the side of the transistor in the first pixel circuit P1 facing the substrate 10, with the first conductor portion 31 overlapping the orthographic projection of the transistor onto the substrate 10. In this way, the first conductor portion 31 can help block ambient light reflection into the transistor of the first pixel circuit P1, allowing the transistor to operate normally.
[0057] In this embodiment, during the fabrication of the first conductor layer 30, the presence of the blocking structure 21 can prevent the photoresist material at the location of the first conductor portion 31 from flowing into the groove structure H1, thereby increasing the thickness of the photoresist covering the first conductor portion 31. This improves the protective effect of the photoresist on the first conductor portion 31 and reduces the risk of the first conductor portion 31 becoming too narrow in some areas or even breaking. This design can improve the signal transmission reliability of the first conductor portion 31, or increase the overlapping area of the first conductor portion 31 and the transistor of the first pixel circuit P1 on the substrate 10, improving the shielding effect of the first conductor portion 31 on the transistor. In either case, the blocking structure 21 helps to enhance the operational reliability of the first pixel circuit P1.
[0058] In some embodiments, such as Figure 2 and Figure 6As shown, the display panel 100 further includes a first insulating layer 51 disposed on the side of the first conductive layer 30 facing away from the substrate 10, and a second conductive layer 70 disposed on the side of the first insulating layer 51 facing away from the substrate 10. The second conductive portion 71 includes a second conductive portion 71 disposed within the second region A12 and adjacent to the first region A11. At least a portion of the blocking structure 21 in the orthographic projection of the substrate 10 is located between the orthographic projection of the second conductive portion 71 on the substrate 10 and the groove structure H1.
[0059] The second conductor layer 70 is located on the side of the first conductor layer 30 facing away from the substrate 10. Other conductor layers may exist between the first conductor layer 30 and the second conductor layer 70, or they may be adjacent conductor layers; this embodiment does not limit this. A first insulating layer 51 is disposed between the first conductor layer 30 and the second conductor layer 70. The second conductor layer 70 may be in contact with the first conductor layer 30. The first insulating layer 51 provides insulation between the second conductor layer 70 and other film layers facing the substrate 10. Optionally, the first insulating layer 51 is located within the third functional layer 50, and the orthogonal projection of the first insulating layer 51 onto the substrate 10 is completely outside the groove structure H1.
[0060] The second conductor layer 70 includes a second conductor portion 71, which may or may not be used to transmit a specific signal. The second conductor portion 71 is located within the second region A12 and is disposed adjacent to the first region A11. Here, "adjacent" means that the second conductor portion 71 is the structure in the second conductor layer 70 closest to the first region A11, and there is a small distance between the second conductor portion 71 and the second region A12. Furthermore, there is a small distance between the second conductor portion 71 and the groove structure H1.
[0061] In this embodiment, the blocking structure 21 can prevent the photoresist material at the location of the first conductor portion 31 from flowing into the groove structure H1 during the fabrication of the first conductor layer 30, thereby improving the structural reliability of the first conductor portion 31. Furthermore, the presence of the blocking structure 21 causes the first insulating layer 51 to protrude relatively at the corresponding location, thus preventing the photoresist material at the location of the second conductor portion 71 from flowing into the groove structure H1 during the fabrication of the second conductor layer 70, thereby improving the structural reliability of the second conductor portion 71.
[0062] In some embodiments, such as Figure 2As shown, the pixel circuit P includes a first transistor T1 and a second transistor T2. The first transistor T1 includes a first active structure Y1, and the second transistor T2 includes a second active structure Y2. The second active structure Y2 is located on the side of the first active structure Y1 that faces away from the substrate 10. The orthographic projection of the first conductor portion 31 onto the substrate 10 overlaps with the orthographic projection of the first active structure Y1 onto the substrate 10, and the orthographic projection of the second conductor portion 71 onto the substrate 10 overlaps with the orthographic projection of the second active structure Y2 onto the substrate 10.
[0063] The active structures in the first transistor T1 and the second transistor T2 are located in different semiconductor layers. The first active structure Y1 in the first transistor T1 is positioned closer to the substrate 10 than the second active structure Y2 in the second transistor T2. Therefore, the first active structure Y1 and the second active structure Y2 are made of different materials. Optionally, the material of the first active structure Y1 includes low-temperature polycrystalline silicon, and the material of the second active structure Y2 includes metal oxide.
[0064] The first conductor portion 31 is located on the side of the first active structure Y1 facing the substrate 10, and the second conductor portion 71 is located on the side of the second active structure Y2 facing the substrate 10. Optionally, the first conductor portion 31 is not used for signal transmission; that is, the first conductor portion 31 is only used to shield the first active structure Y1 to reduce the adverse effects of ambient light reflection on the first transistor T1. The second conductor portion 71 is used to transmit a specific signal, and the second transistor T2 also includes other conductor structures located on the side of the second active structure Y2 away from the substrate 10. These conductor structures transmit the same signal as the second conductor portion 71 to achieve dual-gate driving of the second transistor T2.
[0065] In some alternative embodiments, the display panel 100 further includes a third conductor layer located between the first conductor layer 30 and the second conductor layer 70. The control terminal of the first transistor T1 is located within the third conductor layer, and the storage capacitor includes a first sub-electrode and a second sub-electrode, with the first sub-electrode located within the third conductor layer and the second sub-electrode located within the second conductor layer 70.
[0066] As can be seen from the foregoing, the blocking structure 21 can improve the structural reliability of the first conductor portion 31 and the second conductor portion 71. This design can reduce the amount of ambient light reflected onto the first active structure Y1, thereby improving the operational stability of the first transistor T1. Furthermore, it can improve the width consistency of the second conductor portion 71 at different locations, reducing the risk of excessive resistance due to localized excessive narrowness, improving the reliability of signal transmission within the second conductor portion 71, and enhancing the response rate of the second transistor T2.
[0067] In some embodiments, such as Figure 2 and Figure 3As shown, the display panel 100 also includes a second insulating layer 41 disposed on the side of the first conductor layer 30 away from the substrate 10. The orthographic projection of the second insulating layer 41 on the substrate 10 covers the orthographic projection of the blocking structure 21 on the substrate 10, and both the first conductor portion 31 and the blocking structure 21 are disposed in contact with the second insulating layer 41.
[0068] The second insulating layer 41 is an insulating layer that is in direct contact with the first conductor layer 30, and is formed after the first conductor layer 30 and the first functional layer 20. In conjunction with the foregoing embodiments, the second functional layer 40 includes the second insulating layer 41, which extends from the second region A12 into the first region A11 and is partially located within the groove structure H1.
[0069] In this embodiment, the second insulating layer 41 is simultaneously in contact with both the first conductor portion 31 and the blocking structure 21, thus providing insulation protection for both. Furthermore, the second insulating layer 41 often has the same or similar thickness at different locations. This design allows the second insulating layer 41 to protrude relatively at the corresponding position on the blocking structure 21, thereby helping the second functional layer 40 and the third functional layer 50 to also protrude relatively at their corresponding positions. This improves the structural reliability of the other conductor layers near the first region A11.
[0070] In some embodiments, such as Figure 4 and Figure 5 As shown, the display panel 100 also includes a first signal line S, which is located on the side of the first conductor layer 30 facing away from the substrate 10. The first signal line S includes a first sub-segment S1, a second sub-segment S2, and a winding segment S3. The orthographic projections of the first sub-segment S1 and the second sub-segment S2 onto the substrate 10 are located on both sides of the first region A11 along the first direction X. The winding segment S3 connects the first sub-segment S1 and the second sub-segment S2. The orthographic projection of the winding segment S3 onto the substrate 10 is disposed on the periphery of the groove structure H1, and the orthographic projection of the blocking structure 21 onto the substrate 10 is located between the orthographic projections of the winding segment S3 onto the substrate 10.
[0071] The first signal line S is a trace structure used to transmit a specific signal. For example, the first signal line S is used to transmit one of a scanning signal and a light emission control signal, and the first signal line S overlaps with the orthographic projection of the first active structure Y1 on the substrate 10, so that a portion of the structure in the first signal line S can be reused as the control terminal of the first transistor T1.
[0072] Both the first sub-segment S1 and the second sub-segment S2 extend along the first direction X and are located on both sides of the first region A11 along the first direction X. Optionally, multiple pixel circuits P arranged in the first direction X together form a circuit row, and the first sub-segment S1 and the second sub-segment S2 are correspondingly set with different pixel circuits P in the same circuit row.
[0073] The winding segment S3 connects the first sub-segment S1 and the second sub-segment S2, and is located on the periphery of the groove structure H1. The shape of the winding segment S3 can match the shape of the groove structure H1. For example, if the groove structure H1 is circular, at least a portion of the winding segment S3 can extend in an arc shape. Alternatively, if the groove structure H1 is square, at least a portion of the winding segment S3 can extend in a zigzag shape.
[0074] It should be noted that the winding segment S3 can be set in the same layer as the first sub-segment S1 and the second sub-segment S2, or it can be set in a different layer. Optionally, the winding part is in the same layer as the first sub-segment S1 and the second sub-segment S2, and the first sub-segment S1, the second sub-segment S2 and the third sub-segment are all located in the third conductor layer.
[0075] In this embodiment, the blocking structure 21 is located between the winding segment S3 and the groove structure H1. As a result, the insulating layer on the side of the first signal line S facing the substrate 10 can protrude relatively between the winding segment S3 and the groove structure H1. This prevents the photoresist covering the winding segment S3 from flowing into the groove structure H1 during the fabrication of the first signal line S, thereby improving the structural reliability of the winding segment S3 and enhancing the transmission reliability of the signal corresponding to the first signal line S.
[0076] In some optional embodiments, the multiple first signal lines S include multiple first scan lines and multiple second scan lines, which are alternately arranged in the second direction Y. One circuit row corresponds to one first scan line and one second scan line, and the second scan line corresponding to one of every two adjacent circuit rows is electrically connected to the first scan line corresponding to the other circuit row. Furthermore, the winding segment S3 of both the first scan line and the second scan line is located on the side of the blocking structure 21 away from the groove structure H1.
[0077] In some embodiments, the width of the first sub-segment S1 is W1, and the width of the winding segment S3 is W2, wherein W1 and W2 satisfy: (W1-W2) / W1≤5%. Optionally, the value of (W1-W2) / W1 is one of 0, 0.01, 0.02, 0.04, and 0.05.
[0078] As can be seen from the foregoing, since the blocking structure 21 is located between the winding segment S3 and the groove structure H1, the winding segment S3 can be covered and protected by a large amount of photoresist during the fabrication of the first signal line S. This improves the structural reliability of the winding segment S3 and reduces the possibility of the winding segment S3 being too narrow. This design can improve the width difference between the winding segment S3 and the first sub-segment S1 and the second sub-segment S2, ensuring that (W1-W2) / W1 is no greater than 5%, thus enhancing the transmission reliability of the signal corresponding to the first signal line S.
[0079] In some embodiments, such as Figure 2 As shown, the display panel 100 also includes a pixel circuit P located in the second region A12. The multiple pixel circuits P include a first pixel circuit P1 adjacent to the first region A11. The distance D1 between the orthographic projection of the first pixel circuit P1 onto the substrate 10 and the orthographic projection of the blocking structure 21 onto the substrate 10 is equal to the distance D2 between the orthographic projection of the blocking structure 21 onto the substrate 10 and the groove structure H1.
[0080] As can be seen from the accompanying drawings, the distance D1 between the first pixel circuit P1 and the blocking structure 21 can be the distance between the conductor structure in the first pixel circuit P1 closest to the first region A11 and the edge of the blocking structure 21 facing away from the first region A11. The distance D2 between the blocking structure 21 and the groove structure H1 can be the distance between the edge of the blocking structure 21 facing the first region A11 and the edge of the groove structure H1 closest to the blocking structure 21.
[0081] In this embodiment, the blocking structure 21 is centrally located relative to the first pixel circuit P1 and the groove structure H1. This ensures that the blocking structure 21 is neither too close to the groove structure H1 nor too close to the first pixel circuit P1. This reduces the impact of the blocking structure 21 on the wiring layout design of the first pixel circuit P1 and minimizes interference with the corresponding photosensing function of the display device 200. Furthermore, this design minimizes the distance between the first conductor portion 31 and the blocking structure 21. During the fabrication of the first conductor layer 30, the blocking structure 21 effectively blocks the photoresist covering the first conductor portion 31, improving the structural reliability of the first conductor portion 31.
[0082] In some embodiments, such as Figure 2 and Figure 3 As shown, the distance between the orthographic projection of the first conductor portion 31 onto the substrate 10 and the groove structure L1 is L1, where L1 satisfies: 100μm≤L1≤200μm. For example, the value of L1 is one of 100μm, 120μm, 150μm, 180μm, and 200μm.
[0083] In this embodiment, the first conductor portion 31 is a conductor structure located within the second region A12. Therefore, the distance between it and the groove structure H1 is not less than 100 μm. However, since the first conductor portion 31 and the groove structure H1 are adjacent to each other, the distance between them is not greater than 200 μm. Therefore, the groove structure H1 can easily have an adverse effect on the formation of the first conductor portion 31. However, the presence of the blocking structure 21 can improve the structural reliability of the first conductor portion 31, reduce the risk of the first conductor portion 31 becoming too narrow in some areas or even breaking, and improve the reliability of the display panel 100.
[0084] In some embodiments, please refer to Figure 7 The display panel 100 also includes a light-emitting device layer 81, which includes a plurality of light-emitting structures 811, including a first light-emitting structure 811a located within the first region A11. The orthogonal projection of the first light-emitting structure 811a onto the substrate 10 is located outside the orthogonal projection of the blocking structure 21 onto the substrate 10.
[0085] The light-emitting device layer 81 includes both a first light-emitting structure 811a located in the first region A11 and a second light-emitting structure 811b located in the second region A12, thereby enabling the display panel 100 to achieve a light-emitting display effect in both the first region A11 and the second region A12. The light-emitting structure 811 in the first region A11 is offset from the corresponding pixel circuit P, and a conductive portion exists between them. This conductive portion extends from the second region A12 into the first region A11, thereby achieving an electrical connection between the anode corresponding to the light-emitting structure 811 in the first region A11 and the pixel circuit P.
[0086] In this embodiment, the first light-emitting structure 811a and the blocking structure 21 are both located in the first region A11 and are staggered. This reduces the adverse effect of the blocking structure 21 on the light-emitting effect of the first light-emitting structure 811a. Furthermore, since the second light-emitting structure 811b is also staggered with the blocking structure 21, this design helps to improve the display uniformity of the display panel 100 in the first region A11 and the second region A12, thereby improving the user experience.
[0087] In some alternative embodiments, the conductive portion is located on the side of the planarization layer 60 opposite to the substrate 10. This allows the planarization layer 60 to provide a flat surface for the fabrication of the conductive portion, thereby improving the structural reliability of the conductive portion. Optionally, the orthographic projection of the conductive portion onto the substrate 10 overlaps with the orthographic projection of the barrier structure 21 onto the substrate 10. The barrier structure 21 does not significantly affect the fabrication process or structural morphology of the conductive portion.
[0088] In some embodiments, please refer to Figure 1 , Figure 2 as well as Figure 8The display panel 100 includes a central area A1 and a border area A2 located around the central area A1. The central area A1 includes a first area A11 and a second area A12. The display panel 100 also includes a dam structure B located within the border area A2. The first functional layer 20 includes a raised portion 22 located within the dam structure B.
[0089] The border area A2 is located around the center area A1. The border area A2 does not contain a light-emitting structure 811 and is used for arranging wiring and other structures. The center area A1 includes a first area A11 and a second area A12, and the border area A2 is located around the first area A11. Optionally, the shape of the border area A2 matches the outer contour of the second area A12. For example, if the outer contour of the second area A12 is circular, then the border area A2 is annular. Alternatively, if the outer contour of the second area A12 is square, then the border area A2 is square-ringed.
[0090] The dam structure B is located within the frame area A2 and serves to prevent overflow. Specifically, the display panel 100 includes an encapsulation layer 90, which includes a first inorganic layer 91, a second inorganic layer 92, and an organic layer 93 sandwiched between the first inorganic layer 91 and the second inorganic layer 92. The material of the organic layer 93 is fluid and extends from the central area A1 to the frame area A2. Based on this, the dam structure B can prevent the organic layer 93 from overflowing.
[0091] The dam structure B can be formed by stacking portions of multiple membrane structures. For example, the portion of the planarization layer 60 located within the border area A2 can be used to form the dam structure B. The display panel 100 also includes a pixel definition layer that encloses and forms pixel openings to accommodate the light-emitting structure 811. The portion of the pixel definition layer located within the border area A2 can also be used to form the dam structure B.
[0092] Furthermore, in this embodiment, the first functional layer 20 includes not only the blocking structure 21, but also a raised portion 22 located in the border area A2. The blocking structure 21 and the raised portion 22 are made of the same material and are formed together in the same process. The raised portion 22 is used to form the dam structure B, which helps to increase the height of the dam structure B and enhance the overflow blocking effect of the dam structure B.
[0093] Secondly, please refer to Figure 9 , Figures 10a to 10c This application provides a method for manufacturing a display panel 100, the display panel 100 having a first region A11 and a second region A12. The manufacturing method includes: S100: Removal of a portion of the structure located in the first region A11 of the substrate 10.
[0094] Please see Figure 10aIn step S100, a groove structure H1 is formed within the first region A11 by removing a portion of the structure within the first region A11. Optionally, the substrate 10 includes a first substrate 11, a first barrier layer 12, a second substrate 13, and a second barrier layer 14 stacked sequentially. The groove structure H1 is formed by removing a portion of the structure of the first barrier layer 12 within the first region A11.
[0095] S110: A barrier structure 21 is formed on one side of the substrate 10.
[0096] Please see Figure 10b In step S110, the blocking structure 21 is located within the first region A11, and the orthogonal projection of the blocking structure 21 onto the substrate 10 is located outside the groove structure H1. The blocking structure 21 can be formed using a photomask and an exposure etching process. Optionally, the blocking structure 21 is arranged to surround the groove structure H1, meaning the blocking structure 21 has a ring-shaped structure in its orthogonal projection onto the substrate 10.
[0097] S120: A first conductor portion 31 is formed on one side of the substrate 10.
[0098] In step S120, the first conductor portion 31 is located within the second region A12 and adjacent to the first region A11. At least a portion of the blocking structure 21 in the orthographic projection of the substrate 10 is located between the orthographic projection of the substrate 10 and the groove structure H1. Optionally, a full-surface conductor material layer can be formed first, then photoresist can be formed on the side of the conductor material layer away from the substrate 10. Subsequently, a local area in the photoresist is exposed and etched to expose a portion of the structure in the conductor material layer. Finally, the exposed portion of the conductor material layer is removed by etching to form the first conductor portion 31.
[0099] In this embodiment, during the fabrication of the first conductor layer 30, the presence of the blocking structure 21 can prevent the photoresist material at the location of the first conductor portion 31 from flowing into the groove structure H1, thereby increasing the thickness of the photoresist covering the first conductor portion 31. This improves the protective effect of the photoresist on the first conductor portion 31 and reduces the risk of the first conductor portion 31 becoming too narrow in some areas or even breaking. This design helps improve the fabrication yield of the display panel 100, and when the first conductor portion 31 is used to transmit specific signals to achieve display functions, it can also enhance the display reliability of the display panel 100.
[0100] Secondly, please refer to Figure 11 This application provides a display device 200, which includes a display panel 100 as described in any of the foregoing embodiments.
[0101] The display device 200 provided in this application embodiment has the beneficial effects of the display panel 100 in any of the foregoing embodiments. For details, please refer to the foregoing description of the beneficial effects of the display panel 100. This application embodiment will not repeat the details.
[0102] While the embodiments disclosed in this application are as described above, the content is merely for the purpose of facilitating understanding of this application and is not intended to limit the invention. Any person skilled in the art to which this application pertains may make any modifications and changes in form and detail of the implementation without departing from the spirit and scope disclosed in this application; however, the scope of protection of this application shall still be determined by the scope defined in the appended claims.
[0103] The above description is merely a specific embodiment of this application. Those skilled in the art will clearly understand that, for the sake of convenience and brevity, substitutions for other connection methods described above can be made by referring to the corresponding processes in the foregoing method embodiments, and will not be repeated here. It should be understood that the scope of protection of this application is not limited thereto. Any person skilled in the art can easily conceive of various equivalent modifications or substitutions within the technical scope disclosed in this application, and these modifications or substitutions should all be covered within the scope of protection of this application.
Claims
1. A display panel, characterized in that, The display panel has a first area and a second area, wherein the transmittance of the first area is greater than the transmittance of the second area, and the display panel includes: The substrate includes a first surface and a groove structure formed by recesses in the first surface, the groove structure being located within the first region; A first functional layer is located on one side of the first surface of the substrate, and the first functional layer includes a barrier structure disposed in the first region; A first conductor layer is located on the side of the first functional layer away from the substrate, and the first conductor layer includes a first conductor portion located within the second region and adjacent to the first region; Wherein, the obstruction structure is located outside the groove structure in the orthogonal projection of the substrate, and at least a portion of the obstruction structure in the orthogonal projection of the substrate is located between the orthogonal projection of the first conductor portion on the substrate and the groove structure.
2. The display panel according to claim 1, characterized in that, The barrier structure is arranged to surround the groove structure in the orthogonal projection of the substrate.
3. The display panel according to claim 1, characterized in that, The thickness of the blocking structure is greater than the thickness of the first conductor portion.
4. The display panel according to claim 3, characterized in that, The blocking structure includes a first sub-part and a second sub-part stacked together. Both the first sub-part and the second sub-part are made of inorganic materials, but the materials are different.
5. The display panel according to claim 3, characterized in that, The width of the blocking structure is a, where a satisfies: 10μm ≤ a ≤ 30μm; and / or, The thickness of the barrier structure is b, and b satisfies: 0.5μm≤b≤2μm.
6. The display panel according to claim 1, characterized in that, The blocking structure is positioned in contact with the first surface.
7. The display panel according to claim 6, characterized in that, It also includes a second functional layer located on the side of the first functional layer opposite to the substrate, and the second functional layer is partially located in the groove structure; The second functional layer covers the barrier structure and includes a second surface facing away from the substrate and a protrusion structure protruding relative to the second surface. The orthographic projection of the protrusion structure onto the substrate overlaps with the orthographic projection of the barrier structure onto the substrate.
8. The display panel according to claim 7, characterized in that, It also includes a third functional layer disposed on the side of the second functional layer away from the substrate, and a planarization layer located on the side of the third functional layer away from the substrate. The third functional layer includes a via structure located in the first region. The via structure is disposed overlapping the groove structure in the orthographic projection on the substrate. The planarization layer includes a first portion located in the first region and a second portion located in the second region. The first portion fills the through-hole structure, and the thickness of the first portion is greater than the thickness of the second portion.
9. The display panel according to claim 6, characterized in that, The first conductor portion is disposed in contact with the first surface, and the display panel further includes a pixel circuit located in the second area, wherein the plurality of pixel circuits includes a first pixel circuit adjacent to the first area; Wherein, the orthographic projection of the first conductor portion on the substrate overlaps with the orthographic projection of the first pixel circuit on the substrate.
10. The display panel according to claim 9, characterized in that, It also includes a first insulating layer disposed on the side of the first conductor layer away from the substrate, and a second conductor layer disposed on the side of the first insulating layer away from the substrate, the second conductor layer including a second conductor portion disposed within the second region and adjacent to the first region; Wherein, at least a portion of the blocking structure in the orthographic projection of the substrate is located between the orthographic projection of the second conductor portion on the substrate and the groove structure.
11. The display panel according to claim 10, characterized in that, The pixel circuit includes a first transistor and a second transistor. The first transistor includes a first active structure, and the second transistor includes a second active structure. The second active structure is located on the side of the first active structure that is away from the substrate. Wherein, the orthographic projection of the first conductor portion on the substrate overlaps with the orthographic projection of the first active structure on the substrate, and the orthographic projection of the second conductor portion on the substrate overlaps with the orthographic projection of the second active structure on the substrate.
12. The display panel according to claim 9, characterized in that, It also includes a second insulating layer disposed on the side of the first conductor layer away from the substrate, wherein the orthogonal projection of the second insulating layer on the substrate covers the orthogonal projection of the blocking structure on the substrate, and both the first conductor portion and the blocking structure are disposed in contact with the second insulating layer.
13. The display panel according to claim 1, characterized in that, It also includes a first signal line, which is located on the side of the first conductor layer away from the substrate. The first signal line includes a first sub-segment, a second sub-segment, and a winding segment. The first sub-segment and the second sub-segment are located on both sides of the first region along a first direction when projected onto the substrate. The winding segment connects the first sub-segment and the second sub-segment. Wherein, the orthographic projection of the winding segment on the substrate is disposed on the periphery of the groove structure, and the orthographic projection of the blocking structure on the substrate is located between the orthographic projection of the winding segment on the substrate and the groove structure.
14. The display panel according to claim 13, characterized in that, The width of the first sub-segment is W1, and the width of the winding segment is W2. W1 and W2 satisfy: (W1-W2) / W1≤5%.
15. The display panel according to claim 1, characterized in that, It also includes pixel circuits located in the second region, and the plurality of pixel circuits include a first pixel circuit adjacent to the first region, wherein the distance between the orthographic projection of the first pixel circuit on the substrate and the orthographic projection of the blocking structure on the substrate is equal to the distance between the orthographic projection of the blocking structure on the substrate and the groove structure.
16. The display panel according to claim 1, characterized in that, The distance between the orthographic projection of the first conductor portion onto the substrate and the groove structure is L1, where L1 satisfies: 100μm≤L1≤200μm.
17. The display panel according to claim 1, characterized in that, It also includes a light-emitting device layer, which includes a plurality of light-emitting structures, the plurality of light-emitting structures including a first light-emitting structure located in the first region; Wherein, the orthogonal projection of the first light-emitting structure onto the substrate is located outside the orthogonal projection of the blocking structure onto the substrate.
18. The display panel according to claim 17, characterized in that, The display panel includes a central area and a border area located around the central area. The central area includes a first area and a second area. The display panel also includes a dam structure located within the border area. The first functional layer includes a raised portion located within the dam structure.
19. A method for manufacturing a display panel, characterized in that, The display panel has a first area and a second area, and the manufacturing method includes: A portion of the structure located within the first region of the substrate is removed to form a groove structure within the first region of the substrate. A barrier structure is formed on one side of the substrate, the barrier structure is located within the first region, and the orthogonal projection of the barrier structure onto the substrate is outside the groove structure; A first conductor portion is formed on one side of the substrate, the first conductor portion being located within and adjacent to the second region, and at least a portion of the blocking structure in the orthographic projection of the substrate is located between the orthographic projection of the first conductor portion on the substrate and the groove structure.
20. A display device, characterized in that, Includes the display panel as described in any one of claims 1 to 18.