Wafer cooling apparatus for efem

CN122935154APending Publication Date: 2026-10-16盛吉盛(韩国)半导体科技有限公司
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Patent Information

Application Number
CN202510416033.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-04-03
Publication Date
2026-10-16

AI Technical Summary

Benefits of technology

[0026]如上所述,根据本发明的EFEM的晶片冷却装置为,通过提高晶片冷却性能,在排出所述晶片W的情况下,可防止由热冲击带来的损伤,并且缩短所述晶片W的冷却时间,因此可提高生产率。

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention relates to a wafer cooling device of an EFEM, comprising: an outer housing provided at a side wall surface of the EFEM; a wafer rack provided inside the outer housing and formed with a plurality of slots to store wafers inserted from the inside of the EFEM; a baffle provided at the rear of the wafer rack and formed with a plurality of baffle holes corresponding one-to-one to the gaps between the wafers inserted into the plurality of slots; an inner housing provided at the rear of the wafer rack to form a suction space at the rear area of the wafer rack; a suction source to form an air flow moving from the inner space of the EFEM to the suction space through the gaps between the wafers to forcibly cool the wafers; and an exhaust pipe connected to the suction space to discharge the air flow to the outside of the suction space; thus, improving wafer cooling performance, further preventing wafer damage by thermal shock when discharging the wafers, and shortening wafer cooling time, which can improve wafer productivity.
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Description

Technical Field

[0001] The present invention relates to a wafer cooling apparatus for an EFEM (Extremely High Temperature Semiconductor), and more specifically, to a wafer cooling apparatus for an EFEM capable of rapidly cooling a high-temperature wafer discharged from a semiconductor manufacturing facility to a suitable level for discharge to a normal temperature environment. Background Technology

[0002] An EFEM (Equipment Front-End Module) is a device used to deliver wafers to or from semiconductor manufacturing equipment (which consists of loading and locking chambers, transfer modules, process chambers, etc.) and is located at the front end of semiconductor manufacturing equipment.

[0003] According to existing technology, if a wafer is transferred to the EFEM after a predetermined process is performed in the high-temperature environment of the process chamber, and then immediately discharged to the normal-temperature environment outside the EFEM, it may be damaged by thermal shock caused by the temperature difference.

[0004] On the other hand, according to the prior art, a cooling station space is configured on the inner side of the EFEM to store the wafer for a predetermined time to cool it to a suitable temperature for discharge.

[0005] The cooling station is configured to load and place the wafers at predetermined intervals within the wafer racks arranged inside the EFEM, allowing the wafers to cool naturally over time.

[0006] However, in the cooling station according to the prior art, high-temperature wafers are stored with a narrow spacing (about 10 mm), so thermal radiation occurs between the wafers, and air flow stagnates only by natural convection. Therefore, the wafers cool down very slowly. Moreover, there is a problem that the wafers cool down even more slowly after a predetermined time.

[0007] Therefore, in the cooling station according to the prior art, the time required to cool the wafer increases, resulting in a delay in EFEM wafer ejection, which affects the process of the equipment and the transfer of wafers to subsequent processes, thus causing a problem of reduced overall productivity.

[0008] Prior art refers to technical information that the inventor possesses in order to derive this invention, or that is obtained in the process of deriving this invention, and is not necessarily publicly known technology that was disclosed to the general public before the application for this invention.

[0009] (Existing technical literature)

[0010] (Patent Documents)

[0011] (Patent Document 1) Korean Utility Model Publication No. 20-2000-0016795 (Published on September 25, 2000) Summary of the Invention

[0012] Technical problems to be solved

[0013] In order to solve the above problems, the present invention aims to provide a wafer cooling device for EFEM, which improves wafer cooling performance, thereby preventing wafer damage caused by thermal shock when the wafer is discharged, and shortening the cooling time, thereby improving wafer productivity.

[0014] The problems to be solved by the present invention are not limited to those mentioned above. Those skilled in the art to which this invention pertains can clearly understand from the following description other problems not mentioned.

[0015] Problem-solving methods

[0016] According to an embodiment of the present invention, an EFEM wafer cooling device includes: an outer housing disposed on one side wall of the EFEM; a wafer holder disposed inside the outer housing and having a plurality of slots formed therein for storing wafers inserted from the inside of the EFEM; a baffle disposed behind the wafer holder and having a plurality of baffle holes formed therein, the plurality of baffle holes corresponding one-to-one with the gaps between the wafers inserted into the plurality of slots; an inner housing disposed behind the wafer holder and having an air intake space formed in the rear region of the wafer holder; an air intake source that forms an airflow moving from the inside space of the EFEM to the air intake space through the gaps between the wafers, thereby forcibly cooling the wafers; and an exhaust pipe connected to the air intake space to discharge the airflow to the outside of the air intake space.

[0017] According to one embodiment, the air intake source may be an air intake fan disposed in the air intake space.

[0018] According to one embodiment, the intake source may be an exhaust duct of a factory equipped with semiconductor manufacturing equipment.

[0019] According to one embodiment, the inner housing can be connected to the exhaust duct of a factory equipped with semiconductor manufacturing equipment via the exhaust pipe.

[0020] According to one embodiment, the baffle is configured such that, based on the temperature distribution of the wafers stored in the wafer rack, the plurality of baffle holes form mutually different areas, and the areas of the plurality of baffle holes are proportional to the temperatures of the wafers corresponding to the plurality of baffle holes respectively.

[0021] According to one embodiment, the baffle is formed by having all of the plurality of baffle holes having the same area, and a cover block is inserted at both ends of each of the plurality of baffle holes, so that the area of ​​the plurality of baffle holes can be adjusted according to the area of ​​the cover block.

[0022] According to one embodiment, the baffle is such that all of the plurality of baffle holes have the same area, and an adjustment plate is provided on the outer side of both ends of each of the plurality of baffle holes. The adjustment plate is formed with an elongated hole and is fixed to the baffle by bolts inserted through the elongated holes. The area of ​​the plurality of baffle holes can be adjusted by adjusting the lateral fixed position of the adjustment plate.

[0023] According to one embodiment, the wafer rack has a support frame protruding at the front, and a diffuser is disposed on the support frame. The diffuser can be connected to an inert gas supply source of a factory equipped with semiconductor manufacturing equipment via a supply pipe.

[0024] According to one embodiment, the supply pipe may have a cooling device configured in the middle section to cool the inert gas.

[0025] The effects of the invention

[0026] As described above, the wafer cooling apparatus of the EFEM according to the present invention can improve wafer cooling performance, prevent damage caused by thermal shock when the wafer W is discharged, and shorten the cooling time of the wafer W, thereby improving productivity.

[0027] The effects of the present invention are not limited to those mentioned above. Those skilled in the art to which this invention pertains can clearly understand other effects not mentioned from the following description. Attached Figure Description

[0028] Figure 1 This is a front view of an EFEM (Electronic Front End Imager) applicable to a wafer cooling apparatus according to an embodiment of the present invention.

[0029] Figure 2 This is a perspective view showing the state of a wafer loaded in a cooling station formed inside the EFEM according to an embodiment of the present invention.

[0030] Figure 3 This is a structural diagram showing the state in which a wafer cooling device is arranged inside the EFEM according to an embodiment of the present invention.

[0031] Figure 4 As a wafer temperature-time graph illustrating the cooling state of a wafer mounted on a wafer rack in the EFEM according to an embodiment of the present invention, (a) is a prior art graph, and (b) is a graph for an embodiment of the present invention.

[0032] Figure 5 The figure shown is a side view of the wafer rack that loads the wafers, illustrating an embodiment of the baffle holes according to the temperature distribution of the wafers loaded in the wafer rack of the EFEM according to an embodiment of the present invention.

[0033] Figure 6 The figure shown is a rear view of an embodiment illustrating a baffle hole forming a right-angled quadrilateral in the baffle of the wafer carrier according to the temperature distribution of a wafer mounted on the wafer carrier in the EFEM according to an embodiment of the present invention.

[0034] Figure 7 This is a diagram showing the baffle hole formed by a plurality of through holes in a baffle disposed behind the wafer carrier of the EFEM according to an embodiment of the present invention.

[0035] Figure 8 This is a rear view showing an embodiment in which the baffle of the wafer carrier of the EFEM according to an embodiment of the present invention forms right-angled quadrilateral baffle holes of the same area.

[0036] Figure 9 This is a diagram illustrating a method for adjusting the area of ​​the baffle hole using a cover block in the baffle of the EFEM according to an embodiment of the present invention.

[0037] Figure 10 This is a diagram illustrating a method for adjusting the area of ​​the baffle hole using the adjusting plate of the EFEM according to an embodiment of the present invention.

[0038] (Explanation of reference numerals in the attached diagram)

[0039] 1: EFEM 2: FFU

[0040] 3: Cooling station 10: External casing

[0041] 20: Wafer rack 21: Slot

[0042] 22: Support frame; 30: Baffle

[0043] 31: Baffle hole; 31a: Hole

[0044] 32: Cover block; 33: Adjustment plate

[0045] 33a: elongated hole; 33b: bolt

[0046] 40: Internal and external shells 41: Intake space

[0047] 50: Intake fan; 60: Exhaust duct

[0048] 70: Exhaust pipe; 80: Damper

[0049] 91: First pressure sensor; 92: Second pressure sensor

[0050] 101: First temperature sensor; 102: Second temperature sensor

[0051] 110: Diffuser 120: Supply pipe

[0052] 130: Inert gas supply source; 140: Cooling device

[0053] W: Chip Detailed Implementation

[0054] In this invention, the accompanying drawings may be exaggerated to facilitate differentiation from, clarity of, and mastery of the prior art. Furthermore, the terminology used below is defined in consideration of the functionality within this invention and may vary depending on the user's, operator's, or customary practice; therefore, these terms should be defined based on the technical content of the entire specification. On the other hand, the embodiments are merely exemplary examples of structural elements presented within the scope of this invention and do not limit the scope of the invention, which should be interpreted based on the technical concept presented in the entire specification.

[0055] In the full text of the specification, when a structure "includes" another structure, unless specifically opposed, it means that other structures may also be included, without excluding the remaining structures.

[0056] Furthermore, when one structure is "connected," "linked," or "combined" with another structure, it implies a situation of "direct connection," "direct linking," or "direct combination," and it can also mean "connected with other structures in between," "linked with other structures in between," or "combined with other structures in between." Conversely, when one structure is "directly connected," "directly linked," or "directly combined" with another structure, it should be understood that there are no other structures in between.

[0057] Furthermore, when directional terms such as “front,” “back,” “up,” “down,” “left,” “right,” “one end,” “the other end,” and “both ends” are used, they are used exemplarily in relation to the direction of the disclosed diagram and therefore cannot be interpreted restrictively. When terms such as “first” and “second” are used, they are terms used to distinguish the various structures and cannot be interpreted restrictively.

[0058] To more clearly illustrate the features of the embodiments of the present invention, detailed descriptions of matters well known to those skilled in the art to which the following embodiments pertain are omitted. Furthermore, detailed descriptions of portions of the figures unrelated to the description of the embodiments are omitted.

[0059] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

[0060] Figure 1 This is a front view of an EFEM (Electronic Front End Panel) applicable to a wafer cooling apparatus according to an embodiment of the present invention; Figure 2This is a perspective view showing the state in which a wafer is loaded in a cooling station formed inside the EFEM according to an embodiment of the present invention; Figure 3 This is a structural diagram showing the state in which a wafer cooling device is arranged inside the EFEM according to an embodiment of the present invention; Figure 4 As a wafer temperature-time graph illustrating the cooling state of a wafer mounted on a wafer rack in the EFEM according to an embodiment of the present invention, (a) is a prior art graph, and (b) is a graph for an embodiment of the present invention. Figure 5 The figure shown is a side view of the wafer rack loading the wafer, illustrating an embodiment of the baffle holes according to the temperature distribution of the wafers loaded in the wafer rack of the EFEM according to an embodiment of the present invention. Figure 6 The figure shown is a rear view of an embodiment of a baffle hole that illustrates the temperature distribution of a wafer mounted on a wafer carrier in the EFEM according to an embodiment of the present invention, and is a single baffle hole in a right-angled quadrilateral formed in the baffle of the wafer carrier. Figure 7 This is a diagram showing the baffle hole formed by a plurality of through holes in a baffle disposed behind the wafer carrier of the EFEM according to an embodiment of the present invention; Figure 8 This is a rear view showing an embodiment in which the baffle of the wafer carrier of the EFEM according to an embodiment of the present invention forms right-angled quadrilateral baffle holes of the same area; Figure 9 This is a diagram illustrating a method for adjusting the area of ​​the baffle hole using a cover block in the baffle of the EFEM according to an embodiment of the present invention.

[0061] Figure 10 This is a diagram illustrating a method for adjusting the area of ​​the baffle hole using the adjusting plate of the EFEM according to an embodiment of the present invention.

[0062] Reference Figures 1 to 10 According to an embodiment of the present invention, the EFEM wafer cooling device includes: an outer housing 10, a wafer rack 20, a baffle 30, an inner housing 40, an air intake source, and an exhaust pipe 70.

[0063] First, a brief explanation of the EFEM will be given. For example... Figure 1 As shown simply, an FFU (fan filter unit) 2 is installed on the upper part of the EFEM 1, and a cooling station 3 can be installed on one side.

[0064] According to one embodiment, the EFEM 1 is an internal space forming a rectangular hexahedron shape, and a robot (not shown) is disposed inside it to transfer wafers W between a front-opening wafer transfer cassette placed at the loading port in front of the EFEM 1 and a loading locking chamber at the rear. Alternatively, according to another embodiment, the robot places wafers W, which are discharged from the loading locking chamber after processing, into the cooling station 3, allowing the wafers W to cool. At this time, the wafers W are loaded and stored in the wafer rack 20 disposed in the cooling station 3 at predetermined intervals in the vertical direction.

[0065] According to one embodiment, such as Figure 2 The wafer holder 20 may include a placement structure in which multiple slots 21 are formed in the vertical direction on the inner sides of both side walls. Therefore, the wafer W is inserted into each of the multiple slots 21, and multiple wafers W can be stored at predetermined intervals in the vertical direction.

[0066] According to one embodiment, the FFU 2 can supply air to the interior of the EFEM 1 after drawing in external air to remove foreign objects. Since the interior of the EFEM 1 is maintained at a pressure slightly above atmospheric pressure, foreign objects are prevented from penetrating from the outside, and internal air can be discharged to the outside through a ventilation hole formed at the bottom of the EFEM 1.

[0067] According to one embodiment, such as Figure 3 As shown, the outer casing 10 is a structure disposed on one side wall of the EFEM 1.

[0068] According to one embodiment, the outer casing 10 may be a rectangular hexahedral box shape with a protruding structure on one side of the outer wall of the EFEM 1.

[0069] According to one embodiment, the outer casing 10 not only forms the appearance of the cooling station 3, but also provides space for the configuration of the wafer rack 20 and the inner casing 40 as described below.

[0070] According to one embodiment, the wafer holder 20 is disposed inside the outer housing and can form a plurality of slots for storing wafers inserted from the inside of the EFEM. According to one embodiment, the front end portion of the wafer holder 20 can be configured to protrude a predetermined length from the inner space of the outer housing 10 to the EFEM 1.

[0071] According to one embodiment, the slot 21 is an insertion slot formed in the vertical direction and at predetermined intervals on the inner side surfaces of the two side walls of the wafer holder 20. The slots 21 may be formed in the same number on each of the two side walls of the wafer holder 20, in which case a wafer W is inserted into a pair of slots 21 formed on the two side walls for support.

[0072] According to one embodiment, an opening is formed at the front of the wafer holder 20 to accommodate the wafer W. Additionally, an opening is also formed at the rear of the wafer holder 20 to allow airflow, but a baffle 30 may be provided at the rear of the wafer holder 20.

[0073] According to one embodiment, the baffle 30 is disposed behind the wafer holder 20 and can form a plurality of baffle holes 31, the plurality of baffle holes 31 corresponding one-to-one with the gaps between the wafers W inserted into the plurality of slots 21.

[0074] Therefore, the airflow moving through the gaps between the wafers W moves toward the rear of the wafer holder 20 through the plurality of baffle holes 31 that correspond one-to-one with the gaps between the wafers W.

[0075] According to one embodiment, the baffle 30 is configured such that, based on the temperature distribution of the wafer W stored in the wafer holder 20, the plurality of baffle holes 31 form mutually different areas, and the areas of the plurality of baffle holes 31 are proportional to the temperatures of the wafer W corresponding to the plurality of baffle holes 31 respectively.

[0076] Here, the wafer W corresponding to the baffle hole 31 refers to the upper wafer W and the lower wafer W arranged aligned with each baffle hole 31. A gap (airflow space) between the upper wafer W and the lower wafer W corresponding to the baffle hole 31 can be formed between them.

[0077] According to one embodiment, the wafers W stored in the wafer rack 20 may have different temperatures depending on their position and storage order. Therefore, creating differences in the amount of airflow through the gaps between the wafers W can provide a uniform and effective way to cool the wafers W. That is, in order to adjust the amount of airflow according to the temperature of the wafers W, the baffle holes 31 may be formed with different areas.

[0078] According to one embodiment, the baffle hole 31 corresponding to the gap between the wafers W is, as shown in... Figure 6 Forming a hole or as Figure 7 Multiple holes 31a are formed. In summary, the baffle 30 can form multiple baffle holes 31 corresponding to each gap between the wafer W. The multiple baffle holes 31 refer to either being formed as a single hole or divided into multiple small holes 31a.

[0079] According to one embodiment, such as Figure 5 When the stored wafer W has a temperature distribution that gradually increases from bottom to top, such as Figure 6 and Figure 7The baffle hole 31 can be formed with a structure in which the area gradually increases from the lower part to the upper part of the baffle 30. Additionally, as... Figure 7 When the baffle hole 31 is formed as a plurality of separate holes 31a, it can be configured to increase the number of holes 31a from the lower part to the upper part of the baffle 30.

[0080] According to one embodiment, all of the plurality of baffle holes 31 in the baffle 30 can be formed to have the same area (see reference). Figure 8 A cover block 32 is inserted at both ends of each of the plurality of baffle holes 31, and the area of ​​the plurality of baffle holes 31 can be adjusted according to the size of the cover block 32 (see reference). Figure 9 ).

[0081] According to one embodiment, the cover block 32 is a rectangular hexahedral block-shaped component that can be inserted and fixed into the baffle hole 31, and the cover block 32 can have various sizes. Therefore, if two cover blocks 32 of the same size are inserted into the two ends of the baffle hole 31 respectively, the area of ​​the baffle hole 31, excluding the area of ​​the two cover blocks 32, is defined as the area of ​​the baffle hole 31. By inserting and setting the cover blocks 32 into each baffle hole 31 in this manner, the area of ​​the baffle hole 31 (the area through which air flows) can be adjusted to the desired size.

[0082] According to one embodiment, such as Figure 10 The baffle 30 has multiple baffle holes 31 with the same area. Adjustment plates 33 are provided on the outer sides of both ends of each of the multiple baffle holes 31. The adjustment plate 33 has an elongated hole 33a. The baffle 30 is fixed by bolts 33b inserted through the elongated hole 33a. The area of ​​the multiple baffle holes 31 can be adjusted by adjusting the lateral fixed position of the adjustment plate 33.

[0083] According to one embodiment, the adjusting plate 33 can be fixed to the outer sides of both ends of the baffle hole 31 using bolts 33b through the elongated hole 33a formed by the transverse extension. Therefore, to increase or decrease the area blocked by the adjusting plate 33, the adjusting plate 33 can be moved slightly towards the inner center of the baffle hole 31 or moved outward, thus adjusting the position of the adjusting plate 33. Accordingly, the area of ​​the baffle hole 31 (the area through which airflow passes) can be adjusted to the desired width.

[0084] As described above, the area of ​​the baffle hole 31 can be adjusted by an area adjustment tool such as the cover block 32 or the adjustment plate 33. Therefore, the area of ​​the baffle hole 31 corresponding to each gap between the wafers W can be appropriately adjusted according to the temperature distribution of the wafers W stored in the wafer holder 20.

[0085] According to one embodiment, in Figure 6 and Figure 7 The text describes an embodiment where the area of ​​the plurality of baffle holes 31 gradually increases from the bottom to the top of the wafer W as the temperature gradually increases from the bottom to the top of the wafer cassette 20; however, this is only an example. According to one embodiment, as the temperature gradually increases from the top to the bottom of the wafer cassette 20, and... Figure 6 , Figure 7 Conversely, a pattern in which the area of ​​the baffle hole 31 gradually increases from top to bottom can also be formed.

[0086] In addition, the plurality of baffle holes 31 can be formed in a pattern where the area of ​​the baffle hole 31 located in the middle is the largest, and the area gradually decreases from there to the upper and lower parts. Depending on the temperature distribution of the loaded wafer W, the area of ​​the plurality of baffle holes 31 can be formed in various patterns.

[0087] According to one embodiment, the inner housing 40 is configured to be disposed behind the wafer cassette 20 and to form an air intake space 41 in the rear region of the wafer cassette 20.

[0088] According to one embodiment, the inner housing 40 can be connected to the exhaust duct 60 of a factory equipped with semiconductor manufacturing equipment via the exhaust pipe 70.

[0089] Therefore, the air drawn in in front of the wafer rack 20 flows through the gap between the wafers W and moves toward the suction space 41, and from the suction space 41 it can flow toward the exhaust pipe 60 through the exhaust pipe 70.

[0090] According to one embodiment, the air intake source is a structure in which an airflow is formed through the gaps between the wafers W, moving from the interior space of the EFEM 1 to the air intake space 41 to forcibly cool the wafers W.

[0091] According to one embodiment, the air intake source may be an air intake fan 50 disposed in the air intake space 41.

[0092] According to one embodiment, the intake fan 50 can be installed by a mounting bracket (not shown) or a mounting frame (not shown) connected to the inner housing 40, and performs the function of discharging the air drawn in inside the EFEM 1 to the exhaust pipe 70 through the intake space 41.

[0093] According to one embodiment, adjusting the rotational speed (rpm) of the intake fan 50 adjusts the airflow through the gap between the wafers W, thereby adjusting the cooling rate of the wafers W.

[0094] Alternatively, the intake source can be the exhaust duct 60 of a factory equipped with semiconductor manufacturing equipment.

[0095] According to one embodiment, the exhaust pipe 60 serves as a conduit for adsorbing and collecting or discharging air or various working gases emitted from various devices configured within the factory to the outside, and a predetermined negative pressure is always formed inside the exhaust pipe 60.

[0096] Therefore, since the air intake space 41 is connected to the exhaust pipe 60 through the exhaust pipe 70, the exhaust pipe 60 can be an air intake source that draws air into the interior of the EFEM 1 through the gap between the wafers W to the air intake space 41.

[0097] According to one embodiment, the exhaust pipe 70 is a structure connected to the intake space 41 to discharge the airflow (airflow moving from the interior of the EFEM 1 through the gap between the wafers W into the intake space 41) to the outside of the intake space 41.

[0098] According to one embodiment, in Figure 3 The illustration shows an embodiment where the exhaust pipe 70 is connected to the lower part of the inner housing 40, but is not limited thereto. Since there is a tendency for active airflow in the portion near the inlet of the exhaust pipe 70, the inlet location of the exhaust pipe 70 may be formed on the upper part or the middle rear part of the inner housing 40, depending on the temperature distribution of the wafer W.

[0099] According to one embodiment, the exhaust pipe 70 may include a damper 80 at its inlet portion on the underside of the outer casing 10. The damper 80 is a valve that regulates the flow rate of air passing through the exhaust pipe 70. According to one embodiment, to regulate the cooling rate of the wafers W, the opening of the damper 80 is adjusted, thereby regulating the airflow through the gaps between the wafers W. The damper 80 may be configured for manual or automatic control.

[0100] On the other hand, a diffuser 110 for supplying inert gas to the wafer W side can be provided in front of the wafer holder 20.

[0101] According to one embodiment, the wafer rack 20 has a support frame 22 protruding in front, and a diffuser 110 is provided on the support frame 22. The diffuser 110 can be connected to an inert gas supply source 130 of a factory equipped with semiconductor manufacturing equipment via a supply pipe 120.

[0102] According to one embodiment, the supply pipe 120 is configured to have a cooling device 140 disposed in the middle portion to cool the inert gas.

[0103] According to one embodiment, the support frame 22 may be a plate protruding from the lower front end of the wafer holder 20. Diffusers 110 are respectively disposed at the two corner portions of the support frame 22, and the distance between the two diffusers 110 is sufficient to be greater than the diameter of the wafer W. Therefore, the diffusers 110 do not obstruct the delivery path of the wafer W, thus allowing the wafer W to be smoothly delivered into the interior of the wafer holder 20.

[0104] According to one embodiment, the diffuser 110 is shown to be cylindrical, but the shape is not limited and can include any shape capable of spraying inert gas onto the wafer W. For this purpose, the diffuser 110 has a length that covers the entire vertical range of the stored wafer W, and forms multiple micro-holes in the portion facing the wafer W, thereby allowing for uniform spraying of inert gas onto the entire loaded wafer W.

[0105] According to one embodiment, the inert gas can be a gas such as argon (Ar) or nitrogen (N), which can be received from an inert gas supply source 130 (inert gas storage tank) within the plant.

[0106] According to one embodiment, the supply pipe 120 connecting the diffuser 110 and the inert gas supply source 130 is configured to pass through a cooling device 140, thereby cooling the inert gas flowing inside the supply pipe 120, which can be sprayed through the diffuser 110.

[0107] According to one embodiment, the cooling device 140 may be an evaporator in a cooling device for circulating refrigerant. The inert gas in the supply pipe 120 may be cooled by the refrigerant inside the evaporator carrying away heat.

[0108] On the other hand, a first pressure sensor 91 for measuring the internal pressure of the EFEM 1 can be provided through the wall of the EFEM 1. Additionally, a second pressure sensor 92 for measuring the pressure of the intake space 41 can be provided through the outer casing 10. A through hole is formed in the sensing portion of the second pressure sensor 92 provided in the inner casing 40, thereby allowing the second pressure sensor 92 to measure the pressure of the intake space 41.

[0109] According to one embodiment, by measuring the pressure in the front space (the internal space of the EFEM 1) and the rear space (the suction space 41) of the wafer rack 20 where the wafers W are stored, the pressure difference between the front and rear spaces of the wafer rack 20 can be determined. The pressure difference between the front and rear spaces of the wafer rack 20 can be used to calculate the amount of airflow through the gaps between the wafers W.

[0110] According to one embodiment, the first pressure sensor 91 and the second pressure sensor 92 can be replaced by a single differential pressure sensor.

[0111] Additionally, depending on requirements, the first temperature sensor 101 for measuring the internal temperature of the EFEM 1 and the second temperature sensor 102 for measuring the internal temperature of the suction space 41 can be respectively positioned adjacent to the positions of the first pressure sensor 91 and the second pressure sensor 92. Thus, using the first temperature sensor 101 and the second temperature sensor 102, the air temperature in front of the wafer carrier 20 and the air temperature after passing through the wafer carrier 20 can be determined, thereby allowing the calculation of the heat (cooling heat) absorbed by the airflow from the wafer W through the wafer carrier 20.

[0112] As described above, the internal pressure and temperature of the EFEM 1 and the pressure and temperature of the intake space 41 can be monitored in real time using the pressure sensor and the temperature sensor.

[0113] The function and effect of the wafer cooling device for the EFEM according to an embodiment of the present invention will now be explained.

[0114] According to one embodiment, a plurality of slots 21 are formed in the wafer carrier 20 at predetermined intervals in the vertical direction, and the wafers W can be inserted and stored in the plurality of slots 21. A gap of approximately 10 mm is typically present between the wafers W loaded on the wafer carrier 20.

[0115] According to one embodiment, an externally enclosed suction space 41 is disposed behind the wafer rack 20, and the suction space 41 can be connected to the factory's exhaust pipe 60 via the exhaust pipe 70.

[0116] According to one embodiment, the interior of the exhaust duct 60 is always kept under negative pressure, so the air in the intake space 41 flows to the exhaust duct 60 through the exhaust pipe 70, thereby generating suction in the intake space 41. The air inside the EFEM 1 moves to the intake space 41 through the gap between the wafers W. The airflow formed at this time absorbs heat from the wafers W, thus cooling the wafers W.

[0117] At this time, because the airflow flows through the gaps between the loaded wafers W, not only the uppermost and lowermost wafers W are continuously and effectively cooled, but also the wafers W located in the middle. Accordingly, the phenomenon of temperature retention (impeding cooling) through thermal radiation between the wafers W is eliminated, thus allowing the wafers W to be cooled more quickly.

[0118] Figure 4(a) is a wafer temperature-time graph according to the prior art, and (b) is a wafer temperature-time graph according to an embodiment of the present invention. Conventionally, the temperature of wafer W (referring to the average temperature of all wafers W) decreases very slowly from an initial 140°C, remaining around 100°C even after 120 seconds, indicating that the target temperature of 60°C has not been reached. However, in the case of an embodiment of the present invention, the temperature drops sharply from the initial 140°C over time, confirming that the target temperature of 60°C is reached after 30 seconds.

[0119] As described above, according to one embodiment, not only can all the wafers W stored in the wafer rack 20 be cooled uniformly, but they can also be rapidly cooled to the target temperature in a shorter time. Therefore, after the wafers W are quickly discharged from the outside of the EFEM 1, they can be moved to the next process equipment. Thus, the productivity of semiconductor manufacturing can be improved.

[0120] On the other hand, the intake fan 50 can be installed in the internal space of the inner casing 40, i.e., the intake space 41. Because of the intake fan 50, it is not necessary to connect the intake space 41 to the exhaust duct 60; airflow for cooling the wafer W can be formed even with only the exhaust duct 70 configured. However, the air inside the EFEM 1 may contain other gaseous components besides air, so it is preferable to discharge it through the exhaust duct 60 rather than directly into the factory interior space.

[0121] Therefore, when the intake space 41 is connected to the exhaust pipe 60 via the exhaust pipe 70 and the intake fan 50 is also provided, a stronger airflow through the gap between the wafers W can be formed, thus achieving a more powerful cooling performance.

[0122] In addition, the intake fan 50 can be adjusted in rotational speed (rpm), thereby adjusting the flow rate and speed of airflow through the gap between the wafers W, so that the cooling performance of the wafers W can be appropriately adjusted as needed.

[0123] In addition, the damper 80 is provided in the exhaust pipe 70. By adjusting the opening of the damper 80, the flow rate and speed of the airflow through the gap between the wafers W can also be adjusted, thereby adjusting the cooling performance of the wafers W as needed.

[0124] Furthermore, in the EFEM wafer cooling apparatus according to the present invention, a baffle 30 is provided behind the wafer holder 20. The baffle 30 has a plurality of baffle holes 31 corresponding to the gaps between the individual wafers W. The plurality of baffle holes 31 have different areas depending on the temperature distribution of the loaded wafers W. That is, the baffle holes 31 corresponding to the gaps between wafers W with high temperatures can form a relatively larger area, and the baffle holes 31 corresponding to the gaps between wafers W with low temperatures can form a relatively smaller area.

[0125] Therefore, a smoother airflow is formed in the gaps between the high-temperature wafers W to allow more airflow to pass through, thereby cooling the high-temperature wafers W more quickly and thus cooling all wafers W more effectively.

[0126] In addition, the wafer cooling device of the EFEM according to an embodiment of the present invention may be configured with the cover block 32 or the adjustment plate 33 as a tool to adjust the area of ​​the plurality of baffle holes 31 in order to cope with the changes in the temperature distribution pattern of the wafer W.

[0127] In this case, all of the plurality of baffle holes 31 formed in the baffle 30 can have the same area.

[0128] According to one embodiment, the cover block 32 can be of various sizes, and one cover block 32 can be inserted and fixed at each of the two ends of each of the baffle holes 31. Therefore, the baffle hole 31 has an air passage area equivalent to the area of ​​the two cover blocks 32 inserted therein, thereby allowing the air passage area of ​​the plurality of baffle holes 31 to be appropriately adjusted according to the temperature distribution of the wafer W.

[0129] Furthermore, since the adjusting plate 33 is fixed to the outer sides of both ends of the baffle hole 31 using bolts 33b passing through the elongated hole 33a, the lateral fixing position can be adjusted according to the length of the elongated hole 33a. Therefore, by adjusting the lateral fixing position of the adjusting plate 33, the area of ​​the baffle hole 31 blocked by the adjusting plate 33 can be adjusted, thereby adjusting the air passage area formed in the baffle hole 31.

[0130] As described above, since the area of ​​the baffle hole 31 can be appropriately adjusted according to the temperature distribution of the wafer W, a baffle 30 can be used under various temperature distribution conditions of the wafer W, thereby cooling the wafer W more effectively under various temperature distribution conditions of the wafer W.

[0131] On the other hand, the diffuser 110 sprays inert gas from the front of the wafer holder 20 onto the wafer W, allowing the inert gas to flow through the gaps between the wafers W. At this time, since the supply pipe 120 connected to the diffuser 110 passes through the cooling device 140, the inert gas flowing inside the supply pipe 120 can be cooled to a temperature lower than the air temperature inside the EFEM 1.

[0132] Therefore, by allowing the inert gas at a lower temperature to flow through the gaps between the wafers W, the wafers W can be cooled more quickly.

[0133] As described above, the wafer cooling apparatus of the EFEM according to the present invention can improve wafer cooling performance, prevent damage caused by thermal shock when the wafer W is discharged, and shorten the cooling time of the wafer W, thereby improving productivity.

[0134] As described above, the present invention has been illustrated with reference to the embodiments shown in the figures. However, it should be understood that these are merely exemplary, and various modifications and equivalent embodiments are possible based on common knowledge in the art to which this invention pertains. Therefore, the true scope of protection of the present invention is based on the appended claims and should be determined according to the specific content of the above-described invention.

[0135] Industrial applicability

[0136] This invention relates to a wafer cooling device for EFEM, which can be used in the semiconductor manufacturing equipment industry, including mechanisms and devices for loading and storing multiple high-temperature wafers.

Claims

1. A wafer cooling device for EFEM, comprising: The outer casing is set on one side wall of the EFEM; A wafer holder is disposed inside the outer housing and has multiple slots for storing wafers inserted from the inside of the EFEM; A baffle is disposed behind the wafer holder and has a plurality of baffle holes, the plurality of baffle holes corresponding one-to-one with the gap between the wafers inserted into the plurality of slots; An inner casing is disposed behind the wafer holder, and an air intake space is formed in the rear region of the wafer holder; An air intake source forms an airflow from the interior space of the EFEM to the air intake space through the gaps between the wafers, thereby forcibly cooling the wafers; and An exhaust pipe is connected to the intake space to discharge the airflow to the outside of the intake space.

2. The wafer cooling apparatus for EFEM according to claim 1, characterized in that, The air intake source is an air intake fan installed in the air intake space.

3. The wafer cooling apparatus for EFEM according to claim 1, characterized in that, The intake source is the exhaust pipe of a factory equipped with semiconductor manufacturing equipment.

4. The wafer cooling apparatus for EFEM according to claim 1, characterized in that, The inner casing is connected to the exhaust duct of a factory equipped with semiconductor manufacturing equipment via the exhaust pipe.

5. The wafer cooling apparatus for EFEM according to claim 1, characterized in that, The baffle is, Based on the temperature distribution of the wafers stored in the wafer rack, the plurality of baffle holes form mutually different areas; The area ratio of the plurality of baffle holes is proportional to the temperature of the wafer corresponding to each of the plurality of baffle holes.

6. The wafer cooling apparatus for EFEM according to claim 1, characterized in that, The baffle is, All of the multiple baffle holes have the same area; A cover block is inserted at both ends of each of the plurality of baffle holes; The areas of the plurality of baffle holes are adjusted according to the area of ​​the cover block.

7. The wafer cooling apparatus for EFEM according to claim 1, characterized in that, The baffle is, All of the multiple baffle holes have the same area; An adjusting plate is provided on the outer side of both ends of each of the plurality of baffle holes; The adjusting plate is formed with an elongated hole and is fixed to the baffle by bolts inserted through the elongated hole; The area of ​​the plurality of baffle holes can be adjusted by adjusting the lateral fixed position of the adjusting plate.

8. The wafer cooling apparatus for EFEM according to claim 1, characterized in that, The wafer frame is, A support frame protrudes forward; A diffuser is provided on the support frame; The diffuser is connected via a supply pipe to an inert gas supply source in a factory equipped with semiconductor manufacturing equipment.

9. The wafer cooling apparatus for EFEM according to claim 8, characterized in that, The supply pipe has a cooling device in the middle section to cool the inert gas.

Citation Information

Patent Citations

  • Wafer cooling station for plasma enhanced chemical

    KR2020000016795U