Device front end module, wafer alignment method, and semiconductor process equipment

CN122935199APending Publication Date: 2026-10-16PIOTECH (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202611399686.5
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-09-09
Publication Date
2026-10-16

AI Technical Summary

Technical Problem

然而,该同步方式中两片晶圆的对准同启同停,双臂机械手在对准全程仍处于空闲等待状态因此传输节拍仍有优化空间

Benefits of technology

[0007] To overcome the aforementioned deficiencies in the existing technology, the present invention provides a device front-end module, a wafer alignment method, a semiconductor process equipment, and a computer-readable storage medium, which enables the alignment processes of two wafers to be independent of each other, without the need for simultaneous start-up and shutdown, reducing the time consumed by serial superposition, thereby optimizing the transmission cycle, increasing the equipment's WPH capacity, and even if an alignment abnormality occurs on a single wafer, it will not affect the alignment of the other path and the robotic arm's movement, thereby improving the wafer scheduling flexibility and equipment operating efficiency.

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Abstract

The application discloses a device front end module, a wafer alignment method and a semiconductor process equipment. The device front end module comprises a first aligner and a second aligner, a dual-arm robot comprising a first arm and a second arm associated with decoupling, used for carrying wafers between a load port, the first aligner, the second aligner and a downstream module, and a controller configured to control the first arm to place a first wafer on the first aligner for alignment, control the second arm to place a second wafer on the second aligner for alignment during the alignment of the first aligner, control the first arm to take off the first wafer after the alignment and send the first wafer to the downstream module during the alignment of the second aligner, and control the second arm to send the second wafer to the downstream module after the alignment. The application can make the alignment processes of two wafers independent of each other, optimize the transmission beat, improve the WPH capacity of the equipment, and improve the wafer scheduling flexibility and the operation efficiency of the equipment.
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Description

Technical Field

[0001] This invention relates to the field of semiconductor manufacturing technology, specifically to a front-end module for an equipment, a wafer alignment method, and a semiconductor process equipment. Background Technology

[0002] In the semiconductor manufacturing supply chain, equipment throughput is a core indicator for measuring production efficiency and determining capacity scale. In semiconductor process equipment, the bottleneck in the capacity (WPH, Wafers Per Hour) of individual machines may occur in the front-end modules of the equipment.

[0003] like Figure 1A As shown, existing equipment front-end modules 100 mostly use a single aligner 110. After the dual-arm robotic arm 120 picks up two wafers at a time, it can only send them sequentially to the aligner 110 for serial alignment. Specifically, as... Figure 1B As shown, during the alignment of the first wafer 101 on the aligner 110, the second wafer 102 must wait on the second arm 122 of the dual-arm robotic arm 120 until the first arm 121 delivers the aligned first wafer 101 out of the front-end module 100. Only then can the second arm 122 place the second wafer 102 onto the single aligner 110 for alignment. The robotic arm is bound to the alignment cycle of the aligner 110, and cannot perform other pick-and-place actions during its waiting period, thus occupying a relatively long time.

[0004] To address this, existing technologies have proposed setting multiple aligners within the front-end module of the equipment, enabling a dual-arm robotic arm to simultaneously place wafers onto each aligner, align them simultaneously, and then simultaneously retrieve the wafers. However, in this synchronous method, the alignment of the two wafers starts and stops simultaneously, and the dual-arm robotic arm remains idle throughout the alignment process, thus the transmission cycle time still has room for optimization. Furthermore, if an alignment error occurs on one wafer and a retry is required, the other arm of the robotic arm and the other aligner must be forced to wait. Therefore, the scheduling flexibility of this synchronous alignment equipment and method is insufficient.

[0005] To address the aforementioned problems in the existing technology, there is an urgent need in the field for an improved front-end module that enables the alignment processes of two wafers to be independent of each other, without the need for simultaneous start-up and shutdown, thereby reducing the time consumed by serial superposition, thus optimizing the transmission cycle, increasing the equipment's WPH capacity, and even if an alignment anomaly occurs on a single wafer, it will not affect the alignment and robotic arm movements of the other path, thereby improving wafer scheduling flexibility and equipment operating efficiency. Summary of the Invention

[0006] The following provides a brief overview of one or more aspects to offer a basic understanding of them. This overview is not an exhaustive summary of all conceived aspects, nor is it intended to identify key or decisive elements of all aspects, nor to define the scope of any or all aspects. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed descriptions that follow.

[0007] To overcome the aforementioned deficiencies in the existing technology, the present invention provides a device front-end module, a wafer alignment method, a semiconductor process equipment, and a computer-readable storage medium, which enables the alignment processes of two wafers to be independent of each other, without the need for simultaneous start-up and shutdown, reducing the time consumed by serial superposition, thereby optimizing the transmission cycle, increasing the equipment's WPH capacity, and even if an alignment abnormality occurs on a single wafer, it will not affect the alignment of the other path and the robotic arm's movement, thereby improving the wafer scheduling flexibility and equipment operating efficiency.

[0008] Specifically, the device front-end module provided according to the first aspect of the present invention includes: a first aligner and a second aligner; a dual-arm manipulator including a decoupled first arm and a second arm for transporting a wafer between a loading port, the first aligner, the second aligner, and a back-end module; and a controller configured to: control the first arm to place a first wafer on the first aligner for alignment; control the second arm to place a second wafer on the second aligner for alignment during the alignment of the first aligner, wherein the alignment start time of the second aligner lags behind the alignment start time of the first aligner; control the first arm to remove the aligned first wafer and send it to the back-end module during the alignment of the second aligner; and control the second arm to send the aligned second wafer to the back-end module.

[0009] Furthermore, in some embodiments of the present invention, the step of controlling the first arm to place the first wafer on the first aligner for alignment includes: in response to the first wafer being placed on the first aligner, controlling the first arm to move forward in the vertical direction to a waiting position, wherein the waiting position coincides with the wafer placement position in the horizontal direction; and controlling the first aligner to rotate to perform rotational alignment of the first wafer; the step of controlling the first arm to remove the aligned first wafer and send it to the back-end module includes: after the first aligner completes alignment, controlling the first arm to move backward in the vertical direction from the waiting position to the wafer placement position to retrieve the first wafer.

[0010] Furthermore, in some embodiments of the present invention, the time lag between the alignment start time of the second aligner and the alignment start time of the first aligner is matched with the round-trip time of the first arm, wherein the round-trip time of the first arm includes the total time required for the first arm to remove the aligned first wafer from the first aligner, send the first wafer to the back-end module, and remove the third wafer to be aligned from the loading port and return to the first aligner.

[0011] Furthermore, in some embodiments of the present invention, the step of controlling the first arm to remove the aligned first wafer and send it to the back-end module during the alignment of the second aligner includes: controlling the first arm to remove the aligned first wafer from the first aligner and send it to the back-end module during the alignment of the second aligner; and controlling the first arm to return and remove the third wafer to be aligned from the loading port and place it on the first aligner in response to the first wafer being placed in the back-end module.

[0012] Furthermore, in some embodiments of the present invention, the alignment time of the second aligner on the second wafer is not less than the round-trip time of the first arm, so that the round-trip motion of the first arm is covered by the alignment period of the second aligner.

[0013] Furthermore, in some embodiments of the present invention, the rotating plane of the first aligner and / or the second aligner is provided with an adsorption structure for adsorbing the wafer to be aligned placed on its surface.

[0014] Furthermore, in some embodiments of the present invention, there is a height difference between the rotation plane of the first aligner and the rotation plane of the second aligner.

[0015] Furthermore, in some embodiments of the present invention, the controller is further configured to: control the first arm and the second arm to simultaneously place the first wafer and the second wafer on the first aligner and the second aligner for alignment, wherein the second aligner and the first aligner begin alignment simultaneously; and after the first aligner and the second aligner have both completed alignment, control the first arm and the second arm to simultaneously remove the aligned first wafer and the second wafer from their respective aligners and send them to the back-end module.

[0016] Furthermore, the wafer alignment method provided by the second aspect of the present invention, implemented via the device front-end module provided by the first aspect of the present invention, includes the following steps: controlling the first arm to place a first wafer on the first aligner for alignment; controlling the second arm to place a second wafer on the second aligner for alignment during the alignment of the first aligner, wherein the alignment start time of the second aligner lags behind the alignment start time of the first aligner; controlling the first arm to remove the aligned first wafer and send it to the back-end module during the alignment of the second aligner; and controlling the second arm to send the aligned second wafer to the back-end module.

[0017] Furthermore, the semiconductor process equipment provided according to the third aspect of the present invention includes: a loading port connected to a wafer carrier for storing wafers; a front-end module provided according to the first aspect of the present invention for transporting and aligning wafers between the loading port and the back-end module; and a back-end module including a process for processing the wafers received from the front-end module. Attached Figure Description

[0018] The above-described features and advantages of the present invention will be better understood after reading the following detailed description of embodiments of the present disclosure in conjunction with the accompanying drawings. In the drawings, components are not necessarily drawn to scale, and components having similar related characteristics or features may have the same or similar reference numerals.

[0019] Figure 1A This is a top view of the front-end module of a device that includes a single aligner in the prior art.

[0020] Figure 1B To adopt Figure 1A The diagram shows the process flow of dual-wafer alignment in the front-end module of the device.

[0021] Figure 2 A schematic diagram of the structure of a semiconductor process apparatus provided according to some embodiments of the present invention is shown.

[0022] Figure 3 A top view of a device front-end module provided according to some embodiments of the present invention is shown.

[0023] Figure 4 A flowchart of a wafer alignment method provided according to some embodiments of the present invention is shown.

[0024] Figure 5 A flowchart of a wafer alignment method provided according to other embodiments of the present invention is shown.

[0025] Figure 6 A side view of the structure of a first aligner and a second aligner provided according to some embodiments of the present invention is shown.

[0026] Figure 7 A flowchart illustrating the synchronous alignment of a wafer alignment method provided according to some embodiments of the present invention is shown.

[0027] Figure 8 The diagram illustrates the time required for simultaneous alignment of two wafers using a device front-end module provided according to some embodiments of the present invention, and the corresponding EEFM capacity.

[0028] Figure 9 A structural block diagram of a controller for a device front-end module provided according to some embodiments of the present invention is shown.

[0029] Figure label: 100, 220 Equipment front-end modules; 101, 201 First Wafer; 102, 202 Second wafer; 110 Aligner; 120, 223 Dual-arm robotic arms; 121, 2231 First Arm; 122, 2232 Second arm; 130 Safe position; 200 Semiconductor process equipment; 210 Loading port; 221 First Aligner; 222 Second Aligner; 224 controller; 2241 Memory; 2242 Controller; 230 Rear-end Module; 231 Load latch cavity; 232 Transmission Module; 233 Process Module; 610 Interdigitated fingers; Steps S410~S440 Detailed Implementation

[0030] The following specific embodiments illustrate the implementation of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. Although the description of the present invention is presented in conjunction with preferred embodiments, this does not mean that the features of the invention are limited to these embodiments. On the contrary, the purpose of describing the invention in conjunction with embodiments is to cover other options or modifications that may be derived based on the claims of the present invention. To provide a thorough understanding of the invention, many specific details will be included in the following description. The invention may also be implemented without using these details. Furthermore, to avoid confusion or obscuring the focus of the invention, some specific details will be omitted in the description.

[0031] In the description of this invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection of two components. Those skilled in the art can understand the specific meaning of the above terms in this invention based on the specific circumstances.

[0032] Furthermore, the terms "upper," "lower," "left," "right," "top," "bottom," "horizontal," and "vertical" used in the following description should be understood as the orientations shown in the relevant paragraphs and accompanying drawings. These relative terms are for illustrative purposes only and do not imply that the described apparatus must be manufactured or operated in a specific orientation, and therefore should not be construed as limiting the invention.

[0033] It is understood that although terms such as "first," "second," and "third" may be used herein to describe various components, regions, layers, and / or parts, these components, regions, layers, and / or parts should not be limited by these terms, and these terms are only used to distinguish different components, regions, layers, and / or parts. Therefore, the first components, regions, layers, and / or parts discussed below may be referred to as second components, regions, layers, and / or parts without departing from some embodiments of the present invention.

[0034] As mentioned above, such as Figure 1AAs shown, existing equipment front-end modules 100 mostly use a single aligner 110. After the dual-arm robotic arm 120 picks up two wafers at a time, it can only send them to the aligner 110 sequentially for serial alignment. The robotic arm is tied to the alignment cycle of the aligner 110, and cannot perform other pick-up and put-down actions during the waiting period, thus occupying a relatively long time. To address this, existing technologies have also proposed setting multiple aligners in the equipment front-end module, enabling the dual-arm robotic arm to simultaneously place wafers onto each aligner, align them simultaneously, and then pick up the wafers simultaneously. However, in this synchronous method, the alignment of the two wafers starts and stops simultaneously, and the dual-arm robotic arm remains in an idle waiting state throughout the alignment process, so there is still room for optimization of the transmission cycle. Furthermore, if one wafer experiences an alignment error and needs to be retried, the other arm of the robotic arm and the other aligner must be forced to wait. Therefore, the scheduling flexibility of this synchronous alignment equipment and method is insufficient.

[0035] To address the aforementioned problems in the prior art, this invention provides a device front-end module, a wafer alignment method, a semiconductor process equipment, and a computer-readable storage medium. These components enable the alignment processes of two wafers to be independent of each other, eliminating the need for simultaneous start-up and shutdown. This reduces the time consumed by serial superposition, thereby optimizing the transmission cycle and increasing the equipment's WPH (Wafer Per Hour) capacity. Furthermore, even if an alignment anomaly occurs on a single wafer, it will not affect the alignment of the other wafer or the robotic arm's movements, thus improving wafer scheduling flexibility and equipment operating efficiency.

[0036] In some non-limiting embodiments, the device front-end module provided in the first aspect of the present invention can be configured in the semiconductor process equipment provided in the third aspect of the present invention and used to implement the wafer alignment method provided in the second aspect of the present invention.

[0037] The working principle of the aforementioned equipment front-end module will be described below with reference to some examples of semiconductor process equipment and wafer alignment methods. Those skilled in the art will understand that these examples of semiconductor process equipment and wafer alignment methods are merely non-limiting embodiments provided by this invention, intended to clearly demonstrate the main concepts of the invention and provide specific solutions convenient for public implementation, rather than limiting all operating methods or functions of the equipment front-end module. Similarly, this equipment front-end module is also only one non-limiting embodiment provided by this invention and does not limit all operating methods or functions of the semiconductor process equipment, or the implementing entities of each step in these semiconductor process methods.

[0038] First, please refer to Figure 2 . Figure 2 A schematic diagram of the structure of a semiconductor process apparatus provided according to some embodiments of the present invention is shown.

[0039] like Figure 2As shown, in some embodiments of the present invention, the semiconductor process equipment 200 may be a vacuum coating equipment, including a loading port 210, a front-end module 220 and a back-end module 230 arranged in series.

[0040] Specifically, the Load Port (LP) 210 connects to the wafer carrier used to store the wafer. Figure 2 (Not shown) is an interface device at the front end of the equipment used to place and automatically open wafer carriers. Exemplarily, a front-opening unified wafer transport pod (FOUP) can be used. The EquipmentFront-End Module (EFEM) 220 is used to transport and align wafers between the loading port 210 and the back-end module 230. The back-end module 230 may include a load lock (LL) 231, a transfer module (TM) 232, and a process module (PM) 233. The load lock 231 is used to switch the wafer transport environment between atmospheric and vacuum. The transfer module 232 is used to transfer wafers between the equipment front-end module 220 and the process module 233. The process module 233 is used to perform process processing on the received wafers.

[0041] The process module 233 may include one or more reaction chambers. Each reaction chamber can be adapted to the timing requirements of various thin film preparation processes such as plasma-enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), and metal-organic chemical vapor deposition (MOCVD), and can be configured with corresponding structures and accessories, which are not limited here.

[0042] In traditional semiconductor process equipment, the EFEM becomes a bottleneck station when the cycle time of the process side corresponding to the back-end module 230 is faster than the wafer feed cycle time of the EFEM. However, in the above embodiment, by improving the functional structure and workflow of the front-end module 220, the alignment cycle time can be shortened, and the overall WPH of the machine can be improved.

[0043] For details, please refer to Figure 3 . Figure 3 A top view of a device front-end module provided according to some embodiments of the present invention is shown.

[0044] like Figure 3 As shown, in some embodiments, the device front-end module 220 may include a first aligner 221, a second aligner 222, a dual-arm robotic arm 223, and a controller. Figure 3 (not shown).

[0045] Specifically, the dual-arm robotic arm 223 may include a decoupled first arm 2231 and a second arm 2232 for transporting wafers between the loading port 210, the first aligner 221, the second aligner 222, and the back-end module 230. "Decoupled" here means that the rotation axis (θ) and extension axis (R) of the first arm 2231 and the second arm 2232 can be controlled independently. Therefore, when one arm of the dual-arm robotic arm 223 moves, the other arm is not forced to follow. For example, when the first arm 2231 places the first wafer 201 onto the first aligner 221, the second arm 2232 can perform the action of grasping the second wafer 202 from the loading port 210.

[0046] Optionally, in the device front-end module 220, the front end may include a plurality of loading ports 210 (e.g., LP1 to LP4) to connect a plurality of wafer carriers via the plurality of loading ports 210.

[0047] Continue as Figure 3 As shown, the controller can be configured to: control the first arm 2231 to place the first wafer 201 on the first aligner 221 for alignment; control the second arm 2232 to place the second wafer 202 on the second aligner 222 for alignment during the alignment of the first aligner 221, wherein the alignment start time of the second aligner 222 lags behind the alignment start time of the first aligner 221; control the first arm 2231 to remove the aligned first wafer 201 and send it to the back-end module 230 during the alignment of the second aligner 222; and control the second arm 2232 to send the aligned second wafer 202 to the back-end module 230.

[0048] To better explain the control flow of the above controller, please refer to... Figure 4 and Figure 5 A shared understanding. Figure 4 A flowchart of a wafer alignment method provided according to some embodiments of the present invention is shown. Figure 5 A flowchart of a wafer alignment method provided according to other embodiments of the present invention is shown.

[0049] like Figure 4 As shown, in some embodiments of the present invention, the wafer alignment method mainly includes steps S410 to S440. Step S410: Control the first arm to place the first wafer on the first aligner for alignment.

[0050] Combination Figure 3 and Figure 5 It is understood that, in some alternative embodiments, the first aligner 221 and the second aligner 222 are initially in an idle state. The dual-arm manipulator 223 is in the initial (home) position, and its first arm 2231 and second arm 2232 are in an empty state.

[0051] Upon receiving the control command to start the process, the first arm 2231 rotates to the loading port 210 (e.g., LP1), extends and acquires the first wafer 201, then rotates to the orientation of the first aligner 221, extends above the first aligner 221 and descends to place the first wafer 201 on the first aligner 221.

[0052] Returning to Figure 1, in the existing front-end module 100, for example, after the first arm 121 places the first wafer 101 onto the aligner 110, and before the aligner 110 rotates for multi-alignment (corresponding to the rotation arrow), it must be promptly and completely retracted to the safe position 130 to wait. Otherwise, during the alignment process with the first wafer 101, the aligner 110 may collide with the first arm 121, which may not retract in time. However, this robotic arm path of extending and retracting the arm to wait must be repeated once in the alignment process of each wafer. Furthermore, both retraction and re-extension must be performed when the aligner 110 is stopped and the wafer is stationary. This not only causes the robotic arm to wait idly during the alignment period of the aligner 110, but also results in a lengthy pick-and-place path and a start-stop switching delay, further lengthening the transmission and alignment cycle of a single wafer.

[0053] In this regard, optionally, in combination Figure 3 and Figure 5 As shown, in some embodiments of the present invention, after the first wafer 201 is placed on the first aligner 221, the controller can control the first arm 2231 to move in the vertical direction (e.g., upward) to the waiting position, which may coincide with the placement position in the horizontal direction. Subsequently, the controller controls the first aligner 221 to rotate for rotational alignment of the first wafer 201. The distance between the rotation plane of the first aligner 221 and the waiting position in the vertical direction is less than the original distance between it and the safe position 130. The controller only needs to raise or lower the height of the first arm 2231 by a small distance to avoid its rotational alignment path with the first wafer 201 placed on the rotation plane. After the first aligner 221 completes alignment, the controller can control the first arm 2231 to move in the vertical direction in the opposite direction (e.g., downward) from the waiting position to the placement position to retrieve the aligned first wafer 201.

[0054] In the above embodiment, since the waiting position coincides with the wafer placement position in the horizontal direction, there is no need to perform horizontal reciprocating movements of retracting and re-extending the arm during the wafer placement and retrieval process. In this improved process, on the one hand, the retraction and extension path and the start-stop switching delay between retraction and extension are eliminated. After wafer placement, the aligner can be rotated and aligned immediately without waiting for the robotic arm to retract to the safe position 130 before rotation and alignment, thereby shortening the wafer placement path and reducing the time consumed. On the other hand, the first arm 2231 is always stationary in the wafer placement position in the horizontal direction, without occupying additional retraction movement space, thereby reducing the risk of interference with the wafer or aligner during the retraction and extension process. As a result, the overall transmission and alignment cycle of a single wafer is shortened macroscopically, improving the wafer feeding efficiency of the front-end module 220 and the overall machine capacity.

[0055] Further, please see Figure 6 . Figure 6 A side view of the structure of a first aligner and a second aligner provided according to some embodiments of the present invention is shown.

[0056] like Figure 6 As shown, exemplarily and optionally, the ends of the first arm 2231 and / or the second arm 2232 may include a pair of spaced-apart interdigitated fingers 610. The spacing between the interdigitated fingers 610 is greater than the radial width of the main body of the first aligner 221 and / or the second aligner 222, so that when the first arm 2231 and / or the second arm 2232 is lowered in the vertical direction, the pair of interdigitated fingers 610 may be positioned across both sides below the main body of the first aligner 221 and / or the second aligner 222.

[0057] exist Figure 6 In the illustrated embodiment, the waiting position of the robotic arm (including the first arm 2231 and / or the second arm 2232) can be the lower placement area of ​​the wafer placement position. When the first wafer 201 is placed on the first aligner 221 for rotational alignment, the controller can control the first arm 2231 to descend vertically to the lower waiting position for low-position waiting, and after the first wafer 201 is aligned, control the first arm 2231 to rise vertically to the upper wafer placement position to pick up the first wafer 201.

[0058] Next, steps S420 and S430 can be executed. Step S420: During the alignment of the first aligner, the second arm is controlled to place the second wafer on the second aligner for alignment. Step S430: During the alignment of the second aligner, the first arm is controlled to remove the aligned first wafer and send it to the back-end module.

[0059] In this step, the alignment start time of the second aligner 222 is delayed compared to the alignment start time of the first aligner 221, so that the first aligner 221 and the second aligner 222 perform an asynchronous alignment process.

[0060] Specifically, in some optional embodiments, the time lag between the alignment start time of the second aligner 222 and the alignment start time of the first aligner is... Round trip time T with the first arm 2231 r Matching. The round-trip time T of the first arm 2231. r The total time required includes the first arm 2231 removing the aligned first wafer 201 from the first aligner 221, sending the first wafer 201 to the back-end module 230, and taking the third wafer to be aligned from the loading port 210 back to the first aligner 221.

[0061] In the current synchronous alignment process, after the two aligners finish, both arms must simultaneously complete the delivery of the old wafer and the round trip to retrieve the new wafer before the next batch of wafers can be loaded. This round trip time is superimposed on the rotational alignment time, i.e., T. cycle =T a +T r , among which, T cycle The transfer and alignment cycle time for a single wafer, including the entire process time within the front-end module 220 from wafer picking, wafer placement, rotation alignment, wafer removal, and wafer delivery, T a T is the alignment time of the aligner. r The round-trip time for a single arm.

[0062] In the asynchronous alignment process provided in this application, during step S430, while the second aligner 222 is aligning, the controller can control the first arm 2231 to remove the aligned first wafer 201 from the first aligner 221 and deliver it to the back-end module 230. At this time, the second aligner 222 is still rotating to align the second wafer 202. Subsequently, the controller controls the first arm 2231 to return and, while taking the third wafer to be aligned from the loading port 210 and placing it on the first aligner 221, the second aligner 222 may have just completed its rotational alignment. Therefore, the round-trip delivery time of the first arm 2231 can be completely hidden within the rotational alignment period of the second aligner 222, i.e., T cycle ≈max(T a T r ).

[0063] Based on the above timing sequence, it can be known that, assuming the rotational alignment time of the first aligner 221 on the first wafer 201 is [0, T], a The round-trip time from the first arm 2231 retrieving the first wafer 201, sending it to the downstream module 230, and retrieving the new third wafer is [T]. a T a +T r The second aligner 222 lags behind. The startup, the rotational alignment time (i.e., the alignment period) of the second wafer 202 is [ +T a Lag time difference Round trip time T with the first arm 2231 r The relationship determines whether the round-trip windows of the two arms overlap, which in turn determines whether shared resources (such as back-end module 230 and loading port 210) are accessed in time-sharing or in parallel.

[0064] Specifically, the alignment time T of the second aligner 222 with the second wafer 202 a The round-trip time T of the first arm 2231 shall not be less than r This is so that the reciprocating motion of the first arm 2231 is covered by the alignment period of the second aligner 222. The steady-state transmission cycle is determined by the alignment duration T of the second aligner 222. a Round trip time T with the first arm 2231 r The larger one in T is used to determine the outcome. a ≥T r This is a prerequisite for asynchronous aligned dual pipelines to function. If T a < T r That is, if the round-trip time of the first arm 2231 is slower than the alignment time of the second aligner 222, then regardless of the time difference... If the robot arm cannot complete its round-trip motion, one or both of the alignment devices will inevitably experience idle time, thus slowing down the alignment cycle of the alignment device due to the round-trip time of the dual-arm robot arm 223. Therefore, the round-trip motion of the arm that completes the motion first (e.g., the first arm 2231) should be optimized. a T a +T r The rotational alignment time after the alignment device (e.g., the second alignment device 222) is fully engaged. , +T a Within ], T must be satisfied. r ≤ ≤T a conditions.

[0065] Furthermore, in some embodiments, when the lag time difference Equal to the round-trip time T of the first arm 2231 r Time (i.e.) =T r The first arm 2231 and the second aligner 222 can be seamlessly connected. That is, the second aligner 222 has just completed the alignment of the second wafer 202, and the second arm 2232 removes it, ready for delivery. At this time, the first arm 2231 holds the third wafer and places it on the second aligner 222, ready for alignment. In this embodiment, through... =T r This ensures that each alignment device and its respective stage robotic arm are sequentially connected, with no gaps or queues.

[0066] Furthermore, in other embodiments, as described above, after the device front-end module 220 enters a stable operating state, the average transmission and alignment cycle T of the two wafers is... cycle The alignment time T can be shortened to the sum of the alignment time and round-trip time in synchronous mode. a Round trip time T with another robotic arm r The larger one, namely T cycle ≈max(T a T r Compared to the synchronous method where multiple aligners start and stop simultaneously and the alignment periods of the two wafers completely overlap, the asynchronous method in this embodiment saves approximately the smaller of the alignment time and the round-trip time.

[0067] Specifically, when the alignment time T a Round trip time T r When the magnitudes differ significantly, the shorter segment can be masked by the longer one, limiting the improvement in cycle time offered by the asynchronous method. However, when the alignment time T... a Round trip time T r When the magnitudes are comparable, especially when they are nearly equal (e.g., the alignment of a single wafer by the aligner takes about 5-8 seconds, and the round trip between the robotic arm and the back-end module and the loading port takes about 4-6 seconds), the round-trip motion of the robotic arm is completely covered by the alignment window of the other aligner. Neither the aligner nor the robotic arm is idle; the two types of time consumption overlap significantly on the time axis. The two originally sequentially superimposed time periods are only counted once in steady state, reducing the average transmission and alignment cycle time of the two wafers by approximately half. At this point, asynchronous misalignment alignment has the greatest compression effect on the transmission cycle time, resulting in the most significant improvement in the wafer feeding efficiency of the front-end module and the overall wafer throughput (WPH). In this embodiment, through T... a =T r To ensure that the alignment time matches the round-trip time in terms of production capacity, neither the alignment device nor the robotic arm is idle and the two time segments fully overlap.

[0068] In some alternative embodiments, under ideal optimal conditions, the time lag difference The round-trip time T of the robotic arm (e.g., the first arm 2231) r And the alignment time T of the aligner (e.g., the second aligner 222). a All three are equal. At this point, the round-trip time of the robotic arm is 100% covered by the alignment time of the aligner, there is no idle time on either side of the aligner or the robotic arm, and the alignment cycle T is complete. cycle To reach the minimum.

[0069] Then as Figure 4 Finally, step S440 can be executed: control the second arm to send the aligned second wafer to the back-end module.

[0070] Continue back Figure 3 As shown, the rotation plane of the first aligner 221 and / or the second aligner 222 may be provided with an adsorption structure for adsorbing the wafer to be aligned placed on its surface, so as to avoid slippage or movement during the rotational alignment process. This adsorption structure can ensure that the wafer is stable in position throughout the rotational alignment, avoiding the risk of the wafer colliding or shifting with the robotic arm (first arm 2231 or second arm 2232) when the robotic arm (first arm 2231 or second arm 2232) stops at close range due to not being reliably fixed. This provides a structural basis for the action mode of not retracting the arm after placement, waiting vertically, and directly raising or lowering the arm vertically to pick up the wafer after alignment, thereby eliminating the reciprocating path of the robotic arm that extends and retracts, and shortening the transmission and alignment cycle.

[0071] Next, as Figure 6 As shown, in some embodiments, there may be a height difference between the rotation plane of the first aligner 221 and the rotation plane of the second aligner 222, for example, the height difference may be set to 10 cm. This height difference is adapted to the vertical distance between the upper and lower arms of the dual-arm robot, so that the upper arm (e.g., the first arm 2231) and the lower arm (e.g., the second arm 2232) can simultaneously or asynchronously place and retrieve the corresponding wafers on the first aligner 221 and the second aligner 222 on their respective corresponding height planes. The two arms are placed at different heights in the vertical direction without interfering with each other. Thus, one of the robotic arms does not need to set up additional horizontal retraction or yielding actions to avoid another aligner or another arm, which is convenient for cooperating with the above-mentioned vertical waiting position to realize in-situ low-position parking and vertical lifting and placing.

[0072] Next, please refer to Figure 7 . Figure 7 A flowchart illustrating the synchronous alignment of a wafer alignment method provided according to some embodiments of the present invention is shown.

[0073] Combination Figure 3 and Figure 7 It is understood that, in some alternative embodiments, the controller may also be configured to perform the following steps. First, the first arm 2231 and the second arm 2232 are controlled to simultaneously place the first wafer 201 and the second wafer 202 onto the first aligner 221 and the second aligner 222 for alignment, respectively, wherein the second aligner 222 begins alignment simultaneously with the first aligner 221. After the first aligner 221 and the second aligner 222 have both completed alignment, the first arm 2231 and the second arm 2232 are controlled to simultaneously remove the aligned first wafer 201 and the second wafer 202 from their respective aligners and send them to the back-end module 230.

[0074] Those skilled in the art will understand that the specific implementation process of each step in the above-described synchronous alignment process can be the same as that in the asynchronous alignment process. For example, after the two robotic arms complete the simultaneous placement of the wafer on the corresponding aligners, they can simultaneously move forward in the vertical direction to the waiting position without needing to retract the arms and wait. The synchronous alignment process and the asynchronous alignment process differ only in timing. Further details will not be provided here.

[0075] Furthermore, in the aforementioned synchronous alignment process, since there is a height difference between the rotation plane of the first aligner 221 and the rotation plane of the second aligner 222, the first arm 2231 and the second arm 2232 simultaneously place the first wafer 201 and the second wafer 202 onto the first aligner 221 and the second aligner 222, and simultaneously retrieve the wafers from the two aligners after alignment, the two arms move on different height planes respectively. The two arms are staggered in the vertical direction, and there will be no spatial overlap or motion interference, thereby ensuring that the synchronous wafer placement and synchronous wafer retrieval actions of the two arms can be performed safely and smoothly in parallel.

[0076] Further, please see Figure 8 . Figure 8 The diagram illustrates the time required for simultaneous alignment of two wafers using a device front-end module provided according to some embodiments of the present invention, and the corresponding EEFM capacity.

[0077] like Figure 8 As shown, in the existing method with a single aligner and unoptimized robotic arm waiting position (i.e., the robotic arm must retract horizontally to a safe position after placing the wafer and then extend horizontally again when retrieving it), the transfer and alignment time for two wafers using a single aligner in serial alignment is approximately 15.5 seconds, corresponding to a production capacity of approximately 160 wafers / hour. Correspondingly, in this invention, when two aligners are used for synchronous alignment, the two wafers can be placed, aligned, and retrieved simultaneously by both arms, reducing the time to approximately 7 seconds and increasing the production capacity to approximately 197 wafers / hour.

[0078] Furthermore, such as Figure 8 As shown, with the optimization of the robotic arm waiting position (i.e., after the robotic arm places the wafer, it moves vertically to the waiting position that is horizontally aligned with the wafer placement position and stops in place; after alignment, it rises vertically from the waiting position to directly pick up the wafer), the time for a single aligner is about 14.5s and the production capacity is about 164 wafers / hour. When two aligners are aligned simultaneously, the time is further reduced to about 6s, and the corresponding production capacity is increased to about 203 wafers / hour.

[0079] Therefore, under the synchronous alignment process, compared with the existing method of serial alignment with a single aligner, the time for transferring and aligning two wafers to the aligner is reduced by about 60% to 65% by using two aligners and combining them with the waiting position optimization of the robotic arm. The wafer feeding cycle of the equipment front-end module and the overall machine capacity are significantly improved.

[0080] In the existing technology, although the transmission speed and trajectory path of the robotic arm can be used to improve production capacity in the wafer transfer process of the main unit, the space for speed increase and trajectory compression is limited due to the constraints of equipment layout, transmission stability and physical limits of wafer process and yield control. Furthermore, a balance needs to be struck between operating efficiency, service life and product yield.

[0081] To address this issue, this invention does not rely on increasing the speed of the robotic arm or changing the equipment layout. Instead, it sets up two (or even more) aligners within the front-end module of the equipment and controls the dual-arm robotic arm and the two aligners to complete the placement, rotational alignment, and retrieval of wafers in a staggered asynchronous (or synchronous parallel) manner. Simultaneously, the robotic arm waits in place vertically after placing the wafer, and then rises vertically to retrieve it after alignment. This ensures that the round-trip time of the robotic arm is covered by the alignment process of the aligners. Therefore, without increasing the risks of high-speed movement or affecting equipment lifespan and product yield, the originally sequential alignment and retrieval time is transformed into parallel overlapping, significantly shortening the transmission and alignment cycle time, and improving the wafer feeding efficiency of the front-end module and the overall machine capacity.

[0082] Next, please refer to Figure 9 . Figure 9 A structural block diagram of a controller for a device front-end module provided according to some embodiments of the present invention is shown.

[0083] like Figure 9 As shown, in some non-limiting embodiments, the controller 224 in the aforementioned device front-end module 220 may include a memory 2241 and a processor 2242. Here, the memory 2241 includes, but is not limited to, a computer-readable storage medium storing computer instructions. The processor 2242 is connected to the memory 2241 and configured to execute the computer instructions stored in the memory 2241 to implement the wafer alignment method provided in the second aspect of the present invention.

[0084] In summary, this invention provides a device front-end module, a wafer alignment method, a semiconductor process equipment, and a computer-readable storage medium, which enable the alignment processes of two wafers to be independent of each other, without the need for simultaneous start-up and shutdown, reducing the time consumed by serial superposition, thereby optimizing the transmission cycle, increasing the equipment's WPH (Wafer Per Hour) capacity, and even if an alignment anomaly occurs on a single wafer, it will not affect the alignment of the other path and the robotic arm's movements, thereby improving wafer scheduling flexibility and equipment operating efficiency.

[0085] Although the methods described above are illustrated and depicted as a series of actions for the sake of simplicity, it should be understood and appreciated that these methods are not limited by the order of the actions, as some actions may occur in a different order and / or concurrently with other actions from the illustrations and descriptions herein or not illustrated and described herein but which may be understood by those skilled in the art, according to one or more embodiments.

[0086] Those skilled in the art will further appreciate that the various illustrative logic blocks, modules, circuits, and algorithm steps described in conjunction with the embodiments disclosed herein can be implemented as electronic hardware, computer software, or a combination of both. To clearly illustrate this interchangeability between hardware and software, the various illustrative components, blocks, modules, circuits, and steps are described above in a generalized manner in terms of their functionality. Whether such functionality is implemented as hardware or software depends on the specific application and the design constraints imposed on the overall system. Those skilled in the art may implement the described functionality in different ways for each specific application, but such implementation decisions should not be construed as departing from the scope of the invention.

[0087] The various illustrative logic modules and circuits described in conjunction with the embodiments disclosed herein may be implemented or performed using a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. The general-purpose processor may be a microprocessor, but in alternatives, it may be any conventional processor, controller, microcontroller, or state machine. The processor may also be implemented as a combination of computing devices, such as a combination of a DSP and a microprocessor, multiple microprocessors, one or more microprocessors cooperating with a DSP core, or any other such configuration.

[0088] The steps of the methods or algorithms described in conjunction with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of both. The software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, removable disk, CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to a processor such that the processor can read and write information to / from the storage medium. In an alternative, the storage medium may be integrated into the processor. The processor and storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In an alternative, the processor and storage medium may reside as discrete components in the user terminal.

[0089] In one or more exemplary embodiments, the described functionality may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software as a computer program product, the functionality may be stored or transmitted as one or more instructions or code on or through a computer-readable medium. A computer-readable medium includes both computer storage media and communication media, encompassing any medium that facilitates the transfer of a computer program from one location to another. A storage medium may be any available medium accessible to a computer. By way of example and not limitation, such a computer-readable medium may include RAM, ROM, EEPROM, CD-ROM or other optical disc storage, disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and is accessible to a computer. Any connection is also legitimately referred to as a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of a medium. As used in this article, disk and disc include compact discs (CDs), laser discs, optical discs, digital multi-purpose discs (DVDs), floppy disks, and Blu-ray discs. Disks typically reproduce data magnetically, while discs reproduce data optically using lasers. Combinations of these should also be included within the scope of computer-readable media.

[0090] The prior description of this disclosure is provided to enable any person skilled in the art to make or use this disclosure. Various modifications to this disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the spirit or scope of this disclosure. Therefore, this disclosure is not intended to be limited to the examples and designs described herein, but should be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A device front-end module, characterized in that, include: First aligner and second aligner; A dual-arm robotic arm, comprising a decoupled first arm and a second arm, is used to move wafers between a loading port, a first aligner, a second aligner, and a back-end module. as well as The controller is configured to: control the first arm to place the first wafer onto the first aligner for alignment; During the alignment of the first aligner, the second arm is controlled to place the second wafer on the second aligner for alignment, wherein the alignment start time of the second aligner is delayed after the alignment start time of the first aligner; during the alignment of the second aligner, the first arm is controlled to remove the aligned first wafer and send it to the back-end module; and the second arm is controlled to send the aligned second wafer to the back-end module.

2. The device front-end module as described in claim 1, characterized in that, The step of controlling the first arm to place the first wafer on the first aligner for alignment includes: In response to the first wafer being placed on the first alignment device, the first arm is controlled to move forward in the vertical direction to a waiting position, wherein the waiting position coincides with the wafer placement position in the horizontal direction; and Control the first aligner to rotate in order to perform rotational alignment on the first wafer; The step of controlling the first arm to remove the aligned first wafer and send it to the back-end module includes: After the first aligner completes the alignment, the first arm is controlled to move in the opposite direction from the waiting position to the wafer placement position along the vertical direction to retrieve the first wafer.

3. The device front-end module as described in claim 1, characterized in that, The time lag between the alignment start time of the second aligner and the alignment start time of the first aligner is matched with the round-trip time of the first arm, wherein the round-trip time of the first arm includes the total time required for the first arm to remove the aligned first wafer from the first aligner, send the first wafer to the back-end module, and remove the third wafer to be aligned from the loading port and return to the first aligner.

4. The device front-end module as described in claim 3, characterized in that, The step of controlling the first arm to remove the aligned first wafer and send it to the back-end module during the alignment process of the second aligner includes: During alignment with the second aligner, the first arm is controlled to remove the aligned first wafer from the first aligner and deliver it to the back-end module; and In response to the first wafer being placed into the back-end module, the first arm is controlled to return and the third wafer to be aligned is taken out from the loading port and placed on the first aligner.

5. The device front-end module as described in claim 3, characterized in that, The alignment time of the second aligner on the second wafer is not less than the round-trip time of the first arm, so that the round-trip motion of the first arm is covered by the alignment period of the second aligner.

6. The device front-end module as described in claim 1, characterized in that, The first aligner and / or the second aligner have an adsorption structure on their rotating plane for adsorbing the wafer to be aligned placed on their surface.

7. The device front-end module as described in claim 1, characterized in that, There is a height difference between the rotation plane of the first aligner and the rotation plane of the second aligner.

8. The device front-end module as described in claim 7, characterized in that, The controller is also configured to: The first arm and the second arm are controlled to simultaneously place the first wafer and the second wafer onto the first aligner and the second aligner for alignment, respectively, wherein the second aligner and the first aligner begin alignment simultaneously; and After the first aligner and the second aligner have completed alignment, the first arm and the second arm are controlled to remove the aligned first wafer and the second wafer from their respective aligners and send them to the back-end module.

9. A wafer alignment method, characterized in that, Implemented via the device front-end module as described in any one of claims 1 to 8, the wafer alignment method includes the following steps: The first arm is controlled to place the first wafer onto the first aligner for alignment. During the alignment of the first aligner, the second arm is controlled to place the second wafer on the second aligner for alignment, wherein the alignment start time of the second aligner is delayed compared to the alignment start time of the first aligner. During alignment with the second aligner, the first arm is controlled to remove the aligned first wafer and deliver it to the back-end module; and The second arm is controlled to deliver the aligned second wafer to the back-end module.

10. A semiconductor process apparatus, characterized in that, include: Loading port, connected to the wafer carrier for storing wafers; The device front-end module as described in any one of claims 1 to 9 is used for transporting and aligning the wafer between the loading port and the back-end module; as well as The back-end module includes a process for processing the wafer received from the front-end module of the device.