Ion beam additive-subtractive integrated filling process and structure of high-aspect-ratio micro-nano via hole

CN122935233APending Publication Date: 2026-10-16HUNAN UNIV +1
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Patent Information

Application Number
CN202610900855.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2026-06-22
Publication Date
2026-10-16

AI Technical Summary

Technical Problem

[0006]针对现有技术的高深径比通孔在进行物理气相沉积种子层时,因阴影效应导致孔口过早缩口或封闭,继而引发内部沉积中断、覆盖不连续的问题,本发明提供了一种高深径比微纳通孔结构离子束增减材一体化填充工艺方法及结构,以突破高深径比通孔高质量填充的瓶颈,实现精准协同控制沉积与刻蚀角度、适应通孔填充进程动态变化

Benefits of technology

[0018]与现有技术相比,本发明所提供的一种高深径比微纳通孔结构离子束增减材一体化填充工艺方法及结构的技术优势至少体现在以下几个方面:

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Abstract

The application provides an ion beam additive and subtractive integrated filling process and structure of a high-aspect-ratio micro-nano via, first provides a substrate with a high-aspect-ratio via, then performs first ion beam sputtering deposition, deposits a thin film material on the substrate at a first deposition incident angle, and forms a seed layer on the inner wall and the aperture of the via; then performs ion beam etching, performs ion beam etching on the substrate at an etching incident angle, removes the excess thin film material at the aperture, and the etching incident angle is greater than the first deposition incident angle; finally, performs second ion beam sputtering deposition, further deposits the thin film material on the substrate at a second deposition incident angle, and continues to thicken the seed layer on the inner wall and the aperture of the via. The three-step process of deposition-etching-deposition forms a uniform and continuous seed layer, effectively overcomes the shadow effect, and is particularly suitable for defect-free filling of barrier layers, conductive seed layers and the like in advanced interconnection structures such as high-aspect-ratio TSV and TGV.
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Description

Technical Field

[0001] This invention relates to the field of micro-nano manufacturing technology, and in particular provides an integrated filling process and structure for ion beam additive and subtractive materials in micro-nano through-hole structures with high aspect ratio. Background Technology

[0002] As integrated circuits evolve towards higher density and performance, 3D integration and advanced packaging technologies have become crucial pathways to perpetuate Moore's Law. Through-silicon vias (TSVs), through-glass vias (TGVs), and high aspect ratio via structures in various interposers serve as core units for vertical interconnects, and their filling quality directly determines the electrical performance, heat dissipation capabilities, and long-term reliability of devices. When the aspect ratio reaches 5:1 or even higher, how to fabricate void-free, highly conformal, and continuous conductive seed layers has become a key challenge in the field of micro-nano manufacturing.

[0003] In industry, physical vapor deposition (PVD) is often used to deposit a conductive seed layer on the inner wall of vias, followed by electroplating to fill the main metal. However, traditional PVD technologies such as magnetron sputtering inevitably produce a shadowing effect when dealing with vias with high aspect ratios—the deposition rate at the via opening is much higher than that at the interior and bottom. As deposition progresses, material gradually accumulates at the opening, forming a hanging structure, causing the opening to narrow or even close prematurely, while leaving unfilled voids or weak areas with poor continuity inside the via. This is unacceptable for interconnect structures such as TSVs (Through-Screen Vias) that require low resistance and high reliability.

[0004] To alleviate these problems, the industry has proposed improved solutions such as ionized metal plasma (IMP) deposition, tilted deposition, and rotating sample stages. However, these methods have limited effectiveness for through-holes with an aspect ratio greater than 5:1, and the rapid accumulation of material at the orifice makes it difficult to maintain the orifice's continuous openness. While atomic layer deposition (ALD) and chemical vapor deposition (CVD) offer excellent conformal coverage, their limited material selection, low deposition rate, and high processing costs pose significant limitations for large-area applications of conductive seed layers. Chinese patent CN104269405A employs a dual-ion beam simultaneous deposition-etching technique, using one ion beam for deposition and another beam to simultaneously bombard the deep hole surface to prevent orifice coverage. However, this solution lacks precise control over the incident angle, and therefore lacks targeted correction methods for the orifice narrowing problem caused by the shadowing effect in high aspect ratio through-holes.

[0005] Ion beam etching technology boasts advantages such as excellent beam directionality, precisely adjustable incident angle, controllable particle energy, and a pristine process environment, theoretically making it suitable for correcting the orifice morphology of high aspect ratio vias. However, combining it with ion beam sputtering deposition to create a highly controllable additive / subtractive filling process that adapts to the dynamic changes in via morphology during the filling process remains a challenge, lacking a systematic and engineerable technical solution. Therefore, there is an urgent need to develop a manufacturing method capable of precisely and collaboratively controlling the deposition and etching angles and adapting to the dynamic changes in the via filling process, in order to overcome the bottleneck of high-quality filling of high aspect ratio vias. Summary of the Invention

[0006] To address the problem that existing high aspect ratio vias suffer from premature narrowing or closure of the via opening due to the shadowing effect during physical vapor deposition (PVD) seed layer formation, leading to internal deposition interruptions and discontinuous coverage, this invention provides an integrated ion beam additive and subtractive filling process and structure for high aspect ratio micro / nano vias. This breakthrough overcomes the bottleneck of high-quality filling of high aspect ratio vias, enabling precise and coordinated control of deposition and etching angles and adapting to dynamic changes in the via filling process.

[0007] To achieve the above objectives, in a first aspect, the present invention provides an integrated ion beam additive and subtractive filling process for high aspect ratio micro / nano vias, comprising the following steps: First, a substrate with high aspect ratio through holes is provided; Then, a first ion beam sputtering deposition is performed to deposit thin film material onto the substrate at a first deposition incident angle, forming a seed layer on the inner wall and orifice of the via; Then, ion beam etching is performed on the substrate at an etching incident angle to remove excess thin film material at the aperture, so as to reopen or enlarge the opening of the via, wherein the etching incident angle is greater than the first deposition incident angle. Finally, a second ion beam sputtering deposition is performed to further deposit the thin film material onto the substrate at a second deposition incident angle, thereby thickening the seed layer on the inner wall of the via and at the orifice.

[0008] Optionally, after providing a substrate with vias having a high aspect ratio and before performing the first ion beam sputtering deposition, a barrier layer is formed on the inner wall of the vias and the surface of the substrate. The barrier layer is deposited first and directly covers the inner wall of the vias to prevent the diffusion of the seed layer material and enhance adhesion. The barrier layer is one or a combination of Ta, Ti, TaN, and TiN.

[0009] Optionally, after forming a barrier layer on the inner wall of the via and the substrate surface and before performing the first ion beam sputtering deposition, an insulating layer is formed on the inner wall of the via and the substrate surface. The insulating layer is then deposited and covers the barrier layer to achieve electrical isolation. The insulating layer is SiO2.

[0010] Optionally, the seed layer is a conductive material to form an electrical connection layer for high aspect ratio vias, wherein the conductive material includes Cu, Ti, Ru, Ta, TiN, TaN, or a combination thereof.

[0011] Optionally, the first deposition incident angle is the angle between the incident direction of the deposited atoms and the surface normal of the substrate during the first ion beam sputtering deposition, and the first deposition incident angle is 2° to 20°.

[0012] Optionally, the etching incident angle is the angle between the direction of direct bombardment by the ion beam and the surface normal of the substrate, and the etching incident angle is 20° to 50°.

[0013] Optionally, the second deposition incident angle is the angle between the incident direction of the deposited atoms and the surface normal of the substrate during the second ion beam sputtering deposition, and the second deposition incident angle is less than or equal to the first deposition incident angle.

[0014] Optionally, the high aspect ratio via is a through silicon via (TSV), a through glass via (TGV), or a via in other semiconductor or dielectric materials.

[0015] Optionally, the aspect ratio of the high aspect ratio through hole is greater than or equal to 5:1.

[0016] Optionally, the ion beam additive-subtractive filling process for high aspect ratio micro / nano vias provided by the present invention includes the following steps: First, a substrate with high aspect ratio through holes is provided; Then, a barrier layer is formed on the inner wall of the through hole and the surface of the substrate. The barrier layer is deposited first and then directly covers the inner wall of the through hole to prevent the diffusion of the seed layer material and enhance adhesion. The barrier layer is one or a combination of Ta, Ti, TaN, and TiN. Then, an insulating layer is formed on the inner wall of the through-hole and the surface of the substrate. This insulating layer is subsequently deposited and covers the barrier layer to achieve electrical isolation. The insulating layer is SiO2. 2; Then, a first ion beam sputtering deposition is performed to deposit thin film material onto the substrate at a first deposition incident angle, forming a seed layer on the inner wall and orifice of the via; Then, ion beam etching is performed on the substrate at an etching incident angle to remove excess thin film material at the aperture, so as to reopen or enlarge the opening of the via, wherein the etching incident angle is greater than the first deposition incident angle. Finally, a second ion beam sputtering deposition is performed to further deposit the thin film material onto the substrate at a second deposition incident angle, thereby thickening the seed layer on the inner wall of the via and at the orifice.

[0017] To achieve the above objectives, in a second aspect, this method provides a high aspect ratio micro / nano via structure manufactured using an ion beam additive-subtractive filling process, which includes a substrate, a barrier layer, an insulating layer, and a seed layer. The substrate has a via with a high aspect ratio; the barrier layer covers the inner wall of the via to prevent the diffusion of the seed layer material and enhance adhesion; the insulating layer covers the barrier layer to achieve electrical isolation; after the barrier layer and the insulating layer are formed sequentially on the inner wall of the via, the seed layer is configured to deposit thin film material on the substrate at a first deposition incident angle, and to remove excess thin film material at the orifice by ion beam etching of the substrate at an etching incident angle, and then to further deposit thin film material on the substrate at a second deposition incident angle to continue to thicken the inner wall and orifice of the via.

[0018] Compared with the prior art, the technical advantages of the high aspect ratio micro-nano through-hole structure ion beam additive and subtractive filling process method and structure provided by the present invention are reflected in at least the following aspects: Firstly, by utilizing the directional and independently and precisely controllable characteristics of ion beams and incident angles, a synergistic mechanism of "low-angle deposition promoting internal coverage and high-angle etching repairing the orifice" is formed, fundamentally solving the problem of premature orifice closure in high aspect ratio through-hole filling. Secondly, the three-step process of deposition-etching-deposition adopts a step-by-step sequential execution method, which is different from the problem of mutual competition and parameter constraints between deposition and etching in the traditional synchronous additive and subtractive manufacturing process. Each deposition step and etching step can independently optimize the incident angle and process parameters, and the correction of the orifice and the continuous thickening of the seed layer can be completed in a single process, making the process simple and efficient. Thirdly, the purely physical ion beam etching avoids the problems of difficult-to-control selectivity and substrate thermal damage caused by chemical reactions. The process is clean, has good compatibility, and is easy to integrate in situ with the deposition step in the same vacuum chamber, making it suitable for mass production. Attached Figure Description

[0019] The present invention will now be described in further detail with reference to the accompanying drawings and specific embodiments. The accompanying drawings, which are provided to further illustrate the invention and constitute a part of this application, do not constitute an undue limitation of the invention.

[0020] Figure 1 This is a schematic diagram of the overall structure of the ion beam additive / subtractive filling system used in the invention.

[0021] Figure 2 A schematic diagram of the cross-sectional structure of the substrate with a high aspect ratio through hole provided for step S1.

[0022] Figure 3 This is a schematic diagram of the cross-sectional structure of the via that shows a narrowing of the orifice due to the shadowing effect after the first ion beam sputtering deposition step in step S2.

[0023] Figure 4 A cross-sectional diagram showing the via opening being reopened and enlarged after the ion beam etching step S3 is performed.

[0024] Figure 5 This is a schematic cross-sectional view of the seed layer continuing to thicken after the second ion beam sputtering deposition is performed in step S4.

[0025] Figure 6 The results of scanning electron microscopy (SEM) imaging of the through-holes after the ion beam sputtering deposition step, showing the narrowing of the orifice due to the shadowing effect.

[0026] Figure 7 To assist the ion source in performing the ion beam etching step, Figure 6 Cross-sectional scanning electron microscopy (SEM) imaging results of a through-hole structure with the opening reopened and enlarged.

[0027] Figure 8 To assist the ion source in further performing the ion beam etching step, Figure 7 Cross-sectional scanning electron microscopy (SEM) imaging results of a through-hole structure with the opening reopened and enlarged.

[0028] Figure 9 This is a flowchart of a preferred embodiment of the integrated filling process for high aspect ratio micro / nano through-hole structures using ion beam additive and subtractive materials, provided by the present invention.

[0029] Explanation of reference numerals in the attached diagram: 1-Barrier layer, 2-Insulating layer, 3-Base, 4-Seed layer. Detailed Implementation

[0030] The present invention will be further described below with reference to the accompanying drawings and specific embodiments. It should be understood that the following embodiments are for illustrative purposes only and are not intended to limit the scope of protection of the present invention. Equivalent substitutions or modifications made by those skilled in the art without departing from the concept of the present invention should fall within the scope of protection of the present invention.

[0031] This invention provides an integrated ion beam additive and subtractive filling process for high aspect ratio micro / nano through-hole structures, comprising the following steps: A substrate 3 is provided, wherein the substrate 3 has a high aspect ratio through hole.

[0032] Preferably, after providing the substrate 3 and before performing the first ion beam sputtering deposition step, a barrier layer 1 and an insulating layer 2 are sequentially formed on the inner wall of the via and the surface of the substrate 3; wherein, the barrier layer 1 is deposited first, directly covering the inner wall of the via, to prevent the subsequently deposited seed layer 4 material from diffusing into the substrate 3 and to enhance adhesion; the insulating layer 2 is deposited later, covering the barrier layer 1, to achieve electrical isolation.

[0033] The first ion beam sputtering deposition step is performed to deposit thin film material onto the substrate 3 at a first deposition incident angle α, forming a seed layer 4 on the inner wall and orifice of the through hole; due to the shadowing effect, the thin film material deposited at the orifice is more than that inside the through hole, causing the orifice to narrow or close.

[0034] An ion beam etching step is performed to etch the substrate 3 with an etching incident angle β, thereby reopening or enlarging the opening of the via by preferentially removing excess thin film material at the aperture.

[0035] A second ion beam sputtering deposition step is performed to further deposit the thin film material onto the substrate 3 at a second deposition incident angle γ, thereby thickening the seed layer 4 at the inner wall and orifice of the via. The first ion beam sputtering deposition step, the ion beam etching step, and the second ion beam sputtering deposition step are performed sequentially, and the via is filled through a three-step process of deposition-etching-deposition.

[0036] This invention utilizes the excellent directionality of ion beams to set specific incident angles for the deposition and etching steps, and by controlling the etching incident angle β to be greater than the first deposition incident angle α, a synergistic mechanism of "low-angle deposition promoting internal coverage and high-angle etching repairing the orifice" is formed. After the first deposition, the etching ion beam is incident on the substrate 3 at a relatively large angle, which can preferentially remove the excess material accumulated at the orifice due to the shadowing effect. Since the deep part of the via is blocked by its own sidewall, the amount of etching on the inner seed layer 4 is minimal. Thus, the orifice is efficiently reopened without damaging the already formed seed layer 4, achieving precise control of the orifice morphology. Subsequently, a second deposition is performed at the second deposition incident angle to further thicken and improve the continuity of the seed layer 4.

[0037] The first deposition incident angle α is defined as the angle between the incident direction of the deposited atoms and the normal to the surface of the substrate 3, and this first deposition incident angle α is set to 2° to 20°. A smaller deposition incident angle is beneficial for transporting more thin film material into the via, laying the foundation for the formation of a continuous seed layer 4.

[0038] The etching incident angle β is defined as the angle between the direct bombardment direction of the ion beam and the normal to the surface of the substrate 3, and the etching incident angle β is set to 20° to 50°.

[0039] The second deposition incident angle γ is less than or equal to the first deposition incident angle α, so as to transport the thin film material more efficiently to the depth of the via based on the etched and enlarged via opening.

[0040] The seed layer 4 is preferably a conductive material used to form the electrical connection layer for the TSV via. The conductive material includes, but is not limited to, Cu, Ti, Ru, Ta, TiN, TaN, or combinations thereof. The process of this invention is particularly suitable for high aspect ratio vias with an aspect ratio greater than or equal to 5:1.

[0041] The barrier layer 1 is one or a combination of Ta, Ti, TaN, and TiN, and the insulating layer 2 is SiO2.

[0042] The via is at least one of through silicon via (TSV), through glass via (TGV), or other semiconductor or dielectric material via.

[0043] like Figure 9 As shown, in a preferred embodiment, the ion beam additive-subtractive filling process for high aspect ratio micro / nano vias provided by the present invention includes the following steps: First, a substrate 3 with a high aspect ratio through-hole is provided; Then, a barrier layer 1 is formed on the inner wall of the through hole and the surface of the substrate 3. The barrier layer 1 is deposited first and then directly covers the inner wall of the through hole to prevent the diffusion of the seed layer 4 material and enhance adhesion. The barrier layer 1 is one or a combination of Ta, Ti, TaN, and TiN. Then, an insulating layer 2 is formed on the inner wall of the through hole and the surface of the substrate 3. The insulating layer 2 is then deposited and covers the barrier layer 1 to achieve electrical isolation. The insulating layer 2 is SiO2. 2; Then, a first ion beam sputtering deposition is performed to deposit thin film material onto the substrate 3 at a first deposition incident angle, forming a seed layer 4 on the inner wall and orifice of the through hole; Then, ion beam etching is performed on the substrate 3 at an etching incident angle to remove excess thin film material at the aperture, so as to reopen or enlarge the opening of the via. The etching incident angle is greater than the first deposition incident angle. Finally, a second ion beam sputtering deposition is performed to further deposit the thin film material onto the substrate 3 at a second deposition incident angle, thereby continuing to thicken the seed layer 4 on the inner wall of the through hole and at the orifice.

[0044] In a preferred embodiment, the present invention also provides a high aspect ratio through-hole structure, which is filled using the ion beam additive-subtractive filling process described above, including a substrate 3, a barrier layer 1, an insulating layer 2, and a seed layer 4; the substrate 3 has a high aspect ratio through-hole; the barrier layer 1 covers the inner wall of the through-hole to prevent the diffusion of the seed layer 4 material and enhance adhesion; the insulating layer 2 covers the barrier layer 1 to achieve electrical isolation; after the barrier layer 1 and the insulating layer 2 are sequentially formed on the inner wall of the through-hole, the seed layer 4 is configured to deposit thin film material onto the substrate 3 at a first deposition incident angle, and to perform ion beam etching on the substrate 3 at an etching incident angle to remove excess thin film material at the orifice, and then further deposit the thin film material onto the substrate 3 at a second deposition incident angle to continue thickening the inner wall and orifice of the through-hole, thereby obtaining a high-quality seed layer 4 with internal continuity and no voids at the orifice, wherein the barrier layer is also called a diffusion barrier layer.

[0045] This invention provides an integrated ion beam additive and subtractive fabrication filling process and structure for high aspect ratio micro / nano vias. Utilizing the directional and independently controllable incident angle characteristics of the ion beam, a synergistic mechanism of "low-angle deposition promoting internal coverage and high-angle etching repairing the via opening" is formed, fundamentally solving the problem of premature via opening closure in high aspect ratio via filling. Furthermore, the three-step deposition-etching-deposition process is executed sequentially, unlike the competition and parameter constraints between deposition and etching in traditional simultaneous additive and subtractive fabrication processes. Each deposition and etching step can independently optimize the incident angle and process parameters, completing via opening correction and continuous seed layer thickening in a single process, resulting in a simple and efficient process. Moreover, the purely physical ion beam etching avoids the problems of uncontrollable selectivity and substrate thermal damage caused by chemical reactions, resulting in a clean process with good compatibility. It is easily integrated in situ with the deposition step within the same vacuum chamber, making it suitable for mass production.

[0046] To make the objectives, technical solutions, and advantages of the present invention clearer, a detailed comparison will be made below with the accompanying drawings and specific embodiments, using comparative examples from existing art, to further describe the present invention in detail. However, it should be understood that the scope of protection of the present invention is not limited to the following embodiments.

[0047] This comparative example demonstrates the limitations of traditional single-shot ion beam sputtering deposition processes in filling high aspect ratio vias.

[0048] S1: Provides substrate 3 See Figure 2A substrate 3, also referred to as a substrate, is provided. The substrate 3 is a single-crystal silicon wafer on which a via array with an aspect ratio of 5:1 is fabricated using deep reactive ion etching (DRIE). The via diameter is approximately 50 nm and the depth is approximately 250 nm. After forming the vias, a barrier layer 1 and an insulating layer 2 are sequentially deposited on the inner walls of the vias and on the surface of the substrate 3. Furthermore, the sample stage rotates continuously at 26 rpm to ensure deposition uniformity.

[0049] S2: First ion beam sputtering deposition See Figure 3 The first ion beam sputtering deposition step is performed. A high-purity copper target is bombarded with an Ar ion beam, and copper atoms are deposited onto the substrate surface and within the vias at a first deposition incident angle α. In this step, α is set to 15°. Due to the geometric constraints of the high aspect ratio and the shading effect, the copper atom deposition rate at the via opening is much higher than that at the depth inside the via. Figure 3 As shown, this step initially forms a copper seed layer 4 on the inner wall and bottom of the through hole, but obvious material accumulation is formed at the hole opening, resulting in a significant narrowing or even closure of the hole opening diameter, making it impossible to form a continuous conductive seed layer 4.

[0050] This shows that traditional single-pass deposition processes cause the orifice to close prematurely due to the shadowing effect, which cannot meet the filling requirements of high aspect ratio through holes.

[0051] Under the same initial conditions, this embodiment uses the ion beam additive / subtractive filling process proposed in this invention to overcome the orifice sealing problem in Comparative Example 1.

[0052] This process is performed in situ within the vacuum chamber of the same ion beam processing equipment. High-quality filling is achieved by sequentially executing a first ion beam sputtering deposition, ion beam etching, and a second ion beam sputtering deposition step. The specific process steps are as follows: Figures 2 to 5 As shown, it includes: S1 (providing substrate 3) and S2 (first ion beam sputtering deposition) are the same as those in Comparative Example 1, and will not be described again.

[0053] S3: Ion beam etching See Figure 4 The ion beam etching step is then performed. The surface of substrate 3 is physically bombarded and etched using an Ar ion beam. In this step, the etching incident angle β is set to 45°, which is defined as the angle between the direct bombardment direction of the ion beam and the normal to the surface of substrate 3.

[0054] Because β is significantly larger than α, the ion beam is incident at a more oblique angle. This difference in directionality allows the ion beam to selectively and efficiently physically sputter away excess copper material accumulated at the aperture due to the previous deposition step, such as... Figure 4As shown, the through-hole opening was reopened and enlarged. Meanwhile, due to the shielding effect of the sidewalls deep within the through-hole, the seed layer 4 already deposited inside the hole was almost unaffected.

[0055] S4: Second ion beam sputtering deposition See Figure 5 The second ion beam sputtering deposition step is then performed. A high-purity copper target is bombarded with an Ar ion beam, and copper atoms are further deposited onto the surface of substrate 3 and into the vias at a second deposition incident angle γ. In this step, γ is set to 10°, which is less than the first deposition incident angle α (15°), to more efficiently transport copper atoms to the depth of the vias based on the etched and enlarged via openings, further thickening the seed layer 4 on the inner wall of the vias.

[0056] After the above steps S2 (first ion beam sputtering deposition), S3 (ion beam etching) and S4 (second ion beam sputtering deposition), a complete deposition-etching-deposition three-step process is completed, thickening the copper seed layer 4 on the inner wall of the via to a single-sided thickness of about 10 nm (i.e., a total double-sided thickness of about 20 nm).

[0057] Figure 5 The diagram shows the intermediate state after the completion of the three-step process, where the orifice has been reopened and the internal seed layer 4 is continuous and uniform.

[0058] In summary, this invention discloses an integrated ion beam additive and subtractive filling process for high aspect ratio micro / nano via structures, which addresses the problem of premature narrowing or closure of via openings due to shadowing effects during the filling process of high aspect ratio micro / nano via structures. The process includes: providing a substrate 3 with high aspect ratio vias; performing a first ion beam sputtering deposition step, depositing thin film material onto the substrate 3 at a first deposition incident angle, forming a seed layer 4 on the inner wall and at the via opening; during the deposition process, narrowing or closure of the via openings occurs due to shadowing effects; subsequently performing an ion beam etching step, etching the substrate 3 at an etching incident angle to remove excess thin film material at the via openings, reopening or enlarging the via openings; and then performing a second ion beam sputtering deposition step, further depositing thin film material onto the substrate 3 at a second deposition incident angle, continuing to thicken the seed layer 4 on the inner wall and at the via openings. This invention forms a uniform and continuous seed layer 4 through a three-step process of deposition-etching-deposition, effectively overcoming the shadowing effect. It is particularly suitable for defect-free filling of barrier layer 1, conductive seed layer 4, etc. in advanced interconnect structures such as high aspect ratio TSV and TGV.

[0059] This invention, through an original three-step deposition-etching-deposition process and precise coordinated control of the incident angles of deposition and etching, successfully solves the core problem of premature closure of vias caused by the shadowing effect in high aspect ratio via filling, and prepares a defect-free, high-quality continuous seed layer 4, which has significant application prospects in the fields of 3D integration and advanced packaging.

[0060] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit it. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of the invention without departing from the spirit and scope of the technical solutions of the present invention, and all such modifications and substitutions should be covered within the scope of the claims of the present invention.

Claims

1. An integrated ion beam additive and subtractive filling process for high aspect ratio micro / nano vias, characterized in that, Including the following steps: First, a substrate with a high aspect ratio through hole is provided (3); Then, a first ion beam sputtering deposition is performed to deposit thin film material onto the substrate (3) at a first deposition incident angle, forming a seed layer (4) on the inner wall and orifice of the through hole. Then, ion beam etching is performed on the substrate (3) at an etching incident angle to remove excess thin film material at the orifice, so as to reopen or enlarge the opening of the via, wherein the etching incident angle is greater than the first deposition incident angle; Finally, a second ion beam sputtering deposition is performed to further deposit the thin film material onto the substrate (3) at a second deposition incident angle, thereby continuing to thicken the seed layer (4) on the inner wall of the through hole and at the orifice.

2. The ion beam additive and subtractive filling process for high aspect ratio micro / nano vias according to claim 1, characterized in that, After providing a substrate (3) with a high aspect ratio via and before performing the first ion beam sputtering deposition, a barrier layer (1) is formed on the inner wall of the via and the surface of the substrate (3). The barrier layer (1) is deposited first and directly covers the inner wall of the via to prevent the diffusion of the seed layer (4) material and enhance adhesion. The barrier layer (1) is one or a combination of Ta, Ti, TaN, and TiN.

3. The ion beam additive and subtractive material integrated filling process for high aspect ratio micro / nano vias according to claim 2, characterized in that, After forming a barrier layer (1) on the inner wall of the through hole and the surface of the substrate (3) and before performing the first ion beam sputtering deposition, an insulating layer (2) is formed on the inner wall of the through hole and the surface of the substrate (3). The insulating layer (2) is then deposited and covers the barrier layer (1) to achieve electrical isolation. The insulating layer (2) is SiO2.

4. The ion beam additive and subtractive filling process for high aspect ratio micro / nano vias according to claim 1, characterized in that, The seed layer (4) is a conductive material to form an electrical connection layer for high aspect ratio through holes. The conductive material includes Cu, Ti, Ru, Ta, TiN, TaN or a combination thereof.

5. The ion beam additive and subtractive filling process for high aspect ratio micro / nano vias according to claim 1, characterized in that, The first deposition incident angle is the angle between the incident direction of the deposited atoms and the surface normal of the substrate (3) during the first ion beam sputtering deposition, and the first deposition incident angle is 2° to 20°.

6. The ion beam additive and subtractive filling process for high aspect ratio micro / nano vias according to claim 1, characterized in that, The etching incident angle is the angle between the direction of direct bombardment of the ion beam and the surface normal of the substrate (3), and the etching incident angle is 20° to 50°.

7. The ion beam additive and subtractive material integrated filling process for high aspect ratio micro / nano vias according to claim 1, characterized in that, The second deposition incident angle is the angle between the incident direction of the deposited atoms and the surface normal of the substrate (3) during the second ion beam sputtering deposition, and the second deposition incident angle is less than or equal to the first deposition incident angle.

8. The ion beam additive and subtractive filling process for high aspect ratio micro / nano vias according to claim 1, characterized in that, The high aspect ratio via is a through silicon via (TSV), a through glass via (TGV), or a via in other semiconductor or dielectric materials.

9. The ion beam additive-subtractive filling process for high aspect ratio micro / nano vias according to claim 1 or 8, characterized in that, The aspect ratio of the high aspect ratio through hole is greater than or equal to 5:

1.

10. A high aspect ratio micro / nano via structure manufactured using an integrated ion beam additive / subtractive filling process, employing the process described in claims 1 to 9, characterized in that... It includes a substrate (3), a barrier layer (1), an insulating layer (2), and a seed layer (4); The substrate (3) has through holes with a high aspect ratio; The barrier layer (1) covers the inner wall of the through hole to prevent the seed layer (4) material from spreading and to enhance adhesion; The insulating layer (2) covers the barrier layer (1) to achieve electrical isolation; After a barrier layer (1) and an insulating layer (2) are sequentially formed on the inner wall of the through hole, the seed layer (4) is configured to deposit thin film material on the substrate (3) at a first deposition incident angle, and to remove excess thin film material at the orifice by ion beam etching of the substrate (3) at an etching incident angle, and then to further deposit the thin film material on the substrate (3) at a second deposition incident angle to continue to thicken the inner wall and orifice of the through hole.

Citation Information

Patent Citations

  • Three-dimensional semiconductor memory device based on deep hole filling and preparation method thereof

    CN104269405A