Semiconductor device

CN122935272APending Publication Date: 2026-10-16KK TOSHIBA +1
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
CN202610198131.8
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2025-04-07
Filing Date
2026-02-11
Publication Date
2026-10-16

Smart Images

  • Figure CN122935272A_ABST
    Figure CN122935272A_ABST
Patent Text Reader

Abstract

One of the embodiments provides a semiconductor device capable of miniaturizing a package. The semiconductor device according to the embodiment includes a first electrode, a semiconductor element provided on the first electrode, a second electrode provided on the semiconductor element, the second electrode having a lower surface facing the semiconductor element and having an upper surface opposite to the lower surface of the second electrode, and a third electrode overlapping the second electrode in a first direction extending from the first electrode toward the first semiconductor element, a lower surface of the third electrode being farther from the semiconductor element than the lower surface of the second electrode in the first direction, and an upper surface of the third electrode being closer to the semiconductor element than the upper surface of the second electrode in the first direction.
Need to check novelty before this filing date? Find Prior Art

Description

Cross-references to related applications

[0001] This application is based on and claims priority to Japanese Patent Application No. 2025-063320, filed on April 7, 2025, the entire contents of which are incorporated herein by reference. Technical Field

[0002] The described implementation generally relates to a semiconductor device. Background Technology

[0003] In semiconductor packaging, a structure is known in which a semiconductor chip is disposed between a heat sink connected to the emitter electrode and a heat sink connected to the collector electrode. Summary of the Invention

[0004] One implementation scheme includes a semiconductor device that enables miniaturization of the package.

[0005] A semiconductor device according to an embodiment includes: a first electrode; a semiconductor element disposed on the first electrode; a second electrode disposed on the semiconductor element, the second electrode having a lower surface facing the semiconductor element and an upper surface opposite to the lower surface of the second electrode; and a third electrode overlapping the second electrode in a first direction extending from the first electrode toward the semiconductor element, the lower surface of the third electrode being further away from the semiconductor element in the first direction than the lower surface of the second electrode, and the upper surface of the third electrode being closer to the semiconductor element in the first direction than the upper surface of the second electrode. Attached Figure Description

[0006] Figure 1 This is a top view of a semiconductor device according to the first embodiment.

[0007] Figure 2A It is a top view of a semiconductor device according to a first embodiment, wherein the resin is transparent.

[0008] Figure 2B This is a perspective view of a semiconductor device according to the first embodiment, omitting the resin.

[0009] Figure 3A This is a top view of a first variation of the first embodiment, wherein the resin is transparent.

[0010] Figure 3B This is a perspective view of a first variant of the first embodiment, omitting the resin.

[0011] Figures 4A-4C The third electrode of a semiconductor device according to a first embodiment is shown.

[0012] Figure 5 It is a cross-sectional view taken along line A1-A2 of the semiconductor device according to the first embodiment.

[0013] Figure 6 It is a cross-sectional view taken along line L1-L2 of the semiconductor device according to the first embodiment.

[0014] Figure 7 It is a cross-sectional view taken along line I1-I2 of the semiconductor device according to the first embodiment.

[0015] Figure 8A This is a top view of a semiconductor device according to a second embodiment, wherein the resin is transparent.

[0016] Figure 8B It is a cross-sectional view taken along line J1-J2 of the semiconductor device according to the second embodiment.

[0017] Figure 9 This is a perspective view of a semiconductor device according to the third embodiment, omitting the resin.

[0018] Figure 10 It is a cross-sectional view taken along line M1-M2 of the semiconductor device according to the third embodiment.

[0019] Figure 11 This is a perspective view of the first variant of the third embodiment, omitting the resin.

[0020] Figure 12 It is a cross-sectional view taken along line N1-N2 of the first variant of the third implementation scheme.

[0021] Figure 13 This is a perspective view of a semiconductor device according to the fourth embodiment, omitting the resin.

[0022] Figure 14A This is a top view of a semiconductor device according to the fourth embodiment, wherein the resin is transparent.

[0023] Figure 14B This is a top view of the first variation of the fourth embodiment of the resin-transparent material.

[0024] Figure 15 It is a cross-sectional view taken along line B1-B2 of the semiconductor device according to the fourth embodiment.

[0025] Figure 16 This is a top view of the second variation of the fourth embodiment of the resin-transparent material.

[0026] Figure 17 This is a top view of a semiconductor device according to the fifth embodiment.

[0027] Figure 18 It is a cross-sectional view taken along line C1-C2 of the semiconductor device according to the fifth embodiment.

[0028] Figure 19 This is a cross-sectional view of the first variant of the fifth implementation scheme.

[0029] Figure 20 This is a top view of a semiconductor device according to the sixth embodiment, wherein the resin is transparent.

[0030] Figure 21 This is a top view of a semiconductor device according to the seventh embodiment, wherein the resin is transparent.

[0031] Figure 22 It is a cross-sectional view taken along line D1-D2 of the semiconductor device according to the seventh embodiment.

[0032] Figures 23A-23F This is a perspective view showing an example of the second electrode. Detailed Implementation

[0033] The implementation scheme will be described below with reference to the accompanying drawings.

[0034] Note that the accompanying drawings are schematic or conceptual, and the relationships between the thickness and width of each component, as well as the dimensional ratios between components, may not be identical to the actual figures. Even for the same component, dimensions and ratios may differ depending on the accompanying drawings.

[0035] In this specification and the accompanying drawings, the same reference numerals are assigned to the same elements as those described in the previously mentioned drawings, and their detailed descriptions may be omitted as appropriate.

[0036] The direction extending from the first electrode 10 toward the second electrode 20 is called the "Z direction". The direction orthogonal to the Z direction is called the "X direction", and the direction intersecting the X and Z directions is called the "Y direction". Although the X, Y, and Z directions are shown as orthogonal in the embodiment, they are not limited to an orthogonal relationship. For the sake of explanation, the positive direction of the Z-axis is called "up", and the negative direction opposite to the positive direction is called "down". However, "up" and "down" are not limited to the direction of gravity or orientation during the installation of the semiconductor device.

[0037] First Implementation Plan Figure 1 This is a top view showing a semiconductor device 100 according to a first embodiment. Figure 2A This is a top view showing a semiconductor device 100 with a transparent resin R (indicated by the dashed area in Figure 2).

[0038] Semiconductor device 100 includes a semiconductor element 50 sealed with resin R (see [link]). Figure 3B Resin R surrounds the semiconductor element 50 in a plane perpendicular to the Z direction. Resin R is an insulating material covering the semiconductor element 50. The semiconductor element 50 includes a transistor. For example, the semiconductor element 50 may include a MOSFET (Metal Oxide Semiconductor Field Effect Transistor).

[0039] Semiconductor device 100 includes a first electrode 10 on its lower surface (located in the negative direction of the Z-axis). For example... Figure 1 As shown, the semiconductor device 100 includes one or more second electrodes 20 on its upper surface (located in the positive direction of the Z-axis). The one or more second electrodes 20 can be configured as follows: Figure 1 The electrode may be configured as multiple electrodes, or it may be configured as a single electrode. For simplicity, items such as one or more second electrodes 20 are sometimes referred to in the singular, e.g., "second electrode 20," to refer to each instance of such an item. The first electrode 10 may, for example, be at the drain potential of a metal-oxide-semiconductor field-effect transistor. The second electrode 20 may, for example, be at the source potential of a metal-oxide-semiconductor field-effect transistor.

[0040] Semiconductor device 100 includes one or more first terminals T1 and second terminals T2 protruding from the side surface of a package, the side surface being in contact with... Figure 1 The first terminals T1 extend in the direction intersecting the Y-direction. One or more first terminals T1 can be provided in the same number as one or more second electrodes 20. The number of second electrodes 20 and first terminals T1 can be equal to the number of semiconductor chips including metal-oxide-semiconductor field-effect transistors disposed in the semiconductor device 100. For example, the first terminal T1 can be the gate terminal of a metal-oxide-semiconductor field-effect transistor.

[0041] The second terminal T2 can be, for example, a terminal used for sensing the potential of the source electrode of a metal-oxide-semiconductor field-effect transistor. The second terminal T2 is electrically connected to the source electrode of the metal-oxide-semiconductor field-effect transistor.

[0042] Next, we will refer to Figure 2A Describe it. Figure 2A It shows a transparent resin R (made of...) Figure 2A The top view of the semiconductor device 100 (indicated by the dashed area in the image).

[0043] A semiconductor element 50, comprising a first semiconductor element 50-1 and a second semiconductor element 50-2, is disposed on the first electrode 10. Hereinafter, the term "semiconductor element 50" may refer to the first semiconductor element 50-1 and the second semiconductor element 50-2. For example, a bonding layer 61 may be disposed between the first electrode 10 and the semiconductor element 50 (see [link to documentation]). Figure 5 Semiconductor element 50 includes a drain electrode D on its lower surface and a source electrode S and a gate electrode G on its upper surface. The source electrode S may be, for example, a source pad, and the gate electrode G may be, for example, a gate pad. Figure 2A In the diagram, the region where the source electrode S overlaps with the second electrode 20 and the third electrode 30 is indicated by a dashed outline. Although the terms drain electrode D, source electrode S, and gate electrode G are used for explanation, the semiconductor element 50 is not necessarily a metal-oxide-semiconductor field-effect transistor. If the semiconductor element 50 is an IGBT (insulated-gate bipolar transistor), then the drain electrode D corresponds to the collector electrode, and the source electrode S corresponds to the emitter electrode.

[0044] The second electrode 20 is disposed on the semiconductor element 50. The second electrode 20 is electrically connected to the source electrode S. For example, a bonding layer 62 may be disposed between the second electrode 20 and the semiconductor element 50 (see [link]). Figure 5 The second electrode 20 has a first surface 20a facing the semiconductor element 50 on its lower side in the Z direction. The first surface 20a is located in... Figure 2A The second surface 20b of the second electrode 20 is located on the upper side of the first surface 20a in the Z direction, opposite to the second surface 20a, and is as follows: Figure 1 As shown, it is exposed from resin R.

[0045] The length of the second electrode 20 at the first surface 20a in the X direction is less than the length at the second surface 20b. The length of the second electrode 20 at the first surface 20a in the Y direction is less than the length at the second surface 20b in the Y direction. The area of ​​the second electrode 20 in the XY plane at the first surface 20a is less than the area at the second surface 20b.

[0046] like Figure 2A As shown, the second electrode 20 is connected to the third electrode 30. The connection between the second electrode 20 and the third electrode 30 includes not only an electrical connection but also a bonding via an insulating material. For example, the second electrode 20 and the third electrode 30 can be electrically connected. Figure 2A An example is shown where a third electrode 30 and a second terminal T2 are continuously arranged protruding from resin R. Furthermore, Figure 2A An example is shown where the gate electrode G is connected to a fourth electrode 40 protruding from resin R and continuously disposed thereon, and a first terminal T1.

[0047] Figure 2BA perspective view of a semiconductor device 100 according to a first embodiment is shown. Resin R is omitted in the figure.

[0048] The second electrode 20 includes a first portion P1 having a first surface 20a and a second portion P2 having a second surface 20b. Figure 2B In this configuration, the first surface 20a is contained within the first portion P1, and the second surface 20b is contained within the second portion P2; however, as will be referred to later... Figure 11 The implementation is not limited to this configuration. The length of the first part P1 in the X direction is less than the length of the second part P2. The length of the first part P1 in the Y direction is less than the length of the second part P2.

[0049] The first part P1 has a first side surface S1. The second part P2 has a second side surface S2. The first side surface S1 surrounds the first part P1 in the XY plane. The second side surface S2 surrounds the second part P2 in the XY plane. The first side surface S1 and the second side surface S2 include a surface intersecting the X direction and a surface intersecting the Y direction.

[0050] As will be referred to later Figure 5 As described, the first side surface S1 and the second side surface S2 are connected by a stepped surface 20s. The stepped surface 20s intersects with the first side surface S1 and the second side surface S2. Figure 2B In the example shown, the stepped surface 20s is the lower surface of the second portion P2. The second electrode 20 is connected to and overlaps with the third electrode 30 at the stepped surface 20s. The stepped surface 20s faces the semiconductor element 50 in the negative Z direction.

[0051] The third electrode 30 is separated from both the first surface 20a and the second surface 20b in the Z direction. The position of the third electrode 30 in the Z direction differs from that of the first surface 20a. The position of the third electrode 30 in the Z direction also differs from that of the second surface 20b. The third electrode 30 is located between the first surface 20a and the second surface 20b in the Z direction. The entire third electrode 30 is located away from the first surface 20a and the second surface 20b in the Z direction.

[0052] The fourth electrode 40 is connected to the gate electrode G. The fourth electrode 40 has a curved structure extending in the positive Z-axis direction from the portion connected to the gate electrode G toward the first terminal T1. This allows the first terminal T1 and the second terminal T2 to be positioned equal in the Z-direction.

[0053] The description of the first implementation scheme is based on Figure 2A and 2B The shape of the third electrode 30 shown. However, as in Figure 3A and 3BIn the modified example of the semiconductor device 101 shown, the external shape of the third electrode 30 in the XY plane can be larger than the external shape of the second portion P2 of the second electrode 20. Figure 3A This is a top view of a semiconductor device 101 with a transparent resin R. Figure 3B This is a perspective view of the semiconductor device 101 with resin R omitted. The third electrode 30 includes a portion that protrudes further through resin R than the second electrode 20 in the top view. The third electrode 30 includes a portion that protrudes further through resin R than the second electrode 20 in the X and Y directions in the top view. Although the following description is based on... Figure 2A and 2B The shape of the third electrode 30 shown is shown, but the embodiment includes... Figure 3A and 3B The configuration shown.

[0054] Reference Figure 4A The shape of the third electrode 30 is described. Although this example includes two semiconductor elements 50, namely the first semiconductor element 50-1 and the second semiconductor element 50-2, the shape of the third electrode 30 is not limited to this. Figures 4A to 4C The shape shown. In Figure 4A In the diagram, the shaded area indicates the portion that overlaps with the second electrode 20, and... Figure 2A and 2B Not shown in the image.

[0055] The third electrode 30 is a plate-shaped conductor with a plane perpendicular to the Z direction. The third electrode 30 extends without bending in a direction perpendicular to the Z direction. The third electrode 30 includes a first region 30a that is continuous with (i.e., extends to) the second terminal T2. The third electrode 30 includes a second region 30b (shaded line) connected to the second electrode 20. The second region 30b may, for example, contact the surface of the second electrode 20. The second region 30b may be configured as an annular shape with an internal hole H, such as... Figure 4A As shown. For simplicity, an example with hole H is described below, but the second region 30b is not necessarily annular and may include a notch instead of hole H.

[0056] The third region 30c is disposed between the first region 30a and the second region 30b. If two semiconductor elements 50 are present, the third region 30c is a branch. The third electrode 30 may be included in... Figure 2A and 2B A notch 30d is located in the Z direction where it overlaps with the gate electrode G. The notch 30d suppresses interference between the third electrode 30 and the fourth electrode 40. In other words, the notch 30d suppresses contact between the third electrode 30 and the fourth electrode 40.

[0057] Figure 4AThe second terminal T2, first region 30a, second region 30b, and third region 30c of the third electrode 30 shown can be disposed on the same plane. That is, a plane can be defined such that at least a portion of the second terminal T2, first region 30a, second region 30b, and third region 30c are located on that plane. The second terminal T2 and the third electrode 30 can be formed in a flat shape. The second terminal T2 and the third electrode 30 can be integrally formed, that is, formed as a single component.

[0058] Figure 4B and 4C Other examples of the shape of the third electrode 30 are shown.

[0059] For example, such as Figure 4B As shown, the profile of hole H can include a curved shape. Hole H can be circular, elliptical, or rectangular. Or, as... Figure 4C As shown, the outline of the aperture H can be a chamfered shape, such as a cross shape. That is, the shape of the aperture H is not limited to a polygon and can be appropriately selected from a variety of shapes. For example, the shape of the aperture H (i.e., the shape of the second electrode 20) can be selected to match the shape of the source electrode S.

[0060] Figure 5 It is along Figure 2A The XZ cross-section diagram is shown by line A1-A2.

[0061] A semiconductor element 50 is disposed on the first electrode 10 via a bonding layer 61. A second electrode 20 is disposed on the semiconductor element 50 via a bonding layer 62. The semiconductor element 50 includes a drain electrode D, a source electrode S, and a gate electrode G.

[0062] The second electrode 20 includes a first portion P1 and a second portion P2 on the first portion P1. The second electrode 20 can be integrally formed, for example, i.e., formed as a single component. The length of the first portion P1 in the X direction is less than the length of the second portion P2. The length of the first portion P1 in the Y direction is less than the length of the second portion P2. The area of ​​the first portion P1 in the XY plane is less than the area of ​​the second portion P2.

[0063] The second electrode 20 includes a first surface 20a overlapping the semiconductor element 50 and a second surface 20b positioned opposite the first surface 20a in the Z direction and exposed from the resin R. The first surface 20a is the lower surface of the first portion P1, and the second surface 20b is the upper surface of the second portion P2. The second portion P2 includes a protruding portion PP that protrudes further in the X direction than the first portion P1. The protruding portion PP protrudes further in the X direction than any part of the first portion. The third electrode 30 overlaps with the protruding portion PP in the Z direction.

[0064] The stepped surface 20s is the lower surface of the protruding portion PP of the second part P2. The stepped surface 20s is a surface facing the negative Z-direction (i.e., oriented in the negative direction of the Z-axis) within the second electrode 20. The stepped surface 20s is located between and physically connects the first side surface S1 and the second side surface S2. The first side surface S1 and the second side surface S2 extend in the Z-direction. The stepped surface 20s extends in an XY plane intersecting the Z-direction. For example, in the XY plane, the stepped surface 20s may be positioned around the perimeter of the first part P1.

[0065] The upper surface 30p of the third electrode 30 is positioned closer to the semiconductor element 50 in the Z direction than the second surface 20b of the second electrode 20. The upper surface 30p of the third electrode 30 is located in the negative Z-axis direction relative to the second surface 20b. The upper surface 30p of the third electrode 30 is located between the first surface 20a and the second surface 20b of the second electrode 20 in the Z direction. The upper surface 30p faces at least a portion of the stepped surface 20s of the second electrode 20.

[0066] The lower surface 30q of the third electrode 30 is opposite to the upper surface 30p in the Z direction. The lower surface 30q is positioned further away from the semiconductor element 50 in the Z direction than the first surface 20a of the second electrode 20. The lower surface 30q is located in the positive Z-axis direction relative to the first surface 20a. The lower surface 30q is located between the first surface 20a and the second surface 20b of the second electrode 20 in the Z direction. The upper surface 30p and the lower surface 30q of the third electrode 30 are farther away from the first surface 20a and the second surface 20b of the second electrode 20 in the Z direction.

[0067] The upper surface 30p of the third electrode 30 is located in the negative direction of the Z-axis relative to the second surface 20b of the second electrode 20, and is configured to be closer to the semiconductor element 50 than the second surface 20b. The upper surface 30p is located in the Z-direction between the first surface 20a and the second surface 20b of the second electrode 20 and faces at least a portion of the stepped surface 20s.

[0068] The lower surface 30q of the third electrode 30 is opposite to the upper surface 30p in the Z direction and is located in the positive Z-axis direction relative to the first surface 20a of the second electrode 20. The lower surface 30q is positioned further away from the semiconductor element 50 than the first surface 20a. The lower surface 30q is located between the first surface 20a and the second surface 20b of the second electrode 20 in the Z direction. The upper surface 30p and the lower surface 30q of the third electrode 30 are further away from the first surface 20a and the second surface 20b of the second electrode 20 in the Z direction.

[0069] The third electrode 30 is connected to and overlaps with the second electrode 20 at a position in the Z direction between the first surface 20a and the second surface 20b. The third electrode 30 is connected to and overlaps with the second portion P2 of the second electrode 20 at the stepped surface 20s. The third electrode 30 may, for example, contact the surface of the second electrode 20 at the stepped surface 20s. The third electrode 30 is located in the negative Z-axis direction relative to the second portion P2.

[0070] The connection between the second electrode 20 and the third electrode 30 can be made by welding (e.g., laser welding). Alternatively, the second electrode 20 and the third electrode 30 can be connected via a conductive material including Ag (such as silver paste), thereby overlapping in the Z direction by the conductive material inserted therebetween. Connection can also be made by sintering or via a bonding material such as solder. As described later, for inspection of the bonding layers 61 and 62, the second electrode 20 and the third electrode 30 are preferably connected by welding, sintering, or silver paste. (Described later...) Figure 11 In the configuration shown, the second electrode 20 and the third electrode 30 can be connected via an insulating material, thereby overlapping in the Z direction through the insulating material inserted therebetween. For example, as Figure 11 As shown, if the second terminal T2 and the source electrode S are connected by a wire W, the second electrode 20 and the third electrode 30 can be joined by an insulating material.

[0071] Figure 6 It is along Figure 5 The XY top view is shown by line L1-L2.

[0072] Lines L1-L2 lie on a plane passing through the third electrode 30. The third electrode 30 surrounds the first portion P1 of the second electrode 20. The first portion P1 of the second electrode 20 lies between the second regions 30b in the X direction. The first portion P1 of the second electrode 20 lies between the second regions 30b in the Y direction. The first portion P1 of the second electrode 20 is surrounded by the second regions 30b in the XY plane.

[0073] Figure 7 This is a YZ cross-sectional view taken along line I1-I2 as shown in Figure 2. Although in Figure 7 The gate electrode G is omitted, but it is included in the second semiconductor element 50-2.

[0074] A fourth electrode 40 and a first terminal T1 are continuously disposed. The fourth electrode 40 includes a first portion 40a adjacent to the first terminal T1, a second portion 40b connected to the gate electrode G, and a third portion 40c located between the first portion 40a and the second portion 40b. The connection between the fourth electrode 40 and the gate electrode G disposed in the semiconductor element 50-2 can be made via a bonding material such as solder.

[0075] The third portion 40c of the fourth electrode 40 is a bent portion located between the first terminal T1 and the semiconductor element 50-2. For example, if the first portion 40a and the second portion 40b are positioned differently in the Z direction, the third portion 40c connects the first portion 40a and the second portion 40b.

[0076] In the manufacturing process, the first terminal T1, the second terminal T2, the third electrode 30, and the fourth electrode 40 are fabricated as a lead frame. The first portions 40a of the first terminal T1, the second terminal T2, the third electrode 30, and the fourth electrode 40 are located at the same position in the Z direction. In other words, the first portions 40a of the first terminal T1, the second terminal T2, the third electrode 30, and the fourth electrode 40 include portions disposed on the same plane orthogonal to the Z direction. The second portion 40b can be formed by bending a portion of the lead frame (corresponding to the third portion 40c) to adjust its position in the Z direction.

[0077] Examples of materials used for each component in the first implementation scheme will be described.

[0078] Semiconductor element 50 may include, for example, Si or SiC as a semiconductor material. First electrode 10 and second electrode 20 may include, for example, at least one of Cu, Mo, or Al as a conductive material. First electrode 10 and second electrode 20 may include, for example, at least one of Cu, CuMo, or AlSiC. Third electrode 30 and fourth electrode 40 may include, for example, Cu as a metal. Third electrode 30 and fourth electrode 40 may include the same material.

[0079] Bonding layers 61 and 62 can be, for example, Pb-based solder or Sn-based solder. Bonding layers 61 and 62 can also be silver paste or sintered materials. Resin R is a sealing resin and may include, for example, epoxy resin.

[0080] According to the semiconductor device 100 of the first embodiment, a semiconductor device with reduced thermal resistance can be provided. A second electrode 20 disposed on the semiconductor element 50 serves as a heat dissipation path for heat generated in the semiconductor element 50. The second electrode 20 is an integrated structure (i.e., a single component) and does not require other internal components. By using the second electrode 20 as a heat dissipation path to the outside of the resin R, the thermal resistance can be further reduced compared to a configuration in which a bonding layer and a heat sink are further disposed on the second electrode 20.

[0081] The third electrode 30 can be located, for example, around the outer periphery of the second electrode 20 in the XY plane. One of the main heat dissipation paths from the semiconductor element 50 is the path through the second electrode 20 in the positive Z-axis direction. The contact between the second electrode 20 and the third electrode 30 is located outside the main heat dissipation path, reducing the impact of the third electrode 30 on heat dissipation. The current path flowing between the semiconductor element 50 and the second surface 20b of the second electrode 20 does not need to pass through the third electrode 30.

[0082] Furthermore, according to the semiconductor device 100 of the first embodiment, quality control of the semiconductor device can be performed more easily, and the reliability of the semiconductor device can be further improved. Quality control of the semiconductor device may include, for example, inspecting the formation quality of bonding layers 61 and 62. The formation quality of bonding layers 61 and 62 can be determined by inspection using X-rays or ultrasonic waves (hereinafter referred to as "inspection waves") from the upper and lower surfaces of the semiconductor device 100.

[0083] When inspecting from the upper surface of the semiconductor device 100, due to the... Figure 5 Since there is no additional bonding layer above the bonding layer 62 shown, the bonding layer 62 can be accurately inspected by an inspection wave passing through the second electrode 20. Therefore, the formation quality of the bonding layer 62 can be accurately determined, thereby improving the quality control and reliability of the semiconductor device.

[0084] For comparison, if a heat sink is disposed above the second electrode 20 via a bonding layer, inspection from the upper surface of the semiconductor device may be interfered with by the additional bonding layer between the heat sink and the second electrode 20 above the bonding layer 62. In particular, the additional bonding layer may reflect or absorb inspection waves, making it difficult to inspect the bonding layer 62 with sufficient accuracy.

[0085] On the other hand, the semiconductor device 100 according to the first embodiment can further improve quality control and reliability compared to a configuration in which a heat sink is disposed above the second electrode 20 via an additional bonding layer.

[0086] Furthermore, in the first embodiment, the third electrode 30 may be located, for example, around the outer periphery of the second electrode 20 in the XY plane. The connection portion between the second electrode 20 and the third electrode 30 has a low risk of interfering with the inspection wave when inspecting the bonding layer 62 from the upper surface of the semiconductor device 100, because the connection portion and the bonding layer 62 do not overlap in the Z direction. Even if the second electrode 20 and the third electrode 30 are connected by solder or the like, interference with the inspection wave can be suppressed, and inspection accuracy can be improved.

[0087] Second Implementation Plan Figure 8A This is a top view showing a semiconductor device 200 according to a second embodiment, wherein the resin R is transparent. Figure 8B It is along Figure 8A The diagram shows a YZ cross-section taken along line J1-J2. Descriptions of parts common to the semiconductor device 100 of the first embodiment are partially omitted.

[0088] In the second embodiment, the connection between the first terminal T1 and the gate electrode G is made via a wire W formed by wire bonding. The cross-section of the wire W is not limited to a circular shape, and can be a flat or strip-shaped shape with long and short sides. That is, a sheet-like conductive material such as a strip can be used as the wire W.

[0089] like Figure 8A As shown, the first terminal T1 is electrically connected to the gate electrode G of the semiconductor device 50-2 via a wire W. Figure 8B As shown, the second terminal T2 and the first terminal T1 can be positioned equal in the Z direction. The first terminal T1, the second terminal T2, the third electrode 30, and the fourth electrode 40 are included in a flat lead frame during the manufacturing process. That is, the first terminal T1, the second terminal T2, the third electrode 30, and the fourth electrode 40 are fabricated into a flat lead frame, and then the first terminal T1, the third electrode 30, and the fourth electrode 40 are separated to obtain the third electrode 30 and the fourth electrode 40 that are electrically insulated from each other, as shown. Figure 8A and 8B As shown.

[0090] According to the semiconductor device 200 of the second embodiment, the third electrode 30 and the fourth electrode 40 can be formed from a flat lead frame, thereby eliminating the process of bending the lead frame between the third electrode 30 and the second terminal T2 and between the fourth electrode 40 and the first terminal T1, and thus reducing the overall bending of the lead frame. By reducing the number of bending processes of the lead frame, the number of bent portions of the lead frame can be reduced. As a result, when the lead frame is sealed with resin R, the required volume of resin R can be reduced, and the package size can be further reduced.

[0091] In a second embodiment, the second terminal T2 is continuous with and electrically connected to the source electrode S via the third electrode 30. Alternatively, the second terminal T2 may be electrically connected to the source electrode S via a wire. That is, the second terminal T2 and the source electrode S can be electrically connected via a wire. Specific examples of such a configuration are, for example... Figure 9 As described in the text.

[0092] Third Implementation Plan Figure 9 This is a perspective view of the semiconductor device 300 according to the third embodiment, omitting resin R. Figure 10 It is along Figure 9The XZ cross-sectional view is shown by line M1-M2. Descriptions of parts common to the semiconductor device 100 of the first embodiment are partially omitted.

[0093] refer to Figure 9 The second electrode 20 of the semiconductor device 300 includes a first portion P1 on the semiconductor element 50, a second portion P2 on the first portion P1, and a third portion P3 on the second portion P2. The second electrode 20 can be integrally formed, for example, as a single component. The second electrode 20 and the third electrode 30 are connected at the lower surface of the second portion P2 and face each other. A stepped surface 20s is the lower surface of the second portion P2. The second electrode 20 and the third electrode 30 are connected at the stepped surface 20s and face each other.

[0094] exist Figure 9 In this configuration, the second terminal T2 and the source electrode S are electrically connected via a wire W. That is, the second terminal T2 and the third electrode 30 do not need to be continuous.

[0095] The third electrode 30 located above the first semiconductor element 50-1 and the third electrode 30 located above the second semiconductor element 50-2 are connected via the middle portion 30M of the third electrode 30. Figure 9 The line M1-M2 shown is located in the negative direction of the Y-axis relative to the middle part 30M, and Figure 10 The cross-section shown does not pass through the middle section 30M.

[0096] The length of the third part P3 in the X direction is less than the length of the second part P2. The length of the third part P3 in the Y direction is less than the length of the second part P2. The area of ​​the third part P3 in the XY plane is less than the area of ​​the second part P2.

[0097] A larger area of ​​the third portion P3 in the XY plane is desirable because it increases the exposed area of ​​the second electrode 20 on its upper surface. For example, the area of ​​the third portion P3 in the XY plane can be larger than the area of ​​the first portion P1.

[0098] According to the semiconductor device 300 of the third embodiment, the adhesion strength between the second electrode 20 and the resin R can be improved. A second portion P2 protrudes from the first portion P1 and the third portion P3. The second portion P2 includes a protruding portion PP that protrudes further in the X direction than any portion of the third portion P3. The second portion P2 of the second electrode 20 protrudes into the resin R, resulting in a strong adhesion between the resin R and the second electrode 20. Even if a force is applied to peel the second electrode 20 from the resin R in the positive Z-axis direction, peeling of the second electrode 20 from the resin R can be suppressed.

[0099] Furthermore, according to the semiconductor device 300 of the third embodiment, further miniaturization of the package is possible. The first terminal T1 and the second terminal T2 are connected to the gate electrode G and the source electrode S, respectively, via wires W. In the manufacturing process, it is not necessary to bend the lead frame between the third electrode 30 and the second terminal T2, or between the fourth electrode 40 and the first terminal T1. The third electrode 30, the first terminal T1, and the second terminal T2 can be formed from a flat lead frame. By reducing the bending portion of the lead frame, the volume of resin R required to seal the semiconductor package can be reduced.

[0100] In other words, further miniaturization of the package is possible with the semiconductor device 300 according to the third embodiment. In the third embodiment, the third electrode 30 can, for example, be formed in a flat shape. In the manufacturing process, the number of bending processes of the lead frame including the third electrode 30 can be reduced. When the lead frame is bent, it may be necessary to seal the bent portion with resin R. With the semiconductor device 300 according to the third embodiment, the volume of resin R required to seal the lead frame with resin R, i.e., the package volume, can be reduced.

[0101] For comparison, if the third electrode 30 and the second terminal T2 are positioned differently in the Z direction, and a bend is required between the third electrode 30 and the second terminal T2, then a bend is required between the third electrode 30 and the second terminal T2. Compared to the third embodiment, the amount of bending in the lead frame increases. If a bend exists between the third electrode 30 and the second terminal T2, the bend needs to be sealed with resin. Therefore, including the bend in the package may require a further increase in package size compared to the package of the third embodiment.

[0102] On the other hand, in the third embodiment, the position of the third electrode 30 in the Z direction can be adjusted to match the desired positions of the first terminal T1 and the second terminal T2 in the Z direction. Here, the desired protrusion position of the second terminal T2 can be predetermined based on the package design. That is, the connection position between the second electrode 20 and the third electrode 30 along the Z direction can be adjusted so that the third electrode 30 can be formed into a flat shape.

[0103] The first variant of the third implementation plan Figure 11 This is a perspective view of a semiconductor device 301 according to a first variant of the third embodiment, omitting the resin R. Figure 12 It is along Figure 11 The diagram shows an XZ cross-section taken along line N1-N2. Descriptions of portions common to the semiconductor device 300 of the third embodiment are partially omitted.

[0104] In a first variant of the third embodiment, the second electrode 20 includes a third portion P3 on the semiconductor element 50, a second portion P2 on the third portion P3, and a first portion P1 on the second portion P2. The second electrode 20 and the third electrode 30 are connected at the lower surface of the second portion P2 and face each other. In the first variant of the third embodiment, the stepped surface 20s is the upper surface of the second portion P2. The second electrode 20 and the third electrode 30 are connected at the stepped surface 20s and face each other.

[0105] According to the first variant of the semiconductor device 301 in the third embodiment, the adhesion strength between the second electrode 20 and the resin R can also be improved.

[0106] Fourth Implementation Plan Figure 13 This is a perspective view of a semiconductor device 400 according to a fourth embodiment. Resin R is omitted in the illustration. Figure 14A This is a top view showing a semiconductor device 400 with a transparent resin R. Figure 15 It is along Figure 14A The XZ cross-sectional view is shown by line B1-B2. Descriptions of parts common to the semiconductor devices 100 to 300 in the first to third embodiments are partially omitted.

[0107] In semiconductor device 400, the positional relationship between the second electrode 20 and the third electrode 30 differs from that in semiconductor device 100 of the first embodiment. The second electrode 20 of semiconductor device 400 includes a second portion P2 and a first portion P1 located on the second portion P2. The area of ​​the second surface 20b of the second electrode 20 in the XY plane is smaller than the area of ​​the first surface 20a. Because the second surface 20b is smaller than the first surface 20a, the second electrode 20 includes... Figure 13 The stepped surface 20s is shown. The stepped surface 20s is the upper surface of the second part P2. The third electrode 30 overlaps with and connects to the second part P2 of the second electrode 20 at the stepped surface 20s.

[0108] exist Figure 13 In the second electrode 20, the second portion P2 has a square shape in the XY plane, and the first portion P1 has an octagonal shape in the XY plane. The square second portion P2 has a larger area in the XY plane than the octagonal first portion P1. The third electrode 30 is connected to the second portion P2 near a corner on the upper surface of the second portion P2. The first portion P1 and the second portion P2 are polygonal in a plane perpendicular to the Z direction, and the first portion P1 has a greater number of corners in this plane than the second portion P2.

[0109] The third electrode 30 includes an intermediate portion 30M extending in the X direction and connecting the portion located above the first semiconductor element 50-1 and the portion located above the second semiconductor element 50-2. Figure 13 In the middle, the second terminal T2 and the source electrode S are electrically connected via the wire W.

[0110] Figure 13 The third electrode 30 shown includes a notch. The notch above the first semiconductor element 50-1 is located in the positive X-axis and negative Y-axis directions relative to the rest of the third electrode 30 above the first semiconductor element 50-1. The stepped surface 20s of the second electrode 20 at the location of the notch of the third electrode 30 (in...) Figure 13 (Not hidden by the third electrode 30) is not connected to the third electrode 30.

[0111] Figure 14A This is a top view showing a semiconductor device 400 with transparent resin.

[0112] When the second part P2 has a square shape in the XY plane, each second electrode 20 is provided with four stepped surfaces 20s. The third electrode 30 is electrically connected to the second electrode 20 at three of the four stepped surfaces 20s. Figure 14A The diagram shows the step surface 20s closest to the second terminal T2 among the four step surfaces 20s. That is, the step surface 20s closest to the second terminal T2 among the four step surfaces 20s is in physical contact with the resin R. On the other hand, the contours of the other three step surfaces 20s are shown in... Figure 14A The remaining three stepped surfaces 20s overlap with the third electrode 30 in the Z direction.

[0113] The second electrode 20 located above the first semiconductor element 50-1 and the second electrode 20 located above the second semiconductor element 50-2 each have four stepped surfaces located in the positive and negative directions of the X and Y axes relative to the center of the respective second electrode 20 in the XY plane. The second electrode 20 located above the first semiconductor element 50-1 is not connected to the third electrode 30 at the stepped surfaces 20s located in the positive X-axis and negative Y-axis directions, and is in contact with the resin R. The second electrode 20 located above the second semiconductor element 50-2 is not connected to the third electrode 30 at the stepped surfaces 20s located in the negative X-axis and negative Y-axis directions, and is in physical contact with the resin R.

[0114] like Figure 14B As shown in the first variant of the fourth embodiment, a wire Wi (inter-electrode wire) can be further provided to connect the source electrode S of the first semiconductor element 50-1 and the source electrode S of the second semiconductor element 50-2. The wire Wi is electrically connected to the source electrodes S of the first and second semiconductor elements. Figure 14A In the example shown, the source electrodes S of the first and second semiconductor elements are electrically connected via a third electrode 30. On the other hand, according to... Figure 14B In the configuration shown, in addition to the third electrode 30, the source electrodes S of the first and second semiconductor elements are also electrically connected via wire Wi. Furthermore, even though the second electrode 20 and the third electrode 30 are joined by an insulating material, the electrical connection between the source electrodes S of the first and second semiconductor elements can be maintained. Although described below... Figure 14A The semiconductor device 400 shown can also be configured with wires Wi.

[0115] Figure 15 It is along Figure 14A The XZ cross-section diagram is shown by line B1-B2.

[0116] refer to Figure 15 The third electrode 30 is connected to the second electrode 20 at the step surface 20s. The third electrode 30 contacts and overlaps with the surface of the second electrode 20 at the step surface 20s. In the fourth embodiment, the step surface 20s is the surface of the second electrode 20 oriented in the positive direction toward the Z-axis.

[0117] The upper surface 30p of the third electrode 30 is positioned closer to the semiconductor element 50 in the Z direction than the second surface 20b of the second electrode 20. The upper surface 30p of the third electrode 30 is located in the negative Z-axis direction relative to the second surface 20b. The upper surface 30p of the third electrode 30 is located between the first surface 20a and the second surface 20b of the second electrode 20 in the Z direction.

[0118] The lower surface 30q of the third electrode 30 is opposite to the upper surface 30p in the Z direction. The lower surface 30q faces at least a portion of the stepped surface 20s of the second electrode 20. The lower surface 30q is configured to be further away from the semiconductor element 50 in the Z direction than the first surface 20a of the second electrode 20. The lower surface 30q is located in the positive Z-axis direction relative to the first surface 20a. The lower surface 30q is located between the first surface 20a and the second surface 20b of the second electrode 20 in the Z direction. The upper surface 30p and the lower surface 30q of the third electrode 30 are farther away from the first surface 20a and the second surface 20b of the second electrode 20 in the Z direction.

[0119] The second electrode 20 includes a second portion P2 and a first portion P1 on the second portion P2. The second portion P2 is located between the first portion P1 and the semiconductor element 50. The area of ​​the first portion P1 in the XY plane is smaller than the area of ​​the second portion P2. The length of the first portion P1 in the X direction is smaller than the length of the second portion P2. The stepped surface 20s is the upper surface of the protruding portion PP of the second portion P2 in the X direction. The third electrode 30 is disposed on and overlaps with the second portion P2. The third electrode 30 is located in the positive Z-axis direction relative to the second portion P2. The third electrode 30 faces the protruding portion PP in the negative Z-direction.

[0120] The configuration of the second electrode 20 and the third electrode 30 shown in the semiconductor device 400 according to the fourth embodiment can provide a semiconductor device with reduced thermal resistance.

[0121] Furthermore, according to the semiconductor device 400 of the fourth embodiment, further miniaturization of the package is possible. The first terminal T1 and the second terminal T2 are connected to the gate electrode G and the source electrode S via wires W. In the manufacturing process, it is not necessary to bend the lead frame between the third electrode 30 and the second terminal T2, or between the fourth electrode 40 and the first terminal T1. The third electrode 30, the first terminal T1, and the second terminal T2 can be formed from a flat lead frame. By reducing the bending portion of the lead frame, the volume of resin R required to seal the semiconductor package can be reduced.

[0122] Furthermore, according to the semiconductor device 400 of the fourth embodiment, interference between the third electrode 30 and the wire W during the manufacturing process can be suppressed. In the fourth embodiment, among the plurality of stepped surfaces 20s, the stepped surface 20s closest to the second terminal T2 is spaced apart from the third electrode 30. The third electrode 30 is spaced apart from the second terminal T2 by a sufficient distance. Therefore, when wire bonding is performed between the second terminal T2 and the source electrode S using a bonding tool, interference between the third electrode 30 and the bonding tool can be suppressed.

[0123] By configuring at least one of the stepped surfaces 20s to physically contact the resin R without connecting it to the third electrode 30, interference between the second terminal T2 and the source electrode S during the wire bonding process can be suppressed.

[0124] Additionally, another stepped surface 20s can be configured to physically contact the resin R. For example, the two stepped surfaces 20s located in the negative direction of the Y-axis relative to the second electrode 20 can be configured not to be connected to the third electrode 30. This further suppresses interference during wire bonding between the gate electrode G and the first terminal T1. On the other hand, as... Figure 13As shown, when the third electrode 30 is placed on the second electrode 20 during manufacturing, it is desirable to connect the second electrode 20 and the third electrode 30 at three of the four stepped surfaces 20s to improve the positioning accuracy of the third electrode 30 relative to the second electrode 20.

[0125] According to the semiconductor device 400 of the fourth embodiment, the second portion P2 includes protruding portions PP that project from the first portion P1 in the X and Y directions. The second portion P2 of the second electrode 20 protrudes into the resin R, resulting in a strong adhesion between the resin R and the second electrode 20. For example, as... Figure 15 As shown, the second electrode 20 can be prevented from peeling off from the resin R in the positive direction of the Z-axis.

[0126] like Figure 16 As shown in the second variation of the fourth embodiment, the intermediate portion 30M can be omitted. On the other hand, providing the intermediate portion 30M is desirable for electrically connecting the source electrodes S of the first semiconductor element 50-1 and the second semiconductor element 50-2. Alternatively, as Figure 14B As shown, the source electrodes S of the first semiconductor element 50-1 and the second semiconductor element 50-2 can be electrically connected via wire Wi.

[0127] Fifth Implementation Plan Figure 17 This is a top view of the semiconductor device 500 according to the fifth embodiment. Figure 18 It is along Figure 17 The XZ cross-sectional view is shown by line C1-C2. Descriptions of parts common to the semiconductor device 100 of the first embodiment are partially omitted.

[0128] like Figure 17 As shown, an upper electrode 12 is provided that is exposed from the resin R. The upper electrode 12 is disposed on the second electrode 20. The upper surface of the upper electrode 12 is exposed from the resin R.

[0129] exist Figure 18 The cross-sectional view shown illustrates a second electrode 20 disposed on a semiconductor element 50 and an upper electrode 12 disposed on the second electrode 20. For example, the second electrode 20 and the upper electrode 12 may be bonded via a bonding layer 63.

[0130] The second electrode 20 includes a first surface 20a facing the semiconductor element 50 and a second surface 20b facing the upper electrode 12. The second electrode 20 includes a second portion P2 and a first portion P1 on the second portion P2. The second portion P2 has a longer length in the X direction than the first portion P1 and includes a stepped surface 20s as the upper surface of the protruding portion PP.

[0131] The third electrode 30 is connected to the second electrode 20 at the stepped surface 20s. The upper surface 30p of the third electrode 30 is positioned closer to the semiconductor element 50 in the Z direction than the second surface 20b of the second electrode 20. The upper surface 30p of the third electrode 30 is located in the negative Z-axis direction relative to the second surface 20b. The upper surface 30p of the third electrode 30 is located between the first surface 20a and the second surface 20b of the second electrode 20 in the Z direction. The upper surface 30p of the third electrode 30 is spaced apart from the upper electrode 12 in the Z direction. Resin R is inserted between the upper surface 30p of the third electrode 30 and the upper electrode 12.

[0132] Figure 19 A cross-sectional view of a semiconductor device 501 according to a first variant of the fifth embodiment is shown. Figure 19 The cross section in the middle corresponds to along Figure 17 The cross section of line C1-C2 shown in the figure.

[0133] Figure 19 The second electrode 20 shown differs from that of the semiconductor device 500 in that the second portion P2 is located above the first portion P1. In a first variant of the fifth embodiment, the stepped surface 20s is the lower surface of the protruding portion PP of the second portion P2.

[0134] Miniaturization of the package is possible according to the semiconductor device 500 and the improved semiconductor device 501 of the fifth embodiment. The stepped surface 20s is located in the Z direction between the first surface 20a and the second surface 20b, and the Z-direction position of the stepped surface 20s can be appropriately selected by changing the shape of the second electrode 20. The Z-direction position of the third electrode 30, which is connected to the second electrode 20 at the stepped surface 20s, can be adjusted. In the manufacturing process, the amount of bending steps of the lead frame can be reduced, including by eliminating the bending processes between the third electrode 30 and the second terminal T2, and between the fourth electrode 40 and the first terminal T1. By reducing the number of bent portions of the lead frame, a smaller volume of resin R can be used to perform the sealing with the resin R, thereby achieving package miniaturization.

[0135] For comparison, consider a reference example in which the upper surface 30p of the third electrode 30 is located at the same Z-direction position as the second surface 20b of the second electrode 20. That is, the upper surface 30p of the third electrode 30 and the second surface 20b of the second electrode 20 are located on the same XY plane. In this reference example, the Z-direction position of the third electrode 30 can be determined by the Z-direction position of the second surface 20b of the second electrode 20.

[0136] The Z-direction positions of the first terminal T1 and the second terminal T2 can be determined by the package design. Therefore, in the reference example, it may be necessary to bend the lead frame between the third electrode 30 and the second terminal T2, and between the fourth electrode 40 and the first terminal T1. When the lead frame is bent and the bent portion forms an obtuse angle, the size of the lead frame can be increased. The volume of resin R required for sealing can also be increased.

[0137] On the other hand, according to the semiconductor device 500 and the improved semiconductor device 501 of the fifth embodiment, the lead frame can be formed in a flat shape. Even Figure 17 The Z-direction positions of the first terminal T1 and the second terminal T2 shown are predetermined. The Z-direction position of the stepped surface 20s can also be appropriately selected, and the Z-direction position of the third electrode 30 can be adjusted to be close to the Z-direction positions of the first terminal T1 and the second terminal T2. This reduces the bending of the lead frame, including between the third electrode 30 and the second terminal T2, and between the fourth electrode 40 and the first terminal T1, and allows the lead frame to be closer to a flat shape, or reduces the number of bent portions. Therefore, the amount of resin R required for hermetical encapsulation can be reduced, thereby achieving miniaturization of the package.

[0138] Sixth Implementation Plan Figure 20 This is a top view showing a semiconductor device 600 according to a sixth embodiment, wherein the resin is transparent. Descriptions of parts common to the semiconductor device 400 of the fourth embodiment are partially omitted.

[0139] Semiconductor device 600 includes three semiconductor elements 50: a first semiconductor element 50-1, a second semiconductor element 50-2, and a third semiconductor element 50-3. The three semiconductor elements 50 are arranged in the X direction. Semiconductor device 600 includes three second electrodes 20. The second electrodes 20 are disposed on the semiconductor elements 50 and arranged in the X direction.

[0140] The third electrode 30 located above the first semiconductor element 50-1 and the third electrode 30 located above the second semiconductor element 50-2 are physically connected via an intermediate portion 30M1. The third electrode 30 located above the second semiconductor element 50-2 and the third electrode 30 located above the third semiconductor element 50-3 are physically connected via an intermediate portion 30M2.

[0141] The second electrode 20, located above the first semiconductor element 50-1, includes four stepped surfaces 20s. Of these four stepped surfaces 20s, the stepped surfaces 20s located in the positive X-axis direction and the negative Y-axis direction are not connected to the third electrode 30. The second electrode 20, located above the first semiconductor element 50-1, connects to and overlaps with the third electrode 30 at three of the four stepped surfaces 20s.

[0142] The second electrode 20, located above the second semiconductor element 50-2, includes four stepped surfaces 20s. Of these four stepped surfaces 20s, the two stepped surfaces 20s located in the negative Y-axis direction do not contact the third electrode 30. The second electrode 20, located above the second semiconductor element 50-2, connects to and overlaps with the third electrode 30 at two of the four stepped surfaces 20s.

[0143] The second electrode 20, located above the third semiconductor element 50-3, includes four stepped surfaces 20s. Of these four stepped surfaces 20s, the stepped surfaces 20s located in the negative X-axis and negative Y-axis directions do not physically contact the third electrode 30. The second electrode 20, located above the third semiconductor element 50-3, connects to and overlaps with the third electrode 30 at three of the four stepped surfaces 20s.

[0144] When three or more second electrodes 20 are provided in the semiconductor device 600 as in the sixth embodiment, the number of stepped surfaces 20s in one second electrode 20 that are connected to the third electrode 30 may differ from the number of stepped surfaces 20s in another second electrode 20. The ratio of the number of stepped surfaces 20s connected to the third electrode 30 to the total number of stepped surfaces 20s in one second electrode 20 may differ from the number of stepped surfaces 20s in another second electrode 20.

[0145] exist Figure 20 In the example shown, the number of stepped surfaces 20s connected to the third electrode 30 in the second electrode 20 located above the second semiconductor element 50-2 is less than the number of stepped surfaces 20s in the second electrode 20 located above the first semiconductor element 50-1 or the third semiconductor element 50-3.

[0146] According to the semiconductor device 600 of the sixth embodiment, a semiconductor device with reduced thermal resistance can be provided.

[0147] Furthermore, according to the semiconductor device 600 of the sixth embodiment, the stepped surface 20s located in the negative direction of the Y-axis above the second electrode 20 of the second semiconductor element 50-2 is not connected to the third electrode 30. This suppresses interference between the third electrode 30 and the bonding tool when the source electrode S of the second semiconductor element 50-2 is connected to the second terminal T2 via the wire W. It also suppresses interference between the third electrode 30 and the bonding tool when the gate electrode G of the second semiconductor element 50-2 is connected to the first terminal T1 via the wire W.

[0148] Seventh Implementation Plan Figure 21 This is a top view showing a semiconductor device 700 according to a seventh embodiment, wherein the resin is transparent. Figure 22 It is along Figure 21 The XZ cross-sectional view is shown by line D1-D2. Descriptions of parts common to the semiconductor device 600 of the sixth embodiment are partially omitted.

[0149] Semiconductor device 700 includes an upper electrode 12 located above the second electrode 20. The upper electrode 12 is exposed from resin R. Figure 22 As shown, the upper electrode 12 is located above three or more second electrodes 20, a bonding layer 63 is inserted between the upper electrode 12 and the second electrodes 20, and the upper electrode 12 is exposed from the resin R.

[0150] According to the semiconductor device 700 of the seventh embodiment, a semiconductor device with reduced thermal resistance may also be provided.

[0151] According to at least one of the semiconductor devices of the first to seventh embodiments described above, a semiconductor device with reduced thermal resistance can be provided. Furthermore, the quality control of the semiconductor device can be improved, and its reliability can be further enhanced. Additionally, according to at least one of the semiconductor devices of the first to seventh embodiments described above, miniaturization of the package is possible.

[0152] Figures 23A-23F A perspective view of an example of the second electrode 20 is shown.

[0153] Figure 23A Examples are shown Figure 2B The second electrode 20 is shown. The second portion P2 is located on the first portion P1, and the lower surface of the second portion P2 is a stepped surface 20s. The stepped surface 20s is located between and connects the first side surface S1 and the second side surface S2. The second portion P2 includes a protruding portion that protrudes further in the X direction than any portion of the first portion P1 and a protruding portion that protrudes further in the Y direction than any portion of the first portion P1.

[0154] like Figure 23B As shown, the side surface of the second electrode 20 located in the negative direction of the Y-axis and perpendicular to the Y-direction can be formed as flat and extend across the first portion P1 and the second portion P2. In the side surface of the second electrode 20, although... Figure 23B Only a single flat surface is shown in the figure, but two or three flat surfaces may be present instead, i.e., at least one side surface including the stepped surface 20s.

[0155] Figure 23C Examples are shown Figure 9 The second electrode 20 is shown. The second portion P2 is located on the first portion P1, and the third portion P3 is located on the second portion P2. The lower surface of the second portion P2 is a stepped surface 20s. Alternatively, Figure 23C The second electrode 20 shown can be inverted, so that the upper surface of the second part P2 becomes a stepped surface 20s, thereby generating Figure 11 The second electrode 20 is shown.

[0156] like Figure 23C As shown, the side surface of the second electrode 20 located in the negative direction of the Y-axis and perpendicular to the Y-direction can be formed to be flat and extend across the first part P1, the second part P2 and the third part P3.

[0157] Figure 23D It shows Figure 9 Another example of the second electrode 20 shown. The length of the first portion P1 in the X direction is less than the length of the third portion P3, and the length of the third portion P3 in the X direction is less than the length of the second portion P2. The lower surface of the second portion P2 is a stepped surface 20s. According to Figure 23D The second electrode 20 shown can increase the area of ​​the stepped surface 20s and expand the contact area between the second electrode 20 and the third electrode 30. Furthermore, since the area of ​​the second surface 20b is larger than the area of ​​the first surface 20a, a larger contact area of ​​the second surface 20b exposed from the resin R can be achieved for electrical connection to external circuitry outside the package.

[0158] Figure 23E It shows Figure 11 Another example of the second electrode 20 shown. The second portion P2 is located on the third portion P3, and the first portion P1 is located on the second portion P2. The length of the first portion P1 in the X direction is less than the length of the third portion P3, and the length of the third portion P3 in the X direction is less than the length of the second portion P2. The area of ​​the first surface 20a is greater than the area of ​​the second surface 20b. The length of the first portion P1 in the Y direction is less than the length of the third portion P3. The upper surface of the second portion P2 is a stepped surface 20s. According to... Figure 23EThe second electrode 20 shown can increase the area of ​​the stepped surface 20s and expand the contact area between the second electrode 20 and the third electrode 30. The side surface of the second electrode 20 located in the negative direction of the Y-axis and perpendicular to the Y-direction can be formed to be flat and extend across the second portion P2 and the third portion P3.

[0159] Figure 23F Examples are shown Figure 13 The second electrode 20 is shown. The first part P1 is located above the second part P2. The area of ​​the first surface 20a is larger than the area of ​​the second surface 20b. The stepped surface 20s is the upper surface of the second part P2.

[0160] The first surface 20a, the second surface 20b, and the stepped surface 20s have polygonal shapes. The corners of the polygons may be rounded. The first surface 20a may be, for example, a square. The second surface 20b may be, for example, an octagon. The stepped surface 20s may be, for example, a triangle.

[0161] The first side surface S1 includes a first region S1x parallel to the second side surface S2 and a second region S1y continuous with the step surface 20s. Figure 23F In this configuration, the second region S1y of the first side surface S1 extends in a direction intersecting the direction of the extension of the second side surface S2. The stepped surface 20s connects the second region S1y and the second side surface S2. The combined shape of the first region S1x of the first side surface S1 and the second side surface S2 can be, for example, a stacked shape of a wide first rectangle and a narrow second rectangle.

[0162] Figures 23A-23F The dimensional relationship between the first portion P1 and the second portion P2 of the second electrode 20 shown is not limited to those shown. Furthermore, Figures 23A-23F The second electrode 20 shown can be inverted relative to the example shown.

[0163] The implementation scheme has been described above with reference to specific examples. However, the implementation scheme is not limited to these specific examples. In other words, designs obtained by those skilled in the art through appropriate modifications to these specific examples are also included within the scope of the implementation scheme, provided that the design possesses novel features of the implementation scheme. Each element set in each of the above specific examples, and its arrangement, materials, conditions, shape, size, etc., are not limited to the elements described in the examples and can be modified as appropriate.

[0164] Furthermore, the corresponding elements described for different embodiments can be combined with each other to a degree that is technically feasible, and such combinations are also included within the scope of this disclosure. In addition, various modifications and alterations will be apparent to those skilled in the art within the scope of this disclosure, and it should be understood that such modifications and alterations also fall within the scope of this disclosure.

[0165] While certain embodiments have been described, these embodiments are presented by way of example only and are not intended to limit the scope of this disclosure. In fact, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions, and changes may be made to the form of the embodiments described herein without departing from the spirit of this disclosure. The appended claims and their equivalents are intended to cover such forms or modifications that fall within the scope and spirit of this disclosure.

Claims

1. A semiconductor device, comprising: First electrode; A first semiconductor element is disposed on the first electrode; A second electrode is disposed on the first semiconductor element, the second electrode having a lower surface facing the first semiconductor element and an upper surface opposite to the lower surface of the second electrode; as well as A third electrode overlaps with the second electrode in a first direction extending from the first electrode toward the first semiconductor element, wherein the lower surface of the third electrode is further away from the first semiconductor element in the first direction than the lower surface of the second electrode, and the upper surface of the third electrode is closer to the first semiconductor element in the first direction than the upper surface of the second electrode.

2. The semiconductor device according to claim 1, further comprising: Resin surrounds the first semiconductor element in a plane perpendicular to the first direction, wherein The lower surface of the first electrode is exposed from the resin, and The upper surface of the second electrode is exposed from the resin.

3. The semiconductor device according to claim 1, further comprising: The upper electrode is disposed on the second electrode; as well as A resin surrounds the first semiconductor element and the second electrode in a plane perpendicular to the first direction, with the lower surface of the first electrode and the upper surface of the upper electrode exposed from the resin.

4. The semiconductor device according to claim 1, wherein, The second electrode includes: Part One; and The second part, based on the first part, and The third electrode faces the stepped surface of the second electrode, the stepped surface physically connecting the first side surface of the first portion and the second side surface of the second portion, the first and second side surfaces extending in the first direction, and the stepped surface extending in a direction intersecting the first direction.

5. The semiconductor device according to claim 4, wherein, The first portion is located between the first semiconductor element and the second portion, and the stepped surface faces a direction opposite to the first direction.

6. The semiconductor device according to claim 4, wherein, The stepped surface and the third electrode overlap in the first direction, with conductive material inserted between them.

7. The semiconductor device according to claim 4, wherein, The stepped surface and the third electrode overlap in the first direction, with insulating material inserted between them.

8. The semiconductor device according to claim 1, wherein, The third electrode is a plate-shaped conductor that extends without bending in a direction perpendicular to the first direction.

9. The semiconductor device according to claim 1, wherein, The second electrode includes: Part One; and The second part has a longer length than the first part in a second direction intersecting the first direction, and The third electrode overlaps with the second portion of the second electrode in the first direction.

10. The semiconductor device according to claim 9, wherein, The second portion includes a first protruding portion that protrudes further in the second direction than any portion of the first portion. The first portion is closer to the first semiconductor element than the second portion, and The third electrode overlaps with the first protruding portion in the first direction.

11. The semiconductor device according to claim 10, wherein, The second portion also includes a second protrusion that extends further than any portion of the first portion in a third direction intersecting both the first and second directions.

12. The semiconductor device according to claim 10, wherein, The second electrode includes a side surface perpendicular to a third direction intersecting both the first and second directions, the side surface of the second electrode being flat and extending across the first and second portions.

13. The semiconductor device according to claim 9, wherein, The second portion includes a protrusion that extends further in the second direction than any part of the first portion. The first portion is further away from the first semiconductor element than the second portion, and The third electrode overlaps with the protruding portion in the first direction.

14. The semiconductor device according to claim 13, wherein, The first and second portions are each polygonal in a plane perpendicular to the first direction, and the first portion has more corners in the plane than the second portion.

15. The semiconductor device according to claim 9, wherein, The second electrode further includes a third portion, which is disposed between the first and third portions, and The second portion includes a protruding portion that extends further in the second direction than any portion of the third portion.

16. The semiconductor device according to claim 15, wherein, The second electrode includes a side surface perpendicular to a third direction intersecting both the first and second directions, the side surface of the second electrode being flat and extending across the second and third portions.

17. The semiconductor device according to claim 1, further comprising: The source electrode is located on the first semiconductor element; Resin surrounds the first semiconductor element in a plane perpendicular to the first direction; Terminals exposed from the resin; as well as A wire electrically connects the source electrode and the terminal.

18. The semiconductor device according to claim 1, further comprising: The source electrode is located on the first semiconductor element; Resin surrounds the first semiconductor element in a plane perpendicular to the first direction; as well as Terminals, exposed from the resin, wherein The third electrode and the terminal are formed as a single component, and The third electrode is electrically connected to the source electrode via the second electrode.

19. The semiconductor device according to claim 1, further comprising: A second semiconductor element is disposed on the first electrode; A fourth electrode is disposed on the second semiconductor element, the fourth electrode overlapping the third electrode in the first direction, the fourth electrode having a lower surface facing the second semiconductor element and an upper surface opposite to the lower surface of the fourth electrode, wherein... The lower surface of the third electrode is further away from the second semiconductor element in the first direction than the lower surface of the fourth electrode, and The upper surface of the third electrode is closer to the second semiconductor element in the first direction than the upper surface of the fourth electrode.

20. The semiconductor device of claim 19, further comprising: A third semiconductor element is disposed on the first electrode; A fifth electrode is disposed on the third semiconductor element, the fifth electrode overlapping the third electrode in the first direction, the fifth electrode having a lower surface facing the third semiconductor element and an upper surface opposite to the lower surface of the fifth electrode, wherein... The lower surface of the third electrode is further away from the third semiconductor element in the first direction than the lower surface of the fifth electrode, and The upper surface of the third electrode is closer to the third semiconductor element in the first direction than the upper surface of the fifth electrode.

Citation Information

Patent Citations

  • Packaging material, and packaging product

    JP2025063320A