A flip-chip light engine and method of making the same

Abstract

The application relates to the technical field of optical communication, in particular to an optical engine using a flip chip and a preparation method thereof. The optical engine comprises a PCB, a first chip and a second chip; the first chip is flip-chipped on the second chip, the second chip is flip-chipped on the PCB, and the first chip and the PCB are arranged on the same side of the second chip; a preset position corresponding to the first chip on the PCB is hollowed out for several layers to form a containing space, and the first chip is inserted into the containing space. In the case that the second chip is flip-chipped on the PCB, the containing space is formed by hollowing out the PCB for several layers, so that the first chip can be inserted into the containing space and then flip-chipped on the second chip, the electrical connection between the first chip and the second chip is realized, the parasitic inductance and impedance mismatch are reduced, and more excellent high-frequency performance is obtained; compared with the prior art, the flip-chip technology is mature, and the cost pressure is smaller.

Description

Technical Field

[0001] This invention relates to the field of optical communication technology, and in particular to an optical engine using a flip chip and its fabrication method. Background Technology

[0002] The rapid development of data centers and artificial intelligence (AI) technologies has placed higher demands on the speed of optical modules. The mainstream optical modules in the market have gradually increased from 200G / 400G to 800G / 1.6T, and may even reach 3.2T and above. The single-wavelength transmission rate has also gradually increased from 100G to 200G / 400G. In this process, photonic integrated circuit (PIC) chips have been widely adopted due to their high modulation rate and high integration density.

[0003] Conventional PIC chips are electrically connected to the printed circuit board (PCB) via gold wire bonding. However, with the increase in single-wavelength, the traditional gold wire bonding method is difficult to meet the transmission requirements of high-speed signals due to its large parasitic inductance and impedance mismatch. Existing technology uses flip-chip bonding to achieve electrical connection between the PIC chip and the PCB board, in order to reduce parasitic inductance and impedance mismatch and obtain better high-frequency performance.

[0004] To further improve performance, the industry has turned its attention to flip-chip drivers. Existing solutions use through-silicon via (TSV) technology to flip-chip the driver onto the back of the PIC chip. However, TSV technology is not yet mature in the optical module industry, resulting in significant cost pressure.

[0005] Therefore, overcoming the shortcomings of the existing technology is an urgent problem to be solved in this technical field. Summary of the Invention

[0006] The technical problem to be solved by this invention is the excessive cost pressure caused by the use of TSV process flip-chip in existing solutions.

[0007] The present invention adopts the following technical solution: In a first aspect, the present invention provides an optical engine using a flip chip, comprising a PCB1, a first chip 2, and a second chip 3; The first chip 2 is flip-mounted on the second chip 3, and the second chip 3 is flip-mounted on the PCB1. The first chip 2 and the PCB1 are disposed on the same side of the second chip 3. The PCB1 has several layers cut out at a preset position corresponding to the first chip 2 to form a receiving space, and the first chip 2 is inserted into the receiving space.

[0008] Furthermore, the soldering surface of the first chip 2 is provided with a first bump 20, and the first bump 20 is soldered to the corresponding pad of the second chip 3; The second chip 3 has a second bump 30 on its soldering surface, and the second bump 30 is soldered to the corresponding pad on the PCB1.

[0009] Furthermore, the number of layers with pre-defined locations hollowed out on the PCB1 is less than the total number of layers on the PCB1, in order to form a recess 10 for accommodating the first chip 2.

[0010] Furthermore, the bottom surface of the groove 10 is plated with a metal layer 100.

[0011] Furthermore, a predetermined position on the PCB1 is completely hollowed out to form a through hole 11 for accommodating the first chip 2.

[0012] Furthermore, a through slot 12 is provided on the PCB1, and the waveguide end 31 of the second chip 3 protrudes from the first sidewall 120 of the through slot 12. The through slot 12 is covered with a heat sink 4, which is soldered and fixed to the same side surface of the PCB1 as the second chip 3.

[0013] Furthermore, an optical fiber array 40 is welded onto the heat sink 4, and the end face of the coupling end 400 of the optical fiber array 40 protrudes from the heat sink 4 and is aligned and coupled to the waveguide end 31 of the second chip 3.

[0014] Furthermore, a laser assembly 41 and an isolator 42 are mounted on the heat sink 4. The central axis of the light-emitting strip of the laser in the laser assembly 41 coincides with the optical axis of the input waveguide port 310 of the second chip 3. The center of the light-transmitting surface of the isolator 42 is coaxial with the central axis of the light-emitting strip of the laser.

[0015] Furthermore, the accommodating space is filled with thermally conductive material 5 to conduct the heat of the second chip 3 to the optical module housing 6.

[0016] Secondly, the present invention provides a method for fabricating an optical engine using a flip chip, the method comprising: The first chip 2 is soldered onto the second chip 3 using a flip-chip process; Several layers are hollowed out on the PCB1 at a predetermined position corresponding to the first chip 2 to form a receiving space, and the first chip 2 is inserted into the receiving space; The second chip 3 is soldered onto the PCB1 using flip-chip bonding.

[0017] The beneficial effects of this invention are as follows: when the second chip is flip-chip mounted on the PCB, by hollowing out several layers of the PCB to form a receiving space, the first chip can be inserted into the receiving space and thus flip-chip mounted on the second chip, realizing the electrical connection between the first chip and the second chip, reducing parasitic inductance and impedance mismatch, and obtaining better high-frequency performance; compared with the existing solutions, the flip-chip process technology is mature and the cost pressure is relatively small. Attached Figure Description

[0018] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the embodiments of the present invention will be briefly described below. Obviously, the drawings described below are merely some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without any creative effort.

[0019] Figure 1 This is a schematic diagram of a flip-chip driver. Figure 2 This is a schematic diagram of the structure of a flip-chip driver provided by the present invention; Figure 3 This is a schematic diagram of a accommodating space provided by the present invention; Figure 4 This is a schematic diagram of a accommodating space provided by the present invention; Figure 5 This is a schematic cross-sectional view of a groove along AA provided by the present invention; Figure 6 This is a schematic cross-sectional view of a through hole along BB provided by the present invention; Figure 7 This is a schematic diagram of a thermally conductive material and an optical module housing suitable for grooves provided by the present invention; Figure 8 This is a schematic diagram of a thermally conductive material and an optical module housing suitable for through holes, provided by the present invention. Figure 9 This is a schematic diagram of the structure of a first protrusion and a second protrusion provided by the present invention; Figure 10 This is a schematic diagram of the structure of an input waveguide port and an output waveguide port provided by the present invention; Figure 11 This is a schematic diagram of a through groove and heat sink provided by the present invention; Figure 12 This is a schematic diagram of an optical signal coupling structure provided by the present invention; Figure 13 This is a schematic diagram of the structure of a third heat-conducting layer and a fourth heat-conducting layer provided by the present invention; Figure 14 This is a schematic diagram of the structure of a DSP chip provided by the present invention; Figure 15 This is a schematic flowchart of a method for fabricating an optical engine using a flip chip, provided by the present invention.

[0020] The attached figures are labeled as follows: PCB1, Groove 10, Metal layer 100, Through hole 11, Through slot 12, First sidewall 120, First chip 2, First bump 20, Second chip 3, Second bump 30, Waveguide end 31, Input waveguide port 310, Output waveguide port 311, Heat sink 4, Fiber array 40, Coupler end 400, Laser assembly 41, Isolator 42, Lens group 43, Front lens 430, Rear lens 431, Thermal conductive material 5, First thermal conductive layer 50, Second thermal conductive layer 51, Third thermal conductive layer 52, Fourth thermal conductive layer 53, Optical module housing 6, DSP chip 7. Detailed Implementation

[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0022] Unless the context otherwise requires, throughout the specification and claims, the term "comprising" is interpreted as openly inclusive, meaning "including, but not limited to." In the description of the specification, terms such as "one embodiment," "some embodiments," "exemplary embodiment," "example," "specific example," or "some examples" are intended to indicate that a particular feature, structure, material, or characteristic associated with that embodiment or example is included in at least one embodiment or example of this disclosure. The illustrative representations of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics mentioned may be included in any suitable manner in any one or more embodiments or examples; that is, although they may be incorporated into embodiments or examples using the above terms for reasons such as order and position, it does not limit them to be incorporated in combination by a single embodiment or example.

[0023] In the description of this invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined with "first" or "second" may explicitly or implicitly include one or more of that feature. In the description of embodiments of this disclosure, unless otherwise stated, "a plurality of" means two or more. Furthermore, for example, the description may use the prefix "A" or "B" to describe the same type of nouns as two independent entities. In this case, the corresponding features defined with "A" and "B" are used only to distinguish between similar entities and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features.

[0024] In describing some embodiments, the terms "coupled," "coupled," and "connected," and their derivative expressions, may be used. For example, the term "connected" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact with each other. Similarly, the term "coupled" may be used in describing some embodiments to indicate that two or more components have direct physical or electrical contact. However, the terms "connected" or "coupled" may also refer to two or more components that do not have direct contact with each other but still cooperate or interact with each other, such as "optical coupling," "wireless connection," etc. The embodiments disclosed herein are not necessarily limited to the scope of this invention.

[0025] Furthermore, the technical features involved in the various embodiments of the present invention described below can be combined with each other as long as they do not conflict with each other.

[0026] Existing solutions flip-chip the PIC chip onto the PCB to reduce parasitic inductance and impedance mismatch caused by traditional gold wire bonding, such as Figure 1 As shown, the lower surface of the PIC chip is the soldering surface, and the upper surface of the PCB is provided with corresponding pads. The PIC chip is soldered onto the corresponding pads of the PCB. In order to further improve high-frequency performance, the existing solution uses TSV process to flip-chip the driver chip on the back of the PIC chip, that is, the side of the PIC chip away from the PCB. Since the TSV process is not yet mature in the optical module industry, it results in greater cost pressure.

[0027] If the driver chip can be flip-chip soldered onto the soldering surface of the PIC chip while the PIC chip is flip-chip mounted on the PCB, the cost pressure can be significantly reduced compared to existing solutions, since the flip-chip soldering process is relatively mature.

[0028] Example 1: To achieve the above objectives, see [reference] Figure 2Embodiment 1 of the present invention provides an optical engine using a flip chip, including a PCB1, a first chip 2, and a second chip 3; the first chip 2 is flip-chip mounted on the second chip 3, and the second chip 3 is flip-chip mounted on the PCB1. The first chip 2 and the PCB1 are disposed on the same side of the second chip 3. Specifically, the side of the second chip 3 closest to the PCB1 is designated as the front side of the second chip 3, and the front side of the second chip 3 is a soldering surface. The first chip 2 is soldered onto the soldering surface of the second chip 3 using a flip-chip soldering process. The side of the PCB1 closest to the second chip 3 is provided with corresponding pads, so that the soldering surface of the second chip 3 can be soldered to the corresponding pads.

[0029] In order to flip-chip 2 onto the soldering surface of the second chip 3, several layers of the PCB1 are hollowed out at a preset position corresponding to the first chip 2 to form a receiving space. The first chip 2 is inserted into the receiving space, so that when the second chip 3 is flip-chip mounted on the PCB1, the first chip 2 can be flip-chip soldered onto the soldering surface of the second chip 3, realizing the electrical connection between the first chip 2 and the second chip 3, reducing parasitic inductance and impedance mismatch, and obtaining better high-frequency performance. Compared with the existing solution, the flip-chip process technology is mature and has less cost pressure.

[0030] It should be noted that in this embodiment, the first chip 2 can be a driver chip, and the second chip 3 can be a PIC chip.

[0031] At least there exist such as Figure 3 and Figure 4 The two implementation methods shown can form the aforementioned accommodating space. The two implementation methods will be explained in detail below.

[0032] Implementation Method 1: See Figure 5 The number of layers hollowed out at a predetermined position on the PCB1 is less than the total number of layers on the PCB1, so as to form a groove 10 for accommodating the first chip 2.

[0033] In one optional implementation, assuming the PCB1 has a total of 10 layers, n layers are hollowed out at a preset position corresponding to the first chip 2, where n is a positive integer less than 10, to form a corresponding groove 10 for accommodating the first chip 2. The depth of the groove 10 is greater than the height of the first chip 2, so that the first chip 2 can be completely inserted into the groove 10. The specific value of n is determined by those skilled in the art based on the actual situation.

[0034] Implementation Method Two: See Figure 6The PCB1 is completely hollowed out at a preset position to form a through hole 11 for accommodating the first chip 2.

[0035] In one optional implementation, assuming the PCB1 has a total of 10 layers, all the preset positions corresponding to the first chip 2 are hollowed out to form corresponding through holes 11 for accommodating the first chip 2, so that the first chip 2 can be completely inserted into the through holes 11.

[0036] It is easy to understand that in actual use scenarios, placing the first chip 2 in the groove 10 or through hole 11 will have a certain impact on the heat dissipation of the first chip 2. Although the structure of the second implementation method is more conducive to the heat exchange between the first chip 2 and the outside world and facilitates the heat dissipation of the first chip 2 compared with the first implementation method, it still cannot guarantee the heat dissipation effect of the first chip 2 under multiple flip-stacks.

[0037] To solve the above problems, see Figure 7 and Figure 8 In one alternative embodiment, the accommodating space is filled with a thermally conductive material 5 to conduct the heat of the second chip 3 to the optical module housing 6.

[0038] Corresponding to the first implementation, the groove 10 is filled with a thermally conductive material 5, which forms a first thermally conductive layer 50 within the groove 10. The heat from the first chip 2 is conducted to the PCB1 through the first thermally conductive layer 50. The PCB1 abuts against the optical module housing 6, and heat exchange occurs between the PCB1 and the outside environment through the optical module housing 6. Specifically, a certain amount of the thermally conductive material 5 is coated on the bottom and sidewalls of the groove 10, and the first chip 2 is inserted into the groove 10, so that the thermally conductive material 5 completely encapsulates the first chip 2.

[0039] To improve thermal conductivity, in one optional embodiment, a metal layer 100 is plated on the bottom surface of the groove 10. Combined with the metal layer 100 and the first thermally conductive layer 50, the heat from the first chip 2 can be conducted to the PCB 1 more quickly. In practical applications, the metal layer 100 can be a material with high thermal conductivity, such as copper or tin, to improve heat dissipation efficiency.

[0040] Corresponding to the second implementation, the through hole 11 is filled with a thermally conductive material 5, which forms a first thermally conductive layer 50 within the through hole 11. This first thermally conductive layer 50 encloses the first chip 2. A protrusion is provided on the optical module housing 6, which is inserted into the through hole 11 and abuts against the first thermally conductive layer 50. The first thermally conductive layer 50 conducts the heat generated by the first chip 2 to the optical module housing 6, allowing heat exchange with the outside environment through the optical module housing 6. Specifically, the protrusion on the optical module housing 6 is inserted into the through hole 11, a certain amount of thermally conductive material 5 is filled into the through hole 11, and the first chip 2 is inserted into the through hole 11, so that the thermally conductive material 5 completely encloses the first chip 2.

[0041] In order to dissipate heat from the second chip 3, such as Figure 7 and Figure 8 As shown, a thermally conductive material 5 is coated on the back of the second chip 3 to form a second thermally conductive layer 51. The optical module housing 6 and the second thermally conductive layer 51 abut against each other. The second thermally conductive layer 51 conducts the heat generated by the second chip 3 to the optical module housing 6. The optical module housing 6 exchanges heat with the outside world to achieve heat dissipation.

[0042] In practical applications, the thermally conductive material 5 can be a thermally conductive gel.

[0043] By hollowing out several layers on the PCB1 corresponding to the preset position of the first chip 2, a space is formed while ensuring the heat dissipation space of the first chip 2 under multiple flip-chip stacking. This allows the heat generated by the first chip 2 during operation to be dissipated in time through a shorter heat path, avoiding a decrease in its service life due to overheating.

[0044] Regardless of whether implementation method one or implementation method two is used, the first chip 2 and the second chip 3, as well as the second chip 3 and the PCB 1, can be fixed together using a bump soldering process. (See also...) Figure 9 In one optional embodiment, the soldering surface of the first chip 2 is provided with a first bump 20, which is soldered to the corresponding pad of the second chip 3; the soldering surface of the second chip 3 is provided with a second bump 30, which is soldered to the corresponding pad of the PCB 1. Specifically, the first bumps 20 are evenly distributed in at least two rows on the soldering surface of the first chip 2 to ensure the reliability of the electrical connection between the first chip 2 and the second chip 3; the soldering surface of the second chip 3 is provided with a pad area corresponding to the first chip 2, and the second bumps 30 are disposed around the pad area. The second bumps 30 can be configured in two groups (e.g., ...). Figure 9 (As shown) can also be set to multiple groups (such as) Figure 10(as shown), to be determined by those skilled in the art based on the actual situation.

[0045] In one alternative implementation, both the first bump 20 and the second bump 30 are made of metal. In practical applications, the first bump 20 and the second bump 30 can be copper pillars to improve conductivity and reduce parasitic inductance.

[0046] In one alternative embodiment, the second chip 3 may be a silicon photonics chip or a thin-film lithium niobate chip, see further. Figure 9 and Figure 10 The second chip 3 has an input waveguide port 310 and an output waveguide port 311 at one end, which are used for transmitting optical signals with other optical devices.

[0047] The following describes other devices on PCB1 that are coupled to the second chip 3, taking implementation method one as an example. The principle of coupling the second chip 3 with other devices in implementation method two is the same as that in implementation method one, and will not be repeated here.

[0048] In one alternative implementation, see [reference] Figure 11 A through slot 12 is formed on the PCB1, and the waveguide end 31 of the second chip 3 protrudes from the first sidewall 120 of the through slot 12. A heat sink 4 is covered on the through slot 12, and the heat sink 4 is soldered and fixed to the same side surface of the PCB1 as the second chip 3, so that the heat sink 4 covers the through slot 12. In practical applications, the heat sink 4 is made of metal. In a preferred embodiment, the heat sink 4 is made of tungsten copper to ensure the heat dissipation efficiency of the heat sink 4 and the optical devices fixed on it.

[0049] In one alternative implementation, see [link to relevant documentation] Figure 12An optical fiber array 40 is welded onto the heat sink 4. The end face of the coupling end 400 of the optical fiber array 40 protrudes from the heat sink 4 and is aligned and coupled to the waveguide end 31 of the second chip 3. Specifically, the second chip 3 protrudes from the first sidewall 120, allowing the coupling end 400 of the optical fiber array 40 and the waveguide end 31 of the second chip 3 to be mated and coupled. In practical applications, the optical fibers in the optical fiber array 40 are single-mode fibers. The optical fiber array 40 contains multiple single-mode fibers, typically four or eight. The number of single-mode fibers matches the number of input waveguide ports 310 of the second chip 3, and each single-mode fiber corresponds one-to-one with the input waveguide port 310. After alignment and coupling, the coupling end 400 of the optical fiber array 40 and the waveguide end 31 of the second chip 3 are bonded and fixed together. The adhesive used for bonding and fixing can be UV-curable refractive index matching adhesive, etc.

[0050] To ensure coupling efficiency, please refer to [further details]. Figure 12 A laser assembly 41 and an isolator 42 are mounted on the heat sink 4. The laser assembly 41 includes a laser and a ceramic substrate. The laser provides an optical signal, and the ceramic substrate supports the laser and conducts heat for heat dissipation. The central axis of the light-emitting stripe of the laser in the laser assembly 41 coincides with the optical axis of the input waveguide port 310 of the second chip 3. The center of the light-transmitting surface of the isolator 42 is coaxial with the central axis of the light-emitting stripe of the laser to achieve coupling. The isolator 42 is used to isolate the optical signal incident on the laser from the opposite direction to protect the laser from damage.

[0051] In one optional embodiment, the laser assembly 41 adopts a CoC packaging method, that is, the laser or photodetector chip is fixed on a small carrier plate by welding or other processes. The specific type of the carrier plate is determined by those skilled in the art according to the specific application scenario. In actual application scenarios, the carrier plate can be made of tungsten copper alloy or other thermally conductive materials 5.

[0052] Continue reading Figure 12 A lens group 43 is bonded and fixed on the heat sink 4. The lens group 43 includes a front lens 430 and a rear lens 431. In an optional embodiment, the front lens 430 and the rear lens 431 are aspherical lenses made of silicon. The front lens 430 is used to convert the diverging light output by the laser into parallel light, and the rear lens 431 is used to convert the parallel light into converging light.

[0053] It should be noted here that, see Figure 13To prevent thermal crosstalk of the second chip 3 from causing failure of the fiber array 40, the heat sink 4 can be hollowed out at the position corresponding to the fiber array 40, and thermal conductive gel can be filled in the hollowed-out area to form a third thermal conductive layer 52. Thermal conductive gel can be coated on the upper surface of the fiber array 40 to form a fourth thermal conductive layer 53, so that the optical module housing 6 can abut against the third thermal conductive layer 52 and the fourth thermal conductive layer 53 to dissipate heat from the fiber array 40.

[0054] See Figure 14 In an optional embodiment, the PCB1 is further provided with other optical devices such as a DSP chip 7, which is used to process digital signals, perform modulation and demodulation, error correction coding and clock recovery, etc., to realize photoelectric conversion.

[0055] Example 2: See Figure 15 Embodiment 2 of the present invention provides a method for fabricating an optical engine using a flip chip, wherein the fabrication of the optical engine using a flip chip as described in Embodiment 1 includes steps 101 to 103: Step 101: The first chip 2 is soldered onto the second chip 3 using a flip-chip process.

[0056] In one optional implementation, the first bump 20 of the first chip 2 is soldered to the corresponding pad area on the second chip 3 to achieve an electrical connection between the first chip 2 and the second chip 3.

[0057] Step 102: Hollow out several layers on the PCB1 corresponding to the preset position of the first chip 2 to form a receiving space, and insert the first chip 2 into the receiving space.

[0058] Corresponding to the first implementation method, the preset position is hollowed out to form a groove 10, and a metal layer 100 is plated at the bottom of the groove 10 to improve the heat conduction efficiency. The first chip 2 is then fully inserted into the groove 10.

[0059] Corresponding to the second implementation method, the preset position is completely hollowed out to form a through hole 11, and the first chip 2 is inserted into the through hole 11 from one side of the PCB1, so that the front of the PCB1 and the second chip 3 are in contact.

[0060] Step 103: Solder the second chip 3 onto the PCB1 by flip-chip soldering.

[0061] In one alternative embodiment, the second bump 30 of the second chip 3 is soldered onto the corresponding pad of the PCB1 to achieve an electrical connection between the second chip 3 and the PCB1.

[0062] Corresponding to the first implementation, the groove 10 is filled with thermally conductive material 5, the first chip 2 is wrapped by the thermally conductive material 5, and the heat generated by the first chip 2 is conducted to the PCB1 by the thermally conductive material 5, thereby realizing the heat dissipation of the first chip 2.

[0063] Corresponding to the second implementation, the through hole 11 is filled with thermally conductive material 5, and the optical module housing 6 is inserted into the through hole 11 from the other side of the PCB1, so that the optical module housing 6 squeezes the thermally conductive material 5, and the heat generated by the first chip 2 is conducted to the optical module housing 6 by the thermally conductive material 5, thereby realizing the heat dissipation of the first chip 2.

[0064] In the above implementation method one and implementation method two, in order to dissipate heat from the second chip 3, a thermally conductive material 5 is coated on the back of the second chip 3. The optical module housing 6 squeezes the thermally conductive material 5, and the heat generated by the second chip 3 is conducted to the optical module housing 6 by the thermally conductive material 5, thereby achieving heat dissipation of the second chip 3.

[0065] Example 3: Taking the first chip 2 as a driver chip and the second chip 3 as a PIC chip as an example, the preparation method of the optical engine using flip chips described in Embodiment 2 will be specifically explained according to Implementation Method 1 and Implementation Method 2 respectively.

[0066] Corresponding to implementation method one, the preparation method specifically includes the following steps: Step 201: The DSP chip 7, the heat sink 4, etc. are mounted and fixed on the PCB1 using surface mount technology (SMT).

[0067] Step 202: Fix the Driver chip to the pad area on the PIC chip by flip-chip bonding and perform bottom filling.

[0068] Step 203: Fix the PIC chip-Driver chip as a whole to the corresponding area of ​​PCB1 again by flip-chip bonding, and fill the bottom.

[0069] Step 204: The laser assembly 41 and the isolator 42 are mounted and fixed on the heat sink 4 using an automatic pick and place machine. The central axis of the light-emitting strip of the laser in the laser assembly 41 is set to coincide with the optical axis of the input waveguide port 310 in the PIC chip. At the same time, the center of the light-transmitting surface of the isolator 42 is also set to be coaxial with the central axis of the light-emitting strip of the laser to ensure the best coupling efficiency for subsequent optical coupling.

[0070] Step 205: Power on the laser in the laser assembly 41 by controlling PCB1 to make the laser emit light. Use two suction heads to pick up the front lens 430 and the rear lens 431 respectively. Use a vision recognition system to identify the coordinate positions of the laser, the front lens 430 and the rear lens 431 in the laser assembly 41 respectively, and calculate the relative positional relationship between the front lens 430 and the rear lens 431 and the laser. Use a mechanical system to place the front lens 430 and the rear lens 431 at the theoretically calculated optimal coupling efficiency position. Specifically, keeping the position of the rear lens 431 unchanged, the position of the front lens 430 along the X, Y, and Z axes is traversed using a mechanical device. The position coordinates of the front lens 430 are recorded when the current value of the PD monitoring the incident light magnitude in the PIC chip reaches its maximum value. The front lens 430 is then placed in a designated position. Similarly, the position of the rear lens 431 along the X, Y, and Z axes is traversed using a mechanical device. The position coordinates of the rear lens 431 are recorded when the current value of the PD monitoring the incident light magnitude in the PIC chip reaches its maximum value. The rear lens 431 is then placed in a designated position. A small-range cross-light search is performed between the front lens 430 and the rear lens 431 to finally determine the optimal coupling position between them.

[0071] Step 206: Fix the front lens 430 and the rear lens 431 with UV adhesive.

[0072] Step 207: Mount the fiber optic array 40 onto a mechanically movable clamping fixture, and connect the coupling end 400 of the fiber optic array 40 to the photometer. Position the fiber optic array 40 using a visual recognition system and move it using a mechanical adjustment device, adjusting the light-incident end face of the fiber optic array 40 to be parallel to the coupling end face of the PIC chip, and aligning the center of the fiber in the fiber optic array 40 with the center of the waveguide of the PIC chip. Control the distance between the two end faces to within 20µm (in the Z-axis direction). Then, control the feedback from the mechanical adjustment device and the photometer value to perform light searching on the X and Y axes respectively to determine the optimal coupling position. Finally, use UV-cured refractive index matching adhesive to bond and fix the PIC chip and the fiber optic array 40 together.

[0073] Step 208: As shown in the figure, apply thermal conductive gel to the back of the PIC chip and in the groove 10 to ensure that the optical module housing 6 can be squeezed onto the thermal conductive gel when the optical module housing 6 is covered.

[0074] Corresponding to implementation method two, the preparation method specifically includes the following steps, wherein, except for the different positions of the thermally conductive gel applied, the other steps are the same as in implementation method one.

[0075] Step 301: The DSP chip 7, the heat sink 4, etc. are fixed on the PCB1 by SMT mounting.

[0076] Step 302: Fix the Driver chip to the pad area on the PIC chip by flip-chip bonding and perform bottom filling.

[0077] Step 303: Fix the PIC chip-Driver chip as a whole to the corresponding area of ​​PCB1 again by flip-chip bonding, and fill the bottom.

[0078] Step 304: The laser assembly 41 and the isolator 42 are mounted and fixed on the heat sink 4 using an automatic pick and place machine. The central axis of the light-emitting strip of the laser in the laser assembly 41 is set to coincide with the optical axis of the input waveguide port 310 in the PIC chip. At the same time, the center of the light-transmitting surface of the isolator 42 is also set to be coaxial with the central axis of the light-emitting strip of the laser to ensure the best coupling efficiency for subsequent optical coupling.

[0079] Step 305: Power on the laser in the laser assembly 41 by controlling PCB1 to make the laser emit light. Use two suction heads to pick up the front lens 430 and the rear lens 431 respectively. Use a vision recognition system to identify the coordinate positions of the laser, the front lens 430 and the rear lens 431 in the laser assembly 41 respectively, and calculate the relative positional relationship between the front lens 430 and the rear lens 431 and the laser. Use a mechanical system to place the front lens 430 and the rear lens 431 at the theoretically calculated optimal coupling efficiency position. Specifically, keeping the position of the rear lens 431 unchanged, the position of the front lens 430 along the X, Y, and Z axes is traversed using a mechanical device. The position coordinates of the front lens 430 are recorded when the current value of the PD monitoring the incident light magnitude in the PIC chip reaches its maximum value. The front lens 430 is then placed in a designated position. Similarly, the position of the rear lens 431 along the X, Y, and Z axes is traversed using a mechanical device. The position coordinates of the rear lens 431 are recorded when the current value of the PD monitoring the incident light magnitude in the PIC chip reaches its maximum value. The rear lens 431 is then placed in a designated position. A small-range cross-light search is performed between the front lens 430 and the rear lens 431 to finally determine the optimal coupling position between them.

[0080] Step 306: Fix the front lens 430 and the rear lens 431 with UV adhesive.

[0081] Step 307: Mount the fiber optic array 40 onto a mechanically movable clamping fixture, and connect the coupling end 400 of the fiber optic array 40 to the photometer. Position the fiber optic array 40 using a visual recognition system and move it using a mechanical adjustment device, adjusting the light-incident end face of the fiber optic array 40 to be parallel to the coupling end face of the PIC chip, and aligning the center of the fiber in the fiber optic array 40 with the center of the waveguide of the PIC chip. Control the distance between the two end faces to within 20µm (in the Z-axis direction). Then, control the feedback from the mechanical adjustment device and the photometer value to perform light searching on the X and Y axes respectively to determine the optimal coupling position. Finally, use UV-cured refractive index matching adhesive to bond and fix the PIC chip and the fiber optic array 40 together.

[0082] Step 308: Apply thermal conductive gel to the through-hole 11 on the back of the PIC chip and the PCB1 used to accommodate the flip-chip driver, so that when the optical module housing 6 is covered, the optical module housing 6 can be squeezed onto the thermal conductive gel.

[0083] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A light engine using a flip chip, characterized in that, Includes PCB (1), first chip (2), and second chip (3); The first chip (2) is flip-mounted on the second chip (3), the second chip (3) is flip-mounted on the PCB (1), and the first chip (2) and the PCB (1) are disposed on the same side of the second chip (3); The PCB (1) has several layers hollowed out at a preset position corresponding to the first chip (2) to form a receiving space, and the first chip (2) is inserted into the receiving space.

2. The optical engine using a flip chip according to claim 1, characterized in that, The first chip (2) has a first bump (20) on its soldering surface, and the first bump (20) is soldered to the corresponding pad of the second chip (3); The second chip (3) has a second bump (30) on its soldering surface, and the second bump (30) is soldered to the corresponding pad on the PCB (1).

3. The optical engine using a flip chip according to claim 1, characterized in that, The number of layers that are hollowed out at a preset position on the PCB (1) is less than the total number of layers on the PCB (1) to form a groove (10) for accommodating the first chip (2).

4. The optical engine using a flip chip according to claim 3, characterized in that, The bottom surface of the groove (10) is plated with a metal layer (100).

5. The optical engine using a flip chip according to claim 1, characterized in that, The PCB (1) is completely hollowed out at a preset position to form a through hole (11) for accommodating the first chip (2).

6. The optical engine using a flip chip according to claim 1, characterized in that, A through slot (12) is provided on the PCB (1), and the waveguide end (31) of the second chip (3) protrudes from the first sidewall (120) of the through slot (12). The through slot (12) is covered with a heat sink (4), which is welded and fixed to the same side surface of the PCB (1) as the second chip (3).

7. The optical engine using a flip chip according to claim 6, characterized in that, An optical fiber array (40) is welded onto the heat sink (4). The end face of the coupling end (400) of the optical fiber array (40) protrudes from the heat sink (4) and is aligned and coupled with the waveguide end (31) of the second chip (3).

8. The optical engine using a flip chip according to claim 6, characterized in that, The heat sink (4) is fitted with a laser assembly (41) and an isolator (42). The central axis of the light-emitting strip of the laser in the laser assembly (41) coincides with the optical axis of the input waveguide port (310) of the second chip (3). The center of the light-transmitting surface of the isolator (42) is coaxial with the central axis of the light-emitting strip of the laser.

9. The optical engine using a flip chip according to claim 1, characterized in that, The containment space is filled with thermally conductive material (5) to conduct the heat of the second chip (3) to the optical module housing (6).

10. A method for fabricating an optical engine using a flip chip, characterized in that, Preparing a flip-chip optical engine according to any one of claims 1-9, comprising: The first chip (2) is soldered onto the second chip (3) using a flip-chip process; Several layers are hollowed out on the PCB (1) at a preset position corresponding to the first chip (2) to form a receiving space, and the first chip (2) is inserted into the receiving space; The second chip (3) is soldered onto the PCB (1) by flip-chip bonding.

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