Power module, inverter device, power equipment, and vehicle

Abstract

The application discloses a power module, an inverter device, a power equipment and a vehicle, and relates to the technical field of power modules. The power module comprises a power supply connection copper layer, a power connection copper layer, a signal connection copper layer and an electrode layer which are sequentially stacked, the electrode layer is electrically connected with the power supply connection copper layer, the power connection copper layer and the signal connection copper layer through a via, a power chip is arranged on one side of the power supply connection copper layer close to the power connection copper layer, and the power chip is electrically connected with the power connection copper layer and the signal connection copper layer through the via. The power module has high reliability and higher power density.

Description

Technical Field

[0001] This invention relates to the field of vehicle technology, and in particular to a power module, inverter, power equipment, and vehicle. Background Technology

[0002] In related technologies, power modules are equipped with power terminals and signal terminals, and the chips are electrically connected by traditional wire bonding. However, the long-term reliability of wire bonding is poor, resulting in insufficient reliability of power module packaging. Summary of the Invention

[0003] The present invention aims to at least solve one of the technical problems existing in the prior art. Therefore, one object of the present invention is to provide a power module that has high package reliability and higher power density.

[0004] The second objective of this invention is to provide an inverter device.

[0005] The third objective of this invention is to provide an electrical device.

[0006] The fourth objective of this invention is to provide a vehicle.

[0007] To address the aforementioned problems, one embodiment of the present invention provides a power module, comprising: a power supply connection copper layer, a power connection copper layer, a signal connection copper layer, and an electrode layer stacked sequentially, wherein the electrode layer is electrically connected to the power supply connection copper layer, the power connection copper layer, and the signal connection copper layer via vias; and a power chip disposed on the side of the power supply connection copper layer close to the power connection copper layer, wherein the power chip is electrically connected to the power connection copper layer and the signal connection copper layer via vias.

[0008] According to the power module of the present invention, a power connection copper layer and a signal connection copper layer are used instead of power terminals and signal terminals. Based on the stacked arrangement of the power supply connection copper layer, the power connection copper layer, the signal connection copper layer and the electrode layer, the interconnection between the power chip and each layer is realized through vias, which replaces the wire bonding method for electrical connection of the power chip. As a result, the power module packaging has high reliability and higher power density.

[0009] In some embodiments, the power connection copper layer includes a first conductive portion and a second conductive portion; the power chip includes an upper bridge arm chip and a lower bridge arm chip, the upper bridge arm chip is disposed on the side of the first conductive portion near the power connection copper layer, and the lower bridge arm chip is disposed on the side of the second conductive portion near the power connection copper layer.

[0010] In some embodiments, the power connection copper layer includes a first sub-layer and a second sub-layer stacked together. The first sub-layer is connected to the source of the upper bridge arm chip and the drain of the lower bridge arm chip through vias, and the second sub-layer is connected to the source of the lower bridge arm chip through vias.

[0011] In some embodiments, the upper bridge arm chips are arranged in M ​​rows and N columns. The first sub-layer includes: a first main body extending along a first direction, a first via region formed on the first main body, and the orthographic projection of the first via region in a second direction covering a portion of the second conductive portion; the first main body being connected to the drain of the lower bridge arm chip through vias in the first via region; and M first branches connected to the first main body and extending away from the second conductive portion in a third direction, each first branch having N second via regions formed on it, the orthographic projection of each second via region in the second direction corresponding to each upper bridge arm chip, the first branch being connected to the source of the upper bridge arm chip through vias in the second via regions, wherein the first direction, the second direction, and the third direction are orthogonal to each other.

[0012] In some embodiments, the orthographic projection of the first branch in the second direction covers the source region of the upper bridge arm chip.

[0013] In some embodiments, the lower bridge arm chips are arranged in M ​​rows and N columns. The first sub-layer further includes: a second main body extending along the first direction, and the orthographic projection of the second main body in the second direction does not cover the lower bridge arm chips; M second branches extending along the third direction and connected to the second main body, the edges of the second branches near the first conductive portion being aligned with the edges of the first main body near the second conductive portion, and the orthographic projection of each second branch in the second direction correspondingly covering the source region of each row of lower bridge arm chips.

[0014] In some embodiments, the lower bridge arm chips are arranged in M ​​rows and N columns, and the second sub-layer includes: a third main body extending along the first direction; M third branches extending along the third third direction, the third branches being connected to the third main body, and N third via regions formed on the third branches, each third via region having its orthographic projection in the second direction corresponding to cover each lower bridge arm chip, and the third branches being connected to the source of the lower bridge arm chip through vias in the third via regions.

[0015] In some embodiments, the orthographic projection of the second main body in the second direction is located on the second conductive portion and does not cover the lower bridge arm chip, while the orthographic projection of the third branch in the second direction covers the source region of the lower bridge arm chip and the source region of the upper bridge arm chip.

[0016] In some embodiments, the power module further includes a first insulating layer disposed between the first sub-layer and the second sub-layer.

[0017] In some embodiments, the signal connection copper layer includes a third sub-layer and a fourth sub-layer stacked together. The third sub-layer is connected to the gate of the upper bridge arm chip and the gate of the lower bridge arm chip through vias, and the fourth sub-layer is connected to the source of the upper bridge arm chip and the source of the lower bridge arm chip through vias.

[0018] In some embodiments, the orthographic projection of the fourth sublayer in the second direction covers a portion of the third sublayer.

[0019] In some embodiments, the third sublayer includes a first gate connection portion and a second gate connection portion arranged symmetrically. The first gate connection portion is connected to the gate of the upper bridge arm chip through a via, and the second gate connection portion is connected to the gate of the lower bridge arm chip through a via.

[0020] In some embodiments, the signal transmission distance from the center point of the first gate connection to the gate of each upper bridge arm chip is equal, and the signal transmission distance from the center point of the second gate connection to the gate of each lower bridge arm chip is equal.

[0021] In some embodiments, the fourth sublayer includes a first source connection portion and a second source connection portion arranged symmetrically. The first source connection portion is connected to the source of the upper bridge arm chip through a via, and the second source connection portion is connected to the source of the lower bridge arm chip through a via.

[0022] In some embodiments, the signal transmission distance from the center point of the first source connection portion to the source of each upper bridge arm chip is equal, and the signal transmission distance from the center point of the second source connection portion to the source of each lower bridge arm chip is equal.

[0023] In some embodiments, the power module further includes a second insulating layer disposed between the third sub-layer and the fourth sub-layer.

[0024] In some embodiments, the electrode layer includes: a positive copper region extending along a first direction, the orthographic projection of the positive copper region in a second direction being located on the first conductive portion and not covering the upper bridge arm chip, the positive copper region being electrically connected to the first conductive portion through a via; and a negative copper region extending along the first direction, the orthographic projection of the negative copper region in a second direction being located on the first conductive portion and not covering the upper bridge arm chip, the negative copper region being electrically connected to the second sublayer through a via.

[0025] In some embodiments, the electrode layer further includes: an output copper region extending along a first direction, the orthographic projection of the output copper region in a second direction being located on the second conductive portion and not covering the lower bridge arm chip, and the output copper region being electrically connected to the second conductive portion through a via.

[0026] In some embodiments, the electrode layer further includes: a gate copper region electrically connected to the third sublayer via a via; and a source copper region electrically connected to the fourth sublayer via a via.

[0027] In some embodiments, the gate copper region and the source copper region are located in the middle region of the electrode layer; the positive copper region is disposed near the first edge of the electrode layer, the negative copper region is disposed near the positive copper region, and the output copper region is disposed near the second edge of the electrode layer, wherein the first edge and the second edge are disposed opposite each other in the third direction.

[0028] In some embodiments, the power module further includes a thermistor disposed on the side of the power connection copper layer close to the power connection copper layer, and the thermistor is electrically connected to the electrode layer through a via.

[0029] In some embodiments, the first sub-layer includes a resistor connection portion electrically connected to the thermistor via a via, the resistor connection portion extending along the third direction and whose orthogonal projection in the second direction does not cover the power chip; the electrode layer includes a resistive copper region located in the central region of the electrode layer, the resistive copper region electrically connected to the resistor connection portion via a via.

[0030] In some embodiments, the thermistor is disposed on the first conductive portion.

[0031] In some embodiments, a first groove for placing the power chip and a second groove for placing the thermistor are formed on the power supply connection copper layer.

[0032] In some embodiments, the depth of the first groove is less than the thickness of the power chip, the width of the first groove is greater than the width of the power chip, and the length of the first groove is greater than the length of the power chip.

[0033] In some embodiments, the power module further includes: a third insulating layer disposed on the side of the signal connection copper layer away from the power connection copper layer; and a solder resist ink layer disposed between the third insulating layer and the electrode layer.

[0034] In some embodiments, the power module further includes: a connection layer, the connection layer including a first connection portion and a second connection portion; a ceramic layer, the ceramic layer including a first thermally conductive portion and a second thermally conductive portion, the first thermally conductive portion being connected to the side of the first conductive portion away from the power connection copper layer via the first connection portion, and the second thermally conductive portion being connected to the side of the second conductive portion away from the power connection copper layer via the second connection portion.

[0035] In some embodiments, the power module further includes: an insulating housing, wherein a first hollow cavity and a second hollow cavity are formed therein, the first hollow cavity being used to accommodate the first heat-conducting part, the first connecting part and the first conductive part, and the second hollow cavity being used to accommodate the second heat-conducting part, the second connecting part and the second conductive part.

[0036] A second aspect of the present invention provides an inverter device comprising at least one power module as described in the above embodiments.

[0037] The inverter device according to embodiments of the present invention can improve reliability and have higher power density by employing a power module.

[0038] A third aspect of the present invention provides an electrical device including the power module described in the above embodiments.

[0039] The power equipment according to embodiments of the present invention, by employing power modules, can improve reliability and have higher power density.

[0040] In some embodiments, the power device further includes: a capacitor, the capacitor including a fourth insulating layer, a positive terminal and a negative terminal, the positive terminal extending along the length direction of the capacitor to form a positive electrode extension, the negative terminal extending along the length direction of the capacitor to form a negative electrode extension, the positive electrode extension and the negative electrode extension being located on the same side of the capacitor and being integrally stacked, the fourth insulating layer being disposed between the positive electrode extension and the negative electrode extension, the positive electrode extension being used to connect to the positive copper region of the power module, and the negative electrode extension being used to connect to the negative copper region of the power module.

[0041] A fourth aspect of the present invention provides a vehicle that includes the power module of the above embodiments, or includes the inverter of the above embodiments, or includes the power equipment of the above embodiments.

[0042] The vehicle according to embodiments of the present invention, by employing a power module, or an inverter, or an electrical device, can improve reliability and have higher power density.

[0043] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0044] The above and / or additional aspects and advantages of the present invention will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which: Figure 1 This is a schematic diagram of the structure of a power module according to an embodiment of the present invention; Figure 2 This is a schematic diagram of a power connection copper layer according to an embodiment of the present invention; Figure 3 This is a schematic diagram of the structure of a power module according to another embodiment of the present invention; Figure 4 This is a schematic diagram of the structure of a power module according to another embodiment of the present invention; Figure 5 This is a schematic diagram of the structure of a power module according to another embodiment of the present invention; Figure 6 This is a schematic diagram of the structure of a power module according to another embodiment of the present invention; Figure 7 This is a structural block diagram of an inverter device according to an embodiment of the present invention; Figure 8 This is a structural block diagram of a power device according to an embodiment of the present invention; Figure 9 This is a schematic diagram of an electrical device according to an embodiment of the present invention; Figure 10 This is a schematic diagram of an electrical device according to another embodiment of the present invention.

[0045] Figure label: Power modules 2000; Inverters 3000; Power equipment 4000; Power connection copper layer 100; power connection copper layer 200; signal connection copper layer 300; electrode layer 400; power chip 500; via area 600; thermistor 700; first conductive part 110; second conductive part 120; first sub-layer 210; second sub-layer 220; upper bridge arm chip 510; lower bridge arm chip 520; first via area 610; second via area 620; third sub-layer 310; fourth sub-layer 400; power connection copper layer 500; signal connection copper layer 500; signal connection copper layer 600; signal connection copper layer 500; electrode layer 400; power chip 500; via area 600; thermistor 700; first conductive part 110; second conductive part 120; first sub-layer 210; second sub-layer 220; upper bridge arm chip 510; lower bridge arm chip 520; first via area 610; second via area 620; third sub-layer 310; fourth sub-layer 500; signal connection copper layer 600; signal connection copper layer 7 ... Layer 320; First gate connection 311; Second gate connection 312; First source connection 321; Second source connection 322; Positive copper region 410; Negative copper region 420; Output copper region 430; Gate copper region 440; Source copper region 450; Resistor copper region 460; Fourth insulating layer 4110; Positive terminal 4120; Negative terminal 4130; Positive copper sheet 411; Negative copper sheet 421. Detailed Implementation

[0046] The embodiments of the present invention are described in detail below. The embodiments described with reference to the accompanying drawings are exemplary. The embodiments of the present invention are described in detail below.

[0047] To address the aforementioned problems, a first aspect of the present invention provides a power module that has high packaging reliability and higher power density.

[0048] The following is for reference. Figure 1 A power module 2000 according to an embodiment of the present invention is described, such as Figure 1 As shown, the power module 2000 includes a power supply connection copper layer 100, a power connection copper layer 200, a signal connection copper layer 300, an electrode layer 400, and a power chip 500, which are stacked in sequence.

[0049] The power supply connection copper layer 100, power connection copper layer 200, signal connection copper layer 300 and electrode layer 400 are stacked sequentially. The electrode layer 400 is electrically connected to the power supply connection copper layer 100, power connection copper layer 200 and signal connection copper layer 300 through vias. The power chip 500 is disposed on the side of the power supply connection copper layer 100 close to the power connection copper layer 200. The power chip 500 is electrically connected to the power connection copper layer 200 and signal connection copper layer 300 through vias.

[0050] Specifically, in the prior art, power modules connect power terminals and signal terminals via wire bonding. However, the reliability of wire bonding is low, and breakage may occur. In this application, the power supply connection copper layer 100 provides power. The power connection copper layer 200 and signal connection copper layer 300 replace the power terminals and signal terminals in the prior art, respectively. The power supply connection copper layer 100, power connection copper layer 200, signal connection copper layer 300, and electrode layer 400 are stacked, thereby increasing the power of the power module 2000. The circuit has a small stray inductance. Power chips 500 are embedded in vias to form copper pillars, which, through the connection copper pillars 600, electrically connect the power connection copper layer 200 and the signal connection copper layer 300. Copper plating increases the thickness of the power connection copper layer 200. Compared to wire bonding, the connection between the copper layer and the copper pillars is more stable. Furthermore, since there are no internal wire bonding connections in the power module 2000, its size is smaller, increasing its power density. The power module 2000 can be manufactured using PCB processes such as silver sintering, soldering, lamination, laser drilling, mechanical drilling, etching, copper plating, and ink printing. Vias can be created using laser drilling. By adjusting the laser type, the holes in the insulating layer under the power connection copper layer 200 can be removed until the vias penetrate to the surface of the chip, resistor, and power connection copper layer. Layered drilling protects the chip and resistor surfaces from laser damage.

[0051] According to the power module 2000 of the present invention, a power connection copper layer and a signal connection copper layer are used instead of power terminals and signal terminals. Based on the stacked arrangement of the power supply connection copper layer, the power connection copper layer, the signal connection copper layer and the electrode layer, the interconnection between the power chip and each layer is realized through vias, which replaces the wire bonding method for electrical connection of the power chip. As a result, the power module packaging has high reliability and higher power density.

[0052] In some embodiments, such as Figure 2 As shown, the power supply connection copper layer 100 includes a first conductive portion 110 and a second conductive portion 120; the power chip 500 includes an upper bridge arm chip 510 and a lower bridge arm chip 520. The upper bridge arm chip 510 is disposed on the side of the first conductive portion 110 near the power connection copper layer 200, and the lower bridge arm chip 520 is disposed on the side of the second conductive portion 120 near the power connection copper layer 200.

[0053] Specifically, the first conductive part 110 and the second conductive part 120 are independent of each other. The power chip 500 is placed in the groove of the power supply connection copper layer, thereby reducing the overall thickness of the power module 2000. The first conductive part 110 connects to the upper bridge arm chip 510, and the second conductive part 120 connects to the lower bridge arm chip 520. Since the power chip is directly connected to the power supply connection copper layer below, the thermal resistance of the power module 2000 is smaller and the thermal capacity is larger at the heat transfer path end of the power chip 500. The first conductive part 110 and the second conductive part 120 can be copper blocks.

[0054] In some embodiments, such as Figure 3 and Figure 4 As shown, the power connection copper layer 200 includes a first sublayer 210 and a second sublayer 220 stacked together.

[0055] The first sublayer 210 is connected to the source of the upper bridge arm chip 510 and the drain of the lower bridge arm chip 520 through vias, and the second sublayer 220 is connected to the source of the lower bridge arm chip 520 through vias.

[0056] Specifically, such as Figure 3 As shown, the power circuit is arranged in the first sub-layer 210 and the second sub-layer 220, which greatly reduces the area of ​​the power module 2000, while the thickness of the power module 2000 is not significantly increased, thus achieving a reduction in the size of the power module 2000 and improving the power density. The copper material of the power connection copper layer 200 can be selected as a 70µm thick copper foil, which is beneficial for handling high currents and reducing stray inductance.

[0057] In some embodiments, such as Figure 3 As shown, the upper bridge arm chip 510 is arranged in M ​​rows and N columns. The first sub-layer 210 includes a first main body extending along a first direction. A first via region 610 is formed on the first main body, and the orthographic projection of the first via region 610 in the second direction covers a portion of the second conductive part 120. The first main body is connected to the drain of the lower bridge arm chip 520 through the via in the first via region 610. M first branches are connected to the first main body and extend away from the second conductive part 120 in a third direction. N second via regions 620 are formed on each first branch. The orthographic projection of each second via region 620 in the second direction covers each upper bridge arm chip 510. The first branch is connected to the source of the upper bridge arm chip 510 through the via in the second via region 620. The first direction, the second direction and the third direction are orthogonal to each other.

[0058] Specifically, the upper bridge arm chip 510 is arranged in a matrix of M rows and N columns. The first branch is connected to the first main body and extends upwards and away from the second conductive part 120 on the third side, that is, perpendicular to the arrangement direction of the lower bridge arm chip 520. Therefore, the first sub-layer 210 has the characteristic of wide path, which can further reduce stray inductance and excessive current.

[0059] In some embodiments, such as Figure 3 As shown, the orthographic projection of the first branch in the second direction covers the source region of the upper bridge arm chip 510.

[0060] Specifically, the orthographic projection of the first branch in the second direction covers the source region of the upper bridge arm chip 510, achieving full coverage of the source region of the upper bridge arm chip 510. This maximizes the number of via connections on the upper bridge arm chip 510 and increases the current carrying capacity of the power module 2000.

[0061] In some embodiments, such as Figure 4 As shown, the lower bridge arm chip 520 is distributed in M ​​rows and N columns. The first sub-layer 110 also includes a second main body extending along a first direction, and the orthographic projection of the second main body in the second direction does not cover the lower bridge arm chip 520; M second branches extending along a third direction and connected to the second main body. The edge of the second branch near the first conductive part 110 is aligned with the edge of the first main body near the second conductive part 120. The orthographic projection of each second branch in the second direction covers the source region of each row of lower bridge arm chips 520.

[0062] Specifically, the orthographic projection of each second branch in the second direction covers the source region of each row of lower bridge arm chip 520, thereby achieving full coverage of the source region of the bridge arm chip 520.

[0063] In some embodiments, the lower bridge arm chip 520 is distributed in M ​​rows and N columns. The second sub-layer 220 includes: a third main body extending along a first direction; M third branches extending along a third third direction, the third branches being connected to the third main body, and N third via regions 630 formed on the third branches. The orthographic projection of each third via region 630 in the second direction corresponds to covering each lower bridge arm chip 520. The third branches are connected to the source of the lower bridge arm chip 520 through vias in the third via regions 630.

[0064] Specifically, the lower bridge arm chips 520 are arranged in an M-row N-column matrix. The third main body and the third branch are perpendicular to the arrangement direction of the lower bridge arm chips 520. Therefore, the second sub-layer 220 has a wide path, which can further reduce stray inductance and excessive current. At the same time, the orthographic projection of each second branch in the second direction covers the source region of each row of lower bridge arm chips 520, achieving full coverage of the source region of the lower bridge arm chips 520. This maximizes the number of via connections on the lower bridge arm chips 520 and increases the overcurrent capacity of the power module 2000. The lines of the second sub-layer 220 and the first sub-layer 210 have a large overlap area in the third direction, resulting in a good stacking effect and significantly reducing the stray inductance of the power circuit.

[0065] In some embodiments, the orthographic projection of the third main body in the second direction is located on the second conductive portion and does not cover the lower bridge arm chip, while the orthographic projection of the third branch in the second direction covers the source region of the lower bridge arm chip and the source region of the upper bridge arm chip.

[0066] Specifically, the third main body and the third branch avoid the driving pole region of the lower bridge arm chip 520.

[0067] In some embodiments, the power module further includes a first insulating layer disposed between the first sublayer and the second sublayer.

[0068] Specifically, the first sub-layer 210 and the second sub-layer 220 are not in direct contact, but are isolated by a first insulating layer to prevent short circuits caused by the connection between the first sub-layer 210 and the second sub-layer 220. The thickness of the first insulating layer can be set according to the actual situation, such as 30um, 35um or 40um.

[0069] In some embodiments, such as Figure 5 As shown, the signal connection copper layer 300 includes a third sublayer 310 and a fourth sublayer 320 stacked together.

[0070] The third sub-layer 310 is connected to the gate of the upper bridge arm chip 510 and the gate of the lower bridge arm chip 520 through vias, and the fourth sub-layer 320 is connected to the source of the upper bridge arm chip 510 and the source of the lower bridge arm chip 520 through vias.

[0071] Specifically, the third sub-layer 310 is placed above the second sub-layer 220, and the signal connection copper layer 300 is distributed in the third sub-layer 310 and the fourth sub-layer 320. This layered arrangement greatly reduces the area of ​​the power module 2000, while the thickness of the power module 2000 is not significantly increased, thus achieving a reduction in the size of the power module 2000 and improving power density. Since a large current is not required, the third sub-layer 310 and the fourth sub-layer 320 can have a smaller thickness, such as 17.5µm, and the copper plating thickness can also be controlled within a small range, such as 30µm, to reduce the module thickness and production time, thereby reducing the thickness of the power module 200 and the production speed.

[0072] In some embodiments, such as Figure 5 As shown, the orthographic projection of the fourth sublayer 320 in the second direction covers a portion of the third sublayer 310.

[0073] Specifically, since the loop paths of the third sub-layer 310 and the fourth sub-layer 320 are basically overlapping in each layer, they have a good stacking effect, which can achieve extremely low stray inductance in the signal loop of the power module 2000. Furthermore, since most of the lines of the third sub-layer 310 and the fourth sub-layer 320 overlap, they have high consistency in the drive signal, which is beneficial to the stable switching of the power chip 500.

[0074] In some embodiments, such as Figure 5 As shown, the third sublayer 310 includes a first gate connection portion 311 and a second gate connection portion 312 arranged symmetrically.

[0075] The first gate connection portion 311 is connected to the gate of the upper bridge arm chip 510 through a via, and the second gate connection portion 312 is connected to the gate of the lower bridge arm chip 520 through a via.

[0076] Specifically, the first gate connection portion 311 is used to connect the signal to the gate of the upper bridge arm chip 510, and the second gate connection portion 312 is used to connect the signal to the gate of the lower bridge arm chip 520. The first gate connection portion 311 and the second gate connection portion 312 have a symmetrical structure, which is more conducive to the production of the power module 2000.

[0077] In some embodiments, the signal transmission distance from the center point of the first gate connection to the gate of each upper bridge arm chip is equal, and the signal transmission distance from the center point of the second gate connection to the gate of each lower bridge arm chip is equal.

[0078] Specifically, since the signal transmission distance from the center point of the first gate connection portion 311 to the gate of each upper bridge arm chip 510 is equal, and the signal transmission distance from the center point of the second gate connection portion 312 to the gate of each lower bridge arm chip 520 is equal, and the first gate connection portion 311 and the second gate connection portion 312 have a symmetrical structure, the signal transmission distance from the center point of the first gate connection portion 311 to the gate of each upper bridge arm chip 510 is equal to the signal transmission distance from the center point of the second gate connection portion 312 to the gate of each lower bridge arm chip 520. As a result, the signal propagation time is also equal, reducing the delay caused by different transmission paths. Therefore, the drive delay between the upper bridge arm chip 510 and the lower bridge arm chip 520 is extremely short.

[0079] In some embodiments, such as Figure 5 As shown, the fourth sublayer 320 includes a first source connection portion 321 and a second source connection portion 322 arranged symmetrically.

[0080] The first source connection portion 321 is connected to the source of the upper bridge arm chip 510 through a via, and the second source connection portion 321 is connected to the source of the lower bridge arm chip 520 through a via.

[0081] Specifically, the first source connection portion 321 is used to connect the signal to the source of the upper bridge arm chip 510, and the second source connection portion 321 is used to connect the signal to the source of the lower bridge arm chip 520. The first source connection portion 321 and the second source connection portion 322 have a symmetrical structure, which is more conducive to the production of the power module 2000.

[0082] In some embodiments, such as Figure 5 As shown, the signal transmission distance from the center point of the first source connection portion 321 to the source of each upper bridge arm chip 510 is equal, and the signal transmission distance from the center point of the second source connection portion 322 to the source of each lower bridge arm chip 520 is equal.

[0083] Specifically, since the signal transmission distance from the center point of the first source connection portion 321 to the source of each upper bridge arm chip 510 is equal, and the signal transmission distance from the center point of the second source connection portion 322 to the source of each lower bridge arm chip 520 is equal, and the first source connection portion 321 and the second source connection portion 322 have a symmetrical structure, the signal transmission distance from the center point of the first source connection portion 321 to the source of each upper bridge arm chip 510 is equal to the signal transmission distance from the center point of the second source connection portion 322 to the source of each lower bridge arm chip 520. As a result, the signal propagation time is also equal, reducing the delay caused by different transmission paths. Therefore, the drive delay between the upper bridge arm chip 510 and the lower bridge arm chip 520 is extremely short.

[0084] In some embodiments, the power module further includes a second insulating layer.

[0085] The second insulating layer is located between the third and fourth sub-layers.

[0086] Specifically, the third sublayer 310 and the fourth sublayer 320 are not in direct contact, but are isolated by a second insulating layer to prevent the third sublayer 310 and the fourth sublayer 320 from connecting and causing a short circuit.

[0087] In some embodiments, such as Figure 6 As shown, the electrode layer 400 includes a positive copper region 410 and a negative copper region 420.

[0088] The positive copper region 410 extends along the first direction, and its orthogonal projection in the second direction is located on the first conductive part 110 and does not cover the upper bridge arm chip 510. The positive copper region 410 is electrically connected to the first conductive part 110 through a via. The negative copper region 420 extends along the first direction, and its orthogonal projection in the second direction is located on the first conductive part 110 and does not cover the upper bridge arm chip 510. The negative copper region 420 is electrically connected to the second sublayer 220 through a via.

[0089] Specifically, the positive copper region 410 is used to connect to the positive side of the external power supply of the power module 2000, and the negative copper region 420 is used to connect to the negative side of the external power supply of the power module 2000. The positive copper region 410 and the negative copper region 420 have the characteristics of wide terminals, with a larger conductive area, so that they can withstand a larger current without being damaged, and have low stray inductance, which facilitates large-area stacked connection with the power module external 2000.

[0090] In some embodiments, such as Figure 6 As shown, the electrode layer 400 also includes an output copper region 430.

[0091] The output copper region 430 extends along the first direction, and the orthographic projection of the output copper region 430 in the second direction is located on the second conductive part 120 and does not cover the lower bridge arm chip 520. The output copper region 430 is electrically connected to the second conductive part 120 through a via.

[0092] Specifically, the output copper area 430 is used to connect the external load of the power module 2000. The output copper area 430 also has a wide terminal design, with a larger conductive area, which can withstand a larger current without damage, and at the same time facilitates soldering.

[0093] In some embodiments, such as Figure 6 As shown, the electrode layer 400 also includes a gate copper region 440 and a source copper region 450.

[0094] The gate copper region 440 is electrically connected to the third sublayer 310 through a via; the source copper region 450 is electrically connected to the fourth sublayer 320 through a via.

[0095] Specifically, the gate copper region 440 is electrically connected to the third sub-layer 310 through a via, thereby enabling the gate chip signals of the upper bridge arm 510 and the gate chip signals of the lower bridge arm to be respectively brought out to the surface of the power module 2000. The source copper region 450 is electrically connected to the fourth sub-layer 320 through a via, thereby enabling the source chip signals of the upper bridge arm 510 and the source chip signals of the lower bridge arm to be respectively brought out to the surface of the power module 2000.

[0096] In some embodiments, such as Figure 6 As shown, the gate copper region 440 and the source copper region 450 are located in the middle region of the electrode layer 400; the positive copper region 410 is disposed near the first edge of the electrode layer 400, the negative copper region 420 is disposed near the positive copper region 410, and the output copper region 430 is disposed near the second edge of the electrode layer 400. The first edge and the second edge are disposed opposite each other in the third direction.

[0097] Specifically, since the gate copper region 440 and the source copper region 450 are located in the central region of the electrode layer 400, and thus far from the positive copper region 410 and the negative copper region 420, interference between the connection terminals of the positive copper region 410, the negative copper region 420, and the output copper region 430 can be avoided when the driver board is assembled onto the surface of the power module 2000. Using copper regions instead of terminals increases the overcurrent capability and enhances heat dissipation, thus preventing insufficient heat dissipation from causing localized overheating and malfunctioning of the power module 2000.

[0098] In some embodiments, such as Figure 6 As shown, the power module 2000 also includes a thermistor 700.

[0099] The thermistor 700 is disposed on the side of the power connection copper layer 100 close to the power connection copper layer 200, and the thermistor 700 is electrically connected to the electrode layer 400 through a via.

[0100] Specifically, the thermistor 700 is electrically connected to the electrode layer 400 through a via, thereby enabling temperature monitoring inside the power module 2000. Since the resistance of the thermistor changes with temperature, the resistance signal is led out to the surface of the power module 2000, and the temperature change inside the module can be obtained through the resistance signal.

[0101] In some embodiments, such as Figure 6 As shown, the first sub-layer 210 includes a resistor connection portion, and the electrode layer 400 includes a resistor copper region 460.

[0102] The resistor connection portion is electrically connected to the thermistor 700 through a via. The resistor connection portion extends along the third direction and its orthogonal projection in the second direction does not cover the power chip 500. The resistor copper region 460 is located in the middle region of the electrode layer 400 and is electrically connected to the resistor connection portion through a via.

[0103] Specifically, the thermistor 400 is connected to the first sub-layer 210 through the resistor connection part, so that the resistance signal can be transmitted to the first sub-layer and then the resistance signal can be led to the surface of the resistor copper area 460, i.e., the power module 2000.

[0104] In some embodiments, a thermistor is disposed on the first conductive portion.

[0105] Specifically, during the fabrication of the power module 2000, an insulating film can be used to attach the thermistor 700 to the first conductive part 110, thereby enabling better monitoring of the temperature of the first conductive part 110 and timely response to temperature changes at the first conductive part 110.

[0106] In some embodiments, a first groove for placing a power chip and a second groove for placing a thermistor are formed on the power supply connection copper layer.

[0107] Specifically, the power chip 500 is connected to the first groove by silver sintering. Silver sintering can increase the heat resistance and heat dissipation of the power module 2000. Placing the power chip 500 in the groove on the power supply connection copper layer 100 can enhance the heat transfer of the power chip 500 and make the heat transfer faster. At the same time, placing the thermistor 700 in the groove can accurately fix the position of the thermistor 700 and more accurately monitor the temperature of the first conductive part 110.

[0108] In some embodiments, the depth of the first groove is less than the thickness of the power chip, the width of the first groove is greater than the width of the power chip, and the length of the first groove is greater than the length of the power chip.

[0109] Specifically, the depth of the first groove is less than the thickness of the power chip 500, which allows the power chip 500 to be subjected to uniform force during sintering, thus facilitating the completion of the sintering of the power chip 500. At the same time, the width of the first groove should be limited to within 0.1 mm, which is slightly larger than the size of the power chip 500, in order to control the positional accuracy of the power chip 500 and the gap between the power chip 500 and the first groove.

[0110] In some embodiments, such as Figure 1 As shown, the power module 2000 also includes a third insulating layer 900 and a solder resist ink layer 800.

[0111] The third insulating layer 900 is disposed on the side of the signal connection copper layer 300 away from the power connection copper layer 200; the solder resist ink layer 800 is disposed between the third insulating layer 900 and the electrode layer 400.

[0112] Specifically, the signal connection copper layer 300 is isolated from other copper layers by the third insulating layer 900 to prevent interference from other copper layers from affecting signal integrity. Figure 7 As shown, the solder resist ink layer 800 provides insulation protection, and only the surface copper areas such as the positive copper area 410, negative copper area 420, output side copper area 430, and signal connection copper layer 300, as well as external connections, are exposed on the surface of the power module 2000. It should be noted that the solder resist ink should be printed after the surface copper layer circuitry of the power module 2000 has been generated.

[0113] In some embodiments, such as Figure 1 As shown, the power module 2000 also includes a connection layer 1000 and a ceramic layer 1100.

[0114] The connecting layer 1000 includes a first connecting portion 1001 and a second connecting portion 1002; the ceramic layer 1100 includes a first thermally conductive portion 1101 and a second thermally conductive portion 1102. The first thermally conductive portion 1101 is connected to the side of the first conductive portion 110 away from the power connection copper layer 200 through the first connecting portion 1001, and the second thermally conductive portion 1102 is connected to the side of the second conductive portion 120 away from the power connection copper layer 200 through the second connecting portion 1002.

[0115] Specifically, the ceramic layer 1100 can be made of silicon nitride or aluminum nitride, which have high thermal conductivity and strength. The ceramic layer 1100 is coated with copper and silver on both sides. The power supply connection copper layer 100 is connected to the ceramic layer 1100 by silver sintering. At the same time, the power chip 500 is connected to the power supply connection copper layer 100 below. The heat transfer path is short, only needing to pass through the power supply connection copper layer 100, the connection layer 1000 and the ceramic layer 1100. As a result, the power module 2000 has low thermal resistance and high heat capacity.

[0116] In some embodiments, such as Figure 1 As shown, the power module 2000 also includes an insulating housing 1200. The insulating shell 1200 has a first hollow cavity and a second hollow cavity. The first hollow cavity is used to accommodate the first heat-conducting part, the first connecting part and the first conductive part, and the second hollow cavity is used to accommodate the second heat-conducting part, the second connecting part and the second conductive part.

[0117] Specifically, the ceramic layer 1100 and the insulating shell 1200 cover the sides and bottom of the power supply connection copper layer 100, providing insulation to these surfaces. However, there are still small gaps between the solder resist ink layer 800 and the insulating shell 1200. External moisture can enter the interior of the power module 2000 through these gaps, thus corroding the internal chips and copper layers. Therefore, an insulating layer is crimped between the solder resist ink layer 800 and the insulating shell 1200 to fill the gaps, preventing moisture corrosion of the power module 2000 and improving its stability. The thickness of the insulating layer after crimping must be controlled to be at least 30µm. It should be noted that before the crimping process, the power supply connection copper layer 200, the ceramic layer 1100, and other electronic components must be placed inside the insulating shell 1200 to facilitate the crimping process.

[0118] For example, the power module of this application is manufactured using PCB technology, including silver sintering, soldering, pressing, laser drilling, mechanical drilling, etching, copper plating, and ink printing.

[0119] First, silicon nitride or aluminum nitride with high thermal conductivity and strength is selected as the ceramic layer 1100. The ceramic layer 1100 is copper-plated and silver-plated on both sides. The power connection copper layer 100 is sintered with silver and connected to the ceramic layer 1100. The chip is sintered with silver and connected to the groove of the power connection copper layer 100. Then, the power connection copper layer 100, the ceramic layer 1100, and other components are placed in the insulating housing 1200 to prepare for the next step of crimping. Next, high-temperature resistant, high-insulation BT material, epoxy resin base material, or other suitable materials are selected as the crimping insulation layer. The power connection copper layer is first crimped to create the insulation layer. 200. First via area 610, second via area 620, and third via area 630 are then fabricated using laser drilling. The vias are then filled using copper plating, connecting the power connection copper layer 200 to the power chip 500 and the power supply connection copper layer 100. The copper plating increases the thickness of the power copper layer to 140µm. Since the copper plating needs to connect to the surfaces of the power chip 500 and the thermistor 700, the plating on the surfaces of the power chip 500 and the thermistor 700 needs to be copper layers with a thickness greater than 9µm. After copper plating, the power connection copper layer circuitry is etched. The circuit diagram is shown below. Figure 3 As shown.

[0120] After completing the fabrication of the two power connection copper layers, the signal connection copper layer 300 is crimped. After crimping, the signal copper layer circuit is generated through layered drilling, copper plating, and etching processes to connect the signal electrode of the power chip. Then, the electrode layer 400 is fabricated. The thickness of the electrode layer 400 and the copper plating thickness can be referenced to the signal connection copper layer 300. Since the electrode layer 400 is not directly connected to the component surface, mechanical drilling can be selected. Mechanical drilling can avoid layered drilling and the process steps are simple. After the electrode layer 400 circuit is generated, solder resist ink is printed to expose the pads for external connection.

[0121] A second aspect of the present invention provides an inverter device 3000, such as... Figure 7 As shown, the inverter 3000 includes at least one power module 2000 as described in the above embodiment.

[0122] The inverter device according to an embodiment of the present invention, by employing a power module 2000, can improve reliability and have higher power density.

[0123] The third aspect of the present invention provides a power equipment 4000, such as Figure 8 As shown, the power equipment 4000 includes the power module 2000 of the above embodiment.

[0124] The power equipment 4000 according to an embodiment of the present invention can improve reliability and have higher power density by employing a power module 2000.

[0125] In some embodiments, such as Figure 8 As shown, the power equipment 4000 also includes a capacitor 4100.

[0126] The capacitor 4100 includes a fourth insulating layer 4110, a positive terminal 4120, and a negative terminal 4130. The positive terminal 4120 extends along the length of the capacitor 4100 to form a positive electrode extension, and the negative terminal 4130 extends along the length of the capacitor 4100 to form a negative electrode extension. The positive electrode extension and the negative electrode extension are both located on the same side of the capacitor 4100 and are integrally stacked. The fourth insulating layer 4110 is disposed between the positive electrode extension and the negative electrode extension. The positive electrode extension is used to connect to the positive copper region 410 of the power module 2000, and the negative electrode extension is used to connect to the negative copper region 420 of the power module 2000.

[0127] Specifically, such as Figure 9The negative terminal 4130 of capacitor 4100 adopts an integrated design, meaning that the negative terminal 4130 is connected to the negative copper area 420 of power module 2000 without any branching. This results in a wide negative terminal 4130 that fully covers the negative copper area of ​​power module 2000, thus reducing stray inductance. The positive terminal 4120 adopts the same design as the negative terminal 4130, which will not be described in detail here. The positive and negative copper areas of power module 2000 are square, arranged in parallel and perpendicular to the terminal direction of capacitor 4100. Based on this design, the terminal area of ​​capacitor 4100 connecting to power module 2000 is increased, which can reduce stray inductance. For example, as shown... Figure 10 As shown, copper sheets of a certain thickness are welded to the positive and negative copper areas on the surface of the power module 2000. The positive copper sheet 411 is welded to the positive copper area 410, and the negative copper sheet 421 is welded to the negative copper area 420. The copper sheets are square, and their size is the same as that of the positive and negative copper areas. By welding copper sheets to the surface of the power module 2000, laser welding of the terminals of the power module 2000 and the capacitor 4100 can be achieved. After introducing the copper sheets, a buffer can be provided to protect the surface of the power module 2000 from damage caused by the high temperature of laser welding. The fourth insulating layer 4110 insulates and isolates the positive and negative terminals of the capacitor 4100 from the positive and negative terminals of the power module 2000. Thus, the power equipment 4000 of this application can reduce stray inductance to an extremely low level and reduce the loss of the power equipment 4000. It should be noted that since the negative terminal 4130 is located above the positive terminal 4120, it will affect the soldering of the lower positive terminal 4120. Therefore, a bridge 4200 must be introduced to achieve the connection while ensuring the feasibility of the soldering process. The two ends of the bridge 4200 are connected to the capacitor negative terminal 4130 and the power module negative terminal 420, respectively.

[0128] A fourth aspect of the present invention provides a vehicle that includes the power module 2000 of the above embodiments, or the inverter 3000 of the above embodiments, or the power equipment 4000 of the above embodiments.

[0129] The vehicle according to embodiments of the present invention, by employing a power module 2000, an inverter 3000, or an electrical device 4000, can improve reliability and have higher power density.

[0130] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., refer to specific features, structures, materials, or characteristics described in connection with that embodiment or example, which are included in at least one embodiment or example of the present invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example.

[0131] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims

1. A power module, characterized in that, include: A power supply connection copper layer, a power connection copper layer, a signal connection copper layer, and an electrode layer are stacked sequentially. The electrode layer is electrically connected to the power supply connection copper layer, the power connection copper layer, and the signal connection copper layer through vias. A power chip is disposed on the side of the power connection copper layer close to the power connection copper layer, and the power chip is electrically connected to the power connection copper layer and the signal connection copper layer through vias.

2. The power module according to claim 1, characterized in that, The power supply connection copper layer includes a first conductive portion and a second conductive portion; The power chip includes an upper bridge arm chip and a lower bridge arm chip. The upper bridge arm chip is disposed on the side of the first conductive portion near the power connection copper layer, and the lower bridge arm chip is disposed on the side of the second conductive portion near the power connection copper layer.

3. The power module according to claim 2, characterized in that, The power connection copper layer includes a first sub-layer and a second sub-layer stacked together. The first sub-layer is connected to the source of the upper bridge arm chip and the drain of the lower bridge arm chip through vias, and the second sub-layer is connected to the source of the lower bridge arm chip through vias.

4. The power module according to claim 3, characterized in that, The upper bridge arm chip is arranged in M ​​rows and N columns, and the first sub-layer includes: A first main body portion extends along a first direction, a first via region is formed on the first main body portion and the orthographic projection of the first via region in a second direction covers a portion of the second conductive portion, and the first main body portion is connected to the drain of the lower bridge arm chip through the via in the first via region. M first branches are connected to the first main body and extend in a third direction away from the second conductive part. N second via regions are formed on each first branch. The orthographic projection of each second via region in the second direction covers each upper bridge arm chip. The first branch is connected to the source of the upper bridge arm chip through the via in the second via region. The first direction, the second direction and the third direction are orthogonal to each other.

5. The power module according to claim 4, characterized in that, The orthographic projection of the first branch in the second direction covers the source region of the upper bridge arm chip.

6. The power module according to claim 5, characterized in that, The lower bridge arm chip is arranged in M ​​rows and N columns, and the first sub-layer further includes: The second main body extends along the first direction, and the orthographic projection of the second main body in the second direction does not cover the lower bridge arm chip. M second branches, each extending along the third direction and connected to the second main body, with the edge of the second branch near the first conductive part aligned with the edge of the first main body near the second conductive part, and the orthographic projection of each second branch in the second direction correspondingly covering the source region of each row of lower bridge arm chips.

7. The power module according to any one of claims 3-6, characterized in that, The lower bridge arm chip is arranged in M ​​rows and N columns, and the second sub-layer includes: A third main body portion, which extends along the first direction; M third branches extending along the third direction are connected to the third main body. N third via regions are formed on the third branches. The orthographic projection of each third via region in the second direction covers each lower bridge arm chip. The third branches are connected to the source of the lower bridge arm chip through the vias in the third via regions.

8. The power module according to claim 7, characterized in that, The orthographic projection of the third main body in the second direction is located on the second conductive part and does not cover the lower bridge arm chip, while the orthographic projection of the third branch in the second direction covers the source region of the lower bridge arm chip and the source region of the upper bridge arm chip.

9. The power module according to claim 3, characterized in that, Also includes: A first insulating layer is disposed between the first sublayer and the second sublayer.

10. The power module according to any one of claims 2-6, characterized in that, The signal connection copper layer includes a third sub-layer and a fourth sub-layer stacked together. The third sub-layer is connected to the gate of the upper bridge arm chip and the gate of the lower bridge arm chip through vias. The fourth sub-layer is connected to the source of the upper bridge arm chip and the source of the lower bridge arm chip through vias.

11. The power module according to claim 10, characterized in that, The orthographic projection of the fourth sublayer in the second direction covers a portion of the third sublayer.

12. The power module according to claim 11, characterized in that, The third sublayer includes a first gate connection portion and a second gate connection portion arranged symmetrically. The first gate connection portion is connected to the gate of the upper bridge arm chip through a via, and the second gate connection portion is connected to the gate of the lower bridge arm chip through a via.

13. The power module according to claim 12, characterized in that, The signal transmission distance from the center point of the first gate connection to the gate of each upper bridge arm chip is equal, and the signal transmission distance from the center point of the second gate connection to the gate of each lower bridge arm chip is equal.

14. The power module according to claim 11, characterized in that, The fourth sublayer includes a first source connection portion and a second source connection portion arranged symmetrically. The first source connection portion is connected to the source of the upper bridge arm chip through a via, and the second source connection portion is connected to the source of the lower bridge arm chip through a via.

15. The power module according to claim 14, characterized in that, The signal transmission distance from the center point of the first source connection to the source of each upper bridge arm chip is equal, and the signal transmission distance from the center point of the second source connection to the source of each lower bridge arm chip is equal.

16. The power module according to claim 10, characterized in that, Also includes: A second insulating layer is disposed between the third sub-layer and the fourth sub-layer.

17. The power module according to claim 10, characterized in that, The electrode layer includes: A positive copper region extends along a first direction, and the orthographic projection of the positive copper region in a second direction is located on the first conductive portion and does not cover the upper bridge arm chip. The positive copper region is electrically connected to the first conductive portion through a via. The negative electrode copper region extends along a first direction, and its orthogonal projection in a second direction is located on the first conductive portion and does not cover the upper bridge arm chip. The negative electrode copper region is electrically connected to the second sublayer through a via.

18. The power module according to claim 17, characterized in that, The electrode layer further includes: The output copper area extends along a first direction, and its orthographic projection in a second direction is located on the second conductive portion and does not cover the lower bridge arm chip. The output copper area is electrically connected to the second conductive portion through a via.

19. The power module according to claim 18, characterized in that, The electrode layer further includes: A gate copper region, which is electrically connected to the third sublayer via a via; The source copper region is electrically connected to the fourth sublayer via a via.

20. The power module according to claim 19, characterized in that, The gate copper region and the source copper region are located in the middle region of the electrode layer; The positive copper region is located near the first edge of the electrode layer, the negative copper region is located near the positive copper region, and the output copper region is located near the second edge of the electrode layer. The first edge and the second edge are arranged opposite each other in the third direction.

21. The power module according to claim 3, characterized in that, The power module also includes: A thermistor is disposed on the side of the power supply connection copper layer close to the power connection copper layer, and the thermistor is electrically connected to the electrode layer through a via.

22. The power module according to claim 21, characterized in that, The first sub-layer includes a resistor connection portion, which is electrically connected to the thermistor through a via. The resistor connection portion extends along the third direction and its orthogonal projection in the second direction does not cover the power chip. The electrode layer includes a resistive copper region located in the central region of the electrode layer, and the resistive copper region is electrically connected to the resistive connection portion through a via.

23. The power module according to claim 21 or 22, characterized in that, The thermistor is disposed on the first conductive part.

24. The power module according to claim 21, characterized in that, The power supply connection copper layer has a first groove for placing the power chip and a second groove for placing the thermistor.

25. The power module according to claim 24, characterized in that, The depth of the first groove is less than the thickness of the power chip, the width of the first groove is greater than the width of the power chip, and the length of the first groove is greater than the length of the power chip.

26. The power module according to claim 1, characterized in that, The power module also includes: A third insulating layer is disposed on the side of the signal connection copper layer away from the power connection copper layer; A solder resist ink layer is disposed between the third insulating layer and the electrode layer.

27. The power module according to claim 2, characterized in that, The power module also includes: A connection layer, the connection layer including a first connection portion and a second connection portion; The ceramic layer includes a first thermally conductive portion and a second thermally conductive portion. The first thermally conductive portion is connected to the side of the first conductive portion away from the power connection copper layer via a first connecting portion. The second thermally conductive portion is connected to the side of the second conductive portion away from the power connection copper layer via a second connecting portion.

28. The power module according to claim 27, characterized in that, The power module also includes: An insulating shell having a first hollow cavity and a second hollow cavity formed therein, the first hollow cavity being used to accommodate the first heat-conducting part, the first connecting part and the first conductive part, and the second hollow cavity being used to accommodate the second heat-conducting part, the second connecting part and the second conductive part.

29. An inverter device, characterized in that, It includes at least one power module as described in any one of claims 1-28.

30. An electrical device, characterized in that, Includes the power module as described in any one of claims 1-28.

31. The power equipment according to claim 30, characterized in that, Also includes: A capacitor includes a fourth insulating layer, a positive terminal, and a negative terminal. The positive terminal extends along the length of the capacitor to form a positive electrode extension, and the negative terminal extends along the length of the capacitor to form a negative electrode extension. The positive electrode extension and the negative electrode extension are located on the same side of the capacitor and are integrally stacked. The fourth insulating layer is disposed between the positive electrode extension and the negative electrode extension. The positive electrode extension is used to connect to the positive copper region of the power module, and the negative electrode extension is used to connect to the negative copper region of the power module.

32. A vehicle, characterized in that, It includes the power module according to any one of claims 1-28, or the inverter according to claim 29, or the power equipment according to any one of claims 30-31.

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