Electronic device and method of manufacturing an electronic device

Abstract

Electronic devices and methods of manufacturing electronic devices. In one example, an electronic device can include a substrate, a module including electronic components and coupled to the substrate, and a first passive device coupled to the substrate and disposed adjacent to a first side of the module. An underfill can cover the first passive device, and the underfill can be disposed between the first passive device and the substrate. A distance of the first passive device from the module can be within 100 µm. A distance of a fillet of the underfill from the first passive device can be within 50 µm. A second passive device can be coupled to the substrate and disposed adjacent to a second side of the module opposite the first side of the module. The second passive device can be covered by the underfill. The first side of the module includes a molded sidewall oriented toward the first passive device.

Description

Technical Field

[0001] This disclosure generally relates to electronic devices, and more specifically, to electronic devices and methods of manufacturing electronic devices. Background Technology

[0002] Previous electronic packaging and methods for forming electronic packages were unsuitable, resulting in, for example, excessive cost, reduced reliability, relatively low performance, or excessively large package size. By comparing such methods with this disclosure and referring to the drawings, those skilled in the art will understand other limitations and disadvantages of conventional and traditional methods. Summary of the Invention

[0003] One embodiment of the present invention is an electronic device comprising: a substrate; a module including electronic components and coupled to the substrate; a first passive device coupled to the substrate and disposed adjacent to a first side of the module; and a bottom filler covering the first passive device, disposed between the first passive device and the substrate, and disposed between the module and the substrate.

[0004] According to the electronic device described in the present invention, the distance between the first passive device and the module is within 100 micrometers.

[0005] According to the electronic device of the present invention, the distance between the first passive device and the filler corner of the bottom filler is within 50 micrometers.

[0006] The electronic device according to the present invention further includes a second passive device coupled to the substrate and disposed adjacent to a second side of the module opposite to the first side of the module.

[0007] According to the electronic device of the present invention, the second passive device is covered by the bottom filler.

[0008] According to the electronic device of the present invention, the first side of the module includes a molded sidewall oriented toward the first passive device.

[0009] The electronic device according to the present invention further comprises: a thermal interface material coupled to the upper side of the module; and a cover coupled to the thermal interface material.

[0010] In the electronic device according to the present invention, the thermal interface material comprises an indium-based material.

[0011] The electronic device according to the present invention further includes an adhesive for coupling the cover to the substrate.

[0012] According to the electronic device of the present invention, the height of the first passive device above the substrate is greater than the distance between the upper side of the substrate and the lower side of the module.

[0013] Another embodiment of the present invention is an electronic device comprising: a substrate; an electronic component coupled to the substrate; a first passive device coupled to the substrate and disposed adjacent to a first side of the electronic component; and a bottom filler covering the first passive device, disposed between the first passive device and the substrate, and disposed between the electronic component and the substrate.

[0014] According to another embodiment of the electronic device, the distance between the first passive device and the electronic component is less than 100 micrometers.

[0015] According to another embodiment of the electronic device, the distance between the first passive device and the filler corner of the bottom filler is within 50 micrometers.

[0016] Another aspect of the present invention is a method of manufacturing an electronic device, comprising: providing a substrate; providing a module coupled to the substrate; providing a passive device coupled to the substrate and disposed transversely to the sidewall of the module; and providing an underfill between the substrate and the module, wherein the underfill is disposed above the passive device.

[0017] According to another embodiment of the method of the present invention, the distance between the passive device and the module is less than 100 micrometers.

[0018] According to another embodiment of the method, the distance between the passive device and the module is in the range of approximately 60 micrometers to approximately 110 micrometers.

[0019] The method according to another embodiment of the present invention further includes: providing a thermal interface material coupled to the upper side of the module; and providing a cover coupled to the thermal interface material.

[0020] According to another embodiment of the method of the present invention, providing the module includes: providing a module substrate; providing an electronic component coupled to the module substrate; and providing an encapsulation on the module substrate and coupled to the sidewall of the electronic component.

[0021] The method according to another embodiment of the present invention further includes providing a second underfill material between the module substrate and the electronic component.

[0022] The method according to another embodiment of the invention further includes providing a second passive device coupled to the substrate and disposed transversely to the second sidewall of the module. Attached Figure Description

[0023] Figure 1 and Figure 1A A cross-sectional view of an exemplary electronic device is shown.

[0024] Figures 2A to 2J A cross-sectional view is shown of an exemplary method for manufacturing an exemplary electronic device. Detailed Implementation

[0025] The following discussion presents various examples of providing electronic devices and methods of manufacturing electronic devices. Such examples are not limiting, and the scope of the appended claims should not be limited to the specific examples disclosed. In the following discussion, the terms "example" and "for example" are non-limiting.

[0026] The figures illustrate general construction methods and may omit descriptions and details of well-known features and techniques to avoid unnecessarily obscuring this disclosure. Furthermore, the elements in the figures are not necessarily drawn to scale. For example, some elements in the figures may be enlarged relative to other elements to aid in understanding the examples discussed in this disclosure. The same reference numerals in different figures denote the same elements.

[0027] The term "or" refers to any one or more items in a list connected by "or". As an example, "x or y" means any element in the three-element set {(x), (y), (x, y)}. As another example, "x, y or z" means any element in the seven-element set {(x), (y), (z), (x, y), (x, z), (y, z), (x, y, z)}.

[0028] The terms “comprises”, “comprising”, “includes”, and “including” are “open-ended” terms that specify the presence of the stated feature but do not exclude the presence or addition of one or more other features.

[0029] The terms “first,” “second,” etc., may be used herein to describe various elements, and these elements should not be limited by these terms. These terms are used only to distinguish one element from another. Thus, for example, without departing from the teachings of this disclosure, a first element discussed herein may be referred to as a second element.

[0030] Unless otherwise specified, the term "coupled" can be used to describe two elements in direct contact with each other, or to describe two elements indirectly coupled through one or more other elements. For example, if element A is coupled to element B, then element A may be in direct contact with element B or indirectly coupled to element B through intervening element C. Similarly, the terms "above" or "over" can be used to describe two elements in direct contact with each other, or to describe two elements indirectly coupled through one or more other elements. Unless otherwise specified, the term "coupled" can refer to mechanical coupling or electrical coupling.

[0031] An exemplary electronic device may include a substrate, a module including electronic components and coupled to the substrate, and a first passive device coupled to the substrate and disposed adjacent to a first side of the module. An underfill may cover the first passive device, may be disposed between the first passive device and the substrate, and may be disposed between the module and the substrate.

[0032] In some instances, the distance between the first passive device and the module is within 100 micrometers (µm). The distance between the first passive device and the filler corner of the underfill can be within 50 micrometers (µm). A second passive device may be coupled to the substrate and disposed adjacent to a second side of the module opposite to the first side of the module. The second passive device may be covered by the underfill. The first side of the module includes a molded sidewall oriented toward the first passive device. A thermal interface material (TIM) may be coupled to the upper side of the module, and a cover may be coupled to the TIM. The TIM may comprise an indium-based material. An adhesive may couple the cover to the substrate. The height of the first passive device above the substrate is greater than the distance between the upper side of the substrate and the lower side of the module.

[0033] Another exemplary electronic device includes a substrate, an electronic component coupled to the substrate, and a first passive device coupled to the substrate and disposed adjacent to a first side of the electronic component. An underfill may cover the first passive device, wherein the underfill is disposed between the first passive device and the substrate, and between the electronic component and the substrate.

[0034] An exemplary method of manufacturing an electronic device includes the steps of: providing a substrate; providing a module coupled to the substrate; and providing a passive device coupled to the substrate and disposed transversely to the sidewall of the module. An underfill may be provided between the substrate and the module. The underfill may be disposed above the passive device.

[0035] This disclosure includes other examples. Such examples can be found in the figures, the claims, or the description of this disclosure.

[0036] Various examples of electronic devices and associated methods may include integrated passive devices (IPDs) located very close to the processing die or other electronic component positioning. The short distance between the IPD and the electronic component can improve the electronic performance of the resulting electronic device by placing, for example, a capacitor in an ideal or near-ideal location. In some instances, typical no-go rules sometimes associated with the use of polymer resins and IPDs can be avoided, and the resulting device may include an IPD located within 100 micrometers (μm) or less of the associated electronic component, electronic module, or electronic device. Such electronic devices and related technologies can be used to improve performance levels in high-performance computing (HPC) and power delivery networks (PDN).

[0037] Figure 1 A cross-sectional view of an exemplary electronic device 100 is shown. Figure 1A The electronic device 100 is shown located at Figure 1 A close-up view of the portion within box 1A. (Combined reference) Figure 1 and Figure 1A The electronic device 100 may include an electronic module 101, electronic components 110a and 110b, underfill 140b, a substrate 160, a cover 170, and external interconnects 190. The electronic module 101 of the electronic device 100 may include electronic components 110, a module substrate 120, a module connector 130, underfill 140a, and an encapsulation 150.

[0038] The module substrate 120 includes an inner side 121, an outer side 122, a dielectric structure 123, and a conductive structure 124. An electronic component 110 can be coupled to the inner side 121 of the module substrate 120. A connector 114 can couple the electronic component 110 to the conductive structure 124.

[0039] The substrate 160 includes an inner side 161, an outer side 162, a dielectric structure 163, and a conductive structure 164. Electronic components 110a and electronic modules 101 can be coupled to the inner side 161 of the substrate 160. Module connector 130 can couple electronic module 101 to the conductive structure 164. According to various embodiments, electronic component 110a may be adjacent to electronic component 101 (e.g., adjacent to the lateral side of module substrate 120) and within underfill 140b. Positioning electronic component 110a within underfill 140b reduces the overall footprint of the electronic device 100, reduces the length of the electrical path between electronic component 110a and electronic module 101, and / or allows a greater number of components to be coupled to the inner side 161 of the substrate 160.

[0040] In some instances, electronic component 110b may be coupled to the outer side 162 of substrate 160. Cover 170 may be coupled to substrate 160 via cover adhesive 175. Thermal interface material (TIM) 180 may be coupled between cover 170 and electronic component 110.

[0041] Figures 2A to 2J This illustrates the use of methods for manufacturing exemplary electronic devices (e.g., Figure 1 A cross-sectional view of an exemplary method of an electronic device 100 in the form of a device.

[0042] Figure 2A A cross-sectional view of the electronic device 100 during its early manufacturing stages is shown. Figure 2A In the example shown, the module substrate 120 may be disposed on the carrier 10. The module substrate 120 may include a dielectric structure 123 and a conductive structure 124. Layers or elements of the dielectric structure 123 and the conductive structure 124 may be sequentially disposed above the carrier 10.

[0043] When viewed from above, the carrier 10 may be a planar support structure having a rectangular, square, or circular shape. In some instances, the carrier 10 may include or be referred to as a plate, board, wafer, panel, or strip. The carrier 10 may be made of, for example, metal, ceramic, glass, or semiconductor or wafer material. In some instances, the thickness of the carrier 10 may range from approximately 300 μm to approximately 2000 μm, and the width of the carrier 10 may range from approximately 100 millimeters (mm) to approximately 300 mm. In some instances, the carrier 10 may have a width of up to 600 mm or greater. When used to describe numerical values ​​herein, terms may generally refer to + / -5%, + / -10%, + / -15%, + / -20%, or + / -25%. The carrier 10 may support the simultaneous (or nearly simultaneous) fabrication of multiple electronic modules 101.

[0044] In some instances, the carrier 10 may include a temporary bonding layer disposed between the upper side of the carrier 10 and the outer side 122 of the module substrate 120. The temporary bonding layer may be referred to as a temporary bonding film, a temporary bonding tape, or a temporary bonding coating. In some instances, the temporary bonding layer may be a heat-releasing tape (or film) or a light-releasing tape (or film). The temporary bonding layer may have its adhesive strength weakened or removed by heat, light, physical force, or chemical force. The temporary bonding layer allows for easy separation of the module substrate 120 from the carrier 10.

[0045] The dielectric structure 123 may be disposed above the carrier 10 using physical vapor deposition (PVD), chemical vapor deposition (CVD), metal-organic chemical vapor deposition (MOCVD), atomic layer deposition (ALD), low-pressure chemical vapor deposition (LPCVD), plasma-enhanced chemical vapor deposition (PECVD), spin coating, spray coating, dip coating, rod coating, or any other suitable deposition process. The dielectric structure 123 may comprise one or more layers of organic dielectric materials (e.g., polyimide (PI), benzocyclobutene (BCB), polybenzoxazole (PBO), phenolic resin, or Ajinomoto Buildup Film (ABF)), inorganic dielectric materials (e.g., silicon oxide (SiO2), silicon nitride (Si3N4), silicon oxynitride (SiON), tantalum pentoxide (Ta2O5), or aluminum oxide (Al2O3)), or other dielectric materials having similar insulating and structural properties. The thickness of each layer of the dielectric structure 123 may range from approximately 1 micrometer (μm) to approximately 10 μm. The combined thickness of the layers of the dielectric structure 123 may be substantially equal to or may define the thickness of the module substrate 120. The dielectric structure 123 may maintain the shape of the module substrate 120 and may also structurally support the conductive structure 124. In some instances, the thickness of the module substrate 120 can range from approximately 10 μm to approximately 80 μm.

[0046] The conductive structure 124 may be interleaved with layers or elements of the dielectric structure 123. The conductive structure 124 may include, or be referred to as, one or more conductive layers, which constitute signal distribution elements, traces, vias, pads, conductive patterns, conductive paths, wiring patterns, circuit patterns, or under-bump metallization (UBM). The conductive structure 124 may be formed using PVD, CVD, electroplating, electroless plating processes, or other suitable metal deposition processes. The conductive structure 124 may include one or more layers of aluminum (Al), titanium (Ti), titanium-tungsten (TiW), copper (Cu), tin (Sn), nickel (Ni), gold (Au), silver (Ag), palladium (Pd), or other suitable conductive materials.

[0047] The conductive structure 124 may include an inner terminal 124a located on the inner side 121 of the module substrate 120, and an outer terminal 124b located on the outer side 122 of the module substrate 120. The outer side 122 of the module substrate 120 is opposite to the inner side 121 of the module substrate (e.g., oriented away from the inner side). In some embodiments, the inner terminal 124a and / or the outer terminal 124b may include, or be referred to as, a pad, a pillar, or a UBM.

[0048] In some instances, module substrate 120 may be a redistribution layer ("RDL") substrate. The RDL substrate may include one or more conductive redistribution layers and one or more dielectric layers, and (a) may be formed layer-by-layer over an electronic device coupled to the RDL substrate, or (b) may be formed layer-by-layer over a carrier, and may be completely or at least partially removed after the electronic device and the RDL substrate are coupled together. The RDL substrate may be fabricated layer-by-layer on a circular wafer as a wafer-level substrate in a wafer-level process, and / or layer-by-layer on a rectangular or square panel carrier as a panel-level substrate in a panel-level process. The RDL substrate may be formed using an additive buildup process and may include one or more dielectric layers stacked alternately with one or more conductive layers, the conductive layers forming a corresponding conductive redistribution pattern or trace, the conductive redistribution pattern or trace being configured to collectively (a) fan the trace out of the electronic device's footprint, and / or (b) fan the trace into the electronic device's footprint. Conductive patterns can be formed using plating processes, such as electroplating or electroless plating. The conductive patterns may include conductive materials, such as copper or other platingable metals. The locations of the conductive patterns can be created using photopatterning processes, such as photolithography, and photoresist materials used to form the photomask. The dielectric layer of the RDL substrate can be patterned using photopatterning processes and may include a photomask through which light is exposed to the desired features of the photopattern, such as vias in the dielectric layer. The dielectric layer can be made of photo-definable organic dielectric materials, such as polyimide (PI), benzocyclobutene (BCB), or polybenzoxazole (PBO). These dielectric materials can be spin-coated or otherwise coated in liquid form rather than attached as a preform film. To allow proper formation of the desired photo-definable features, such photo-definable dielectric materials may omit structural reinforcing agents or may be filler-free, free of strands, fabrics, or other particles that could interfere with light from the photopatterning process. In some instances, the filler-free nature of the filler-free dielectric material allows for a reduction in the thickness of the dielectric layer thus formed. Although the photoconfined dielectric material described above can be organic, in some instances, the dielectric material of the RDL substrate may include one or more inorganic dielectric layers. Some examples of inorganic dielectric layers may include silicon nitride (Si3N4), silicon oxide (SiO2), and / or SiON. Inorganic dielectric layers can be formed by growing them using oxidation or nitriding processes, rather than using photoconfined organic dielectric materials. Such inorganic dielectric layers may be filler-free, without strands, fabrics, or other distinct inorganic particles. In some instances, the permanent core structure or carrier typically associated with core-clad laminates may be omitted from the RDL substrate. Other substrates in this disclosure may also include RDL substrates.

[0049] In some instances, module substrate 120 may be a preformed (or laminated) substrate. The preformed / laminated substrate may be fabricated prior to attachment to an electronic device and may include a dielectric layer between respective conductive layers. The conductive layer may include copper and may be formed using an electroplating process. The dielectric layer may be a relatively thick, non-photodefineable layer, may be attached in preformed film form rather than in liquid form, and may contain a resin with fillers such as strands, fabrics, and / or other inorganic particles for rigid and / or structural support. Because the dielectric layer is non-photodefineable, features such as vias or openings can be formed using drilling or lasers. In some instances, the dielectric layer may include a prepreg material or an ABF (augmented natural gas film). The preformed substrate may include a permanent core structure or carrier, such as a dielectric material including BT or FR4, and the dielectric and conductive layers may be formed on the permanent core structure. In other examples, the preformed substrate may be a coreless substrate omitting a permanent core structure, and the dielectric and conductive layers may be formed on a sacrificial carrier, which is removed after the dielectric and conductive layers are formed and before attachment to an electronic device. The preformed substrate may be referred to as a printed circuit board (PCB) or a laminated substrate. Such preformed substrates may be formed using a semi-additive process or a modified semi-additive process. Other substrates in this disclosure may also include preformed substrates.

[0050] Figure 2B A cross-sectional view of the electronic device 100 at a later manufacturing stage is shown. Figure 2B In the example shown, electronic component 110 may be disposed on the inner side 121 of module substrate 120. Electronic component 110 may be coupled to the inner terminal 124a of conductive structure 124.

[0051] Electronic component 110 may include a lower side 111 and an upper side 112. The upper side 112 of electronic component 110 is opposite to the lower side 111. In some embodiments, the lower side 111 of electronic component 110 may include, or be referred to as the active side, and the upper side 112 may include, or be referred to as the inactive side or the back side.

[0052] Electronic component 110 may include contacts 113 on a lower side 111. Contacts 113 may be arranged in rows and columns along the lower side 111. In some instances, contacts 113 may include, or be referred to as, bonding pads, contact pads, gaskets, pillars, or guide pillars. In some instances, contacts 113 may be exposed by a SiO2 film or SiN film located above the lower side 111. In some instances, a redistribution layer may be present between contacts 113 and the active circuitry (e.g., transistor regions) and / or BEOL components of electronic component 110.

[0053] Connector 114 couples the contacts 113 of electronic component 110 to the inner terminals 124a of module substrate 120. In some instances, connector 114 may include, or be referred to as, bumps, SnPb bumps, lead-free bumps, Cu interconnects, cylindrical bumps, leads, pillars, or solder cap pillars. Connector 114 may be disposed on contacts 113 by, for example, plating, dropleting, solder reflow, or any other suitable deposition process.

[0054] In some instances, the pick-and-place device can pick up the electronic component 110 and place it on the inner side 121 of the module substrate 120. The connector 114 of the electronic component 110 can be positioned on the inner terminal 124a of the conductive structure 124. The contacts 113 of the electronic component 110 can be electrically coupled to the inner terminal 124a via the connector 114 through, for example, reflow, thermal compression, or laser-assisted bonding processes from the connector 114 to the inner terminal 124a. In some instances, the electronic component 110 may include, or be referred to as, a die, chip, package (e.g., containing multiple dies), or passive component. In some instances, the total thickness of the electronic component 110 may range from approximately 50 μm to approximately 780 μm.

[0055] Figure 2C A cross-sectional view of the electronic device 100 at a later manufacturing stage is shown. Figure 2C In the illustrated example, an underfill 140a may be provided between the electronic component 110 and the module substrate 120. The underfill 140a may be positioned between the underside 111 of the electronic component 110 and the inner side 121 of the module substrate 120. The underfill 140a may contact the underside 111 of the electronic component 110 and the inner side 121 of the module substrate 120. In some embodiments, the underfill 140a may surround and contact the connector 114.

[0056] The underfill 140a may include, or be referred to as, an electrically insulating material and may not contain inorganic fillers. In some instances, the underfill 140a may include, or be referred to as, capillary underfill (CUF), nonconductive paste (NCP), nonconductive film (NCF), anisotropic conductive film (ACF), or anisotropic conductive paste (ACP). In some instances, the underfill 140a may be cured after being disposed between the electronic component 110 and the module substrate 120. The underfill 140a may help reduce the occurrence of separation between the electronic component 110 and the module substrate 120.

[0057] Figure 2DA cross-sectional view of the electronic device 100 at a later manufacturing stage is shown. Figure 2D In the illustrated example, encapsulation 150 may be disposed above module substrate 120 and electronic component 110. In some examples, encapsulation 150 may contact underfill 140a, the upper side 121 of module substrate 120, and the lateral side of electronic component 110. In some examples, encapsulation 150 may be located between the upper side 121 of module substrate 120 and electronic component 110. For example, encapsulation 150 may be a molded underfill (MUF) and may replace underfill 140a.

[0058] In some instances, the encapsulation 150 may include, or be referred to as, a body or molded part. The encapsulation 150 may include an epoxy molding compound, a resin, or an organic polymer having inorganic fillers, curing agents, catalysts, coupling agents, colorants, or flame retardants. The encapsulation 150 may be formed by compression molding, transfer molding, liquid body molding, vacuum lamination, paste printing, film-assisted molding, or any other suitable process. In some instances, the encapsulation 150 may initially be provided above the upper side 112 of the electronic assembly 110, and the upper portion of the encapsulation 150 may be removed to expose the upper side 112 of the electronic assembly 110. The upper side of the encapsulation 150 may be coplanar with the upper side 112 of the electronic assembly 110. The encapsulation 150 protects the electronic assembly 110 from external factors.

[0059] Figure 2E A cross-sectional view of the electronic device 100 at a later manufacturing stage is shown. Figure 2E In the example shown, the carrier 10 is removed, each electronic module 101 is individually cut to separate them, and a module connector 130 is provided on the outer side 122 of the module substrate 120.

[0060] According to various examples, the carrier 10 can be removed from the module substrate 120. For example, heat, light, chemical solutions, or physical forces can be applied to separate the carrier 10 from the outer side 122 of the module substrate 120. The removal of the carrier 10 exposes the outer side 122 of the module substrate 120.

[0061] Module connector 130 can be coupled to an outer terminal 124b located on the outer side 122 of module substrate 120. Module connector 130 can be electrically coupled to electronic component 110 via conductive structure 124 of module substrate 120. In some instances, module connector 130 may include Sn, Ag, lead (Pb), Cu, Sn-Pb, Sn37-Pb, Sn95-Pb, Sn-Pb-Ag, Sn-Cu, Sn-Ag, Sn-Au, Sn-Bi, or Sn-Ag-Cu. For example, the module connector 130 can be formed by forming a conductive material containing solder on the outer terminal 124b of module substrate 120 via a ball drop process, and then via a reflow process. Module connector 130 may include, or be referred to as, conductive balls (e.g., solder balls), conductive posts (e.g., copper posts), or conductive posts having solder caps formed on copper posts. In some instances, the height of the module connector 130 may range from approximately 65 μm to approximately 80 μm, but other instances of the module connector may include smaller or larger heights.

[0062] After the module connector 130 is configured, a single-cut process can be performed to provide a separate electronic module 101. Single-cutting may include sawing along a single-cut line S. For example, the electronic module 101 can be single-cut by cutting through the encapsulation 150 and the module substrate 120. After single-cutting, the lateral sides of the encapsulation 150 may be coplanar with the lateral sides of the module substrate 120. The electronic module 101 may include electronic components 110, the module substrate 120, the module connector 130, and the encapsulation 150. In some instances, the electronic module 101 may include an underfill 140a. In some instances, the total thickness of the electronic module 101 may be in the range of approximately 700 μm to approximately 800 μm, approximately 600 μm to approximately 900 μm, or approximately 500 μm to approximately 1,000 μm. In some instances, the area or "occupied space" of electronic module 101 can range from approximately 1.26 mm × 0.505 mm to approximately 1.10 mm × 0.606 mm or from approximately 0.5 mm × 0.5 mm to approximately 2 mm × 2 mm. In some instances, the module size and occupied space area can be determined by self-alignment after reflow soldering.

[0063] Figure 2F A cross-sectional view of the electronic device 100 at a later manufacturing stage is shown. Figure 2F In the example shown, electronic components 110a and electronic modules 101 can be disposed on the inner side 161 of the substrate 160.

[0064] According to various examples, the substrate 160 may include an inner side 161 and an outer side 162 opposite to the inner side 161. Electronic module 101 and electronic component 110a may be disposed above and coupled to the inner side 161 of the substrate 160. The outer side 162 of the substrate 160 may be configured for mounting electronic device 100 to an external component or board. For example, as shown in reference... Figure 2J As described, the external interconnect 190 may be located on the outer side 162 of the substrate 160 and coupled to the outer side.

[0065] The substrate 160 may include a dielectric structure 163 and a conductive structure 164. In some instances, the dielectric structure 163 may include, or be referred to as, one or more stacked dielectric layers. For example, the one or more dielectric layers may include one or more core layers, polymer layers, prepreg layers, Ajinomoto multilayer film (ABF) layers, or solder mask layers stacked on top of each other. One or more layers or elements of the conductive structure 164 may be interleaved with elements or layers of the dielectric structure 163. In some instances, the dielectric structure 163 may include FR4 (copper foil / glass fiber fabric / copper foil laminate), bismaleimide triazine (BT), polyimide (PI), benzocyclobutene (BCB), polybenzoxazole (PBO), phenolic resin or ABF, molding compound, or glass. The thickness of each layer of the dielectric structure 163 may range from approximately 20 μm to approximately 1400 μm. In some instances, the core of dielectric structure 163 may have a thickness between approximately 100 μm and approximately 1400 μm, between approximately 200 μm and approximately 1250 μm, between approximately 400 μm and approximately 800 μm, approximately 200 μm, approximately 820 μm, or approximately 1250 μm. In some instances, the individual layers of dielectric structure 163 (e.g., ABF or prepreg layers) may be laminated to the core structure and / or laminated to each other. The laminated layers of dielectric structure 163 may each have a thickness between approximately 10 μm and approximately 50 μm, between approximately 25 μm and approximately 40 μm, between approximately 25 μm and approximately 35 μm, approximately 20 μm, approximately 25 μm, or approximately 33 μm. In some instances, the outermost dielectric layer on each side of the substrate 160 may include a solder mask material, which may differ from the material of the laminates and / or the core material. In some instances, the solder mask (or solder resist) layer may be provided by screen printing and may have a thickness between approximately 10 μm and approximately 50 μm, between approximately 20 μm and approximately 40 μm, between approximately 20 μm and approximately 30 μm, approximately 20 μm, or approximately 22 μm. In some instances, the thickness of the solder mask layer may be less than the thickness of the individual laminates. The combined thickness of the layers of the dielectric structure 163 may define the thickness of the substrate 160. The dielectric structure 163 may maintain the shape of the substrate 160 and may structurally support the conductive structure 164.

[0066] The conductive structure 164 may include, or be referred to as, one or more conductive layers, which constitute signal distribution elements, traces, vias, pads, under-bump metallization (UBM), redistribution layers (RDL), conductive patterns, conductive paths, wiring patterns, or circuit patterns. In some instances, the conductive structure 164 may include one or more layers of copper (Cu), aluminum (Al), tin (Sn), titanium (Ti), titanium-tungsten (TiW), gold (Au), silver (Ag), nickel (Ni), palladium (Pd), or combinations or alloys thereof. The thickness of the conductive structure 164 may be approximately 5 μm to approximately 50 μm, 10 μm to approximately 30 μm, 15 μm to approximately 25 μm, or 18 μm to approximately 20 μm. The thickness of the conductive structure 164 can be referenced to the individual layers of the conductive structure 164. In some instances, the conductive structure 164 may have trace widths and trace spacing (width / spacing) between approximately 5 μm / 5 μm and approximately 50 μm / 50 μm, between approximately 8 μm / 8 μm and approximately 40 μm / 40 μm, between approximately 9 μm / 12 μm and approximately 25 μm / 25 μm, or between approximately 9 μm / 12 μm and approximately 20 μm / 20 μm. The trace width is the width of each trace in the conductive structure 164, and the trace spacing is the distance between adjacent traces in the conductive structure 164. The conductive structure 164 provides electrical signal paths (e.g., vertical and horizontal paths) through the dielectric structure 163. The conductive structure 164 can be formed using, for example, sputtering, electroless plating, electroplating, physical vapor deposition (PVD), chemical vapor deposition (CVD), metal-organic chemical vapor deposition (MOCVD), atomic layer deposition (ALD), low-pressure chemical vapor deposition (LPCVD), or plasma-enhanced chemical vapor deposition (PECVD). Some portions of the conductive structure 164 may be exposed from the dielectric structure 163 (e.g., a solder mask) at the inner side 161 of the substrate 160 as inner terminal 164a, and at the outer side 162 of the substrate 160 as outer terminal 164b. In some instances, the inner terminal 164a and the outer terminal 164b may include, or be referred to as, pads, solder pads, or UBMs. The layers and elements of the conductive structure 164 can electrically couple the inner terminal 164a to the outer terminal 164b.

[0067] The substrate 160 may include a core or a coreless substrate. In some instances, the substrate 160 may include, or be referred to as, a preformed or laminated substrate, as previously described. In some instances, the substrate 160 may include, or be referred to as a multilayer or RDL substrate, as previously described. In some instances, the area of ​​the substrate 160 may be adjusted or selected according to the area or number of electronic modules 101 and electronic components 110a coupled to the substrate 160. In some instances, the substrate 160 may have an area of ​​approximately 1 mm by 1 mm to approximately 150 mm by 150 mm. The substrate 160 may have a thickness of approximately 0.2 mm to approximately 4 mm.

[0068] Electronic module 101 can be picked up by a pick-and-place device and placed on the inner side 161 of substrate 160. Module connector 130 can be located on inner substrate terminal 164a and then coupled to said inner substrate terminal via reflow soldering, thermal compression, laser-assisted or other bonding processes. Electronic components 110 of electronic module 101 can be electrically coupled to conductive structure 164 via inner substrate terminal 164a and module connector 130.

[0069] Electronic component 110a can be coupled to an inner-substrate terminal 164a of substrate 160. Electronic component 110a can be electrically coupled to electronic module 101 via conductive structure 164 of substrate 160. For example, electronic component 110a can be electrically coupled to electronic component 110 via conductive structure 124 of substrate 160, module connector 130, and module substrate 120. Electronic component 110a can be positioned in an edge region of electronic module 101. For example, electronic component 110a can be positioned spaced apart from the sidewall of electronic module 101 by a distance D. In some instances, the distance D between the sidewall of electronic component 110a and the sidewall of electronic module 101 can be in the range of approximately 60 μm to approximately 110 μm. In some instances, the thickness of electronic component 110a can be in the range of approximately 100 μm to approximately 200 μm. In some instances, the distance D between the sidewall of electronic component 110a and the sidewall of electronic module 101 may be less than approximately 100 μm. The shorter distance D between electronic component 110a and electronic module 101 can improve electronic performance by reducing the length of the electrical path between them.

[0070] In some instances, electronic component 110a may include, or be referred to as, a passive device, an integrated passive device, a power device, or a smart power device. In some instances, electronic component 110a may include a capacitor. In some instances, electronic component 110a may include, or be referred to as, a die or chip. Electronic component 110a may be arranged adjacent to electronic module 101 to improve the power supply delivered to electronic component 110. Reducing the distance between electronic component 110 and electronic component 110a can improve the power efficiency of electronic device 100. Due to the improved power delivery network (PDN), electronic device 100 can also exhibit high-performance computing (HPC) performance.

[0071] When the electronic component 110a is positioned adjacent to the electronic module 101 at a distance D, the available space on the inner side 161 of the substrate 160 outside the electronic component 110a can be increased. The additional space on the inner side 161 can make it possible to install additional electronic components or reduce the total space occupied by the substrate 160 and the electronic device 100.

[0072] Figure 2G A cross-sectional view of the electronic device 100 at a later manufacturing stage is shown. Figure 2G In the illustrated example, underfill 140b may be disposed between module substrate 120 and base substrate 160. According to various embodiments, underfill 140b may cover electronic component 110a (e.g., electronic component 110a may be within underfill 140b). Underfill 140b may contact the outer side 122 of module substrate 120, the inner side 161 of base substrate 160, electronic component 110a, and module connector 130. For example, underfill 140b may contact the sidewalls of module substrate 120 and the sidewalls of encapsulation 150. A filler 140b1 of underfill 140b may extend from the sidewall of module 101 to base substrate 160. Filler 140b1 may be positioned above electronic component 110a. In some instances, the upper side of electronic component 110a may be positioned within approximately 30 µm, approximately 40 µm, approximately 50 µm, approximately 60 µm, or approximately 70 µm of filler 140b. In some instances, the bottom filler 140b may completely cover electronic component 110a.

[0073] In some embodiments, a bottom filler 140b may be provided between the module substrate 120 and the base substrate 160, and the bottom filler 140b may cover the electronic component 110a, thereby leaving an unfilled void in the volume between the electronic component 110a and the base substrate 160. In some embodiments, the bottom filler 140b may be provided between the module substrate 120 and the base substrate 160, and also between the electronic component 110a and the base substrate 160. In some embodiments, the bottom filler 140b may completely or substantially fill the volume between the electronic component 110a and the base substrate 160.

[0074] The underfill 140b may include, or be referred to as, an insulating layer and may be free of inorganic fillers. In some instances, the elements, features, materials, or manufacturing methods of the underfill 140b may be similar to or the same as those described above with respect to the underfill 140a. The thickness of the underfill 140a above the electronic component 110a may range from approximately 5 μm to approximately 80 μm. The underfill 140b may reduce the occurrence of separation between the electronic component 110a or electronic module 101 and the substrate 160.

[0075] Figure 2H A cross-sectional view of the electronic device 100 at a later manufacturing stage is shown. Figure 2H In the illustrated example, thermal interface material (TIM) 180 may be disposed on electronic component 110 and encapsulation 150. TIM 180 may be disposed on the upper side 112 of electronic component 110 and the upper side of encapsulation 150. In some examples, a metal layer may be inserted between TIM 180 and the upper side 112 of electronic component 110 to increase the bonding strength between TIM 180 and electronic component 110. In some examples, the metallization layer may include, or be referred to as, backside metallization (BSM) plating, a conductive film, or a conductive separator. For example, the metal layer may be provided by electrolytic plating, electroless plating, sputtering, or PVD. In some examples, the metal layer may be made of Au or Ag. In some examples, the thickness of the metal layer may be in the range of approximately 0.3 μm to approximately 3 μm.

[0076] In some instances, TIM 180 may be a metallic TIM. For example, TIM 180 may include metallic materials such as solder, solder paste, gallium, gallium alloys (e.g., alloys containing indium, tin, or zinc), silver alloys, tin-silver, indium, and indium alloys. In some instances, TIM 180 may include a polymeric TIM. TIM 180 facilitates the transfer or conduction of heat generated from electronic component 110 to cover 170 (…). Figure 2I In some instances, the thickness of TIM 180 can range from approximately 0.1 μm to approximately 200 μm.

[0077] A capping adhesive 175 may be disposed on the inner side 161 of the substrate 160. The capping adhesive 175 may be annular, surrounding the periphery of the substrate 160. In some embodiments, the capping adhesive 175 may comprise, or be referred to as, a polymer or dielectric. In some embodiments, the capping adhesive 175 may comprise a thermal adhesive or a non-thermal adhesive. In some embodiments, the thickness of the capping adhesive 175 may range from approximately 5 μm to approximately 300 μm.

[0078] Figure 2I A cross-sectional view of the electronic device 100 at a later manufacturing stage is shown. Figure 2I In the example shown, cover 170 may be disposed above electronic module 101 and on the inner side 121 of substrate 160.

[0079] Cover 170 may include a top plate and sidewalls extending downward from the top plate. In some embodiments, the top plate and sidewalls may be integral with each other (e.g., a one-piece cover). In other embodiments, the top plate may be separate from and joined to the sidewalls (e.g., a two-piece cover). In some embodiments, the top plate of cover 170 may have grooves, protrusions, or fins provided on the top side to improve heat dissipation efficiency.

[0080] Electronic component 110a and electronic module 101 may be positioned within cover 170 (e.g., within a cavity defined by the inner sides of a top plate and sidewalls). Cover 170 may surround electronic component 110a and electronic module 101. In some embodiments, the inner side of the top plate of cover 170 may contact TIM 180. The sidewalls of cover 170 may be coupled to substrate 160 via cover adhesive 175. After cover 170 is placed on TIM 180 and cover adhesive 175, TIM 180 and / or cover adhesive 175 may be cured using a curing process employing heat, light, ultraviolet light, or laser.

[0081] In some instances, the thickness of the top plate and sidewalls of cover 170 may range from approximately 0.1 mm to approximately 5 mm. In some instances, the height of the sidewalls of cover 170 may range from approximately 0.2 mm to approximately 2 mm. In some instances, cover 170 may include or be referred to as a metal cover. For example, cover 170 may be formed of a metal or alloy (e.g., aluminum, nickel, copper, or an alloy, or a combination thereof). In some instances, cover 170 may be referred to or include a heat sink, cap, enclosure, protective element, package, or body. Cover 170 protects electronic component 110a and electronic module 101 from external components and allows heat generated from electronic component 110 to dissipate rapidly and easily.

[0082] Figure 2J A cross-sectional view of the electronic device 100 at a later manufacturing stage is shown. Figure 2JIn the example shown, the external interconnect 190 may be disposed on the outer side 162 of the substrate 160.

[0083] External interconnect 190 is accessible and coupled to an outer terminal 164b of the substrate. External interconnect 190 can be electrically coupled to electronic components 110 and 110a via a conductive structure 164 of the substrate 160. In some instances, external interconnect 190 may include tin (Sn), silver (Ag), lead (Pb), copper (Cu), Sn-Pb, Sn37-Pb, Sn95-Pb, Sn-Pb-Ag, Sn-Cu, Sn-Ag, Sn-Au, Sn-Bi, or Sn-Ag-Cu. For example, external interconnect 190 can be formed on the outer terminal 164b of the substrate via a ball-drop process, followed by a reflow process. External interconnect 190 may include, or be referred to as, a conductive ball (e.g., a solder ball), a conductive post (e.g., a copper post), or a conductive post having a solder cap formed on a copper post. In some instances, the size of the external interconnect 190 can range from approximately 100 μm to approximately 1000 μm.

[0084] In some instances, the external interconnect 190 may be referred to as an external input / output terminal of the electronic device 100. In some instances, the electronic device 100 may be a land grid array (LGA), wherein the outer terminal 164b of the substrate serves as the external input / output terminal (e.g., the electronic device 100 may not include the external interconnect 190).

[0085] In some instances, one or more electronic components 110b may be disposed on the outer side 162 of the substrate 160. Electronic components 110b may contact and be coupled to the outer substrate terminal 164b of the conductive structure 164. Electronic components 110b may have corresponding elements, features, materials, or manufacturing methods similar to those of electronic component 110. In some instances, electronic components 110b may include, or be referred to as, a die, chip, package, or passive component. Electronic components 110b may be electrically coupled to electronic module 101, electronic component 110a, and / or external interconnect 190 via the conductive structure 164 of the substrate 160.

[0086] In some instances, after the external interconnect 190 is provided, a single-cut process can be performed by sawing the substrate 160 to separate it into individual electronic devices 100. In some instances, the substrate 160 can be single-cut (e.g., provided as a discrete substrate cell) and then the electronic module 101 can be attached.

[0087] Various examples of electronic devices and related technologies reduce the length of electrical paths between adjacent electronic components. For instance, an IPD can be placed at a very close distance to adjacent semiconductor dies, and in some electronic devices, it can be placed in areas that are typically kept off-limits. This close proximity of adjacent electronic components improves electronic performance compared to devices constructed with more traditional distances between them.

[0088] This disclosure contains references to certain examples; however, those skilled in the art will understand that various changes and substitutions for equivalents can be made without departing from the scope of this disclosure. Furthermore, modifications can be made to the disclosed examples without departing from the scope of this disclosure. Therefore, it is intended that this disclosure be limited to the disclosed examples, but will include all examples falling within the scope of the appended claims.

Claims

1. An electronic device, characterized in that, include: Substrate; Module, which includes electronic components and is coupled to the substrate; A first passive device is coupled to the substrate and disposed adjacent to a first side of the module; as well as A bottom filler that covers the first passive device, is disposed between the first passive device and the substrate, and is disposed between the module and the substrate.

2. The electronic device according to claim 1, characterized in that, The distance between the first passive device and the module is within 100 micrometers.

3. The electronic device according to claim 1, characterized in that, The distance between the first passive device and the filler corner of the bottom filler is within 50 micrometers.

4. The electronic device according to claim 1, characterized in that, It further includes a second passive device coupled to the substrate and disposed adjacent to a second side of the module opposite to the first side of the module.

5. The electronic device according to claim 4, characterized in that, The second passive device is covered by the bottom filler.

6. The electronic device according to claim 1, characterized in that, The first side of the module includes a molded sidewall oriented toward the first passive device.

7. The electronic device according to claim 1, characterized in that, Further includes: A thermal interface material, which is coupled to the upper side of the module; as well as The cap is coupled to the thermal interface material.

8. The electronic device according to claim 7, characterized in that, The thermal interface material includes indium-based materials.

9. The electronic device according to claim 7, characterized in that, It further includes an adhesive for coupling the cover to the substrate.

10. The electronic device according to claim 1, characterized in that, The height of the first passive device above the substrate is greater than the distance between the upper side of the substrate and the lower side of the module.

11. An electronic device, characterized in that, include: Substrate; Electronic components coupled to the substrate; A first passive device is coupled to the substrate and disposed adjacent to a first side of the electronic component; as well as A bottom filler that covers the first passive device, is disposed between the first passive device and the substrate, and is disposed between the electronic component and the substrate.

12. The electronic device according to claim 11, characterized in that, The distance between the first passive device and the electronic component is less than 100 micrometers.

13. The electronic device according to claim 11, characterized in that, The distance between the first passive device and the filler corner of the bottom filler is within 50 micrometers.

14. A method for manufacturing an electronic device, characterized in that, include: Provide a substrate; Provide a module coupled to the substrate; A passive device is provided, the passive device being coupled to the substrate and disposed transversely to the sidewall of the module; as well as An underfill is provided between the substrate and the module, wherein the underfill is disposed above the passive device.

15. The method according to claim 14, characterized in that, The distance between the passive device and the module is less than 100 micrometers.

16. The method according to claim 14, characterized in that, The distance between the passive device and the module is in the range of approximately 60 micrometers to approximately 110 micrometers.

17. The method according to claim 14, characterized in that, Further includes: A thermal interface material is provided, which is coupled to the upper side of the module; as well as A cover is provided that is coupled to the thermal interface material.

18. The method according to claim 14, characterized in that, The module provided includes: Provide module substrate; Provides electronic components coupled to the module substrate; and An encapsulation is provided above the module substrate and coupled to the sidewall of the electronic component.

19. The method according to claim 18, characterized in that, The method further includes providing a second underfill material between the module substrate and the electronic component.

20. The method according to claim 14, characterized in that, It further includes providing a second passive device coupled to the substrate and disposed transversely to the second sidewall of the module.

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