A chip package structure

Abstract

The application relates to a chip packaging structure, which comprises a shell, a lead frame, a DBC plate, a first chip and a second chip in the shell; the lead frame comprises a first independent terminal and a second independent terminal, the first independent terminal comprises a first base island, the second independent terminal comprises a second base island, the DBC plate is provided with a copper cladding layer, the first chip and the second chip are connected with the copper cladding layer, and the first base island and the second base island are connected with the copper cladding layer; the first chip is connected with the first base island through a first connecting line, and the second chip is connected with the first base island through a third connecting line; the first base island is in a strip shape, and the third connecting line and the first connecting line are arranged along the length direction of the first base island in sequence. The chip packaging structure has the following advantages: the first chip and the second chip are arranged in the shell, the integration degree is high, the interconnection delay is shorter, and the system volume is smaller; the connecting lines are arranged vertically on the first base island, are not staggered with each other, and the connecting sequence is simple and clear.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a chip packaging structure. Background Technology

[0002] Semiconductor devices commonly used in high-power applications, such as power transistors and power MOSFETs, feature electronic packages that offer large heat dissipation areas and low thermal resistance, making them well-suited for high-power and high-temperature applications. The TO-247 package, in particular, generally offers excellent heat dissipation; its large size and metal backplate facilitate heatsink installation and heat dissipation. Furthermore, this package typically has low resistance and inductance, enabling it to handle applications with higher current and power requirements.

[0003] In the prior art, for example, Chinese Utility Model Patent Publication No. CN220652012U discloses a TO-247-5L package structure based on DBC insulation and heat dissipation, including a housing and an internally packaged lead frame unit, a copper-clad ceramic substrate, and an IC die; the lead frame unit has multiple independent terminals, and at least one independent terminal is stamped and bent to form a bent terminal for fixed connection with the copper-clad ceramic substrate; the copper-clad ceramic substrate includes a ceramic insulating layer and first and second copper-clad layers located on the upper and lower surfaces of the ceramic insulating layer; the IC die is fixedly connected to the first copper-clad layer; the second copper-clad layer is exposed through an opening at the bottom of the housing for heat dissipation. However, this package structure only contains a single chip and has a limited function. Summary of the Invention

[0004] One objective of this application is to provide a chip packaging structure that employs two chips and has a compact structure.

[0005] The technical solution adopted in this application is as follows: a chip packaging structure, including a housing and a lead frame, a DBC board, a first chip, and a second chip packaged inside the housing; the lead frame includes a first independent terminal and a second independent terminal, the first independent terminal includes a first base island located inside the housing and a first pin extending outside the housing, the second independent terminal includes a second base island located inside the housing and a second pin extending outside the housing, at least one side of the DBC board is provided with a copper-clad layer, the first chip and the second chip are both fixedly connected to the copper-clad layer, and the first base island and the second base island are both fixedly connected to the copper-clad layer; The first chip is connected to the first base island via a first connecting line, the first chip and the second chip are connected via a second connecting line, the second chip and the first base island are connected via a third connecting line, and the first chip and the second base island are connected via a fourth connecting line. The first base island is vertically elongated, and the third connecting line and the first connecting line are arranged sequentially along the length of the first base island. Copper layers are provided on both the front and back sides of the DBC board, and the first chip, the second chip, the first base island, and the second base island are all located on the same side.

[0006] Compared with existing technologies, the advantages of this application are that a first chip and a second chip are set inside the casing, a dual-chip design with high integration, shorter interconnection delay, smaller system size, and the ability to perform complementary work, making it suitable for household appliances such as induction cookers; the first chip and the first base island are directly connected through a first connecting line, realizing the external communication of the first chip, and the first chip and the second chip are connected through a second connecting line, realizing the communication between the first chip and the second chip, improving performance; the casing is integrally molded with epoxy resin, completely covering the lead frame, DBC board, first chip, second chip, first connecting line, second connecting line, third connecting line and fourth connecting line, exposing the first pin and second pin for external circuit connection, ultimately forming a compact packaged product with reliable insulation performance; the connecting lines are arranged vertically on the first base island, without intersecting each other, and the connection sequence is simple and clear; copper-clad layers are set on both sides of the DBC board, which can utilize the thermal conductivity of copper for auxiliary heat dissipation, improving the overall heat dissipation effect and further ensuring the stability of the chip packaging structure during long-term operation; the first chip, the second chip, the first base island and the second base island are all concentrated on the same side of the DBC board, which is convenient for assembly and has a high degree of integration.

[0007] In some embodiments of this application, the lead frame further includes a third independent terminal, which includes a third base island located within the housing and a third pin extending outside the housing, the third base island being fixedly connected to the copper cladding layer.

[0008] Furthermore, the third base island is in the shape of an inverted "mountain" character, and the middle vertical edge of the third base island is connected to the third pin; the third base island and the third pin are connected by a third bend, which is located inside the housing.

[0009] In some embodiments of this application, the upper width of the first base island is smaller than the lower width of the first base island; the first base island and the first pin are connected by a first bend, which is located inside the housing.

[0010] In some embodiments of this application, the upper width of the second base island is smaller than the lower width of the second base island; the second base island and the second pin are connected by a second bend, which is located inside the housing.

[0011] In some embodiments of this application, the second base island is located below the first chip, and the second chip is located between the first chip and the first base island.

[0012] Furthermore, the copper clad layer is provided with a first partition groove for separating the first base island and a second partition groove for separating the second base island.

[0013] Furthermore, the second base island is elongated; the length of the first base island is greater than the length of the second base island.

[0014] Furthermore, both the second and third base islands are provided with fixing holes.

[0015] Furthermore, the upper parts of the first independent terminal, the second independent terminal, and the third independent terminal are horizontally connected and fixed by a central rib, and the bottom parts of the first independent terminal, the second independent terminal, and the third independent terminal are horizontally connected and fixed by a bottom rib. Attached Figure Description

[0016] Figure 1 This is a structural schematic diagram of Embodiment 1 of the present invention. Figure 1 ; Figure 2 This is a structural schematic diagram of Embodiment 1 of the present invention. Figure 2 ; Figure 3 This is a side view of the first independent terminal of Embodiment 1 of the present invention.

[0017] In the diagram: 1. Housing; 2. DBC board; 3. First chip; 4. Second chip; 5. First independent terminal; 6. Second independent terminal; 7. First base island; 8. First pin; 9. Second base island; 10. Second pin; 11. Copper cladding layer; 12. First connecting line; 13. Second connecting line; 14. Third connecting line; 15. Fourth connecting line; 16. Third independent terminal; 17. Third base island; 18. Third pin; 19. Third bend; 20. First bend; 21. Second bend; 22. First partition groove; 23. Second partition groove; 24. Fixing hole; 25. Middle rib; 26. Bottom rib; 27. Arc groove; 28. Third partition groove; 29. ​​Through hole. Detailed Implementation

[0018] To enable those skilled in the art to better understand the technical solutions of this disclosure, the following detailed, clear, and complete description of this disclosure is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of this disclosure and are not intended to limit it.

[0019] In the description of this application, the use of "first" and "second" is for the purpose of distinguishing technical features only, and should not be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated or the order of the technical features indicated.

[0020] Those skilled in the art should understand that in the disclosure of this application, the terms "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, the above terms should not be construed as limitations on this application.

[0021] Example 1: This embodiment provides a chip packaging structure, such as Figure 1 , Figure 2 As shown, the device includes a housing 1 and a lead frame, a DBC board 2, a first chip 3, and a second chip 4 encapsulated within the housing 1. The lead frame includes a first independent terminal 5 and a second independent terminal 6. The first independent terminal 5 includes a first base island 7 located within the housing 1 and a first pin 8 extending outside the housing 1. The second independent terminal 6 includes a second base island 9 located within the housing 1 and a second pin 10 extending outside the housing 1. At least one side of the DBC board 2 is provided with a copper plating layer 11. The first chip 3 and the second chip 4 are both fixedly connected to the copper plating layer 11. The first base island 7 and the second base island 9 are both fixedly connected to the copper plating layer 11. The first chip 3 is connected to the first base island 7 via a first connecting line 12. The first chip 3 and the second chip 4 are connected via a second connecting line 13. The second chip 4 and the first base island 7 are connected via a third connecting line 14. The first chip 3 and the second base island 9 are connected via a fourth connecting line 15. In this embodiment, two first connecting lines 12, two second connecting lines 13, two third connecting lines 14, and one fourth connecting line 15 are provided. All connecting lines 12, 13, 14, and 15 are made of aluminum wire. The diameters of the first connecting lines 12, 13, and 14 are 15-20 micrometers, and the diameter of the fourth connecting line 15 is 6-8 micrometers. The first chip 3 is an IGBT, and the second chip 4 is an FRD. Both the first base island 7 and the second base island 9 are bonded to the copper cladding layer 11.

[0022] The housing 1 contains a first chip 3 and a second chip 4. The dual-chip design has high integration, shorter interconnection delay, smaller system size, and can perform complementary work, making it suitable for household appliances such as induction cookers. The first chip 3 is directly connected to the first base island 7 through the first connecting line 12, realizing the external communication of the first chip 3. The first chip 3 and the second chip 4 are connected through the second connecting line 13, realizing the communication between the first chip 3 and the second chip 4, thus improving performance.

[0023] The housing 1 is integrally molded with epoxy resin injection, completely enclosing the lead frame, DBC board 2, first chip 3, second chip 4, first connecting line 12, second connecting line 13, third connecting line 14 and fourth connecting line 15, exposing the first pin 8 and the second pin 10 for external circuit connection, ultimately forming a compact packaged product with reliable insulation performance.

[0024] To support more data, the lead frame also includes a third independent terminal 16. The third independent terminal 16 includes a third base island 17 located inside the housing 1 and a third pin 18 extending outside the housing 1. The third base island 17 is fixedly connected to the copper-clad layer 11. The third base island 17 is connected to the copper-clad layer 11, and the first chip 3 and the second chip 4 are also connected to the copper-clad layer 11, thus realizing the connection between the third base island 17 and the first chip 3 and the second chip 4. The third independent terminal 16 can expand more signal paths and improve the functional expandability of the chip package structure. At the same time, the design of dual chips with three independent terminals will not increase the overall size of the package and can still maintain a compact structural design.

[0025] In this embodiment, the first pin 8, the second pin 10, and the third pin 18 are located on the same plane and arranged in parallel to each other. That is, the lead-out directions of the first pin 8, the second pin 10, and the third pin 18 are consistent. The overall pin arrangement is neat and can adapt to the conventional external circuit installation requirements. The third pin 18 is located between the first pin 8 and the second pin 10.

[0026] To ensure reliable installation of the third base island 17, the third base island 17 is in the shape of an inverted "mountain" character, and the middle vertical edge of the third base island 17 is connected to the third pin 18; the third base island 17 and the third pin 18 are connected by a third bend 19, which is located inside the housing 1. The third base island 17 is shaped like an inverted "mountain," meaning it extends to both sides, resulting in a larger contact area with the copper clad layer 11 and better contact performance. Simultaneously, the "mountain" shape securely holds the third independent terminal 16 within the housing 1, preventing it from detaching. The third pin 18 connects to the middle vertical edge of the "mountain," creating a symmetrical overall shape. The design of the third bend 19 facilitates adjustment of the installation position of the third base island 17, allowing it to better adhere to the copper clad layer 11 without requiring a large area of ​​flatness, thus reducing processing precision requirements. Furthermore, the bend structure buffers stress, reducing the risk of the third pin 18 being pulled by external forces, which could affect the connection between the third base island 17 and the copper clad layer 11, further improving the reliability of the chip packaging structure. The third bend 19 is located within the housing 1, ensuring a more reliable connection and reducing the risk of the third base island 17 detaching from the housing 1.

[0027] In this embodiment, the third bend 19 is located on the middle vertical edge of the third base island 17, that is, part of the vertical edge of the "mountain" shape bends outward to form the third bend 19.

[0028] To ensure reliable installation of the first base island 7, the width of the upper part of the first base island 7 is smaller than the width of the lower part of the first base island 7; for example... Figure 3 As shown, the first base island 7 and the first pin 8 are connected by a first bending portion 20, which is located inside the housing 1. The structure of the first base island 7, which is narrower at the top and wider at the bottom, facilitates material filling and distribution when the housing 1 is integrally molded with epoxy resin. This improves the firmness of the connection between the first base island 7 and the housing 1 and reduces the possibility of the first base island 7 shifting or detaching. The design of the first bending portion 20 facilitates the adjustment of the installation position of the first base island 7, allowing it to better fit with the copper clad layer 11 without needing to maintain a large area of ​​flatness, thus reducing the processing precision requirements. At the same time, the bending structure can also buffer stress, reducing the risk that the connection between the first base island 7 and the copper clad layer 11 will be affected when the first pin 8 is pulled by external force, further improving the reliability of the chip packaging structure. The first bending portion 20 is located inside the housing 1, making the connection with the housing 1 more reliable and reducing the risk of the first base island 7 detaching from the housing 1.

[0029] To ensure reliable installation of the second base island 9, the upper width of the second base island 9 is smaller than the lower width. The second base island 9 is connected to the second pin 10 via a second bend 21, which is located inside the housing 1. The upper-narrower-lower-wider structure of the second base island 9 facilitates material distribution when the housing 1 is integrally molded with epoxy resin, improving the firmness of the connection between the second base island 9 and the housing 1 and reducing the possibility of displacement or detachment. The design of the second bend 21 facilitates adjustment of the installation position of the second base island 9, allowing it to better fit with the copper clad layer 11 without requiring large-area flatness, thus reducing processing precision requirements. At the same time, the bend structure can also buffer stress, reducing the risk of the connection between the second base island 9 and the copper clad layer 11 being affected when the second pin 10 is pulled by external force, further improving the reliability of the chip packaging structure. The second bend 21 is located inside the housing 1, making the connection with the housing 1 more reliable and reducing the risk of the second base island 9 detaching from the housing 1.

[0030] To ensure the structural reliability of the DBC board 2, copper-clad layers 11 are provided on both sides of the DBC board 2. The first chip 3, the second chip 4, the first base island 7, the second base island 9, and the third base island 17 are all located on the same side of the DBC board 2. The second base island 9 is located below the first chip 3, the second chip 4 is located between the first chip 3 and the first base island 7, and the third base island 17 is located below the first chip 3 and the second chip 4. The copper-clad layers 11 on both sides of the DBC board 2 can utilize the thermal conductivity of copper for auxiliary heat dissipation, improve the overall heat dissipation effect, and further ensure the stability of the chip packaging structure during long-term operation. The concentration of the first chip 3, the second chip 4, the first base island 7, the second base island 9, and the third base island 17 on the same side of the DBC board 2 facilitates assembly, achieves high integration, and the staggered arrangement can fully utilize the space on one side of the DBC board 2, reducing the overall volume of the chip packaging structure. Gaps can be left between the first chip 3, the second chip 4, the first base island 7, the second base island 9, and the third base island 17 to facilitate installation and prevent mutual interference.

[0031] To ensure the independence of the first base island 7 and the second base island 9, the copper-clad layer 11 is provided with a first separating groove 22 for separating the first base island 7 and a second separating groove 23 for separating the second base island 9. The design of the first separating groove 22 can achieve electrical isolation of the first base island 7, preventing the first base island 7 from being directly connected to the first chip 3, the second chip 4, the second base island 9, and the third base island 17 through the copper-clad layer 11, preventing current crosstalk, ensuring the stability of the electrical signal when the first base island 7 and the first chip 3 are working, and not interfering with the normal operation of the circuit. The design of the second separating groove 23 can achieve electrical isolation of the second base island 9, preventing the second base island 9 from being directly connected to the first chip 3, the second chip 4, the first base island 7, and the third base island 17 through the copper-clad layer 11, preventing current crosstalk, ensuring the stability of the electrical signal when the second base island 9 and the first chip 3 are working, and not interfering with the normal operation of the circuit.

[0032] In this embodiment, the first base island 7 is located at the lower right corner of the DBC board 2. The first partition groove 22 only needs to separate the left side and top of the first base island 7. The right side and bottom of the first base island 7 are the edges of the copper cladding layer 11 and are not connected to the outside world. Therefore, the first partition groove 22 can be omitted, and the arrangement of the first partition groove 22 is simpler. The second base island 9 is located at the lower left corner of the DBC board 2. The second partition groove 23 only needs to separate the right side and top of the second base island 9. The left side and bottom of the second base island 9 are the edges of the copper cladding layer 11 and are not connected to the outside world. Therefore, the second partition groove 23 can be omitted, and the arrangement of the second partition groove 23 is simpler.

[0033] To fully utilize the space of the DBC board 2, both the first base island 7 and the second base island 9 are elongated; the length of the first base island 7 is greater than the length of the second base island 9. The elongated shape of the first base island 7 allows the third connecting line 14 and the first connecting line 12 to be arranged vertically on the first base island 7. That is, the third connecting line 14 and the first connecting line 12 are arranged sequentially from top to bottom on the first base island 7, and the connecting lines do not intersect, making the connection sequence simple and clear.

[0034] In this embodiment, the top of the first base island 7 is higher than the bottom of the second chip 4, and the top of the first base island 7 is lower than the middle of the second chip 4. Compared with the vertical arrangement of the first base island 7 and the second chip 4, the vertical arrangement increases the height more, while the horizontal arrangement of the first base island 7 and the second chip 4 increases the width less, and can increase the arrangement space for the third base island 17, resulting in a compact overall structure.

[0035] In this embodiment, the side of the first bending portion 20 closest to the second chip 4 is a bevel, and the width of the first bending portion 20 gradually increases from top to bottom. Both sides of the second bending portion 21 are bevels and are arranged symmetrically relative to the second bending portion 21, and the width of the second bending portion 21 gradually increases from top to bottom.

[0036] To ensure a more secure fixation of the second base island 9 and the third base island 17, both the second base island 9 and the third base island 17 are provided with fixing holes 24. The design of the fixing holes 24 allows the injection molding compound to enter the fixing holes 24 during epoxy resin injection molding, further strengthening the connection between the housing 1 and the second base island 9 and the third base island 17, and reducing the risk of the second independent terminal 6 and the third independent terminal 16 coming loose under tension.

[0037] In this embodiment, the fixing hole 24 of the second base island 9 is located on the second bending portion 21, and the fixing hole 24 of the third base island 17 is located on the third bending portion 19.

[0038] For ease of assembly, the upper parts of the first independent terminal 5, the second independent terminal 6, and the third independent terminal 16 are laterally connected and fixed by a central rib 25, and the bottom parts of the first independent terminal 5, the second independent terminal 6, and the third independent terminal 16 are laterally connected and fixed by a bottom rib 26. The design of the central rib 25 makes the first independent terminal 5, the second independent terminal 6, and the third independent terminal 16 a single unit, thus ensuring that the distance between them remains constant. When assembling the first base island 7, the second base island 9, and the third base island 17 onto the DBC board 2, it is not necessary to place the independent terminals one by one; the three independent terminals can be placed directly at once, improving assembly efficiency and reducing assembly difficulty. The design of the bottom rib 26 connects the tail ends of the first pin 8, the second pin 10, and the third pin 18 together, ensuring the reliability of the distance between the first independent terminal 5, the second independent terminal 6, and the third independent terminal 16. At the same time, the bottom rib 26 protects the tail ends of the first pin 8, the second pin 10, and the third pin 18.

[0039] When using or selling chip packaging structures, it is necessary to cut the ribs, which means cutting off the middle rib 25 and the bottom rib 26.

[0040] In this embodiment, the top of the DBC board 2 is provided with an inwardly recessed arc-shaped groove 27, and a third partition groove 28 is provided below the arc-shaped groove 27. The housing 1 is provided with a through hole 29, which is arranged concentrically with the arc-shaped groove 27. The design of the third partition groove 28 makes the copper-clad layer 11 where the first chip 3 and the second chip 4 are located more regularly shaped.

[0041] The DBC board 2 has a width of 14mm, the copper cladding layer 11 has a width of 13mm, the length of the DBC board 2 is 13.8mm, and the length of the copper cladding layer 11 is 13.2mm. The area of ​​the copper cladding layer 11 is greater than 80% of the area of ​​both sides of the DBC board 2, ensuring heat dissipation. The length of the first base island 7 is 5.47mm, the width of the first base island 7 is 1.63mm, the length of the second base island 9 is 1.37mm, and the width of the second base island 9 is 1.4mm. The first base island 7 is relatively long, providing installation positions for multiple connection cables. The minimum distance between the third base island 17 and the first base island 7 is 1.27mm, and the minimum distance between the third base island 17 and the second base island 9 is also 1.27mm. That is, the minimum distance between the third base island 17 and the first base island 7 and the second base island 9 is the same, they are neatly arranged, and the third base island 17 has the same isolation effect relative to the first base island 7 and the second base island 9 on both sides.

[0042] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Although the present invention has been disclosed above with reference to preferred embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications or alterations to the above-disclosed technical content to create equivalent embodiments without departing from the scope of the present invention. Any simple modifications, equivalent changes and alterations made to the above embodiments based on the technical essence of the present invention without departing from the scope of the present invention shall still fall within the scope of the present invention.

Claims

1. A chip packaging structure, characterized in that, The device includes a housing (1) and a lead frame, a DBC board (2), a first chip (3), and a second chip (4) encapsulated within the housing (1). The lead frame includes a first independent terminal (5) and a second independent terminal (6). The first independent terminal (5) includes a first base island (7) located within the housing (1) and a first pin (8) extending outside the housing (1). The second independent terminal (6) includes a second base island (9) located within the housing (1) and a second pin (10) extending outside the housing (1). At least one side of the DBC board (2) is provided with a copper-clad layer (11). The first chip (3) and the second chip (4) are both fixedly connected to the copper-clad layer (11). The first base island (7) and the second base island (9) are both fixedly connected to the copper-clad layer (11). The first chip (3) is connected to the first base island (7) by the first connecting line (12), the first chip (3) and the second chip (4) are connected by the second connecting line (13), the second chip (4) and the first base island (7) are connected by the third connecting line (14), and the first chip (3) and the second base island (9) are connected by the fourth connecting line (15). The first base island (7) is vertically elongated, and the third connecting line (14) and the first connecting line (12) are arranged sequentially along the length of the first base island (7). Copper cladding (11) is provided on both the front and back sides of the DBC board (2), and the first chip (3), the second chip (4), the first base island (7) and the second base island (9) are all located on the same side.

2. The chip packaging structure according to claim 1, characterized in that, The lead frame also includes a third independent terminal (16), which includes a third base island (17) located inside the housing (1) and a third pin (18) extending out of the housing (1). The third base island (17) is fixedly connected to the copper cladding layer (11).

3. The chip packaging structure according to claim 2, characterized in that, The third base island (17) is in the shape of an inverted "mountain" character. The middle vertical edge of the third base island (17) is connected to the third pin (18). The third base island (17) and the third pin (18) are connected by a third bend (19), which is located inside the housing (1).

4. The chip packaging structure according to claim 1, characterized in that, The width of the upper part of the first base island (7) is smaller than the width of the lower part of the first base island (7); the first base island (7) and the first pin (8) are connected by a first bend (20), and the first bend (20) is located inside the housing (1).

5. A chip packaging structure according to claim 1, characterized in that, The width of the upper part of the second base island (9) is smaller than the width of the lower part of the second base island (9); the second base island (9) and the second pin (10) are connected by a second bend (21), which is located inside the housing (1).

6. A chip packaging structure according to claim 1, characterized in that, The second base island (9) is located below the first chip (3), and the second chip (4) is located between the first chip (3) and the first base island (7).

7. A chip packaging structure according to claim 6, characterized in that, The copper clad layer (11) is provided with a first partition groove (22) for separating the first base island (7) and a second partition groove (23) for separating the second base island (9).

8. A chip packaging structure according to claim 6, characterized in that, The second base island (9) is elongated; the length of the first base island (7) is greater than the length of the second base island (9).

9. A chip packaging structure according to claim 2, characterized in that, The second base island (9) and the third base island (17) are both provided with fixing holes (24).

10. A chip packaging structure according to claim 2, characterized in that, The upper parts of the first independent terminal (5), the second independent terminal (6) and the third independent terminal (16) are horizontally connected and fixed by the middle rib (25), and the bottom of the first independent terminal (5), the second independent terminal (6) and the third independent terminal (16) are horizontally connected and fixed by the bottom rib (26).

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