Microelectronic package with mixed connection to substrate for reuse
Patent Information
- Application Number
- CN202610278264.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2025-04-07
- Filing Date
- 2026-03-09
- Publication Date
- 2026-10-16
Smart Images

Figure CN122935316A_ABST
Abstract
Description
Technical Field
[0001] This disclosure generally relates to semiconductor packaging, and more specifically to a microelectronic package that is hybridly connected to a substrate (e.g., a printed circuit board) to achieve mechanical and electrical coupling and subsequent separation for reuse. Background Technology
[0002] In certain types of semiconductor device packages, the semiconductor device die contacts can be electrically and mechanically coupled to interconnects on the package substrate, such as contact pads on a printed circuit board (PCB). Conventional methods for coupling the semiconductor device die to the substrate involve a solder reflow soldering operation on the contacts to the interconnects on the package substrate using solder bumps or solder tip metal pillars formed on the contacts of the semiconductor device die. This solder reflow soldering operation involves heating the contact area to a temperature sufficient to allow solder to flow. Summary of the Invention
[0003] According to one aspect of this application, a method is provided comprising: providing a circuit board (202) including an active surface, the active surface including one or more protrusions (204), each protrusion being formed of a first material having a first melting temperature; coating each of the one or more protrusions with a second material (214) having a second melting temperature lower than the first melting temperature; pressing a semiconductor device die (222) onto the circuit board to form a circuit assembly, the semiconductor device die including one or more cavities (224) aligned with the one or more protrusions, each cavity being plated with a third material (228) having a third melting temperature higher than the second melting temperature; and heating the circuit assembly at a selected temperature higher than or equal to the second melting temperature and lower than the first melting temperature and the third melting temperature to reflow solder the second material, thereby forming an intermetallic connection between the circuit board and the semiconductor device die to form a circuit device.
[0004] According to one or more embodiments, the first material includes at least one of the following: copper, gold, tin, nickel, palladium, aluminum, and a copper alloy plated with one or more of nickel, palladium, gold, and tin.
[0005] According to one or more embodiments, the second material includes at least one of gallium, indium, and bismuth.
[0006] According to one or more embodiments, the third material includes at least one of the following: copper, gold, tin, nickel, palladium, aluminum, and a copper alloy plated with one or more of nickel, palladium, gold, and tin.
[0007] According to one or more embodiments, the first melting temperature and the third melting temperature are higher than 200 degrees Celsius.
[0008] According to one or more embodiments, the second melting temperature is in the range of 100 degrees Celsius to 200 degrees Celsius.
[0009] According to one or more embodiments, at a later time, the method includes: applying localized heat to the interface between the circuit substrate of the circuit device and the semiconductor device die; and applying mechanical force to separate the semiconductor device die from the circuit substrate.
[0010] According to one or more embodiments, the method further includes pressing the semiconductor device die onto a second circuit substrate to form a second circuit assembly.
[0011] According to one or more embodiments, providing the circuit board includes: forming the circuit board, the circuit board including a first surface having a plurality of contact pads (206); and forming the one or more protrusions, each protrusion being formed on one of the plurality of contact pads.
[0012] According to one or more embodiments, each protrusion includes: a first portion including a proximal end coupled to the active surface and including a distal end; and a second portion coupled to the distal end of the first portion.
[0013] According to one or more embodiments, the first portion has a first shape, which includes one of a conical shape, a cylindrical shape, a rectangular shape, a circular shape, and a pyramidal shape; and the second portion has a second shape smaller than the first shape.
[0014] According to one or more embodiments, the method further includes: forming the one or more cavities in a first surface of the semiconductor device die; and coating each of the one or more cavities with the third material.
[0015] According to a second aspect of this application, a circuit device is provided, comprising: a circuit substrate (202) including an active surface, the active surface including one or more protrusions (204), each protrusion being formed of a first material having a first melting temperature; a second material (214) coated on each of the one or more protrusions, the second material having a second melting temperature lower than the first melting temperature; a semiconductor device die (222) including one or more cavities (224), each cavity being plated with a third material (228), the third material (228) having a third melting temperature higher than the second melting temperature, the semiconductor device being coupled to the one or more protrusions via an intermetallic connection formed by reflow soldering of the second material; wherein the second melting temperature is in a first range of 100 degrees Celsius to 200 degrees Celsius; and wherein the first melting temperature is higher than 200 degrees Celsius.
[0016] According to one or more embodiments, the first material and the third material are selected from the group consisting of copper, gold, tin, nickel, palladium, aluminum, and copper alloys plated with one or more of nickel, palladium, gold, and tin; and the second material is selected from the group consisting of gallium, indium, and bismuth.
[0017] According to one or more embodiments, each of the cavities is sized to accommodate one of the protrusions. Attached Figure Description
[0018] Specific embodiments are illustrated with reference to the accompanying drawings. In each drawing, the leftmost digit of the reference numeral indicates the drawing in which the reference numeral first appears. The use of the same reference numeral in different drawings and specific embodiments indicates similar or identical items or features.
[0019] Figure 1 A flowchart depicting a method for coupling a semiconductor device die to a circuit board according to certain embodiments.
[0020] Figure 2A The process for forming a circuit board according to certain embodiments is described, the circuit board including conductive protrusions formed of a first metal having a first melting temperature and coated with a second metal having a second melting temperature.
[0021] Figure 2B The process for providing a semiconductor device die according to certain embodiments is described, the semiconductor device die including a cavity sized to accommodate conductive protrusions of a circuit board.
[0022] Figure 3 The process of mechanically and electrically coupling a semiconductor device die to a circuit board according to certain embodiments is described.
[0023] Figure 4A flowchart depicts a method for mechanically decoupling and electrically decoupling a semiconductor device die from a circuit board according to certain embodiments.
[0024] Figure 5 The process of mechanically decoupling and electrically decoupling a semiconductor device die from a circuit board using heat and force, according to certain embodiments, is described.
[0025] While embodiments have been described by way of example in this disclosure, those skilled in the art will recognize that embodiments are not limited to the described examples or figures. In fact, the figures and their detailed description are not intended to limit embodiments to the disclosed form, but rather to cover all modifications, equivalents, and alternatives falling within the spirit and scope defined by the appended claims. The headings used in this disclosure are for organizational purposes only and are not intended to limit the scope of the specification or claims. As used throughout this application, the word “may” is used in a permissible sense (in other words, the term “may” is intended to mean “possibly”) rather than in a mandatory sense (such as “must”). Similarly, the term “include / including / includes” means including but not limited to. Detailed Implementation
[0026] Reflow soldering processes for lead-free solder bumps and solder tip pillars are known to cause dielectric delamination beneath the bumps or pillars, likely due to the difference in thermal expansion coefficients between the semiconductor die material and the circuit board material. During the solder reflow process, localized heating is used to melt and reflow the solder, and high stress may subsequently occur in the interconnect regions, leading to delamination. Even when the reflow process does not cause this delamination, subsequent heating to remove the semiconductor die from the circuit board can cause it, as well as other damage to the semiconductor die, circuit board, or both.
[0027] The following describes embodiments of methods for electrically and mechanically coupling a semiconductor device die to a circuit board, achieving reversible coupling in microelectronic packaging. In one or more embodiments, the method utilizes a hybrid connection between the semiconductor device package and a circuit board (e.g., a PCB), employing a mechanical "click-fit" type connection to combine a soft metal-to-metal connection between the plated leads of the semiconductor device die and protrusions (posts) on the circuit board. Figures 1 to 5In the following discussion, methods and processes are described with respect to QFN (Quad Flat No Leads) packages; however, these methods and processes are not limited to leadless packages. The methods and processes can be similarly applied to leaded packages, such as QFP (Quad Flat Package) devices, SO (Small Outline) devices, and other types of packages to be coupled to a circuit board. In other embodiments, the methods and processes can be applied to Ball Grid Array (BGA) packages and bump packages, where cavities can be added to copper traces or redistribution layers (RDLs) instead of solder balls.
[0028] Figure 1 A flowchart depicts a method 100 for coupling a semiconductor device die to a circuit board according to certain embodiments. At 102, method 100 may include forming a circuit board including a surface that includes one or more contact pads. The circuit board may be a lead frame, a printed circuit board (PCB), a semiconductor device die, or another substrate.
[0029] At 104, method 100 may include forming one or more protrusions from a first conductive material, the one or more protrusions corresponding to and extending from the one or more contact pads on the surface of a circuit board. In one or more embodiments, the protrusions (sometimes referred to as “pillars” or “supports”) may be formed on the circuit board by plating, machining, or other processes known in the art. The first conductive material may be selected from copper alloys plated with one or more of nickel (Ni), palladium (Pd), gold (Au), and tin (Sn); aluminum (Al); solder; or other conductive materials having a melting temperature above 200 degrees Celsius. In one or more embodiments, the protrusions may have a cylindrical shape, a pyramidal shape, a semi-circular shape, a rectangular shape, or another shape. In one or more embodiments, each protrusion may include a first portion having a first shape having a proximal end coupled to one of the contact pads and a distal end, and each protrusion may include a second portion having a circular shape, the second portion being coupled to or formed on the distal end of the protrusion.
[0030] At position 106, method 100 may include coating each protrusion with a thin plating layer of a second conductive material, the second conductive material being selected to have a second melting temperature below 200°C. The second conductive material may be gallium (Ga), bismuth (Bi), indium (In), or another conductive material having a melting temperature in the range of 100°C to 200°C. The thickness of the plating layer may vary depending on the embodiment. In one or more embodiments, process optimization may be used to define an optimal combination of fit tolerances, plating thickness, and shape. In one or more embodiments, the environment in which the circuit device to be used may also be considered.
[0031] At point 108, method 100 may include selecting a circuit package having a plurality of cavities corresponding to the plurality of protrusions, each cavity being plated with a third material (e.g., tin, nickel-palladium-gold, or another conductive material) having a third melting temperature higher than the second melting temperature. In one or more embodiments, the circuit package may be selected by a pick-and-place machine. In one or more embodiments, the third melting temperature of the plating within the cavity may be similar to the first melting temperature of the protrusions (e.g., above 200°C) and may be higher than the second melting temperature of the coating applied to the protrusions. Each cavity may have a size and shape selected to accommodate the corresponding protrusions on a circuit board (PCB) for mechanical and electrical connections.
[0032] At 110, method 100 may include pressing a circuit package onto the surface of a circuit board such that a cavity accommodates a protrusion. In one or more embodiments, the cavity of the circuit package may be aligned with the protrusion, and the circuit package may be pressed onto the protrusion.
[0033] At 112, method 100 may include applying heat at a selected temperature above or equal to a second melting temperature but below the first and third melting temperatures to reflow solder the second conductive material, thereby mechanically coupling the circuit package to the substrate. Heat may be applied at a relatively low temperature, yet sufficiently high to melt and reflow the second conductive material, followed by cooling to mechanically and electrically couple the circuit package to the circuit substrate. In one or more embodiments, after heating and reflow soldering the second conductive material, a mechanical bond is formed between the circuit package and the circuit substrate, the mechanical bond being strong enough to withstand intermediate mechanical loads or vibrations. Electrical connections may be reliably formed by a relatively low-temperature reflow soldering process that enables electromechanical bonding between the third conductive material and the second conductive material within the cavity of the circuit package.
[0034] The lower melting temperature of the second conductive material allows for reflow soldering coupling of the circuit package to the circuit board at temperatures that do not apply thermal stress to areas of electrical connection and do not cause dielectric delamination. Furthermore, the lower melting temperature allows for the subsequent removal of the circuit package from the circuit board using both thermal and mechanical forces, enabling the circuit package to be recycled / reused with different circuit boards. Due to the increasing focus on more sustainable electronics, hybrid cryogenic electromechanical connections enabled by the second conductive material can facilitate the reuse, recycling, and repair of circuit packages. To enable the reuse of microelectronic packages (e.g., removing them from existing applications, such as removing them from PCBs used in relatively mission-critical systems (e.g., autonomous vehicles)) for remounting to different PCBs for use in less critical applications, the second conductive material allows for the attachment and subsequent removal of the circuit package without damaging the circuit board or the circuit package itself.
[0035] Through a relatively gentle heating process and the application of mechanical force (as described below) Figure 4 and Figure 5 (as discussed) to facilitate removal. The same methods used for the original connection (e.g., Figure 1 Method 100) involves reconnecting the separate circuit package to another PCB. This connection can be made on leads or die pads. In some cases, reprocessable thermal interface materials (TIMs) can be used to reduce thermal resistance at the interface with the circuit board.
[0036] In the following discussion, regarding Figures 2A to 3 An illustrative process flow is described. It should be understood that... Figures 2A to 3 The illustrations in this paper are for illustrative purposes only and are not drawn to scale. Representative dimensions are provided for illustrative purposes in the following discussion; however, it should be understood that the methods and processes described can be applied to different geometries.
[0037] Figure 2A The process 200 for forming a circuit board 202 according to certain embodiments is depicted. The circuit board 202 includes conductive protrusions 204 formed of a first conductive material having a first melting temperature and coated with a second conductive material 214 having a second melting temperature. In one or more embodiments, the circuit board 202 may include multiple layers, including dielectric layers and patterned metal layers (not shown). In an illustrative example, the circuit board 202 may include multiple protrusions 204 (posts or pillars) formed on metal contacts 206 on the surface of the circuit board 202. In one or more embodiments, the circuit board 202 may be a printed circuit board (PCB), a lead frame, or other substrate.
[0038] In the illustrated example, each protrusion 204 may include a first portion 208 and a second portion 210. The first portion 208 is depicted as having a cylindrical or rectangular shape (in the side view). In one or more embodiments, the first portion 208 may have a conical shape, a cylindrical shape, a rectangular shape, a circular shape, a pyramidal shape, or another shape. In one or more embodiments, the first portion 208 may have a proximal end coupled to one of the contact pads 206 and may also have a distal end.
[0039] The second portion 210 may be coupled to the distal end of the protrusion 204. In the illustrated embodiment, the second portion 210 may include a tapered shape, such as a conical shape. In other embodiments, the second portion 210 may have a conical shape, a rounded shape, a cylindrical shape, a rectangular shape, a circular shape, a pyramidal shape, or another shape. The second portion 210 may have or may taper to a narrower profile, or may otherwise be smaller than the first portion 208. In one or more embodiments, the second portion 210 may be narrower than the first portion 208 to facilitate the coupling of the protrusion 204 to a corresponding cavity formed in the semiconductor device die ( Figure 2B Align the cavity 224 in the middle.
[0040] Although the protrusion 204 in the illustrated example includes a first portion 208 and a second portion 210, in one or more embodiments, the second portion 210 may be omitted, and the first portion 208 may taper from a proximal end to a distal end. Other embodiments are also possible. In the illustrated example, the protrusion 204 is depicted as having a generally symmetrical shape to facilitate insertion of the protrusion 204 into a cavity in a semiconductor device die. In one or more other embodiments, the protrusion 204 may be at least slightly asymmetrical. Preferably, the distal end (the end of the protrusion 204 furthest from the surface of the circuit board 202) may be narrower than the proximal end to facilitate insertion of the protrusion 204 into a cavity.
[0041] As shown in the figure, a second conductive material 214 can be applied to the protrusion 204 using a plating process 212, as generally indicated at 212. The second conductive material 214 may include bismuth, indium, or another material with a melting temperature below 200°C. The plating process 212 can apply the second conductive material 214 as a thin layer over the protrusion 204, such that the increased thickness of the second conductive material 214 over the protrusion 204 still fits within the cavity of the circuit package.
[0042] Figure 2BA process 220 is depicted for providing a semiconductor device die 222 according to certain embodiments, the semiconductor device die 222 including a cavity 224 sized to accommodate conductive protrusions 204 of a circuit board 202. In one or more embodiments, the cavity 224 may be formed by laser, etching, or other mechanical or chemical processes. In one or more embodiments, the cavity 224 may be formed as part of a layer-by-layer metal / dielectric stack of the semiconductor device die 222. One or more of the cavities 224 may include conductive terminals, such as conductive terminals 225, configured to couple electrical signals to a metal layer (not shown) within the semiconductor device die 222. In one or more embodiments, one or more of the cavities 224 may include conductive terminals 225.
[0043] In one or more embodiments, cavity 224 may be plated with a third conductive material 228 by a plating process 226. The third conductive material 228 has a higher melting temperature than the second conductive material 214 applied to the protrusion 204 on the circuit board 202. The third conductive material 228 may include tin (Sn), nickel-palladium-gold (NiPdAu), copper (Cu), or other conductive materials having a melting temperature above 200°C. In one or more embodiments, the third conductive material 228 may be the same as or similar to the first conductive material that can form the protrusion 204. In the illustrated example, the third conductive material 228 may facilitate electrical connection to the conductive terminal 225 within cavity 224.
[0044] Figure 3 A process 300 is depicted for mechanically and electrically coupling a semiconductor device die 222 to a circuit board 202 to form a circuit device, according to certain embodiments. In the illustrated example, the semiconductor device die 222 may be picked up and placed 308 onto the circuit board 202. In one or more embodiments, the pick-and-place operation 308 may be performed by a machine. The cavity 224 of the semiconductor device die 222 may be aligned with a protrusion 204 having a second conductive material 214 applied as a coating. In one or more embodiments, a second portion 210 of the protrusion 204 may be narrower than a first portion 208 of the protrusion 204, which facilitates insertion of the protrusion 204 into the cavity 224. In one or more embodiments, the initial attachment may be a press-fit or a snap-fit.
[0045] In one or more embodiments, a reflow soldering process 310 may be applied, for example, by locally heating the second conductive material 214 to a melting temperature below the melting temperature of the protrusion 204. This local heating may be provided using a laser or other local heating source. The local heating causes the second conductive material to flow and form an intermetallic connection with the third conductive material 228 within the cavity 224 of the semiconductor device die 222, thereby producing a circuit assembly, generally indicated at 312.
[0046] In the illustrated example, the circuit assembly 312 is shown in cross-section to illustrate the electromechanical connection formed by the protrusions 204 and the cavity 224 securing the semiconductor device die 222 to the circuit board 202. In the illustrated example, the circuit board 202 and the semiconductor device die 222 are depicted in two dimensions; however, it should be understood that the circuit board 202 and the semiconductor device die 222 are three-dimensional objects. In one or more embodiments, the protrusions 204 may be arranged in a row. In one or more embodiments, the protrusions 204 may be distributed in an array. In the illustrated example, five protrusions 204 are depicted; however, the circuit board 202 may include any number of protrusions 204. Furthermore, although the circuit board 202 is shown as coupled to only one semiconductor device die 222, it should be understood that the circuit board 202 may support any number of semiconductor device dies 222 using the methods described herein.
[0047] In one or more embodiments, the localized heating is at a temperature corresponding to the melting temperature of the second conductive material 214, which is lower than the melting temperature of the protrusion 204 (the first conductive material) and lower than the melting temperature of the third conductive material 228, or lower than an intermediate temperature due to the presence of intermetallic compounds. Therefore, the mechanical and electrical coupling between the semiconductor device die 222 and the circuit board 202 is generated at a temperature that does not generate thermal stress relative to the dielectric material near the conductive ends within the semiconductor device die 222 or relative to the dielectric material near the protrusion 204 of the circuit board 202. Thus, thermal stress, which could otherwise lead to delamination, is avoided.
[0048] The relatively low melting temperature of the second conductive material 214 can facilitate intermetallic bonding with the plating material (third conductive material 228) within the cavity 224 of the semiconductor device die 222. Furthermore, the low melting temperature also allows for decoupling of the semiconductor device die 222 from the circuit board 202, thereby enabling the reuse of the semiconductor device die 222 with another circuit board.
[0049] Figure 4 A flowchart depicts a method 400 for mechanically and electrically decoupling a semiconductor device die from a circuit board according to certain embodiments. It should be understood that method 400 can be described in relation to... Figures 1 to 3 The described methods and processes are performed afterward, or relative to... Figures 1 to 3 The described methods and processes will be implemented at a later time.
[0050] At 402, method 400 may include a selection circuit device 312, the circuit device 312 including a semiconductor device die 222 coupled to a circuit substrate 202, the circuit substrate 202 including a protrusion 204 formed of a first material and coated with a second conductive material 214 having a melting temperature lower than the melting temperature of the first material, the semiconductor device die 222 including a cavity 224 plated with a third conductive material 228, wherein the second conductive material 214 forms an intermetallic connection between the protrusion 204 and an electrical terminal 225 within the cavity 224. The circuit device 312 may be... Figure 3 An embodiment of the circuit assembly 312 in the example.
[0051] At 404, method 400 may include locally heating a portion of the circuit arrangement 312 at a temperature equal to or higher than the melting temperature of the second material 214 and lower than the melting temperatures of the first and third materials to reflow solder the second material 214. In one embodiment, the local heating may be performed at a temperature between 100°C and 200°C, while the melting temperatures of the first and third materials may be higher than 200°C. In one or more embodiments, the local heating may be performed at the interface between the semiconductor device die 222 and the circuit board 202.
[0052] At 406, method 400 may include separating the semiconductor device die 222 from the circuit board 202 by applying mechanical force. The applied mechanical force, combined with localized heating, may separate the semiconductor device die 222 from the circuit board 202.
[0053] At 408, method 400 can selectively reuse the semiconductor device die 222 by reattaching it to the second circuit board 408. In one or more embodiments, the detached semiconductor device die 222 can use the methods described above. Figures 1 to 3 The described process is connected to different circuit boards or printed circuit boards including protrusions 204 and a second material 214.
[0054] Due to the electromechanical interference fit, deformation of the softer, lower-melting-temperature material (second conductive material 214) does not cause any problems during reassembly and reattachment to the new circuit board 202. In contrast to solder typically used to couple semiconductor die 222 to circuit board 202 and having a melting temperature between 230°C and 260°C, the second conductive material 214 can have a melting temperature below 200°C, allowing the semiconductor die 222 to remelt and separate at a temperature lower than the melting temperature of other conductive metal connections.
[0055] Figure 5A process 500 is described, according to certain embodiments, for the mechanical and electrical decoupling of a semiconductor device 222 die from a circuit board 202 using heat and force. Process 500 includes a selected circuit device (circuit assembly) 312, said selected circuit device 312 including a semiconductor device die 222 coupled to the circuit board 202.
[0056] At point 502, heat and mechanical force are applied. The heat may be localized heat at the interface between the conductive circuit board 202 and the semiconductor device die 222. Simultaneously with the application of localized heat, mechanical force may be applied to separate the circuit die 222 from the circuit board 202. Once the localized heating has melted or otherwise weakened the intermetallic connection between the second conductive material and one or more of the protrusion 204 or plating (the third conductive material 228 within the cavity 224), the mechanical force can separate the semiconductor device die 222 from the circuit board 202 at point 504. The separated semiconductor device die 222 can then be reused and recycled.
[0057] In one or more embodiments, the detached semiconductor device die 222 can be coupled to different circuit boards 202 to form a new circuit assembly 312. The circuit board 202 detached from the semiconductor device die 222 can also be reused with different semiconductor device dies 222. In one or more embodiments, hybrid connectivity allows the semiconductor device die 222 to be replaced with an upgraded semiconductor device die. Furthermore, the removed semiconductor device die 222 can be used with different circuit boards 202.
[0058] Therefore, hybrid connections enable more sustainable electronics by allowing for the repair, recycling, and reuse of semiconductor devices. In one or more embodiments, the semiconductor device die 222 can be removed from existing applications, such as from printed circuit boards (PCBs) used in critical applications (e.g., autonomous vehicle functions), and reinstalled for reuse in less critical applications. Thus, the semiconductor device die 222 can be attached to and subsequently removed from the PCB without damaging the semiconductor device die 222 or the circuit board 202, because the localized heat used for separation is at a low temperature relative to other metal traces (e.g., the contact pads 206 of the circuit board 202). The removed semiconductor device die 222 can be easily reconnected to another PCB using the same method 100 as the original connection.
[0059] exist Figures 1 to 5In the above discussion, the semiconductor device die 222 is described as a square flat leadless package, which is coupled to the circuit board 202 by a low-temperature intermetallic connection between plated leads within the cavity 224 of the package and the protrusion 204 of the circuit board 202 using a snap-fit or press-fit type connection. However, the methods and processes described herein can also be used for packages with leads, such as leaded square flat packages, small outline packages, or other circuit device packages.
[0060] Combining the above about Figures 1 to 5 The described process and method, a method of forming a circuit device 312, may include: forming a circuit substrate 202, the circuit substrate 202 including a plurality of protrusions 204 (pillars or posts) formed of a first material having a first melting temperature; and coating each of the protrusions 204 with a second material 214 having a second melting temperature lower than the first melting temperature. The method may include plating cavities 224 in the surface of a semiconductor device die 222 with a third material 228 having a third melting temperature higher than the second melting temperature. The method may include aligning the cavities 204 of the semiconductor device die 222 with the protrusions 204 of the circuit substrate 202 and pressing or snapping them together. The method may include locally heating at least one of the interfaces between the semiconductor device die 222 and the circuit substrate 202 and the protrusions 204 at a selected temperature higher than or equal to the second melting temperature and lower than the first and third melting temperatures to reflow solder the second material, thereby forming an intermetallic connection between the semiconductor device die 222 and the circuit substrate 202.
[0061] In one or more embodiments, the semiconductor device die 222 can be separated from the circuit board 202 by applying localized heat and mechanical force to disconnect the intermetallic connection without damaging the semiconductor device die 222 or the circuit board 202. The separated semiconductor device die 222 can then be reused and recycled with different circuit boards using the processes described above to create new circuit devices.
[0062] In one or more embodiments, the above regarding Figures 1 to 5 The described methods and processes involve replacing solder connections of conventional circuit devices with mechanical interlocks to mount a packaged active device (semiconductor device die 222) on top of a circuit board 202 (chip-to-board connection). Conventional solder joints and other types of attachments (e.g., direct attachment (DA)) are replaced by mechanical connection joints and low-temperature conductive materials (e.g., low-temperature solder) to achieve reliable current connections. According to the embodiments described herein, the packaged device (e.g., semiconductor device die 222) can be removed from the PCB (circuit board 202) and ultimately reused in other applications. This disclosure can be further understood from the following examples.
[0063] Example 1: A method comprising: providing a circuit board including an active surface, the active surface including one or more protrusions, each protrusion being formed of a first material having a first melting temperature; coating each of the one or more protrusions with a second material having a second melting temperature lower than the first melting temperature; pressing a semiconductor device die onto the circuit board to form a circuit assembly, the semiconductor device die including one or more cavities aligned with the one or more protrusions, each cavity being plated with a third material having a third melting temperature higher than the second melting temperature; and heating the circuit assembly at a selected temperature higher than or equal to the second melting temperature and lower than the first and third melting temperatures to reflow solder the second material, thereby forming an intermetallic connection between the circuit board and the semiconductor device die to form a circuit device.
[0064] Example 2: The method according to Example 1, wherein the first material comprises at least one of the following: copper, gold, tin, nickel, palladium, aluminum, and a copper alloy plated with one or more of nickel, palladium, gold and tin.
[0065] Example 3: The method according to any of the preceding examples, wherein the second material comprises at least one of gallium, indium and bismuth.
[0066] Example 4: The method according to any of the preceding examples, wherein the third material comprises at least one of the following: copper, gold, tin, nickel, palladium, aluminum, and a copper alloy plated with one or more of nickel, palladium, gold and tin.
[0067] Example 5: The method described in any of the preceding examples, wherein the first melting temperature and the third melting temperature are above 200 degrees Celsius.
[0068] Example 6: The method described in any of the preceding examples, wherein the second melting temperature is in the range of 100 to 200 degrees Celsius.
[0069] Example 7: The method according to any of the preceding examples, wherein at a later time, the method includes: applying localized heat to the interface between the circuit board and the semiconductor device die of the circuit arrangement; and applying mechanical force to separate the semiconductor device die from the circuit board.
[0070] Example 8: The method according to Example 7 further includes pressing a semiconductor device die onto a second circuit substrate to form a second circuit assembly.
[0071] Example 9: The method according to any of the preceding examples, wherein providing a circuit board includes: forming a circuit board including a first surface having a plurality of contact pads; and forming the one or more protrusions, each protrusion being formed on one of the plurality of contact pads.
[0072] Example 10: The method according to any of the preceding examples, wherein each protrusion includes: a first portion including a proximal end coupled to an active surface and including a distal end; and a second portion coupled to the distal end of the first portion.
[0073] Example 11: The method described in Example 10, wherein the first part has a first shape and the second part has a second shape.
[0074] Example 12: According to the method described in Example 11, the first shape has one of a conical shape, a cylindrical shape, a rectangular shape, a circular shape, and a pyramidal shape; and the second shape has a hemispherical shape.
[0075] Example 13: The method described in Example 11, wherein the second shape is smaller than the first shape.
[0076] Example 14: The method according to any of the preceding examples further includes forming the one or more cavities in a first surface of a semiconductor device die; and coating each of the one or more cavities with a third material.
[0077] Example 15: A circuit device comprising a circuit substrate including an active surface including one or more protrusions, each protrusion being formed of a first material having a first melting temperature; a second material coated on each of the one or more protrusions, the second material having a second melting temperature below the first melting temperature; a semiconductor device die including one or more cavities, each cavity being plated with a third material having a third melting temperature above the second melting temperature, the semiconductor device being coupled to the one or more protrusions via an intermetallic connection formed by reflow soldering of the second material; wherein the second melting temperature is in a first range of 100 degrees Celsius to 200 degrees Celsius; and wherein the first melting temperature is above 200 degrees Celsius.
[0078] Example 16: The circuit device according to Example 15, wherein the first material and the third material are selected from the group consisting of copper, gold, tin, nickel, palladium, aluminum, and copper alloys plated with one or more of nickel, palladium, gold and tin; and the second material is selected from the group consisting of gallium, indium and bismuth.
[0079] Example 17: The circuit device according to Example 15, wherein each of the cavities is sized to accommodate one of the protrusions.
[0080] Example 18: A method comprising: providing a circuit board including an active surface, the active surface including one or more protrusions, each protrusion being formed of a first material having a first melting temperature; coating each of the one or more protrusions with a second material having a second melting temperature below the first melting temperature; pressing a semiconductor device die onto the circuit board to form a circuit assembly, the semiconductor device die including one or more cavities aligned with and sized to receive the one or more protrusions, each cavity being plated with a third material having a second melting temperature above the second melting temperature. The circuit assembly is heated at a selected temperature above or equal to the second melting temperature and below the first and third melting temperatures to reflow solder the second material, thereby forming an intermetallic connection between the circuit board and the semiconductor device die to form a circuit device; wherein the first material is selected from the group consisting of copper, gold, tin, nickel, palladium, aluminum, and copper alloys plated with one or more of nickel, palladium, gold, and tin; the second material is selected from the group consisting of gallium, indium, and bismuth; and the third material is selected from the group consisting of copper, gold, tin, nickel, palladium, aluminum, and copper alloys plated with one or more of nickel, palladium, gold, and tin.
[0081] Example 19: The method described in Example 18, wherein the first melting temperature and the third melting temperature are above 200 degrees Celsius; and the second melting temperature is in the range of 100 degrees Celsius to 200 degrees Celsius.
[0082] Example 20: The method according to Example 18 or 19, wherein, at a later time, the method includes: applying localized heat to the interface between the circuit board and the semiconductor device die of the circuit arrangement; applying mechanical force to separate the semiconductor device die from the circuit board; and subsequently pressing the semiconductor device die onto a second circuit board to form a second circuit assembly.
[0083] The above-described embodiments are merely illustrative in nature and are not intended to limit the subject matter or the application and use of such embodiments. Furthermore, they are not intended to be construed as being bound by any express or implied theory presented in the foregoing technical field, background art, or specific embodiments.
[0084] The connecting lines shown in the figures contained herein represent exemplary functional relationships and / or physical couplings between various elements. It should be noted that many alternative or additional functional relationships or physical connections may exist in the embodiments of the subject matter. In addition, certain terms may be used herein for reference only and are therefore not intended to be limiting, and the terms “first,” “second,” and other such numerical terms referring to structures do not imply a sequence or order unless the context clearly indicates otherwise.
[0085] The above description refers to elements or features being "connected" or "coupled" together. As used herein, unless explicitly stated otherwise, "connected" means that one element is directly engaged to (or directly connected to) another element, and not necessarily mechanically. Similarly, unless explicitly stated otherwise, "coupled" means that one element is directly or indirectly engaged to (or directly or indirectly electrically connected to, or otherwise connected to) another element, and not necessarily mechanically. Therefore, although the schematic diagrams shown in the accompanying drawings depict an exemplary arrangement of elements, additional intermediate elements, devices, features, or components may be present in embodiments of the subjects depicted.
[0086] While at least one exemplary embodiment has been presented in the above detailed description, it should be understood that numerous variations exist. It should also be understood that the exemplary embodiments(s) described herein are not intended to limit the scope, applicability, or configuration of the claimed subject matter in any way. In fact, the above detailed description will provide a convenient guide for those skilled in the art to implement the described one or more embodiments. It should be understood that various changes can be made to the function and arrangement of the elements without departing from the scope defined by the claims.
Claims
1. A method, characterized in that, include: A circuit board (202) is provided, the circuit board (202) including an active surface, the active surface including one or more protrusions (204), each protrusion being formed of a first material having a first melting temperature; Each of the one or more protrusions is coated with a second material (214) having a second melting temperature lower than the first melting temperature; A semiconductor device die (222) is pressed onto the circuit board to form a circuit assembly. The semiconductor device die includes one or more cavities (224) aligned with the one or more protrusions. Each cavity is plated with a third material (228) having a third melting temperature higher than the second melting temperature. as well as The circuit assembly is heated at a selected temperature above or equal to the second melting temperature and below the first melting temperature and the third melting temperature to reflow solder the second material, thereby forming an intermetallic connection between the circuit substrate and the semiconductor device die to form a circuit device.
2. The method according to claim 1, characterized in that, The first material includes at least one of the following: copper, gold, tin, nickel, palladium, aluminum, and a copper alloy plated with one or more of nickel, palladium, gold, and tin.
3. The method according to claim 1, characterized in that, The second material includes at least one of gallium, indium, and bismuth.
4. The method according to claim 1, characterized in that, The third material includes at least one of the following: copper, gold, tin, nickel, palladium, aluminum, and a copper alloy plated with one or more of nickel, palladium, gold, and tin.
5. The method according to claim 1, characterized in that, The first melting temperature and the third melting temperature are both above 200 degrees Celsius.
6. The method according to claim 1, characterized in that, The second melting temperature is in the range of 100 to 200 degrees Celsius.
7. The method according to claim 1, characterized in that, At a later time, the method includes: Applying localized heat to the interface between the circuit substrate of the circuit device and the semiconductor device die; and Mechanical force is applied to separate the semiconductor device die from the circuit board.
8. A circuit device, characterized in that, include: A circuit board (202) includes an active surface, the active surface including one or more protrusions (204), each protrusion being formed of a first material having a first melting temperature; A second material (214) is coated on each of the one or more protrusions, the second material having a second melting temperature lower than the first melting temperature; A semiconductor device die (222) includes one or more cavities (224), each cavity being plated with a third material (228) having a third melting temperature higher than the second melting temperature, the semiconductor device being coupled to the one or more protrusions via an intermetallic connection formed by reflow soldering of the second material; Wherein the second melting temperature is within the first range of 100 degrees Celsius to 200 degrees Celsius; and The first melting temperature is higher than 200 degrees Celsius.
9. The circuit device according to claim 8, characterized in that: The first material and the third material are selected from the group consisting of: copper, gold, tin, nickel, palladium, aluminum, and copper alloys plated with one or more of nickel, palladium, gold, and tin; and The second material is selected from the group consisting of gallium, indium, and bismuth.
10. The circuit device according to claim 8, characterized in that, Each of the cavities is sized to accommodate one of the protrusions.