Method for manufacturing a multilayer structure

Abstract

The manufacturing method of the multilayer structure of the present application has: a first epitaxial film forming step of forming a first layer oriented to a (100) plane by sputtering on a (100) plane of a silicon substrate; a second epitaxial film forming step of forming a second layer of Pt oriented to the (100) plane by sputtering on the first layer; and a third epitaxial film forming step of forming a third layer oriented to the (100) plane by sputtering on the second layer.

Description

Technical Field

[0001] This invention relates to a method for manufacturing multilayer structures.

[0002] This application claims priority based on Japanese Patent Application No. 2025-017080 filed on February 4, 2025, the contents of which are incorporated herein by reference. Background Technology

[0003] Pure zirconium oxide (Pure-ZrO2) typically has a monoclinic crystal structure. To obtain a cubic crystal structure, yttrium-stabilized zirconium oxide (YSZ) is required.

[0004] Patent Document 1 describes a technique for growing cubic films using YSZ. In the disclosure of Patent Document 1, in order to grow Pt or SrRuO3 onto the (100) plane on the YSZ layer, a cerium oxide (CeO2) film is inserted between ZrO2 and the upper layer, rotated 45°, and then combined with Si... <110> Epitaxial growth is carried out in parallel directions.

[0005] Patent document 2 describes how, by using ZrO2 without using CeO2, Pt can be oriented toward the (100) plane and interact with Si. <100> The content of parallel epitaxial growth.

[0006] Patent Document 1: Japanese Patent Application Publication No. 2005-005450

[0007] Patent Document 2: US Patent No. 11,785,854

[0008] However, the technology disclosed in Patent Document 1 is not preferred as a mass production technology due to the increased number of layers.

[0009] Furthermore, in the technology disclosed in Patent Document 2, ZrO2 typically has a monoclinic crystal structure and a kinetic energy of 10... -1 eV~10 -2 Compared to vapor deposition, sputtering involves higher kinetic energy, at 10 eV. 2 eV~10 3 eV. Therefore, strain is easily generated in the film, making it difficult to obtain cubic crystals from pure zirconium oxide (Pure-ZrO2). In the technology disclosed in Patent Document 2, two different chambers are required for evaporation and sputtering, which is therefore not preferred. Summary of the Invention

[0010] The present invention was made in view of the above circumstances and is intended to achieve the following objectives.

[0011] 1. Enables all film formation to be achieved through sputtering, and enables manufacturing through in-situ continuous film formation.

[0012] 2. It can manufacture films that are oriented in the same direction as the silicon substrate.

[0013] 3. Reduce the number of processes and improve manufacturing efficiency.

[0014] Piezoelectric elements using ferroelectric materials such as lead zirconate titanate (Pb(Zr, Ti)O3:PZT) are known. These piezoelectric elements are used in devices within Micro-Electro-Mechanical Systems (MEMS) technology, such as inkjet printheads, micromirrors, gyroscope sensors, piezoelectric micromachined ultrasonic transducers (PMUTs), vibration elements, elastic wave elements, and accelerometers. Among these, PZT films have attracted considerable attention.

[0015] Among the devices using PZT, there are known preferred performance indices (ei). 31，f ) 2 / ε[GPa]. The performance index range varies depending on the device. Performance index (e 31，f ) 2 / ε[GPa] is derived from the piezoelectric constant e 31，f [C / m 2 Relative permittivity ε r This is confirmed. Here, depending on the device, there is a need to increase the piezoelectric constant while decreasing the dielectric constant. In this case, it is impossible to improve the performance index without considering both conditions. Therefore, it is preferable to epitaxially grow a c-axis oriented PZT film composed of tetragonal crystals.

[0016] Here, it is generally difficult to achieve c-axis orientation of tetragonal PZT films on Si substrates through epitaxial growth. The reason is believed to be due to the difference in thermal expansion coefficients between Si and PZT, which is known to preferentially align towards the a-axis.

[0017] In the technology disclosed in Patent Document 1, the crystal orientation of the PZT film is rotated, making it impossible to grow in the same direction as Si.

[0018] In addition, there is a need to reduce the number of layers and achieve epitaxial growth of tetragonal PZT films. At the same time, there is a need to achieve in-situ continuous film formation and increase yield.

[0019] Through in-depth research, the inventors have discovered for the first time in sputtering a method that allows Pt to be oriented towards the (100) plane and to react with Si without the use of CeO2. <100> A method of parallel epitaxial growth.

[0020] Furthermore, it is possible to provide a process in which all steps in the fabrication of PZT epitaxial films suitable for devices such as sensors can be continuously processed by sputtering.

[0021] The manufacturing method of the multilayer structure according to one aspect of the present invention solves the above-mentioned problems through the following steps.

[0022] A method for manufacturing a multilayer structure according to one aspect of the present invention includes: a first epitaxial film formation step, wherein a first layer oriented toward the (100) surface is formed on the (100) surface of a silicon substrate by sputtering; a second epitaxial film formation step, wherein a second layer of Pt oriented toward the (100) surface is formed on the first layer by sputtering; and a third epitaxial film formation step, wherein a third layer oriented toward the (100) surface is formed on the second layer by sputtering.

[0023] The first epitaxial film formation process is any one of the following processes:

[0024] The process includes an etching step on the surface of the silicon substrate; and a step of depositing YSZ as the first layer at a temperature above 700°C to a film thickness of 200 nm to 500 nm; or

[0025] A process in which silicon oxide is formed on the surface of the silicon substrate without removing YSZ as the first layer, and a film thickness of 200 nm to 500 nm is formed at a temperature above 650°C; or

[0026] The process involves forming a seed layer of Zr at a temperature of 400°C or higher to a thickness of 1.5 nm to 3.5 nm without removing silicon oxide from the surface of the silicon substrate; and forming a YSZ layer as a first layer on the seed layer at a temperature of 650°C or higher to a thickness of 200 nm to 500 nm; or

[0027] The process includes a step of forming a seed layer of Zr to a thickness of 1.5 nm to 3.5 nm at a temperature of 400°C or higher without removing silicon oxide from the surface of the silicon substrate; and a step of forming a YSZ layer as a first layer on the seed layer to a thickness of 18 nm to 67 nm at a temperature of 650°C or higher.

[0028] In other words, the first epitaxial film formation process has any one of the following first to fourth processes.

[0029] The first process includes: etching the surface of the silicon substrate; and depositing YSZ as the first layer at a temperature above 700°C to a film thickness of 200 nm to 500 nm.

[0030] The second process includes: without removing the silicon oxide from the surface of the silicon substrate, depositing YSZ as the first layer at a temperature above 650°C to a film thickness of 200nm to 500nm.

[0031] The third process includes: a process of forming a seed layer of Zr to a thickness of 1.5 nm to 3.5 nm at a temperature of 400°C or higher without removing the silicon oxide from the surface of the silicon substrate; and a process of forming a YSZ layer as the first layer on the seed layer to a thickness of 200 nm to 500 nm at a temperature of 650°C or higher.

[0032] The fourth process includes: a process of forming a seed layer of Zr to a film thickness of 1.5 nm to 3.5 nm at a temperature of 400°C or higher without removing the silicon oxide on the surface of the silicon substrate; and a process of forming a YSZ layer as the first layer on the seed layer to a film thickness of 18 nm to 67 nm at a temperature of 650°C or higher.

[0033] A method for manufacturing a multilayer structure according to one aspect of the present invention includes: a first epitaxial film deposition step, wherein a first layer oriented toward the (100) plane is formed on the (100) plane of a silicon substrate by sputtering; a second epitaxial film deposition step, wherein a second layer of Pt oriented toward the (100) plane is formed on the first layer by sputtering; and a third epitaxial film deposition step, wherein a third layer oriented toward the (100) plane is formed on the second layer by sputtering. The first epitaxial film deposition step uses YSZ as the first layer to deposit a film thickness of 25 nm to 50 nm, and the second epitaxial film deposition step includes a step of depositing Pt as the second layer at a temperature of 500°C or higher.

[0034] In a method for manufacturing a multilayer structure according to one aspect of the present invention, the third layer in the third epitaxial film formation step may be SrRuO3 or LaNiO3.

[0035] Regarding the method for manufacturing a multilayer structure according to one aspect of the present invention, after the third epitaxial film formation step, a fourth epitaxial film formation step may be provided, wherein the fourth epitaxial film formation step forms a PZT layer oriented toward the (100) plane on the third layer by sputtering.

[0036] In a method for manufacturing a multilayer structure according to one aspect of the present invention, lanthanum and nickel may be doped into the PZT layer during the fourth epitaxial film formation step.

[0037] A method for manufacturing a multilayer structure according to one aspect of the present invention includes: a first epitaxial film formation step, wherein a first layer oriented toward the (100) surface is formed on the (100) surface of a silicon substrate by sputtering; a second epitaxial film formation step, wherein a second layer of Pt oriented toward the (100) surface is formed on the first layer by sputtering; and a third epitaxial film formation step, wherein a third layer oriented toward the (100) surface is formed on the second layer by sputtering.

[0038] According to the above method, all layers can be fabricated by in-situ continuous sputtering, and all layers can be stacked and grown with the same planar orientation. Therefore, it is possible to obtain a Pt layer oriented in the same (100) plane as silicon through epitaxial growth, which was previously impossible. Thus, by forming a PZT layer on the Pt layer, it is possible to fabricate an epitaxial PZT film with a tetragonal crystal composition and oriented in a predetermined direction. This improves the film properties of the PZT film, reduces the number of processes, and increases manufacturing efficiency.

[0039] In a method for manufacturing a multilayer structure according to one aspect of the present invention, the first epitaxial film formation step includes any one of the first to fourth steps described above.

[0040] According to the above method, as a condition for the first epitaxial film formation step, by selecting any one of the first to fourth steps, a cubic YSZ film with a Pt layer oriented towards the (100) plane through epitaxial growth can be obtained. In particular, even when performing… X-ray scans such as scanning and 2θ scans will not produce side peaks other than (100), that is, YSZ films oriented toward the (100) plane can be obtained.

[0041] Here, YSZ refers to ZrO2 or Y-ZrO2 doped with Y2O3. In particular, when using a seed layer, it is preferable to perform RTA (Rapid Thermal Annealing) heat treatment after sputtering the zirconium metal film. Furthermore, there are no particular limitations regarding whether the seed layer, as a multilayer structure, is integrated with the first layer, whether it can be separated and detected, or whether it is movable.

[0042] In a method for manufacturing a multilayer structure according to one aspect of the present invention, the first epitaxial film formation step forms a YSZ layer to a film thickness of 25 nm to 50 nm, and the second epitaxial film formation step includes a step of forming a Pt layer at a temperature of 500°C or higher.

[0043] According to the above method, by selecting the above conditions as the conditions in the first and second epitaxial film formation processes, a Pt layer with a single orientation toward the (100) plane can be formed on the entire film surface. By forming a PZT layer on this Pt layer, an epitaxial PZT film with a tetragonal crystal composition and orientation in a specified direction can be manufactured. This improves the film properties of the PZT film, reduces the number of processes, and increases manufacturing efficiency.

[0044] In a method for manufacturing a multilayer structure according to one aspect of the present invention, in the third epitaxial film formation step, the third layer is SrRuO3 or LaNiO3.

[0045] According to the above method, a third layer (buffer layer) is formed on the (100) oriented Pt. Therefore, all layers can be formed by in-situ continuous sputtering, and epitaxial PZT films with a tetragonal crystal composition and c-axis orientation can be stacked and grown. Moreover, in the PZT layer, the piezoelectric constant e 31，f [C / m 2 The dielectric constant can reach 10.0 to 11.9, the dielectric loss can reach 1.0% to 1.8%, and the relative permittivity can reach 200 to 375 [dimensionless].

[0046] Here, the preferred film thickness of SrRuO3 is 15 nm to 25 nm.

[0047] Regarding the method for manufacturing a multilayer structure according to one aspect of the present invention, after the third epitaxial film formation step, there is a fourth epitaxial film formation step, wherein a PZT layer oriented toward the (100) plane is formed on the third layer by sputtering.

[0048] According to the above method, by setting it to be continuous in-situ until the fourth epitaxial film deposition process, the piezoelectric constant e is achieved in the film deposition of the PZT layer oriented towards the (100) plane. 31，f [C / m 2 The dielectric constant can reach 10.0 to 11.9, the dielectric loss can reach 1.0% to 1.8%, and the relative permittivity can reach 200 to 375 [dimensionless].

[0049] Here, in the fourth epitaxial film formation process, the PZT layer is preferably formed at 575°C to 650°C.

[0050] In a method for manufacturing a multilayer structure according to one aspect of the present invention, in the fourth epitaxial film formation step, lanthanum and nickel are doped into the PZT layer.

[0051] The above method can significantly reduce tensile internal stress. This, in turn, can suppress crack formation in the PZT layer, providing a practical PZT film.

[0052] Here, as an impurity doped into the PZT layer, at least one of lanthanum (La) and nickel (Ni) is preferably doped into the PZT layer in a range of 0.1 [at%] or more and 5 [at%] or less.

[0053] According to the present invention, a method for manufacturing a multilayer structure can be provided, which can reduce the number of processes and improve manufacturing efficiency, all film formation can be achieved by sputtering, and PZT films that can be continuously formed in situ can be manufactured. Furthermore, a multilayer structure with improved film properties can be provided. Attached Figure Description

[0054] Figure 1 This is a schematic cross-sectional view showing the multi-layer structure according to the first embodiment of the present invention.

[0055] Figure 2 This is a flowchart illustrating a method for manufacturing a multilayer structure according to the first embodiment of the present invention.

[0056] Figure 3 This is a schematic plan view showing the manufacturing apparatus used in the manufacturing method of the multilayer structure according to the first embodiment of the present invention.

[0057] Figure 4A This is a diagram showing the shape of the X-ray diffraction peaks of each layer of the multilayer structure constituting the first embodiment of the present invention.

[0058] Figure 4B This is a diagram showing the shape of the X-ray diffraction peaks of each layer of the multilayer structure constituting the first embodiment of the present invention.

[0059] Figure 4C This is a diagram showing the shape of the X-ray diffraction peaks of each layer of the multilayer structure constituting the first embodiment of the present invention.

[0060] Figure 5A This is a diagram showing the shape of the X-ray diffraction peaks of each layer of the multilayer structure constituting the first embodiment of the present invention.

[0061] Figure 5B This is a diagram showing the shape of the X-ray diffraction peaks of each layer of the multilayer structure constituting the first embodiment of the present invention.

[0062] Figure 5C This is a diagram showing the shape of the X-ray diffraction peaks of each layer of the multilayer structure constituting the first embodiment of the present invention.

[0063] Figure 6 This is a graph showing the film thickness of the YSZ layer in the multilayer structure according to the first embodiment of the present invention and the presence or absence of (111) side peaks in X-ray diffraction.

[0064] Figure 7 This is a graph showing the film thickness of the YSZ layer in the multilayer structure according to the first embodiment of the present invention and the presence or absence of (111) side peaks in X-ray diffraction.

[0065] Figure 8 This is a diagram showing the film thickness of the YSZ layer and the film-forming temperature of the Pt layer in the multilayer structure according to the first embodiment of the present invention, as well as the orientation direction of Pt in X-ray diffraction.

[0066] Figure 9This is a diagram showing the X-ray diffraction peaks of the YSZ layer.

[0067] Figure 10 This is a diagram showing the X-ray diffraction peaks of the YSZ layer in the multilayer structure according to the first embodiment of the present invention.

[0068] Figure 11 It means Figure 10 The diagram shows the X-ray diffraction peaks of the YSZ layer.

[0069] Figure 12 It means Figure 10 The image shows the X-ray diffraction peaks of the silicon substrate after the YSZ layer has been deposited.

[0070] Figure 13 This is a diagram showing the X-ray diffraction peaks of the PZT layer in the multilayer structure according to the first embodiment of the present invention.

[0071] Figure 14 This is a diagram showing the X-ray diffraction peaks of the PZT layer in the multilayer structure according to the first embodiment of the present invention.

[0072] Figure 15 It means Figure 14 The diagram shows the X-ray diffraction peaks of the PZT layer.

[0073] Figure 16 This is a diagram showing the internal stress distribution of the PZT layer in the multilayer structure according to the first embodiment of the present invention.

[0074] Figure 17 It means Figure 16 The image shows the surface observation results of the PZT layer.

[0075] Figure 18 This is a diagram showing the internal stress distribution of the PZT layer.

[0076] Figure 19 It means Figure 18 The image shows the surface observation results of the PZT layer.

[0077] Figure 20 This is a graph showing the relative permittivity of the PZT layer in the multilayer structure according to the first embodiment of the present invention.

[0078] Figure 21 This is a diagram showing the dielectric loss of the PZT layer in the multilayer structure according to the first embodiment of the present invention.

[0079] Figure 22 The piezoelectric constant e represents the piezoelectric constant of the PZT layer in the multilayer structure according to the first embodiment of the present invention. 31，f The image.

[0080] Figure 23 This is a graph showing the performance index of the PZT layer in the multilayer structure according to the first embodiment of the present invention.

[0081] Figure 24 This is a diagram showing the X-ray diffraction peaks of the PZT layer in the multilayer structure according to the second embodiment of the present invention.

[0082] Figure 25 This is a diagram showing the X-ray diffraction peaks of the PZT layer in the multilayer structure according to the second embodiment of the present invention.

[0083] Figure 26 It means Figure 25 The diagram shows the X-ray diffraction peaks of the PZT layer.

[0084] Figure 27 This is a graph obtained by analyzing the changes caused by variations in the film-forming temperature of the PZT layer in the multilayer structure involved in this embodiment using X-ray diffraction. Detailed Implementation

[0085] The manufacturing method of the multilayer structure and the multilayer structure according to the first embodiment of the present invention will be described below with reference to the accompanying drawings.

[0086] Figure 1 This is a schematic cross-sectional view showing the multi-layer structure of this embodiment. In the figure, reference numeral 100 indicates the multi-layer structure.

[0087] like Figure 1 As shown, the multilayer structure 100 of this embodiment has a structure in which a first layer 11, a second layer 12, a third layer 13 and a fourth layer 14 are stacked on a silicon substrate 10.

[0088] The silicon substrate 10 is a single-crystal silicon substrate. The (100) facet of the silicon substrate 10 is a laminated surface. The (100) facet of the silicon substrate 10 is equivalent to the "surface of the silicon substrate". The lattice constant of silicon is 5.431 angstroms.

[0089] A first layer 11 is formed on a silicon substrate 10. The first layer 11 contains zirconium. The first layer 11 is yttrium-stabilized zirconium oxide (YSZ; ZrO2 doped with Y2O3; Y-ZrO2). The (100) plane of the first layer 11 is oriented on the (100) plane relative to the (100) plane of Si. The arrangement of the (100) planes of the first layer 11 is the same as that of the silicon substrate 10. The lattice constant of YSZ is 5.139 Å.

[0090] The second layer 12 is formed on the first layer 11. The second layer 12 is a platinum (Pt) layer. The second layer 12 is oriented on the (100) plane relative to the (100) plane of the first layer 11. The (100) plane of the second layer 12 is oriented on the (100) plane of the YSZ plane. The (100) plane of the second layer 12 is aligned with the silicon substrate 10 and the (100) plane of the first layer 11. The lattice constant of Pt is 3.920 angstroms.

[0091] The third layer 13 is formed on the second layer 12. The third layer 13 is a buffer layer. The third layer 13 is a strontium ruthenium oxide (SRO; SrRuO3) film. The third layer 13 is oriented on the (100) plane relative to the (100) plane of the second layer 12. The (100) plane of the third layer 13 is oriented on the (100) plane of Pt. The (100) plane of the third layer 13 is arranged in the same way as the (100) planes of the silicon substrate 10, the first layer 11, and the second layer 12. The lattice constant of SrRuO3 is 3.930 angstroms.

[0092] The fourth layer 14 is formed on the third layer 13. The fourth layer 14 is a PZT layer. The fourth layer 14 is a c-axis oriented lead zirconate titanate (Pb(Zr, Ti)O3:PZT) film with a tetragonal crystal structure. The fourth layer 14 is a PZT film doped with lanthanum (La) and / or nickel (Ni) as impurities in the range of 0.1 [at%] to 5 [at%]. The fourth layer 14 is oriented on the (100) plane relative to the (100) plane of the third layer 13. The (100) plane of the fourth layer 14 is arranged in the same way as the (100) planes of the silicon substrate 10, the first layer 11, the second layer 12, and the third layer 13. The lattice constant of PZT is the same as that of a typical simple perovskite oxide, which is about 3.9 Å.

[0093] In the multilayer structure 100 of this embodiment, a first layer 11, a second layer 12, and a third layer 13 are stacked on a silicon substrate 10. By stacking a fourth layer 14 on the third layer 13, the piezoelectric constant e can be obtained. 31，f [C / m 2 PZT layers with dielectric constant ε [F / m] within the specified range.

[0094] Figure 2 This is a flowchart illustrating the manufacturing method of the multilayer structure according to this embodiment. Figure 3 This is a schematic plan view showing the manufacturing apparatus used in the manufacturing method of the multilayer structure of this embodiment.

[0095] like Figure 2As shown, the manufacturing method of the multilayer structure according to this embodiment includes: a substrate preparation process S00, a first epitaxial film formation process S01 for forming a first layer 11, a second epitaxial film formation process S02 for forming a second layer 12, a third epitaxial film formation process S03 for forming a third layer 13, and a fourth epitaxial film formation process S04 for forming a fourth layer 14.

[0096] In the substrate preparation process S00, a single-crystal silicon substrate 10 is prepared. Here, the (100) surface of the silicon substrate 10 is used as the lamination surface. As described later, different surface treatments are performed on the silicon substrate 10 according to the conditions in the first epitaxial film deposition process S01. That is, as a surface treatment of the silicon substrate 10, an etching process to remove the native oxide film can be performed. Alternatively, the native oxide film can be left unremoved. Furthermore, regardless of whether the native oxide film is removed, a surface cleaning process can be performed. In this case, as a cleaning process, a process such as etching can be selected.

[0097] The first epitaxial film formation process S01 involves forming a first layer 11 on the laminated surface of the silicon substrate 10. The first epitaxial film formation process S01... Figure 3 The manufacturing apparatus 1 shown is used to form a film.

[0098] like Figure 3 As shown, the manufacturing apparatus 1 (sputtering apparatus) includes: a loading / unloading chamber 2, multiple film-forming chambers 4 (cavities), and a transport chamber 3 located between the film-forming chambers 4 and the loading / unloading chambers 2 (cavities). Figure 3 The example shown illustrates four film-forming chambers. These four chambers are designated as first film-forming chamber 4A, second film-forming chamber 4B, third film-forming chamber 4C, and fourth film-forming chamber 4D. When describing these chambers, unless there is a need to distinguish between multiple film-forming chambers, or when describing a single film-forming chamber, they are sometimes simply referred to as film-forming chamber 4.

[0099] Manufacturing apparatus 1 is a vacuum processing apparatus. Manufacturing apparatus 1 is capable of sputtering films onto a silicon substrate 10 in each of the film deposition chambers 4. The apparatus 1 is configured such that multiple chambers constituting the loading / unloading chamber 2 and the multiple film deposition chambers 4 surround a transport chamber 3. In manufacturing apparatus 1, a gate valve is formed between each of the multiple chambers and the transport chamber 3. Manufacturing apparatus 1 is capable of moving the silicon substrate 10 between the loading / unloading chamber 2, the multiple film deposition chambers 4, and the transport chamber 3 while maintaining a vacuum-depressurized and sealed state.

[0100] The loading / unloading chamber 2 is a loading chamber for moving the silicon substrate 10 from the outside to the inside of the manufacturing apparatus 1. The loading / unloading chamber 2 is an unloading chamber for moving the silicon substrate 10 from the inside to the outside of the manufacturing apparatus 1. The loading / unloading chamber 2 is designed to be capable of performing either the loading / unloading operation of the silicon substrate 10. Furthermore, multiple loading / unloading chambers 2 may be configured in the manufacturing apparatus 1. In this case, each of the multiple loading / unloading chambers 2 independently performs the loading / unloading operation of the silicon substrate 10.

[0101] The loading / unloading chamber 2 may also be equipped with a positioning component, which can set and align the silicon substrate 10 that is moved in from outside the manufacturing apparatus 1.

[0102] In the loading / unloading chamber 2, a coarse evacuation and exhaust device (coarse evacuation and exhaust device, low vacuum exhaust device) such as a rotary pump for coarse evacuation of the interior can be installed.

[0103] The transport chamber 3 may be equipped with a coarse vacuum exhaust device (coarse vacuum exhaust device, low vacuum exhaust device) such as a rotary pump for coarse vacuum exhaust. A transport device 3a (transport robot) is installed inside the transport chamber 3.

[0104] The transport device 3a has a rotating shaft, a robotic arm mounted on the rotating shaft, a manipulator formed at one end of the robotic arm, and a vertical movement device for moving the manipulator up and down. The robotic arm consists of a first active arm, a second active arm, a first driven arm, and a second driven arm that are flexible to each other. The transport device 3a enables the silicon substrate 10, which is the object being transported, to move between each of the plurality of chambers (loading / unloading chamber 2 and plurality of film deposition chambers 4) and the transport chamber 3.

[0105] Each of the multiple film-forming chambers 4 has a structure capable of sputtering film formation. Each of the multiple film-forming chambers 4 may have the same structure. However, each of the multiple film-forming chambers 4 may have a structure that performs separate processing corresponding to multiple different film-forming steps. Hereinafter, we will describe the case where each of the multiple film-forming chambers 4 of the manufacturing apparatus 1 has a structure corresponding to the first epitaxial film-forming step S01 to the fourth epitaxial film-forming step S04, but the structure of the manufacturing apparatus 1 is not limited to the structure described below.

[0106] Furthermore, the film-forming processes performed by the multiple film-forming chambers 4 can be different from each other. As described later, different film-forming processes can be performed in the same chamber by changing the target, etc.

[0107] Furthermore, any one of the multiple film-forming chambers 4 may have a structure capable of performing processes other than sputtering film formation (e.g., etching, heat treatment, substrate processing under a specified gas atmosphere, etc.).

[0108] A film-forming chamber 4 includes a substrate holding mechanism 41, a film-forming mechanism 42, and a gas atmosphere adjustment mechanism 43. Furthermore, in... Figure 3 In the figures, the substrate holding mechanism 41 and the film forming mechanism 42 are shown schematically and are not particularly limited to the figures.

[0109] The substrate holding mechanism 41 receives the silicon substrate 10 transported by the transport device 3a. The substrate holding mechanism 41 holds the silicon substrate 10 inside the film deposition chamber 4. The substrate holding mechanism 41 is capable of transporting the silicon substrate 10 inside the film deposition chamber 4. The substrate holding mechanism 41 transfers the silicon substrate 10 to the transport device 3a.

[0110] The substrate holding mechanism 41 holds the silicon substrate 10 opposite to the target 42a of the film deposition mechanism 42 during the film deposition process. The substrate holding mechanism 41 can set the distance between the silicon substrate 10 and the film deposition mechanism 42 during the film deposition process. The substrate holding mechanism 41 can apply bias power to the silicon substrate 10 during the film deposition process. The substrate holding mechanism 41 has a temperature control unit that can set the temperature of the silicon substrate 10 during the film deposition process.

[0111] The temperature control unit includes a heating element and a power supply for heating, both built into the temperature control unit. For example, SiC is used as the heating element. The heating element can be disposed at the lower part of the silicon substrate 10. The temperature control unit may also include a cooling unit. For example, it can be configured such that a cooling medium for temperature control circulates within the cooling unit.

[0112] The film-forming mechanism 42 is disposed inside the film-forming chamber 4. The film-forming mechanism 42 performs epitaxial film formation. The film-forming mechanism 42 supplies the film-forming material in the epitaxial film formation process.

[0113] The film-forming mechanism 42 has a target 42a, a cathode electrode 42b (back plate) and a power supply 42c.

[0114] The target 42a is supplied with film-forming material corresponding to the film-forming process in which the target 42a is used. The target 42a is manufactured into a predetermined shape according to the composition of the film to be formed on the surface of the silicon substrate 10. The target 42a is disposed opposite to the silicon substrate 10 inside the film-forming chamber 4. The target 42a is mounted on the cathode electrode 42b.

[0115] The cathode electrode 42b is disposed on the upper part of the film-forming chamber 4 via an insulating component. The cathode electrode 42b is electrically insulated from the wall of the film-forming chamber 4. The wall of the film-forming chamber 4 is set to ground potential. One side of the cathode electrode 42b is partially exposed inside the film-forming chamber 4. The target 42a is tightly fixed to the center of the exposed area on one side of the cathode electrode 42b. The target 42a is electrically connected to the cathode electrode 42b.

[0116] A power supply 42c (sputtering power supply) applies a negative sputtering voltage to the cathode electrode 42b. The power supply 42c is located outside the film deposition chamber 4. The power supply 42c is electrically connected to the cathode electrode 42b. The power supply 42c can apply an alternating current voltage to the target 42a via the cathode electrode 42b.

[0117] The gas atmosphere adjustment mechanism 43 includes a gas introduction mechanism and a high-vacuum exhaust mechanism. The gas introduction mechanism introduces sputtering gas and film-forming gas corresponding to the film-forming process using the gas atmosphere adjustment mechanism 43 into the interior of the film-forming chamber 4. The high-vacuum exhaust mechanism exhausts the interior of the film-forming chamber 4. The high-vacuum exhaust mechanism is, for example, a turbomolecular pump. The gas atmosphere adjustment mechanism 43 can set the internal pressure of the film-forming chamber 4 during film formation.

[0118] The film-forming mechanism 42 may have a magnetron magnetic circuit. The magnetron magnetic circuit forms a predetermined magnetic field on the target 42a. The magnetron magnetic circuit is disposed on the side of the cathode electrode 42b opposite to the target 42a, that is, on the other side of the cathode electrode 42b.

[0119] The first epitaxial film formation process S01, for example, in... Figure 3 The process is carried out in the first film-forming chamber 4A. In this case, plasma processing such as etching can be performed in the first film-forming chamber 4A. Furthermore, in the first film-forming chamber 4A, the target 42a is configured to perform epitaxial film formation of the first layer 11. The target 42a can be a single target composed of yttrium oxide-stabilized zirconium oxide. Alternatively, the target 42a can be multiple targets comprising a target containing zirconium oxide or zirconium oxide and a target containing yttrium oxide, etc.

[0120] In this configuration, within the first film-forming chamber 4A, the gas atmosphere adjustment mechanism 43 sets the gas atmosphere and pressure range necessary for film formation. Simultaneously, the film-forming mechanism 42 sets the necessary film-forming power. Furthermore, the substrate holding mechanism 41 sets the necessary film-forming temperature and bias power.

[0121] In the first epitaxial film formation process S01, the gas atmosphere adjustment mechanism 43 reduces the pressure inside the first film formation chamber 4A, and then continues to exhaust the vacuum to maintain the vacuum atmosphere inside the first film formation chamber 4A.

[0122] Then, Ar gas is introduced into the first film-forming chamber 4A as a sputtering gas from the gas atmosphere adjustment mechanism 43. At the same time, a high frequency (negative high-frequency power) is applied to the cathode electrode 42b from the power supply 42c, causing the cathode electrode 42b to discharge. As a result, a plasma of Ar gas introduced into the film-forming chamber 4 is generated, generating positive ions such as Ar ions, forming a plasma space. The positive ions in the formed plasma space sputter the target 42a held on the cathode electrode 42b. The constituent elements of the sputtered target 42a are released from the target 42a and sputtered into a film on the surface of the silicon substrate 10 (100) held on the substrate holding mechanism 41 in a neutral or ionized state.

[0123] Specifically, the first epitaxial film formation process has any one of the following first to fourth processes.

[0124] [First Process]

[0125] The first process includes: etching the surface of the silicon substrate 10; and epitaxially depositing YSZ (ZrO2 doped with Y2O3; Y-ZrO2) as the first layer 11 at a temperature above 700°C to a film thickness of 200 nm to 500 nm.

[0126] In this case, during the etching process, the natural oxide film 10a is removed, for example, by dry etching using plasma or the like. Alternatively, the natural oxide film 10a can be removed beforehand by wet etching, followed by dry etching using plasma or the like. In this case, the YSZ film formation conditions can use 100% Ar gas as the supply gas and apply 1500W as the plasma generation power.

[0127] [Second Process]

[0128] The second process includes: without removing the silicon oxide 10a (natural oxide film) from the surface of the silicon substrate 10, and epitaxially depositing YSZ as the first layer 11 at a temperature above 650°C to a film thickness of 200nm to 500nm.

[0129] In this case, YSZ film formation is performed with a residual native oxide film 10a. The YSZ film formation conditions under these conditions can use 100% Ar gas as the feed gas and apply 1500 W as the plasma generation power.

[0130] In this case, after the YSZ film is formed, an RTA process at a processing temperature of 650°C can be performed in a vacuum. After the RTA process, the natural oxide film 10a becomes integrated with the first layer 11 of YSZ. Alternatively, a process can be performed beforehand to form silicon oxide on the surface of the silicon substrate 10.

[0131] [Third Process]

[0132] The third process includes: a process of forming a seed layer 11a of Zr at a temperature of 400°C or higher to a film thickness of 1.5 nm to 3.5 nm without removing the silicon oxide 10a on the surface of the silicon substrate 10; and a process of epitaxially forming a YSZ layer 11 as a first layer on the seed layer 11a at a temperature of 650°C or higher to a film thickness of 200 nm to 500 nm.

[0133] In this case, the seed layer 11a and YSZ are formed while the natural oxide film 10a remains. The seed layer 11a is formed under the following conditions: zirconium metal is used as the target, 100% Ar gas is used as the supply gas, and the plasma generation power is set to 0.3 kW.

[0134] In this YSZ film formation condition, YSZ ceramic can be used as the target, 100% Ar gas can be used as the supply gas, and 1500 W can be applied as the plasma generation power. After YSZ film formation, RTA treatment at a processing temperature of 650°C can be performed in a vacuum. After RTA treatment, the native oxide film 10a and the seed layer 11a become integrated with the first YSZ layer 11.

[0135] [Fourth Process]

[0136] The fourth process includes: a process of forming a seed layer 11a of Zr at a temperature of 400°C or higher to a film thickness of 1.5 nm to 3.5 nm without removing the silicon oxide 10a on the surface of the silicon substrate 10; and a process of forming a YSZ layer as a first layer on the seed layer 11a at a temperature of 650°C or higher to a film thickness of 18 nm to 67 nm.

[0137] In this case, seed layer 11a and YSZ are formed while the natural oxide film 10a remains. The seed layer 11a is formed under the following conditions: zirconium metal is used as the target, 100% Ar gas is used as the supply gas, and the plasma generation power is set to 0.3 kW.

[0138] In this YSZ film formation condition, YSZ ceramic can be used as the target, with 100% Ar gas as the supply gas and 1500 W applied as the plasma generation power. After YSZ film formation, RTA treatment can be performed. After RTA treatment, the native oxide film 10a and seed layer 11a become integrated with the first YSZ layer 11.

[0139] After the film formation in the first epitaxial film formation process S01 is completed, the voltage applied from the power supply 42c to the cathode electrode 42b is stopped, and the sputtering gas introduced into the film formation chamber 4 from the gas atmosphere adjustment mechanism 43 is stopped.

[0140] Through the first epitaxial film formation process S01, a film can be formed in such a way that the (100) face of the cubic YSZ layer 11 is oriented in the <100> direction relative to the (110) face of the silicon substrate 10.

[0141] After the first epitaxial film deposition process S01 is completed, the silicon substrate 10 is moved to the second film deposition chamber 4B via the transport chamber 3.

[0142] In the second epitaxial film formation process S02, the second layer 12 is epitaxially formed on the first layer 11. For example, in the second epitaxial film formation process S02... Figure 3 The same procedure is performed in the second film deposition chamber 4B. In this case, the target 42a in the second film deposition chamber 4B is a component capable of epitaxial deposition of the second layer 12. In this case, the target 42a can be a single target made of platinum. In addition, in this case, the gas atmosphere adjustment mechanism 43 in the second film deposition chamber 4B sets the gas atmosphere and pressure range as necessary film deposition conditions. At the same time, the film deposition mechanism 42 sets the necessary film deposition power. In addition, the substrate holding mechanism 41 sets the necessary film deposition temperature and bias power. In this case, the Pt film deposition conditions can use Pt as the target, use 100% Ar gas as the supply gas, and apply 0.5 kW as the plasma generation power.

[0143] The second epitaxial film formation process S02 includes a step of forming a film of Pt as the second layer at a temperature of 500°C or higher. At this time, in the first epitaxial film formation process S01, the first layer 11 can be formed to a film thickness of 25 nm to 50 nm.

[0144] According to the above method, by selecting the above conditions in the first and second epitaxial film formation processes, a Pt layer with a single orientation toward the (100) plane can be formed on the entire film surface. By forming a PZT layer on this Pt layer, an epitaxial PZT film with a tetragonal crystal composition and orientation in a predetermined direction can be manufactured. This improves the film properties of the PZT film, reduces the number of processes, and increases manufacturing efficiency.

[0145] Through the second epitaxial film formation process S02, a film can be formed in such a way that the (100) face of the cubic Pt second layer 12 is oriented in the <100> direction relative to the (110) face of the silicon substrate 10 and the (100) face of the YSZ first layer 11. The Pt (100) face of the second layer 12 does not undergo in-plane rotation relative to the (100) face of the YSZ first layer 11 and the (110) face of the silicon substrate 10.

[0146] After the second epitaxial film deposition process S02 is completed, the silicon substrate 10 is moved to the third film deposition chamber 4C via the transport chamber 3.

[0147] In the third epitaxial film formation process S03, the third layer 13 is epitaxially formed on the second layer 12. For example, in the third epitaxial film formation process S03... Figure 3 The deposition is carried out in the third film-forming chamber 4C. In this case, in the third film-forming chamber 4C, the target 42a is a composition capable of epitaxial deposition of the third layer 13. In this case, the target 42a can be a single target composed of strontium ruthenium ruthenium oxide (SRO; SrRuO3). Alternatively, multiple targets can be used to form a strontium ruthenium oxide film.

[0148] In this case, within the third film deposition chamber 4C, the gas atmosphere adjustment mechanism 43 sets the gas atmosphere and pressure range necessary for film deposition. Simultaneously, the film deposition mechanism 42 sets the necessary film deposition power. Furthermore, the substrate holding mechanism 41 sets the necessary film deposition temperature and bias power. In this Pt film deposition condition, SrRuO3 can be used as the target, Ar gas and O2 gas as the supply gases, and 1500W can be applied as the plasma generation power.

[0149] In addition, the thickness of the third layer 13 is about 20nm, preferably 15nm to 25nm.

[0150] Through the third epitaxial film formation process S03, the (100) surface of the cubic SrRuO3, i.e., the third layer 13, can be aligned with the (110) surface of the silicon substrate 10, the YSZ (100) surface of the first layer 11, and the Pt (100) surface of the second layer 12. <100> The film is formed by orientation. The SrRuO3 (100) surface of the third layer 13 does not rotate in-plane relative to the SrRuO3 (100) surface of the second layer 12, the YSZ (100) surface of the first layer 11, and the (110) surface of the silicon substrate 10.

[0151] After the third epitaxial film deposition process S03 is completed, the silicon substrate 10 is moved to the fourth film deposition chamber 4D via the transport chamber 3.

[0152] The fourth epitaxial film formation process S04 involves PZT epitaxial film formation, i.e., the fourth layer 14, on the third layer 13, which serves as a buffer layer.

[0153] The fourth epitaxial film formation process S04, for example, in Figure 3 The epitaxial formation of the fourth layer 14 is carried out in the fourth film-forming chamber 4D. In this case, the target 42a in the fourth film-forming chamber 4D is composed of materials capable of epitaxial formation of the fourth layer 14. In this case, as the target 42a, lead zirconate titanate [Pb(Zr)] doped with lanthanum (La) and / or nickel (Ni) as impurities can be used. x Ti 1-xA single target consisting of [O3:PZT] can be used. Alternatively, multiple targets can be used to form films of lead zirconate titanate doped with lanthanum (La) and / or nickel (Ni) as impurities.

[0154] Furthermore, in this configuration, within the fourth film deposition chamber 4D, the gas atmosphere adjustment mechanism 43 sets the gas atmosphere and pressure range necessary for film deposition. Simultaneously, the film deposition mechanism 42 sets the necessary film deposition power. Additionally, the substrate holding mechanism 41 sets the necessary film deposition temperature and bias power. In this configuration, the PZT film deposition conditions can be achieved using La / Ni-containing PZT as the target, Ar / O2 gas as the supply gas, a temperature of 575°C or higher, and a plasma generation power of 2.75 kW.

[0155] Through the fourth epitaxial film formation process S04, the (100) face of the cubic PZT, i.e., the fourth layer 14, can be aligned with the (110) face of the silicon substrate 10, the YSZ (100) face of the first layer 11, the Pt (100) face of the second layer 12, and the SrRuO3 (100) face of the third layer 13. <100> The film is formed by orientation. The PZT (100) surface of the fourth layer 14 does not rotate in-plane relative to the SrRuO3 (100) surface of the third layer 13, the SrRuO3 (100) surface of the second layer 12, the YSZ (100) surface of the first layer 11, and the (110) surface of the silicon substrate 10.

[0156] In this embodiment, in-situ continuous film deposition is performed within the manufacturing apparatus 1 from the first epitaxial film deposition step S01 to the fourth epitaxial film deposition step S04. As a result, a c-axis oriented PZT film with a tetragonal crystal structure can be obtained as the fourth layer 14. In the PZT film as the fourth layer 14, the piezoelectric constant ep 31，f [C / m 2 The dielectric constant is 10.0–11.9, the dielectric loss is 1.0%–1.8%, the relative permittivity ε is 200–375 [dimensionless], and the practical performance index (e) is... 31，f ) 2 The ε[GPa] is approximately 33.9. Regarding the fourth layer 14, the PZT film is formed by sputtering lanthanum (La) and / or nickel (Ni) doped into it. Therefore, the internal stress in the PZT film is generated on the compressive side rather than the tensile side, which can suppress crack initiation.

[0157] In this embodiment, there is no need to use different film formation methods such as sputtering and vapor deposition. A single manufacturing apparatus 1 can control the manufacturing cost and obtain a c-axis oriented PZT film composed of tetragonal crystals.

[0158] This multilayer structure 100 is preferably suitable for piezoelectric elements, gyroscope sensors, PMUTs, etc., in which a PZT film with high piezoelectricity and high pressure resistance is formed on a CMOS substrate with aluminum wiring.

[0159] Next, we will verify each layer in the multilayer structure 100 of this embodiment.

[0160] In the manufacturing method of the multilayer structure 100, a YSZ layer is formed on a silicon substrate, a Pt layer is formed on the YSZ layer, an SrRuO3 layer is formed on the Pt layer, and a PZT layer is formed on the SrRuO3 layer. The conditions for stacking the multilayer structure 100 on the silicon substrate are as follows.

[0161] • Target YSZ composition: 12% Y₂O₃-88% ZrO₂, film formation temperature: 700℃, supply gas: 100% Ar, film thickness: 30nm

[0162] • Target: Pt, Film formation temperature: 600℃, Supply gas: 100% Ar, Film thickness: 100nm

[0163] • Target SrRuO3 composition: SrRuO3; film formation temperature: 600℃; supply gas: O2 / (Ar+O2) = 20%; film thickness: 20nm

[0164] • Target PZT composition: PZT doped with La and Ni; film formation temperature: 625℃; supply gas: O2 (Ar + O2) = 2.5%; film thickness: 2μm

[0165] The multilayer structure 100 formed under these conditions was analyzed by X-ray diffraction.

[0166] Figures 4A to 4C This is a diagram showing the X-ray diffraction peaks of each layer constituting the multilayer structure 100 involved in this embodiment. Figure 4A This illustrates the process of applying a silicon substrate 10 to... The four peaks of Si(110) obtained were determined by scanning. Figure 4B This shows the effect of the first layer 11. The four peaks of YSZ(110) obtained by scanning were determined. Figure 4C This shows the effect of the second layer 12. The four peaks of Pt(110) obtained by scanning determination.

[0167] Figures 5A-5C This is a diagram showing the X-ray diffraction peaks of each layer constituting the multilayer structure 100 involved in this embodiment. Figure 5A This shows the effect of the third layer 13. The four peaks of SrRuO3 (110) obtained were determined by scanning. Figure 5B This shows the effect of the fourth layer 14. The four peaks of PZT(110) obtained by scanning determination. Figure 5C The peaks obtained from the 2θ-ω scan determination of PZT constituting the fourth layer 14 are shown.

[0168] In the multilayer structure 100 of this embodiment, Figure 4A The four peaks of the silicon substrate 10 shown Figure 4B The four peaks of the first layer 11 shown Figure 4C The four peaks of the second layer 12 shown Figure 5A The four peaks of the third layer 13 shown and Figure 5B The four peaks in the fourth layer 14 shown are consistent.

[0169] Furthermore, the results of the 2θ-ω scan measurement of the fourth layer 14 show that the PZT in the fourth layer 14 is as follows: Figure 5C As shown, it is a cubic crystal with c-axis orientation.

[0170] Therefore, it can be seen that the multilayer structure 100 involved in this embodiment consists of cubic crystals from the first layer 11 to the fourth layer 14, and is oriented in the same plane orientation.

[0171] Figure 6 This is a graph showing the film thickness of the YSZ layer in the multilayer structure involved in this embodiment and the presence or absence of (111) side peaks in X-ray diffraction.

[0172] Figure 6 The results are shown when the thickness of the YSZ layer is 200 nm to 500 nm.

[0173] The YSZ layer deposition conditions on the silicon substrate are as follows: target YSZ composition: 12% Y2O3-88% ZrO2, deposition temperature: 700℃, supply gas: 100% Ar, and film thickness: 20nm.

[0174] It is known that under these conditions, etching, i.e., removing the native oxide film 10a from the surface of the silicon substrate 10, will result in a significant side peak other than (100) at a film formation temperature of 600°C. Furthermore, it is known that removing the native oxide film 10a will result in a slight side peak other than (100) at a film formation temperature of 650°C. Moreover, it is also known that even when removing the native oxide film 10a, no side peak other than (100) will appear at a film formation temperature of 700°C.

[0175] If the YSZ layer is deposited without etching when the thickness is 200nm to 500nm and the natural oxide film 10a remains on the surface of the silicon substrate 10, it can be seen that a side peak other than (100) will appear significantly at a film deposition temperature of 600℃. Similarly, it can be seen that no side peak other than (100) will appear at film deposition temperatures of 650℃ and 700℃.

[0176] If, when the thickness of the YSZ layer is 200 nm to 500 nm, no etching is performed, and a zirconium metal film is formed as a seed layer 11a after the natural oxide film 10a remains on the surface of the silicon substrate 10, then the YSZ layer is formed. It can be seen that when the film formation temperature is 650 °C, no side peak other than (100) will appear.

[0177] Figure 7 This is a graph showing the film thickness of the YSZ layer in the multilayer structure involved in this embodiment and the presence or absence of (111) side peaks in X-ray diffraction.

[0178] Figure 7 The results are shown when the thickness of the YSZ layer is less than 60 nm.

[0179] The film formation conditions for YSZ layer formation on silicon substrate are as follows: target YSZ composition: 12% Y2O3-88% ZrO2, film formation temperature: 700℃, and supply gas: 100% Ar.

[0180] If, under these conditions, no etching is performed and the YSZ layer is formed on the surface of the silicon substrate 10 with the remaining natural oxide film 10a, it is known that at a film formation temperature of 650°C, a side peak other than (100) will appear significantly. Similarly, it is known that at a film formation temperature of 700°C, a side peak other than (100) will appear slightly.

[0181] If a zirconium film is formed as a seed layer 11a and then a YSZ film is formed after the film thickness of the YSZ layer is less than 60 nm, then no side peak other than (100) will appear at film formation temperatures of 650 °C and 700 °C.

[0182] Figure 8 This is a diagram showing the film thickness of the YSZ layer and the film-forming temperature of the Pt layer in the multilayer structure involved in this embodiment, as well as the orientation direction of Pt in X-ray diffraction.

[0183] A Pt layer was formed on the YSZ layer. The film formation conditions for the YSZ and Pt layers were as follows: target YSZ composition: 12% Y2O3-88% ZrO2, film formation temperature: 700℃, and supply gas: 100% Ar.

[0184] When the Pt layer is deposited at a temperature of 500°C, and the YSZ layer thickness is 20 nm, a peak indicating (111) orientation is generated. When the Pt layer is deposited at a temperature of 500°C, and the YSZ layer thickness is 30 nm, a peak indicating (200) orientation is generated, which means a (100) orientation is formed, but a peak indicating (111) orientation is also generated. When the Pt layer is deposited at a temperature of 500°C, and the YSZ layer thickness is 60 nm, a peak indicating (111) orientation is generated.

[0185] However, when the Pt layer is deposited at a temperature of 500°C, and the YSZ layer is 40 nm thick, only a peak representing the (200) orientation is generated, and no peak representing the (111) orientation is generated. That is, the Pt layer is oriented towards the (100) plane.

[0186] Similarly, at a Pt layer deposition temperature of 600°C, when the YSZ layer thickness is 20 nm, a peak representing the (111) orientation is generated. At a Pt layer deposition temperature of 600°C, when the YSZ layer thickness is 30 nm, a peak representing the (200) orientation is generated, i.e., a (100) orientation is formed, but a peak representing the (111) orientation is also generated. At a Pt layer deposition temperature of 600°C, when the YSZ layer thickness is 60 nm, a peak representing the (111) orientation is generated.

[0187] However, when the Pt layer is deposited at a temperature of 600°C, and the YSZ layer is 40 nm thick, only a peak representing the (200) orientation is generated, and no peak representing the (111) orientation is generated. That is, it can be seen that the Pt layer is oriented towards the (100) plane.

[0188] Figure 9 This is a diagram showing the X-ray diffraction peaks of the YSZ layer.

[0189] Metal Zr, serving as a seed layer, was epitaxially grown at 400°C on the (100) surface of a silicon substrate with the native oxide film intact. After being placed in the atmosphere for one week, YSZ was epitaxially deposited with a film thickness of 50 nm. Verification was performed by X-ray diffraction (2θ).

[0190] The result shows that, Figure 9 As shown, YSZ not only has a (200) orientation, but also a (111) orientation.

[0191] This is believed to be because YSZ is oxidized in air, producing 111 crystals. Therefore, it can be seen that simply forming a seed layer is not enough to achieve (100) orientation of YSZ across the entire surface.

[0192] In addition, Figure 9In the diagram, 1-C represents the center position of the wafer of sample 1, and 1-E represents the edge position of the wafer of sample 1. 2-C represents the center position of the wafer of sample 2, and 2-E represents the edge position of the wafer of sample 2.

[0193] Figure 10 This is a diagram showing the X-ray diffraction peaks of the YSZ layer in the multilayer structure involved in this embodiment. Figure 11 It means Figure 10 The diagram shows the X-ray diffraction peaks of the YSZ layer. Figure 12 It means Figure 10 The image shows the X-ray diffraction peaks of the silicon substrate after the YSZ layer has been deposited.

[0194] Similarly, on the (100) surface of a silicon substrate without the natural oxide film removed, metallic Zr, serving as a seed layer, was epitaxially grown at 400°C. After being placed in a vacuum for one week, YSZ was epitaxially deposited to a thickness of 50 nm. X-ray diffraction (2θ) and X-ray diffraction (...) were then performed. The results were verified.

[0195] The result shows that, Figure 10 As shown, YSZ has a (200) single orientation. This is believed to be because YSZ is not oxidized in air and does not produce 111 crystals. Therefore, it can be seen that after the seed layer is formed, YSZ is filmed in situ to achieve a (100) single orientation across the entire surface.

[0196] In addition, Figure 10 In the figure, 2+18nm, 2+28nm, 2+48nm, 2+98nm, and 2+198nm represent the thickness of the seed layer (nm) and the thickness of YSZ (nm), respectively.

[0197] In addition, such as Figure 11 , Figure 12 As shown, the YSZ (110) plane exhibits a peak consistent with the (110) plane of the silicon substrate.

[0198] Figure 13 This is a diagram showing the X-ray diffraction peaks of the PZT layer in the multilayer structure involved in this embodiment.

[0199] As a multilayer structure, a YSZ layer is deposited on a silicon substrate, a Pt layer is deposited on the YSZ layer, and an SrRuO3 layer is deposited on the Pt layer. The deposition conditions are the same as shown in Figure 4. Figures 5A-5CThe film-forming conditions were the same as in the previous case. Further, a PZT layer was formed on the SrRuO3 layer to obtain a multilayer structure. At this time, the film-forming temperature was varied from 450℃ to 625℃, and each PZT layer was analyzed by X-ray diffraction. Furthermore, when the film-forming temperature was set to 575℃, the peak of the SrRuO3 layer was 98.2°.

[0200] The results showed that the PZT layer, as Figure 13 As shown, the peak shifts towards the lower angle side as the film-forming temperature increases. Furthermore, it can be confirmed that the c-axis is established when the film-forming temperature of the PZT layer reaches 625°C.

[0201] Figure 14 This is a graph showing the X-ray diffraction peak (2θ-ω) of the PZT layer in the multilayer structure involved in this embodiment. Figure 15 It means Figure 14 The X-ray diffraction peaks of the PZT layer shown ( (Scanned) image.

[0202] and Figure 13 Similarly, as a multilayer structure, a PZT layer was formed on an 8-inch wafer silicon substrate, and its in-plane distribution was observed.

[0203] The result shows that, Figure 14 , Figure 15 As shown, within the wafer plane, the YSZ layer, Pt layer, SrRuO3 layer, and PZT layer are all oriented toward the (100) plane and are formed approximately uniformly.

[0204] Figure 18 This is a diagram showing the internal stress distribution of the PZT layer in the multilayer structure involved in this embodiment.

[0205] Similarly, as a multilayer structure, YSZ, Pt, SrRuO3, and PZT layers were deposited on a silicon substrate, and the internal stress in the PZT layer was measured. In this case, the PZT layer was doped with 3 atm% each of La and Ni. The results are shown below. Figure 18 .

[0206] Here, the internal stress was measured using the FLX-2320-R thin film stress measuring device manufactured by Toho Technology Co., Ltd.

[0207] In addition, the surface of the PZT layer was examined under a microscope to confirm the presence of cracks. The results are shown below. Figure 19 .

[0208] The results showed that no cracks were formed in the PZT film, and the average internal stress in the PZT layer was +80 MPa. Here, the positive sign of the internal stress value indicates that the internal stress was applied on the tensile side, that is, in the tensile direction.

[0209] Figure 16 This is a diagram showing the internal stress distribution of the PZT layer.

[0210] For comparison, undoped La and Ni PZT layers were fabricated in the same manner, and the internal stress in the PZT layers was measured. The results are presented below. Figure 16 .

[0211] In addition, the surface of the undoped PZT layer was examined under a microscope to confirm the presence or absence of cracks. The results are shown below. Figure 17 .

[0212] The results show that cracks were generated in the undoped PZT layer, which alleviated the stress, with an average internal stress of +32 MPa. Here, the positive sign of the internal stress value indicates that the internal stress was applied on the tensile side, i.e., in the tensile direction.

[0213] also, Figure 17 The image shows a cracked surface, illustrating the undoped state. Figure 19 The image shows a crack-free case, indicating a doped condition. Figure 16 The stress under cracked conditions and the undoped case are shown. Figure 18 The diagram illustrates stress under crack-free conditions and the case with doping. When cracks occur, the insulation withstand voltage decreases significantly, making it undesirable.

[0214] from Figure 18 , Figure 19 The results show that by applying a specified amount of doping, the internal stress of the PZT layer can be shifted more towards the compression direction, thus mitigating the tensile stress and preventing crack formation.

[0215] Figure 20 This is a graph showing the relative permittivity of the PZT layer in the multilayer structure according to this embodiment. Similarly, as a multilayer structure, YSZ layer, Pt layer, SrRuO3 layer, and PZT layer were deposited on a silicon substrate, and the relative permittivity of the PZT layer was measured. The results are shown below. Figure 20 Here, the relative permittivity was measured using an Agilent Technologies 4284A LCR meter after the MIM structure was formed. Additionally, in Figure 20 In the diagram, the horizontal axis (position) represents the radial position of the φ200mm wafer.

[0216] from Figure 20 The results show that the relative permittivity ε of the PZT layer in the multilayer structure of this embodiment is 200–375 [dimensionless]. In contrast, the relative permittivity of polycrystalline PZT deposited by sputtering is 1000–1200. It is evident that the PZT layer in the multilayer structure of the present invention can reduce the permittivity.

[0217] Figure 21 This is a graph showing the dielectric loss of the PZT layer in the multilayer structure according to this embodiment. Similarly, as a multilayer structure, YSZ layer, Pt layer, SrRuO3 layer, and PZT layer were deposited on a silicon substrate, and the dielectric loss in the PZT layer was measured. The results are shown below. Figure 21 Here, dielectric loss was measured using a 4284A LCR meter manufactured by Agilent Technologies after the MIM structure was formed. Additionally, in Figure 21 In the diagram, the horizontal axis (position) represents the radial position of the φ200mm wafer.

[0218] from Figure 21 The results show that the dielectric loss of the PZT layer in the multilayer structure of this embodiment is 1% to 1.8%. In contrast, the dielectric loss of polycrystalline PZT deposited by vapor deposition is known to be 3% to 5%. It is evident that the PZT layer in the multilayer structure of this embodiment can reduce dielectric loss.

[0219] Figure 22 This represents the piezoelectric constant e of the PZT layer in the multilayer structure involved in this embodiment. 31，f The image.

[0220] Similarly, as a multilayer structure, YSZ layer, Pt layer, SrRuO3 layer, and PZT layer were deposited on a silicon substrate, and the piezoelectric constant e in the PZT layer was measured. 31，f The results are shown in Figure 22 .

[0221] Here, the piezoelectric constant e 31，f The measurement was performed after the cantilever beam was fabricated, using laser Doppler inverse piezoelectric measurement. Additionally, in Figure 22 In the diagram, the vertical axis represents the displacement of the cantilever beam, and the horizontal axis represents the applied AC voltage.

[0222] from Figure 22 The results show that the piezoelectric constant e of the PZT layer in the multilayer structure involved in this embodiment is... 31，f It is 10.0–11.9 [C / m] 2 ], 10.9 [C / m 2[Approximately]. Although the piezoelectric constant decreases, the relative permittivity also decreases, resulting in an improved performance index for the sensor.

[0223] Figure 23 This is a graph showing the performance index of the PZT layer in the multilayer structure according to this embodiment. Similarly, as a multilayer structure, YSZ layer, Pt layer, SrRuO3 layer, and PZT layer were deposited on a silicon substrate, and the performance index (e) of the PZT layer was measured. 31，f ) 2 / ε. The results are shown in Figure 23 .

[0224] Here, the performance index (e) 31，f ) 2 The determination of / ε is based on e 31 The measurement results and the relative permittivity were calculated. Additionally, in Figure 22 In the diagram, the vertical axis represents the displacement of the cantilever beam, and the horizontal axis represents the applied AC voltage.

[0225] from Figure 23 The results show that the performance index (FOM; Figure of Merit) of the PZT layer in the multilayer structure involved in this embodiment is [missing information]. 31，f ) 2 The ε is approximately 10.0–11.9 [GPa] and 33.9 [GPa]. In contrast, the performance index (e) of polycrystalline PZT films formed by sputtering is known to be... 31，f ) 2 / ε is approximately 21.3 [GPa]. It can be seen that the PZT layer in the multilayer structure involved in this embodiment can increase the performance index (e...). 31，f ) 2 / ε.

[0226] Furthermore, in this embodiment, the dielectric loss can be reduced to 1-1.8%.

[0227] The manufacturing method of the multilayer structure according to the second embodiment of the present invention and the multilayer structure will now be described with reference to the accompanying drawings. This embodiment differs from the first embodiment described above in that it has a third layer; other structures described above are labeled with the same reference numerals as those in the first embodiment, and their descriptions are omitted.

[0228] In this embodiment, the third layer 13 is a lanthanum nickel oxide (LaNiO3) film. The third layer 13 is formed on the second layer 12. The third layer 13 is a buffer layer. The third layer 13 is a buffer layer. The third layer 13 is oriented on the (100) plane relative to the (100) plane of the second layer 12. The (100) plane of the third layer 13 is oriented on the Pt (100) plane. The (100) plane of the third layer 13 is arranged in the same way as the (100) planes of the silicon substrate 10, the first layer 11, and the second layer 12. The lattice constant of LaNiO3 is 3.857 angstroms.

[0229] In this embodiment, the third epitaxial film formation process S03 performs epitaxial film formation of the third layer 13 on the second layer 12.

[0230] The third epitaxial film formation process S03, for example, in... Figure 3 The deposition is carried out in the third film-forming chamber 4C. In this case, the target 42a in the third film-forming chamber 4C is a composition capable of epitaxial deposition of the third layer 13. In this case, the target 42a can be a single target composed of lanthanum nickelate (LaNiO3). Alternatively, multiple targets can be used to form a lanthanum nickelate film. In addition, in this case, the gas atmosphere adjustment mechanism 43 sets the gas atmosphere and pressure range as necessary film-forming conditions in the third film-forming chamber 4C. At the same time, the film-forming mechanism 42 sets the necessary film-forming power. In addition, the substrate holding mechanism 41 sets the necessary film-forming temperature and bias power. In this case, the Pt film-forming conditions can be LaNiO3 as the target, with the supply gas set to O2 (Ar + O2) = 60%, gas partial pressure: 0.5 Pa, and plasma generation power: 0.5 kW.

[0231] In this embodiment, the third epitaxial film deposition process S03 forms a buffer layer 13 made of LaNiO3 by sputtering. This buffer layer 13 can be formed by pulsed direct current (Pulse-DC) sputtering. Here, a LaNiO3 target is used as the sputtering target 42a, and in pulsed sputtering (frequency 50 kHz, off time 5 μs) in a sputtering gas such as argon, the temperature of the silicon substrate 10 can be set to approximately 550°C or higher. For example, it can be set to 525°C to 725°C.

[0232] Furthermore, the thickness of the buffer layer 13 composed of LaNiO3 can be set to less than 100 nm. When the thickness of the buffer layer 6 composed of LaNiO3 exceeds 100 nm, it may be impossible to form a perovskite single-phase film.

[0233] In addition, the thickness of the third layer 13 is about 20 nm, preferably 15 nm to 25 nm.

[0234] Furthermore, in this embodiment, the PZT layer, which serves as the fourth layer 14, can be formed by RF sputtering.

[0235] In the fourth epitaxial growth process S04, a PZT target doped with a nickel (Ni) metal is used as the sputtering target. Examples of nickel (Ni) metal include nickel or a lanthanum-nickel alloy (LaNi5). That is, a nickel-doped PZT target or a lanthanum-nickel alloy-doped PZT target can be used. The doping amount is preferably set to 0.1 atm% or more and 5 atm% or less relative to 100 atm% PZT, more preferably 0.5 atm% or more and 5 atm% or less relative to 100 atm% PZT, and even more preferably 1 atm% or more and 3 atm% or less relative to 100 atm% PZT.

[0236] Figure 24 This is a diagram showing the X-ray diffraction peaks of the PZT layer in the multilayer structure involved in this embodiment.

[0237] As a multilayer structure, a YSZ layer is deposited on a silicon substrate, a Pt layer is deposited on the YSZ layer, and a LaNiO3 layer is deposited on the Pt layer. The deposition conditions other than the LaNiO3 layer are the same as those shown in Figure 4. Figures 5A-5C The film-forming conditions are the same as in the first embodiment shown. Further, a PZT layer is formed on the LaNiO3 layer to obtain a multilayer structure. At this time, when the film-forming temperature is set to 625°C, the peak of PZT(004) in X-ray diffraction is 96.800°.

[0238] The result shows that, Figure 24 As shown, when the third layer is a LaNiO3 layer, and... Figure 13 Similarly, the c-axis of the SrRuO3 layer shown can be confirmed when the PZT layer is formed at a film-forming temperature of 625°C.

[0239] Figure 25 This is a graph showing the X-ray diffraction peak (2θ-ω) of the PZT layer in the multilayer structure involved in this embodiment. Figure 26 It means Figure 25 X-ray diffraction peaks of PZT layer ( (Scanned) image.

[0240] and Figure 24 Similarly, as a multilayer structure, a PZT layer was formed on a silicon substrate, and its in-plane distribution was observed.

[0241] The result shows that, Figure 25 , Figure 26 As shown, the YSZ layer, Pt layer, LaNiO3 layer, and PZT layer are all oriented toward the (100) plane and grown epitaxially.

[0242] Figure 27 This is a graph showing the changes caused by the change in the film formation temperature of the PZT layer in the multilayer structure involved in this embodiment, analyzed by X-ray diffraction. It is a graph showing the X-ray diffraction peak (2θ).

[0243] As a multilayer structure, a YSZ layer is deposited on a silicon substrate, a Pt layer is deposited on the YSZ layer, and a LaNiO3 layer is deposited on the Pt layer. The deposition conditions other than the LaNiO3 layer are... Figure 24 The film formation conditions shown are the same. Further, a PZT layer was formed on the LaNiO3 layer to obtain a multilayer structure. At this time, the film formation temperature of the LaNiO3 layer was varied from 350°C to 650°C, and the results of X-ray diffraction analysis of each PZT layer are shown below. Figure 27 Here, a side peak of LaNiO3 (110) was observed at a film-forming temperature of 350 °C.

[0244] The X-ray diffraction results show that when the substrate temperature is above 550℃, the LaNiO3 layer exhibits a (100) peak.

[0245] In this embodiment, the same effect as the above-described embodiment can be achieved.

[0246] Furthermore, in this embodiment, the buffer layer can achieve the same effect as that of polycrystalline PZT and epitaxial PZT.

[0247] In this invention, it can be described as follows.

[0248] [1] In sputtering, ZrO2 needs to be doped with Y (YSZ) in order to form cubic crystals.

[0249] [2] In order to make YSZ epitaxial growth, it is known that any of the following A / B can be used.

[0250] [2A] Silicon surface etching → YSZ (above 700℃)

[0251] [2B] With natural oxide film → YSZ (above 650℃)

[0252] [3] However, when the YSZ is a thin film of less than 60 nm, the above A / B method will detect the side peak of YSZ (111).

[0253] [4] When YSZ is below 60 nm, in order to achieve (100) single orientation of YSZ,

[0254] [4C] indicates that the natural oxide film → seed layer (Zr) → YSZ (above 650℃) must be followed.

[0255] [5] The optimal thickness of the seed layer is 2nm (try 1.5nm, 2nm, 3nm, 5nm).

[0256] [6] YSZ(111) was detected at a seed layer film-forming temperature of room temperature. 400℃ is the best known method (BKM).

[0257] [7] During the process of seed layer → exposure to atmosphere → YSZ film formation, in-situ treatment is necessary because YSZ (111) is detected.

[0258] [8] In order to make Pt oriented in a single orientation to Pt(100) and to grow epitaxially in parallel with Si<100>, YSZ needs to be thinner than 60 nm.

[0259] That is, YSZ film needs to be formed using the [4C] method. Furthermore, the YSZ needs to be thicker than 20 nm and thinner than 60 nm. When the YSZ is 20 nm and 60 nm, Pt will grow on the Pt(111) surface (TEM data).

[0260] [9] In order to achieve single epitaxial growth of Pt (100), the film-forming temperature of Pt needs to be higher than 500℃.

[0261]

[10] There are optimal conditions for the SRO of the buffer layer. Film thickness also has an effect, with 20 nm being the best known method (BKM).

[0262]

[11] When PZT is epitaxially grown under undoped conditions, cracks are generated due to the large tensile stress. In contrast, by using RF sputtering to form films with La and Ni doping, the film stress in PZT can be reduced, and crack-free epitaxial films can be formed. To enable c-axis epitaxial growth of PZT films, a film formation temperature higher than 575°C is required.

[0263] In summary, sputtering has enabled a continuous process.

[0264] Furthermore, in this invention, each structure in the above embodiments can be selected individually and combined separately for implementation.

[0265] Industrial availability

[0266] As examples of applications of the present invention, its applications in devices in Micro Electro Mechanical Systems (MEMS) technology can be listed, such as inkjet printheads, micromirrors, gyroscope sensors, piezoelectric micromachined ultrasonic transducers (PMUTs), vibration elements, elastic wave elements, and acceleration sensors.

[0267] Explanation of reference numerals in the attached figures

[0268] 100… multi-layer structure

[0269] 10…Silicon substrate

[0270] 10a…Natural oxide film

[0271] 11…First Layer (YSZ)

[0272] 12…Second layer (Pt)

[0273] 13…Third layer (buffer layer)

[0274] 14…Fourth layer (PZT)

[0275] 11a…seed layer

Claims

1. A method for manufacturing a multilayer structure, comprising: In the first epitaxial film formation process, a first layer oriented toward the (100) surface is formed on the (100) surface of a silicon substrate by sputtering; In the second epitaxial film formation process, a second layer of Pt oriented toward the (100) plane is formed on the first layer by sputtering; as well as In the third epitaxial film formation process, a third layer oriented toward the (100) plane is formed on the second layer by sputtering. The first epitaxial film formation process is any one of the following processes: The process includes an etching step on the surface of the silicon substrate; and a step of depositing YSZ as the first layer at a temperature above 700°C to a film thickness of 200 nm to 500 nm; or A process in which silicon oxide is formed on the surface of the silicon substrate without removing YSZ as the first layer, and a film thickness of 200 nm to 500 nm is formed at a temperature above 650°C; or The process involves forming a seed layer of Zr at a temperature of 400°C or higher to a thickness of 1.5 nm to 3.5 nm without removing silicon oxide from the surface of the silicon substrate; and forming a YSZ layer as a first layer on the seed layer at a temperature of 650°C or higher to a thickness of 200 nm to 500 nm; or The process includes a step of forming a seed layer of Zr to a thickness of 1.5 nm to 3.5 nm at a temperature of 400°C or higher without removing silicon oxide from the surface of the silicon substrate; and a step of forming a YSZ layer as a first layer on the seed layer to a thickness of 18 nm to 67 nm at a temperature of 650°C or higher.

2. A method for manufacturing a multi-layer structure, comprising: In the first epitaxial film formation process, a first layer oriented toward the (100) surface is formed on the (100) surface of a silicon substrate by sputtering; In the second epitaxial film formation process, a second layer of Pt oriented toward the (100) plane is formed on the first layer by sputtering; as well as In the third epitaxial film formation process, a third layer oriented toward the (100) plane is formed on the second layer by sputtering. In the first epitaxial film deposition process, YSZ is used as the first layer to form a film thickness of 25nm to 50nm, and The second epitaxial film formation process includes a step of forming a film with Pt as the second layer at a temperature above 500°C.

3. The method for manufacturing a multilayer structure according to claim 1 or claim 2, wherein, In the third epitaxial film formation process, the third layer is SrRuO3 or LaNiO3.

4. The method for manufacturing a multilayer structure according to claim 1 or claim 2, wherein, After the third epitaxial film formation process, there is a fourth epitaxial film formation process, in which a PZT layer oriented toward the (100) plane is formed on the third layer by sputtering.

5. The method for manufacturing a multi-layer structure according to claim 4, wherein, In the fourth epitaxial film formation process, lanthanum and nickel are doped into the PZT layer.

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