Semiconductor device, power conversion device, and air conditioning device

CN122936008APending Publication Date: 2026-10-16DAIKIN INDUSTRIES LTD
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Patent Information

Application Number
CN202580020517.3
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2024-03-26
Filing Date
2025-03-24
Publication Date
2026-10-16

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[0007] -The technical problem the invention aims to solve-

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Abstract

A semiconductor device (50) includes semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f), a first conductor pattern (51) electrically connected to first electrodes of the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f), a second conductor pattern (52) arranged adjacent to the first conductor pattern (51) with a space left therebetween, and a conductive body (55) electrically connecting second electrodes of the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f) to the second conductor pattern (52). In the semiconductor device (50), a resistor (59) having a relative dielectric constant lower than that of a package (58) is arranged in a space opposite the first conductor pattern (51) to the second conductor pattern (52) or in a space opposite the first conductor pattern (51) to the first conductive body (55).
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Description

Technical Field

[0001] This disclosure relates to a semiconductor device, a power conversion device, and an air conditioning device. Background Technology

[0002] To date, a semiconductor device is known that has a structure to suppress ringing during switching. The semiconductor device disclosed in Patent Document 1 suppresses ringing by using a buffer circuit.

[0003] In the semiconductor device disclosed in Patent Document 1, a buffer substrate including a buffer circuit is arranged to overlap with at least one of a positive conductor pattern, a negative conductor pattern, and an AC electrode pattern. The positive conductor pattern is on which a positive-side power semiconductor element is mounted, the negative conductor pattern is connected to the negative-side electrode of the negative-side power semiconductor element, and the AC electrode pattern is on which a negative-side power semiconductor element is mounted and connected to the negative-side electrode of the positive-side power semiconductor element.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent No. 6513303 Summary of the Invention

[0007] -The technical problem the invention aims to solve-

[0008] However, semiconductor devices with buffer circuits, as in Patent Document 1, require space to arrange the resistors and capacitors that constitute the buffer circuit. To ensure sufficient space, the dimensions of the semiconductor device with buffer circuits inevitably increase in the planar or normal direction of the substrate.

[0009] The purpose of this disclosure is to suppress the increase in device size and to suppress ringing during switching.

[0010] - Technical solutions used to solve technical problems -

[0011] The first aspect relates to a semiconductor device. The semiconductor device includes semiconductor elements 14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d, a first conductor pattern 51, 251, a second conductor pattern 52, 252, conductors 55, 255, and a package 58. The first conductor patterns 51, 251 are electrically connected to first electrodes of the semiconductor elements 14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d, and the second conductor pattern 52... The conductors 55 and 252 are arranged adjacent to the first conductor patterns 51 and 251 with a gap between them. The conductors 55 and 255 electrically connect the second electrodes of the semiconductor elements 14a, 14b, 14c, 14d, 14e, 14f, 214a, and 214d to the second conductor patterns 52 and 252 and are opposite to the first conductor patterns 51 and 251. The package 58 covers the semiconductor elements 14a, 14b, 14c, 14d, 14e, 14f, and 214d. 4a, 214d, the first conductor patterns 51, 251, the second conductor patterns 52, 252, and the conductors 55, 255, when the semiconductor elements 14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d are unipolar transistors, the first electrode is one of the drain electrode and the source electrode, and the second electrode is the other of the drain electrode and the source electrode. When the semiconductor elements 14a, 14b, 14c, 14d are unipolar transistors, the first electrode is one of the drain electrode and the source electrode, and the second electrode is the other of the drain electrode and the source electrode. When d, 14e, 14f, 214a, and 214d are bipolar transistors, the first electrode is one of the collector and the emitter, and the second electrode is the other of the collector and the emitter. In the space between the first conductor pattern 51, 251 and the second conductor pattern 52, 252, or in the space between the first conductor pattern 51, 251 and the conductor 55, 255, a resistive element 59, 259 with a relative permittivity lower than that of the package 58 is arranged.

[0012] In the first aspect, since the resistors 59 and 259 are arranged in the space opposite the first conductor patterns 51 and 251 and the second conductor patterns 52 and 252, there is no need to provide additional space for arranging the resistors 59 and 259. Furthermore, the resistance generated by the resistors 59 and 259 dissipates the energy of ringing as heat, thus suppressing ringing during switching. Therefore, the semiconductor devices 50 and 250 can both suppress the increase in device size and suppress ringing during switching.

[0013] The second aspect is based on the first aspect, wherein the resistors 59 and 259 are provided in contact with the surfaces of the first conductor patterns 51 and 251, the second conductor patterns 52 and 252, or the conductors 55 and 255.

[0014] In the second aspect, even if the distance between the first conductor patterns 51, 251 and the second conductor patterns 52, 252, or the distance between the first conductor patterns 51, 251 and the conductors 55, 255 is narrowed, the resistors 59, 259 can still be easily arranged. Because the semiconductor devices 50, 250 can have the first conductor patterns 51, 251, the second conductor patterns 52, 252, and the conductors 55, 255 arranged compactly, both the increase in device size and the ringing during switching can be suppressed.

[0015] Thirdly, based on the second aspect, the resistors 59 and 259 are in the form of a thin film.

[0016] In the third aspect, because the resistive element is in the shape of a thin film, the peripheral structure of semiconductor elements 14a, 14b, 14c, 14d, 14e, 14f, 214a, and 214d hardly expands. Semiconductor devices 50 and 250 can suppress the increase in device size.

[0017] The fourth aspect, based on any one of the first to third aspects, sets the following area as S[mm]. 2 The area refers to the area of ​​the portion of the first conductor pattern 51, 251 opposite to the resistor 59, 259 between the first conductor pattern 51, 251 and the second conductor pattern 52, 252 when the resistor 59, 259 is arranged between the first conductor pattern 51, 251 and the second conductor pattern 52, 252, or the area of ​​the portion of the second conductor pattern 52, 252 opposite to the resistor 59, 259, or the area of ​​the first conductor pattern 51, 251 opposite to the resistor 59, 259. When the resistors 59 and 259 are arranged between the first conductor patterns 51 and 251 and the conductors 55 and 255, the area of ​​the portion of the first conductor pattern 51 and 251 opposite to the resistors 59 and 259, or the area of ​​the portion of the conductors 55 and 255 opposite to the resistors 59 and 259, and the resistivity of the resistors 59 and 259 is set to ρ [Ω·m], the following relationship is satisfied: ρ / S≥0.01.

[0018] In the fourth aspect, even if the thickness of the resistive elements 59 and 259 is reduced, an appropriate resistance value can still be obtained. The semiconductor devices 50 and 250 can both suppress the increase in device size and effectively suppress ringing.

[0019] The fifth aspect is based on any one of the first to fourth aspects, wherein the resistors 59 and 259 are polycrystalline silicon.

[0020] In the fifth aspect, resistors 59 and 259 can be easily constructed. Semiconductor devices 50 and 250 can be easily constructed to suppress ringing.

[0021] The sixth aspect is that, based on the second aspect, the thermal conductivity of the resistors 59 and 259 is higher than that of the package 58.

[0022] In the sixth aspect, the heat dissipation of the semiconductor devices 50 and 250 from the portion where resistors 59 and 259 are arranged is improved.

[0023] The seventh aspect is a power conversion device 10, which includes semiconductor devices 50, 250 from any of the first to sixth aspects.

[0024] The eighth aspect is an air conditioning device 1, which includes the power conversion device 10 of the seventh aspect. Attached Figure Description

[0025] Figure 1 This is a piping system diagram of an air conditioning unit with an exemplary embodiment of a semiconductor device.

[0026] Figure 2 This is a schematic diagram showing the circuit of the power conversion device of an air conditioning unit.

[0027] Figure 3 This is a cross-sectional view of a semiconductor device.

[0028] Figure 4 This is a schematic diagram showing a portion of the planar structure of a semiconductor device.

[0029] Figure 5 This is a schematic diagram showing the equivalent circuit of a switching bridge arm including a semiconductor device.

[0030] Figure 6 It is the voltage waveform between the drain and the source.

[0031] Figure 7 This is a cross-sectional view of the semiconductor device involved in the variation example.

[0032] Figure 8 This is a schematic diagram showing a portion of the planar structure of the semiconductor device involved in the variant example. Detailed Implementation

[0033] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that this disclosure is not limited to the embodiments shown below, and various modifications can be made without departing from the technical concept of this disclosure. The accompanying drawings are used to conceptually illustrate this disclosure; therefore, for ease of understanding, dimensions, proportions, or quantities may sometimes be exaggerated or simplified as needed.

[0034] (1) Composition of air conditioning unit

[0035] Figure 1 This is a piping system diagram of an air conditioning unit 1 having the semiconductor device 50 according to this embodiment. The air conditioning unit 1 is an air conditioning unit that cools and heats the room. Figure 1 As shown, the air conditioning unit 1 includes a power conversion device 10, a control unit 40, and a refrigerant circuit 110. A semiconductor device 50 is applied to the power conversion device 10.

[0036] The refrigerant circuit 110 is a closed circuit filled with refrigerant. The refrigerant circuit 110 includes a compressor 120, a four-way reversing valve 130, an outdoor heat exchanger 140, an expansion valve 150, and an indoor heat exchanger 160.

[0037] The compressor 120 can be any type of compressor. For example, the compressor 120 is a scroll compressor or a rotary compressor. The compressor 120 includes an electric motor 30. The electric motor 30 is, for example, an IPM motor (Interior Permanent Magnet Motor). Three-phase alternating current is supplied to the electric motor 30 from the power conversion device 10 to operate the electric motor 30.

[0038] Outdoor heat exchanger 140 is a heat exchanger that allows outdoor air to exchange heat with the refrigerant. Indoor heat exchanger 160 is a heat exchanger that allows indoor air to exchange heat with the refrigerant. Expansion valve 150 is an electronic expansion valve.

[0039] The four-way directional valve 130 is a valve having first to fourth ports. The four-way directional valve 130 can operate in the first state ( Figure 1 The state shown in solid lines in the middle) and the second state ( Figure 1 The four-way directional valve 130 switches between states (shown by dashed lines). In the first state, the four-way directional valve 130 connects the first port to the third port and the second port to the fourth port. In the second state, the four-way directional valve 130 connects the first port to the fourth port and the second port to the third port.

[0040] In the refrigerant circuit 110, the nozzle of the compressor 120 is connected to the first port of the four-way reversing valve 130, and the suction port is connected to the second port of the four-way reversing valve 130. In the refrigerant circuit 110, an outdoor heat exchanger 140, an expansion valve 150, and an indoor heat exchanger 160 are arranged sequentially from the third port to the fourth port of the four-way reversing valve 130. When switching between cooling and heating operation, the air conditioning unit 1 switches the four-way reversing valve 130.

[0041] The control unit 40 is electrically connected to the power conversion device 10. The control unit 40 outputs control signals to the power conversion device 10 to control the power conversion device 10. The control unit 40 controls the motor 30 through the power conversion device 10.

[0042] The power conversion device 10 adjusts the power supplied to the motor 30 according to the control signal from the control unit 40.

[0043] (2) Composition of power conversion device

[0044] Figure 2 The configuration of the power conversion device 10 is shown schematically. It should be noted that the power conversion device 10 includes the resistor 59, which will be described later, but... Figure 2 To simplify the accompanying drawings, resistors such as 59 are omitted.

[0045] like Figure 2 As shown, the power conversion device 10 includes a conversion circuit 11, a DC link section 12, and an inverter circuit 13. The power conversion device 10 converts the power supply voltage from the single-phase AC power supply 20 into a specified AC voltage. The power conversion device 10 supplies the converted AC voltage to the motor 30. It should be noted that the AC power supply 20 may be three-phase instead of single-phase.

[0046] The conversion circuit 11 includes four diodes D1, D2, D3, and D4 connected in a bridge configuration. The conversion circuit 11 is connected to the AC power supply 20 via a reactor 17. The conversion circuit 11 performs full-wave rectification of the power supply voltage. It should be noted that the reactor 17 may not be located between the AC power supply 20 and the conversion circuit 11, but rather in the DC link section 12 between the conversion circuit 11 and the capacitor 18.

[0047] The DC link unit 12 includes a capacitor 18. The capacitor 18 is connected to the output node of the conversion circuit 11.

[0048] The inverter circuit 13 has six semiconductor elements 14a, 14b, 14c, 14d, 14e, and 14f, and six freewheeling diodes 15a, 15b, 15c, 15d, 15e, and 15f. The semiconductor elements 14a, 14b, 14c, 14d, 14e, and 14f function as switching elements. Hereinafter, the six semiconductor elements 14a, 14b, 14c, 14d, 14e, and 14f are sometimes referred to as the first semiconductor element 14a, the second semiconductor element 14b, the third semiconductor element 14c, the fourth semiconductor element 14d, the fifth semiconductor element 14e, and the sixth semiconductor element 14f, and the six freewheeling diodes 15a, 15b, 15c, 15d, 15e, and 15f are referred to as the first freewheeling diode 15a, the second freewheeling diode 15b, the third freewheeling diode 15c, the fourth freewheeling diode 15d, the fifth freewheeling diode 15e, and the sixth freewheeling diode 15f. When there is no need to distinguish between them, they are simply referred to as semiconductor elements 14a, 14b, 14c, 14d, 14e, 14f, and freewheeling diodes 15a, 15b, 15c, 15d, 15e, 15f.

[0049] Semiconductor elements 14a, 14b, 14c, 14d, 14e, and 14f are bridged together. Thus, the inverter circuit 13 includes three switching arms. Each switching arm consists of two semiconductor elements connected in series. Specifically, the first semiconductor element 14a and the fourth semiconductor element 14d form one switching arm, the second semiconductor element 14b and the fifth semiconductor element 14e form another, and the third semiconductor element 14c and the sixth semiconductor element 14f form yet another.

[0050] In each of the three switching arms, the midpoint between the semiconductor elements 14a, 14b, 14c of the upper arm and the semiconductor elements 14d, 14e, 14f of the lower arm is connected to the coils (not shown) of each phase (u-phase, v-phase, w-phase) of the motor 30. Specifically, the midpoint between the first semiconductor element 14a and the fourth semiconductor element 14d is connected to the u-phase, the midpoint between the second semiconductor element 14b and the fifth semiconductor element 14e is connected to the v-phase, and the midpoint between the third semiconductor element 14c and the sixth semiconductor element 14f is connected to the w-phase.

[0051] Each freewheeling diode 15a, 15b, 15c, 15d, 15e, and 15f is connected in antiparallel to its corresponding semiconductor element 14a, 14b, 14c, 14d, 14e, and 14f.

[0052] In this embodiment, semiconductor elements 14a, 14b, 14c, 14d, 14e, and 14f are unipolar transistors. Specifically, semiconductor elements 14a, 14b, 14c, 14d, 14e, and 14f are MOSFETs. Freewheeling diodes 15a, 15b, 15c, 15d, 15e, and 15f are parasitic diodes of semiconductor elements 14a, 14b, 14c, 14d, 14e, and 14f.

[0053] The control unit 40 outputs a PWM signal as a control signal to cause the semiconductor elements 14a, 14b, 14c, 14d, 14e, and 14f to perform switching operations (conduction and cutoff operations). The power conversion device 10 receives the PWM signal and supplies voltage to the gates of the semiconductor elements 14a, 14b, 14c, 14d, 14e, and 14f with a set duty cycle, causing the semiconductor elements 14a, 14b, 14c, 14d, 14e, and 14f to perform switching operations.

[0054] (3) Composition of semiconductor devices

[0055] Reference Figures 3-5 The semiconductor device 50 according to this embodiment will be described in detail. The semiconductor device 50 is configured with semiconductor elements 14a, 14b, and 14c in the upper arm of each switching bridge arm. It should be noted that the following description takes the semiconductor device 50 including the first semiconductor element 14a as an example. The semiconductor device including the second semiconductor element 14b and the semiconductor device including the third semiconductor element 14c are also configured in the same way.

[0056] The switch arm, including the first semiconductor element 14a, comprises the first semiconductor element 14a, a first conductor pattern 51, a second conductor pattern 52, a first conductor 55, a package 58, and a resistor 59 to serve as a semiconductor device 50. The switch arm also includes a fourth semiconductor element 14d, a third conductor pattern 53, a fourth conductor pattern 54, a second conductor 56, and a third conductor 57. The switch arm is mounted on a substrate 60. It should be noted that the following description uses the normal direction of the substrate 60 as the vertical direction. This does not limit the actual orientation of the semiconductor device 50.

[0057] like Figure 3 As shown, the first semiconductor element 14a is a vertical MOSFET. The source electrode 14aS of the first semiconductor element 14a is formed on the upper surface of the chip, and the drain electrode 14aD of the first semiconductor element 14a is formed on the lower surface of the chip. Figure 4 As shown, a gate electrode 14aG serving as a control electrode is provided on the upper surface of the first semiconductor element 14a.

[0058] The fourth semiconductor element 14d, like the first semiconductor element 14a, is a vertical MOSFET, and detailed illustrations are omitted. The source electrode 14dS of the fourth semiconductor element 14d is formed on the upper surface of the chip, and the drain electrode 14dD of the fourth semiconductor element 14d is formed on the lower surface of the chip. A gate electrode 14dG, serving as a control electrode, is provided on the upper surface of the fourth semiconductor element 14d.

[0059] The first conductor pattern 51 is electrically connected to the drain electrode 14aD of the first semiconductor element 14a. For example... Figure 3 As shown, the drain electrode 14aD is mounted on the upper surface of the first conductor pattern 51 using solder or the like, and is electrically connected to the first conductor pattern 51. The drain electrode 14aD of the first semiconductor element 14a is an example of the first electrode.

[0060] The second conductor pattern 52 is electrically connected to the source electrode 14aS of the first semiconductor element 14a. The source electrode 14aS is electrically connected to the second conductor pattern 52 via a first conductor 55. The second conductor pattern 52 corresponds to the midpoint between the first semiconductor element 14a and the fourth semiconductor element 14d. The second conductor pattern 52 has a terminal 52a for electrical connection with the motor 30. The source electrode 14aS of the first semiconductor element 14a is an example of the second electrode.

[0061] The second conductor pattern 52 is spaced apart from the first conductor pattern 51 and arranged adjacent to it. The side surface 51a of the first conductor pattern 51 and the side surface 52b of the second conductor pattern 52 are opposite each other in the in-plane direction of the substrate 60. The distance between the side surface 51a of the first conductor pattern 51 and the side surface 52b of the second conductor pattern 52 is not particularly limited, for example, it is 1 mm.

[0062] like Figure 4 As shown, the third conductor pattern 53 is electrically connected to the drain electrode 14dD of the fourth semiconductor element 14d. The drain electrode 14dD is mounted on the upper surface of the third conductor pattern 53 with solder or the like and is electrically connected to the third conductor pattern 53.

[0063] The fourth conductor pattern 54 is electrically connected to the source electrode 14dS of the fourth semiconductor element 14d. The source electrode 14dS is electrically connected to the fourth conductor pattern 54 through the second conductor 56.

[0064] A first conductor 55 extends across the gap between the first conductor pattern 51 and the second conductor pattern 52. The first conductor 55 and the upper surface 51b of the first conductor pattern 51 are opposite each other in the normal direction of the substrate 60. The distance between the upper surface 51b of the first conductor pattern 51 and the first conductor 55 is slightly greater than the thickness of the chip constituting the first semiconductor element 14a. The first conductor 55 is, for example, an aluminum wire.

[0065] The second conductor 56 extends across the gap between the third conductor pattern 53 and the fourth conductor pattern 54. The second conductor 56 is, for example, an aluminum wire.

[0066] The third conductor 57 electrically connects the second conductor pattern 52 and the third conductor pattern 53. The third conductor 57 also electrically connects the source electrode 14aS of the first semiconductor element 14a to the drain electrode of the fourth semiconductor element 14d. The third conductor 57 is, for example, an aluminum wire.

[0067] The package 58 covers and encapsulates the first semiconductor element 14a, the fourth semiconductor element 14d, the first conductor pattern 51, the second conductor pattern 52, the third conductor pattern 53, the fourth conductor pattern 54, the first conductor 55, the second conductor 56, the third conductor 57, and the resistor 59. The package 58 is, for example, an epoxy resin or gel.

[0068] The resistor 59 is arranged in the space between the first conductor pattern 51 and the second conductor pattern 52, and in the space between the first conductor pattern 51 and the first conductor 55. For example... Figure 3 As shown, the resistor 59 is arranged to contact the surfaces of the first conductor pattern 51, the second conductor pattern 52, and the first conductor 55. The resistor 59 is a component distinct from the package 58.

[0069] The resistor 59 includes a first resistor portion 59a, a second resistor portion 59b, a third resistor portion 59c, and a fourth resistor portion 59d. The first resistor portion 59a is located on the side 51a of the first conductor pattern 51 closest to the second conductor pattern 52 and is disposed over the entire side 51a. The second resistor portion 59b is located on the side 52b of the second conductor pattern 52 closest to the first conductor pattern 51 and is disposed over the entire side 52b. The third resistor portion 59c is located on the portion of the upper surface 51b of the first conductor pattern 51 that connects to the side 51a and extends along the side 51a. The fourth resistor portion 59d is located on the lower surface of the first conductor 55 and extends along the first conductor 55. The corner between the side 51a and the upper surface 51b of the first conductor pattern 51 is covered by the first resistor portion 59a and the third resistor portion 59c.

[0070] The resistor 59 is made of a material with a lower relative permittivity and a higher thermal conductivity than the package 58. The resistor 59 is, for example, polycrystalline silicon. The resistor 59 is in the form of a thin film. The thickness of each resistive portion 59a, 59b, 59c, and 59d of the resistor 59 is, for example, approximately tens to hundreds of μm.

[0071] After mounting the first semiconductor element 14a and the fourth semiconductor element 14d and connecting the first conductor 55, the second conductor 56, and the third conductor 57, a resistor 59 is formed. The resistor 59 is formed by coating the surfaces of the first conductor pattern 51, the second conductor pattern 52, and the first conductor 55 using a coating tool.

[0072] In this embodiment, the resistor 59 is not arranged on the third conductor pattern 53, the fourth conductor pattern 54, and the second conductor 56.

[0073] Figure 5 This is the equivalent circuit of semiconductor device 50. Between the source of the first semiconductor element 14a and the drain of the fourth semiconductor element 14d, a first parasitic inductance L1 formed by the second conductor pattern 52 and a second parasitic inductance L2 formed by the third conductor pattern 53 are connected in series. Between the drain and source of the first semiconductor element 14a, a specific circuit 16 composed of a resistor and a capacitor is connected in parallel through a resistor 59. The specific circuit 16 contains two circuits: a first specific circuit 16a and a second specific circuit 16b.

[0074] The first specific circuit 16a is a circuit composed of a resistor 59 between the first conductor pattern 51 and the second conductor pattern 52. The first specific circuit 16a has a first resistor R1, a second resistor R2, and a first capacitor C1. The first capacitor C1 corresponds to the parasitic capacitance formed between the first conductor pattern 51 and the second conductor pattern 52. That is, the first specific circuit 16a is a circuit formed by connecting the first resistor R1 and the second resistor R2 in series relative to the parasitic capacitance formed between the first conductor pattern 51 and the second conductor pattern 52.

[0075] The value of the first resistor R1 is determined by the resistivity ρ [Ω·m] of the resistor body 59, the thickness d [mm] of the first resistive section 59a, and the area S [mm²] of the first resistive section 59a. 2 The decision is made because as long as the resistance value is above 10Ω, the ringing suppression effect can be achieved, therefore the following relationship (A) for the resistance value R holds: R = ρ × (d × 10) -3 / S×10 -6 )≥10 ···(A)。

[0076] The thickness direction of the first resistive section 59a is the direction in which the first conductor pattern 51 and the second conductor pattern 52 are opposite.

[0077] The area of ​​the first resistive portion 59a corresponds to the area of ​​the portion of the first conductor pattern 51 opposite to the resistive element 59 between the first conductor pattern 51 and the second conductor pattern 52 when the resistor 59 is arranged between the first conductor pattern 51 and the second conductor pattern 52 (hereinafter referred to as the first area). Specifically, the first area is the area of ​​the portion of the first conductor pattern 51 that overlaps with the first resistive portion 59a when viewed from the second conductor pattern 52 side towards the first conductor pattern 51 side. In this embodiment, the first area corresponds to the area of ​​the side surface 51a of the first conductor pattern 51.

[0078] When the resistor is arranged to fill the space between the first conductor pattern 51 and the second conductor pattern 52, the thickness d of the first resistive portion 59a is at its maximum, and the resistivity is at its minimum to satisfy the aforementioned relationship. At this time, the thickness d is consistent with the distance between the first conductor pattern 51 and the second conductor pattern 52. From the viewpoint of module miniaturization, this distance is at most about 1 mm. Substituting the condition d = 1 mm for the maximum thickness d into the aforementioned relationship, the following relationship (B) holds: ρ[Ω·m] / S[mm 2 ] ≥0.01 ···(B).

[0079] Equation (B) represents the lower limit of resistivity, which ensures a resistance value above 10Ω even when d is at its maximum. When d is not at its maximum, a resistivity above this lower limit is required.

[0080] The value of the second resistor R2 is determined by the resistivity of the resistor body 59, the thickness of the second resistor portion 59b, and the area of ​​the second resistor portion 59b. The method for determining the value of the second resistor R2 is the same as that for the first resistor R1. The area of ​​the second resistor portion 59b is equivalent to the area of ​​the portion of the second conductor pattern 52 opposite to the first conductor pattern 51 when the resistor body 59 is arranged between the first conductor pattern 51 and the second conductor pattern 52 (hereinafter referred to as the second area). Specifically, the second area is the area of ​​the portion of the second conductor pattern 52 that overlaps with the second resistor portion 59b when viewed from the first conductor pattern 51 side towards the second conductor pattern 52 side. In this embodiment, the second area is equivalent to the area of ​​the side surface 52b of the second conductor pattern 52.

[0081] When the resistor 59 is arranged to fill the space between the first conductor pattern 51 and the second conductor pattern 52, and the thickness d of the first resistive portion 59a is at its maximum, the resistance of the first specific circuit 16a is one of the first resistance R1 and the second resistance R2. Similarly, when the resistor 59 is not in contact with the first conductor pattern 51 and the second conductor pattern 52 but is located between them, the resistance of the first specific circuit 16a is also one of the first resistance R1 and the second resistance R2. In the above cases, it is sufficient to consider equation (B) for only one of the resistors.

[0082] Even without the resistor 59, a first capacitor C1 is formed between the first conductor pattern 51 and the second conductor pattern 52. The capacitance of the first capacitor C1 varies due to the presence of the resistor 59. The relative permittivity of the resistor 59 is less than that of the package 58; therefore, the capacitance of the first capacitor C1 is smaller when the resistor 59 is present compared to when it is not. The capacitance of the first capacitor C1 is determined by the relative permittivity of the resistor 59, the relative permittivity of the package 58, the distance between the side surface 51a of the first conductor pattern 51 and the side surface 52b of the second conductor pattern 52, the thickness of the first resistive portion 59a, the thickness of the second resistive portion 59b, and the first area or the second area.

[0083] The second specific circuit 16b is a circuit composed of a resistor 59 between the first conductor pattern 51 and the first conductor 55. The second specific circuit 16b has a third resistor R3, a fourth resistor R4, and a second capacitor C2. The second capacitor C2 corresponds to the parasitic capacitance formed between the first conductor pattern 51 and the first conductor 55. In other words, the second specific circuit 16b is a circuit formed by connecting the third resistor R3 and the fourth resistor R4 in series relative to the parasitic capacitance formed between the first conductor pattern 51 and the first conductor 55.

[0084] The value of the third resistor R3 is determined by the resistivity of the resistor body 59, the thickness of the third resistor section 59c, and the area of ​​the third resistor section 59c.

[0085] The thickness direction of the third resistive section 59c is the direction opposite to that of the first conductor pattern 51 and the first conductor 55.

[0086] The area of ​​the third resistive portion 59c corresponds to the area of ​​the portion of the first conductor pattern 51 opposite to the first conductor 55 when the resistor 59 is arranged between the first conductor pattern 51 and the first conductor 55 (hereinafter referred to as the third area). Specifically, when the third resistive portion 59c is opposite to the first conductor 55, the third area is the area of ​​the portion of the first conductor pattern 51 overlapping with the third resistive portion 59c when viewed from the first conductor 55 side towards the first conductor pattern 51 side. In this embodiment, the third area corresponds to the area of ​​the portion of the upper surface 51b of the first conductor pattern 51 that contacts the third resistive portion 59c.

[0087] The value of the fourth resistor R4 is determined by the resistivity of the resistor body 59, the thickness of the fourth resistor part 59d, and the area of ​​the fourth resistor part 59d.

[0088] The thickness direction of the fourth resistor section 59d is the direction opposite to that of the first conductor pattern 51 and the first conductor 55.

[0089] The area of ​​the fourth resistive portion 59d is equivalent to the area of ​​the portion of the first conductor 55 opposite to the first conductor pattern 51 when the resistor 59 is arranged between the first conductor pattern 51 and the first conductor 55 (hereinafter referred to as the fourth area). Specifically, the fourth area is the area of ​​the portion of the first conductor 55 overlapping the fourth resistive portion 59d when viewed from the first conductor pattern 51 side toward the first conductor 55 side in the normal direction of the first conductor pattern 51. When the first conductor 55 is a wire with a circular cross-section, the fourth area is the half of the total surface area of ​​the portion of the first conductor 55 opposite to the fourth resistive portion 59d on the side closest to the first conductor pattern 51.

[0090] Similar to the first resistor R1 and the second resistor R2, the third resistor R3 and the fourth resistor R4 can also satisfy the relationship (B).

[0091] When the resistor 59 is arranged to fill the space opposite the first conductor pattern 51 and the first conductor 55, the resistance of the second specific circuit 16b is one of the third resistor R3 and the fourth resistor R4. In this case, only one of the resistors needs to be considered in relation (B).

[0092] Even without the resistor 59, a second capacitor C2 is formed between the first conductor pattern 51 and the first conductor 55. The capacitance of the second capacitor C2 varies due to the presence of the resistor 59. Specifically, the capacitance of the second capacitor C2 is smaller when the resistor 59 is present compared to when it is not. The capacitance of the second capacitor C2 is determined by the relative permittivity of the resistor 59, the relative permittivity of the package 58, the distance between the upper surface 51b of the first conductor pattern 51 and the first conductor 55, the thickness of the third resistive portion 59c, the thickness of the fourth resistive portion 59d, and the third or fourth area.

[0093] (4) Switching voltage

[0094] like Figure 5 As shown, if parasitic inductances L1 and L2 and parasitic capacitances C1 and C2 are formed, ringing is likely to occur during the switching of the first semiconductor element 14a due to the LC resonance of the parasitic inductances L1 and L2 and the parasitic capacitances C1 and C2. Especially when the first semiconductor element 14a is switched at high speed, the drain-source voltage spike of the first semiconductor element 14a becomes higher, thus easily causing ringing. If the noise level caused by ringing during switching is large, it may adversely affect the operation of other devices.

[0095] Figure 6 The dashed line represents the voltage waveform of the first semiconductor element 14a in a semiconductor device without resistor 59, calculated through simulation. Because resistor 59 is not present, Figure 5 The first resistor R1, the second resistor R2, the third resistor R3, and the fourth resistor R4 are not present. Compared to the case where resistor 59 is present, the capacitance of the first capacitor C1 and the capacitance of the second capacitor C2 are larger.

[0096] like Figure 6 As shown, in a semiconductor device without resistor 59, a relatively large ringing amplitude will be generated after switching.

[0097] Figure 6 The solid line represents the voltage waveform of the first semiconductor element 14a in the semiconductor device 50, which is equipped with a resistor 59 as described in this embodiment, obtained through simulation calculations. It can be seen that ringing is suppressed in the semiconductor device 50.

[0098] In the semiconductor device 50, the ringing energy is dissipated as heat by the first resistor R1, the second resistor R2, the third resistor R3, and the fourth resistor R4. Because the relative permittivity of the resistor 59 is lower than that of the package 58, the capacitance of the first capacitor C1 and the capacitance of the second capacitor C2 are smaller compared to the case where the resistor 59 is not provided. As a result, the semiconductor device 50 is able to suppress ringing during switching.

[0099] (5) Effects of the implementation method

[0100] The semiconductor device 50 according to this embodiment includes a first conductor pattern 51, a second conductor pattern 52, and a first conductor 55. The first conductor pattern 51 is electrically connected to the drain electrodes of the semiconductor elements 14a, 14b, and 14c in the upper bridge arm. The second conductor pattern 52 is arranged adjacent to the first conductor pattern 51 with a gap between them. The first conductor 55 electrically connects the source electrodes of the semiconductor elements 14a, 14b, and 14c to the second conductor pattern 52 and is opposite to the first conductor pattern 51. In the semiconductor device 50, a resistor 59 with a relative permittivity lower than that of the package body 58 is arranged in the space between the first conductor pattern 51 and the second conductor pattern 52 and in the space between the first conductor pattern 51 and the first conductor 55. In the semiconductor device 50, since the resistor 59 is arranged in the empty space such as the space between the first conductor pattern 51 and the second conductor pattern 52, it is not necessary to provide additional space for arranging the resistor 59. In the semiconductor device 50, due to the resistor 59, the parasitic capacitances between the first conductor pattern 51 and the second conductor pattern 52, and between the first conductor pattern 51 and the first conductor 55, are all connected in series with the resistor. The resistance generated by the resistor 59 dissipates the ringing energy as heat. Furthermore, in the semiconductor device 50, due to the resistor 59, the parasitic capacitances between the first conductor pattern 51 and the second conductor pattern 52, and between the first conductor pattern 51 and the first conductor 55, are reduced. Therefore, the semiconductor device 50 can suppress both the increase in device size and the ringing during switching.

[0101] In this embodiment, the resistor 59 is arranged to contact the surface of the first conductor pattern 51, the surface of the second conductor pattern 52, or the surface of the first conductor 55. In the semiconductor device 50, the resistor 59 can be easily arranged even if the distance between the first conductor pattern 51 and the second conductor pattern 52, and the distance between the first conductor pattern 51 and the first conductor 55, is narrowed. Because the semiconductor device 50 can compactly arrange the first conductor pattern 51, the second conductor pattern 52, and the first conductor 55, it can suppress both the increase in device size and the ringing during switching.

[0102] In this embodiment, the resistor 59 is in the form of a thin film. Even with the resistor 59, the peripheral structures of the semiconductor elements 14a, 14b, and 14c in the semiconductor device 50 hardly expand. The semiconductor device 50 is able to suppress the increase in device size.

[0103] In this embodiment, one of the first area, the second area, the third area, and the fourth area is set as S[mm]. 2 Furthermore, when the resistivity of resistor 59 is set to ρ [Ω·m], resistor 59 satisfies the following relationship: ρ / S≥0.01.

[0104] If the aforementioned relationship is satisfied, the resistance value of the resistor 59 can reach an appropriate value even when the thickness of the resistor 59 is relatively thin. Because the semiconductor device 50 allows the resistor 59 to be relatively thin, it can both suppress the increase in device size and effectively suppress ringing.

[0105] In this embodiment, the resistor 59 is polysilicon. The resistor 59 can be easily constructed. The semiconductor device 50 can suppress ringing with a simple configuration.

[0106] (6) Variations

[0107] Figure 7 and Figure 8 This illustration shows a variation of the semiconductor device according to this embodiment. Figure 7 and Figure 8 The image shows a semiconductor device 250 including a switch bridge arm with a first semiconductor element 214a. Semiconductor devices including a second semiconductor element and semiconductor devices including a third semiconductor element also have the same configuration.

[0108] like Figure 7 As shown, the first semiconductor element 214a is a lateral MOSFET. The drain electrode 214aD, source electrode 214aS, and gate electrode 214aG of the first semiconductor element 214a are all formed on the upper surface of the first semiconductor element 214a. The fourth semiconductor element 214d, like the first semiconductor element 214a, is also a lateral MOSFET. The drain electrode 214dD, source electrode 214dS, and gate electrode 214dG of the fourth semiconductor element 214d are all formed on the upper surface of the fourth semiconductor element 214d.

[0109] The switch arm, including the first semiconductor element 214a, comprises the first semiconductor element 214a, a first conductor pattern 251, a second conductor pattern 252, a first conductor 255, a package 58, and a resistor 259, serving as a semiconductor device 250. The switch arm also includes a fourth semiconductor element 214d, a third conductor pattern 253, a second conductor 256, a third conductor 257, and a fourth conductor 258. The switch arm is mounted on a substrate 60.

[0110] The first conductor pattern 251 is the portion where the first semiconductor element 214a is mounted. The first conductor pattern 251 is electrically connected to the source electrode 214aS of the first semiconductor element 214a. The source electrode 214aS is electrically connected to the first conductor pattern 251 via a second conductor 256. The first conductor pattern 251 is also electrically connected to the drain electrode 214dD of the fourth semiconductor element 214d. The drain electrode 214dD is electrically connected to the first conductor pattern 251 via a fourth conductor 258. The first conductor pattern 251 corresponds to the midpoint between the first semiconductor element 214a and the fourth semiconductor element 214d. The source electrode 214aS of the first semiconductor element 214a is an example of a first electrode.

[0111] The second conductor pattern 252 is electrically connected to the drain electrode 214aD of the first semiconductor element 214a. The drain electrode 214aD is electrically connected to the second conductor pattern 252 through the first conductor 255. The drain electrode 214aD of the first semiconductor element 214a is an example of a second electrode.

[0112] The second conductor pattern 252 is arranged adjacent to the first conductor pattern 251 with a gap between them. The side surface 251a of the first conductor pattern 251 and the side surface 252b of the second conductor pattern 252 are opposite each other in the in-plane direction of the substrate 60.

[0113] The third conductor pattern 253 is the portion where the fourth semiconductor element 214d is mounted. The third conductor pattern 253 is electrically connected to the source electrode 214dS of the fourth semiconductor element 214d. The source electrode 214dS is electrically connected to the third conductor pattern 253 through a third conductor 257.

[0114] A first conductor 255 extends across the gap between a first conductor pattern 251 and a second conductor pattern 252. The first conductor 255 and the upper surface 251b of the first conductor pattern 251 are opposite each other in the normal direction of the substrate 60. The first conductor 255 is, for example, an aluminum wire.

[0115] The second conductor 256 is arranged within the area of ​​the first conductor pattern 251. The second conductor 256 is, for example, an aluminum wire.

[0116] The third conductor 257 is arranged within the area of ​​the third conductor pattern 253. The third conductor 257 is, for example, an aluminum wire.

[0117] The fourth conductor 258 extends across the gap between the first conductor pattern 251 and the third conductor pattern 253. The fourth conductor 258 is, for example, an aluminum wire.

[0118] The package 58 covers the first semiconductor element 214a, the fourth semiconductor element 214d, the first conductor pattern 251, the second conductor pattern 252, the third conductor pattern 253, the first conductor 255, the second conductor 256, the third conductor 257, the fourth conductor 258, and the resistor 259, thereby encapsulating them. The package 58 is, for example, resin.

[0119] The resistor 259 is arranged in the space opposite to the first conductor pattern 251 and the second conductor pattern 252, and in the space opposite to the first conductor pattern 251 and the first conductor 255. For example... Figure 7 As shown, the resistor 259 is arranged to contact the surfaces of the first conductor pattern 251, the second conductor pattern 252, and the first conductor 255. The material and shape of the resistor 259 are the same as in the embodiment described above, so detailed descriptions are omitted.

[0120] In the modified configuration, a specific circuit consisting of a resistor and a capacitor is formed between the drain and source of the first semiconductor element 214a via a resistor 259. In this way, even in the modified semiconductor device 250, it is possible to suppress the increase in device size and suppress ringing during switching.

[0121] (7) Other implementation methods

[0122] Semiconductor elements 14a, 14b, 14c, 14d, 14e, 14f, 214a, and 214d can also be constructed from unipolar transistors other than MOSFETs such as JFETs, HFETs, and HEMTs. In this case, the first electrode electrically connected to the first conductor patterns 51 and 251 is one of the drain electrode and the source electrode, and the second electrode electrically connected to the second conductor patterns 52 and 252 is the other of the drain electrode and the source electrode. When the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, and 214d) are unipolar transistors, the control electrode is the gate electrode. Semiconductor elements 14a, 14b, 14c, 14d, 14e, 14f, 214a, and 214d can also be constructed from bipolar transistors such as IGBTs or HBTs. In this case, the first electrode electrically connected to the first conductor patterns 51 and 251 is either the collector or the emitter, and the second electrode electrically connected to the second conductor patterns 52 and 252 is either the collector or the emitter. When the semiconductor element (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) is a bipolar transistor, the control electrode is either the gate electrode or the base electrode.

[0123] Resistors 59 and 259 may also be located in either the space between the first conductor pattern 51 and 251 and the second conductor pattern 52 and 252, or in the space between the first conductor pattern 51 and 251 and the first conductor 55 and 255. For example, the arrangement of resistors 59 and 259 may also be selected from the following modes.

[0124] • It is arranged only on the surface of the first conductor pattern 51, 251, and not on the surface of the second conductor pattern 52, 252 and the first conductor 55, 255.

[0125] • It is arranged only on the surface of the second conductor patterns 52 and 252, and not on the surface of the first conductor patterns 51 and 251 and the first conductors 55 and 255.

[0126] • It is arranged only on the surface of the first conductors 55 and 255, and not on the surface of the first conductor pattern 51 and 251 and the second conductor pattern 52 and 252.

[0127] • Arranged on the surface of the first conductor pattern 51, 251 and the second conductor pattern 52, 252, but not arranged on the surface of the first conductor 55, 255.

[0128] • Arranged on the surfaces of the second conductor patterns 52, 252 and the first conductors 55, 255, but not on the surfaces of the first conductor patterns 51, 251.

[0129] • Arranged on the surface of the first conductor patterns 51, 251 and the surface of the first conductors 55, 255, but not on the surface of the second conductor patterns 52, 252.

[0130] Ringing during switching is caused by LC resonance resulting from parasitic inductance and capacitance. Ringing can be suppressed as long as the resistance generated by resistors 59 and 259 exists only at any point along the LC resonance path. It should be noted that when resistors 59 and 259 are only located on the second conductor patterns 52 and 252, the area S in equation (B) is the second area. When resistors 59 and 259 are only located on the first conductors 55 and 255, the area S in equation (B) is the fourth area.

[0131] Resistors 59 and 259 may not be opposite to the entire side surface 51a and 251a of the first conductor patterns 51 and 251, the entire side surface 52b and 252b of the second conductor patterns 52 and 252, or the entire first conductor 55 and 255. For example, resistors 59 and 259 may be opposite only half of the side surface 51a and 251a of the first conductor patterns 51 and 251. In this case, the first area is half the area of ​​the side surface 51a and 251a of the first conductor patterns 51 and 251.

[0132] Resistors 59 and 259 can also be separated from the surfaces of the first conductor patterns 51 and 251, the second conductor patterns 52 and 252, and the first conductors 55 and 255. Alternatively, resistors 59 and 259 can be configured such that they are in contact with the surfaces of the first conductors 55 and 255, but separated from the surfaces of the first conductor patterns 51 and 251 and the second conductor patterns 52 and 252.

[0133] Resistor elements 59 and 259 do not necessarily have to be thin-film. For example, they can also be... Figure 4 and Figure 7 The configuration shown is such that the spaces between the first conductor patterns 51, 251 and the second conductor patterns 52, 252, as well as the spaces between the first conductor patterns 51, 251 and the first conductors 55, 255, are all filled by resistors 59, 259.

[0134] The thermal conductivity of the materials for resistors 59 and 259 does not necessarily need to be higher than that of the package 58, provided that their relative permittivity is lower. When resistors 59 and 259 are arranged in multiple locations, some resistors 59 and 259 can be composed of materials with higher thermal conductivity than the package 58, while other resistors 59 and 259 can be composed of materials with the same or lower thermal conductivity as the package 58.

[0135] Resistors 59 and 259 may not be polycrystalline silicon. When resistors 59 and 259 are arranged in multiple locations, some resistors 59 and 259 can be made of polycrystalline silicon, while others can be made of other materials.

[0136] Semiconductor devices 50 and 250 can also be configured using semiconductor elements 14d, 14e, 14f, and 214d that constitute the lower bridge arm. For example, resistors can be arranged in the space opposite to the third conductor pattern 53 and the fourth conductor pattern 54, or in the space opposite to the third conductor pattern 53 and the second conductor 56. Semiconductor devices 50 and 250 can also be configured using all semiconductor elements 14a, 14b, 14c, 14d, 14e, 14f, 214a, and 214d.

[0137] The embodiments and variations have been described above, but it should be understood that various changes can be made to their form and details without departing from the spirit and scope of the claims. The above embodiments, variations, and other embodiments can be appropriately combined or substituted as long as the function of the object of this disclosure is not affected.

[0138] The terms “first,” “second,” “third,” etc., mentioned above are only used to distinguish terms that contain the above terms and do not limit the number or order of the terms.

[0139] -Industry Applicability-

[0140] In summary, this disclosure is useful for semiconductor devices.

[0141] - Symbol Explanation -

[0142] 1. Air conditioning unit

[0143] 10 Power Conversion Device

[0144] 14a First semiconductor element (semiconductor element)

[0145] 14aD drain electrode (first electrode)

[0146] 14aS source electrode (second electrode)

[0147] 14b Second semiconductor element (semiconductor element)

[0148] 14c Third Semiconductor Component (Semiconductor Component)

[0149] 50 Semiconductor Devices

[0150] 51 First Conductor Pattern

[0151] 52 Second conductor pattern

[0152] 55 First conductor

[0153] 58 package

[0154] 59 resistor

[0155] 214a First semiconductor element (semiconductor element)

[0156] 214aD drain electrode (second electrode)

[0157] 214aS source electrode (first electrode)

[0158] 214b Second semiconductor element (semiconductor element)

[0159] 214c Third Semiconductor Component (Semiconductor Component)

[0160] 250 semiconductor devices

[0161] 251 First Conductor Pattern

[0162] 252 Second Conductor Pattern

[0163] 255 First Conductor

[0164] 259 resistor

Claims

1. A semiconductor device, characterized in that: The semiconductor device includes semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d), a first conductor pattern (51, 251), a second conductor pattern (52, 252), a conductor (55, 255), and a package (58). The first conductor pattern (51, 251) is electrically connected to the first electrode of the semiconductor element (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d). The second conductor pattern (52, 252) is arranged adjacent to the first conductor pattern (51, 251) with a gap between them. The conductors (55, 255) electrically connect the second electrode of the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) to the second conductor pattern (52, 252) and are opposite to the first conductor pattern (51, 251). The package (58) covers the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d), the first conductor pattern (51, 251), the second conductor pattern (52, 252), and the conductor (55, 255). When the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) are unipolar transistors, the first electrode is one of the drain electrode and the source electrode, and the second electrode is the other of the drain electrode and the source electrode. When the semiconductor elements (14a, 14b, 14c, 14d, 14e, 14f, 214a, 214d) are bipolar transistors, the first electrode is one of the collector electrode and the emitter electrode, and the second electrode is the other of the collector electrode and the emitter electrode. In the space between the first conductor pattern (51, 251) and the second conductor pattern (52, 252) or in the space between the first conductor pattern (51, 251) and the conductor (55, 255), a resistive element (59, 259) with a lower relative permittivity than the package (58) is arranged.

2. The semiconductor device according to claim 1, characterized in that: The resistors (59, 259) are disposed in contact with the surfaces of the first conductor pattern (51, 251), the second conductor pattern (52, 252), or the conductors (55, 255).

3. The semiconductor device according to claim 2, characterized in that: The resistors (59, 259) are in the form of a thin film.

4. The semiconductor device according to any one of claims 1 to 3, characterized in that: Let the following area be S[mm] 2 The area is the area of ​​the portion of the first conductor pattern (51, 251) opposite to the resistor (59, 259) between the first conductor pattern (51, 251) and the second conductor pattern (52, 252), or the area of ​​the portion of the second conductor pattern (52, 252) opposite to the resistor (59, 259), when the resistor (59, 259) is arranged between the first conductor pattern (51, 251) and the second conductor pattern (52, 252). When the resistor (59, 259) is arranged between the first conductor pattern (51, 251) and the conductor (55, 255), the area of ​​the portion of the first conductor pattern (51, 251) opposite to the resistor (59, 259) or the area of ​​the portion of the conductor (55, 255) opposite to the resistor (59, 259) is between the first conductor pattern (51, 251) and the conductor (55, 255), and the resistivity of the resistor (59, 259) is set to ρ [Ω·m], the following relationship is satisfied: ρ / S≥0.

01.

5. The semiconductor device according to any one of claims 1 to 4, characterized in that: The resistors (59, 259) are polycrystalline silicon.

6. The semiconductor device according to claim 2, characterized in that: The thermal conductivity of the resistive elements (59, 259) is higher than that of the package (58).

7. A power conversion device, characterized in that: The power conversion device includes the semiconductor device (50, 250) as described in any one of claims 1 to 6.

8. An air conditioning device, characterized in that: The air conditioning unit includes the power conversion device (10) as described in claim 7.