Etching method

Abstract

Provided is an etching method suitable for forming a groove shape of a laminated film of a silicon oxide film and a silicon nitride film. The etching method includes: a step of placing a wafer on which a laminated film of a silicon oxide film and a silicon nitride film is alternately laminated and on which a plurality of holes are formed, on a wafer stage in a processing chamber; and a step of supplying hydrogen fluoride gas into the processing chamber, etching the silicon oxide film and the silicon nitride film constituting side walls of adjacent holes to expand the holes in a radial direction, thereby connecting the plurality of holes.

Description

Technical Field

[0001] This invention relates to an isotropic dry etching process. In particular, it is suitable for forming slit (groove) shapes in laminated films of silicon oxide and silicon nitride, such as those used in 3D memory. Background Technology

[0002] In semiconductor devices, further miniaturization and three-dimensional device fabrication are advancing to meet the demands for lower power consumption and increased storage capacity. In the fabrication of three-dimensional devices, the structure is complex and three-dimensional. Therefore, in addition to the conventional vertical (anisotropic) etching, which etches perpendicular to the wafer surface, isotropic etching, which can also etch laterally, is widely used. Previously, isotropic etching involved wet processing using solutions. However, due to advancements in miniaturization, problems such as pattern collapse caused by the surface tension of the solutions and etching residue caused by the inability of the solutions to penetrate fine gaps have become apparent. Furthermore, the need for large amounts of solution processing has become a concern from environmental and cost perspectives. Therefore, in isotropic etching, there is a need to replace the conventional wet processing using solutions with dry etching processes that do not use solutions.

[0003] As an example of such isotropic dry etching, Patent Documents 1 to 4 disclose techniques for etching silicon oxide films using hydrogen fluoride (HF) gas and alcohol gas. Furthermore, Patent Document 5 demonstrates that silicon oxide films can be etched with high selectivity relative to silicon nitride films using only HF gas.

[0004] Patent documents 6 to 8 disclose methods for etching silicon nitride films using HF gas. Furthermore, patent document 9 discloses a method capable of effectively adjusting the etching selectivity ratio of silicon oxide film / silicon nitride film over a wide range, thereby meeting the requirements of different applications. Moreover, patent document 10 discloses a method for performing free radical oxidation treatment on a silicon nitride film, subjecting the oxide film to gas-based chemical treatment, and reducing roughness through removal. Patent document 11 discloses a method for removing residual layers formed during the HF etching process of the silicon oxide film and subsequent HF etching of the silicon nitride film.

[0005] As a semiconductor memory device, 3D-NAND has become widely used in recent years due to its practical application. Patent Document 12 describes the selective lateral etching of a silicon nitride film from the sidewall of an opening in a high aspect ratio structure formed by stacking multiple layers of silicon nitride and silicon oxide films in a 3D-NAND device.

[0006] In the manufacturing process of 3D-NAND devices, a structure with holes and slits is formed as a high aspect ratio contact (HARC) in a multilayer stacked structure of silicon nitride (SiN) / silicon oxide (SiO2). These holes and slits have very high aspect ratios, and to vertically form these deep holes and slits, low-temperature dry etching at -60°C or below, known as cryogenic etching, has recently been used. These processes are time-consuming and costly, taking about an hour. Therefore, Patent Document 13 describes a technique to reduce costs where, instead of creating holes and slits separately, the holes are enlarged and connected to each other to form slits. Furthermore, Patent Document 14 discloses a substrate processing method that uses phosphoric acid to etch silicon oxide and silicon nitride at equal etching rates.

[0007] Existing technical documents

[0008] Patent documents

[0009] Patent Document 1: Japanese Patent Application Publication No. 2016-25195

[0010] Patent Document 2: Japanese Patent Application Publication No. 2019-212872

[0011] Patent Document 3: U.S. Patent Application Publication No. 2019 / 0027373

[0012] Patent Document 4: Japanese Patent No. 7065254

[0013] Patent Document 5: Japanese Patent No. 7311652

[0014] Patent Document 6: Japanese Patent Application Publication No. 2018-207088

[0015] Patent Document 7: Japanese Patent Application Publication No. 2008-10661

[0016] Patent Document 8: Japanese Patent Application Publication No. 2008-187105

[0017] Patent Document 9: Japanese Patent No. 7187581

[0018] Patent Document 10: Japanese Patent Application Publication No. 2022-94914

[0019] Patent Document 11: Japanese Patent Publication No. 2024-522062

[0020] Patent Document 12: Specification of US Patent No. 10319603

[0021] Patent Document 13: Japanese Patent Application Publication No. 2021-27290

[0022] Patent Document 14: Japanese Patent Application Publication No. 2023-169532 Summary of the Invention

[0023] The problem that the invention aims to solve

[0024] In Patent Document 13, wet etching is used in the hole enlargement process. With future increases in the number of layers, problems may arise, such as difficulty in the solution penetrating deep holes, and the re-adhesion of wet-etched material onto the sidewalls as deposits—problems unique to wet etching. Furthermore, in order to enlarge multiple adjacent holes into a slit, when viewed in a cross-section in the in-plane direction, connecting the arcs to form a line creates a problem where the original hole shape inevitably results in unevenness along the in-plane direction on the sidewalls of the slit.

[0025] The present invention was made in view of the above-mentioned problems, and provides a method for processing multiple highly longitudinal and transverse holes formed in a multilayer stacked structure of silicon nitride (SiN) / silicon oxide (SiO2) for 3D-NAND structures into a slit shape by dry etching, thereby expanding and connecting them radially. Furthermore, a method is provided for mitigating the in-plane unevenness of the sidewalls caused by the expansion of the holes into slits.

[0026] Methods for solving problems

[0027] An etching method according to one embodiment of the present invention includes: a step of placing a wafer having a stacked film having alternating layers of silicon oxide film and silicon nitride film and having a plurality of holes in a processing chamber on a wafer stage; and a step of supplying hydrogen fluoride gas into the processing chamber to etch the silicon oxide film and silicon nitride film constituting the sidewalls of adjacent holes to radially enlarge the holes, thereby connecting the plurality of holes.

[0028] In addition, the etching method according to another embodiment of the present invention includes: a step of placing a wafer having a laminated film having alternating layers of silicon oxide film and silicon nitride film and forming grooves on a wafer stage in a processing chamber; and a step of reducing the in-plane unevenness of the laminated film on the sidewall of the groove, the step of reducing unevenness including a first step of supplying particles in a plasma of a predetermined gas to the sidewall of the groove and a second step of supplying hydrogen fluoride gas to etch the sidewall of the groove after the first step.

[0029] Invention Effects

[0030] By using HF (hydrogen fluoride) gas, silicon oxide and silicon nitride films can be etched by changing temperature and pressure conditions. Other issues and new features become clear from the description and accompanying drawings in this specification. Attached Figure Description

[0031] Figure 1 This is a cross-sectional view showing a structural example of an etching process apparatus.

[0032] Figure 2A This is the first example of the process flow in Example 1.

[0033] Figure 2B This is the second example of the process flow in Example 1.

[0034] Figure 3A This is a graph showing the experimental results based on the etching of the silicon oxide film in Example 1.

[0035] Figure 3B This is a graph showing the experimental results of silicon nitride film etching based on Example 1.

[0036] Figure 4A This is a cross-sectional view of the laminated film set as the etching object.

[0037] Figure 4B This is a cross-sectional view when the pore structure of the laminated membrane is enlarged and connected.

[0038] Figure 5A This is a top view of the laminated film (first example) set as the etched object.

[0039] Figure 5B This is a top view of the laminated film (first example) set as the etched object.

[0040] Figure 5C This is a top view of the laminated film (first example) set as the etched object.

[0041] Figure 5D This is a top view of the laminated film (second example) set as the etched object.

[0042] Figure 5E This is a top view of the laminated film (second example) set as the etched object.

[0043] Figure 5F This is a top view of the laminated film (second example) set as the etched object.

[0044] Figure 6A This is a cross-sectional view when the pore structure of the laminated membrane is enlarged and connected.

[0045] Figure 6B This is a cross-sectional view when the pore structure of the laminated membrane is enlarged and connected.

[0046] Figure 7 This is a cross-sectional view showing a structural example of an etching process apparatus.

[0047] Figure 8 This is the process flow of Example 2.

[0048] Figure 9 Is using Figure 7 The timing diagram shows the etching process apparatus used to perform the process flow of Example 2.

[0049] Figure 10 Is using Figure 1 The timing diagram shows the etching process apparatus used to perform the process flow of Example 2.

[0050] Figure 11A This is a graph showing the experimental results based on the process flow of Example 2.

[0051] Figure 11B This is a graph showing the experimental results based on the process flow of Example 2.

[0052] Figure 12A This is a cross-sectional view when the pore structure of the laminated membrane is enlarged and connected.

[0053] Figure 12B This is a cross-sectional view when the pore structure of the laminated membrane is enlarged and connected.

[0054] Figure 13A This is the process flow of Example 3.

[0055] Figure 13B This is the process flow of Example 4.

[0056] Figure 14 This diagram illustrates the shape changes of a wafer caused by the bump reduction process.

[0057] Figure 15 This is a diagram illustrating the interaction between free radicals and the concave-convex direction of the planar reaction.

[0058] Figure 16 This is a diagram used to illustrate the method for measuring surface roughness (Ra).

[0059] Figure 17A This is a graph showing the etching rate of a silicon oxynitride film based on a silicon oxide film etching process.

[0060] Figure 17B This is a graph showing the etching amount of a silicon oxynitride film based on a silicon nitride film etching process. Detailed Implementation

[0061] The inventors conducted a detailed study on etching porous samples formed on single-layer films of silicon nitride (PE (Plasma Enhanced)-SiN) and silicon oxide (PE-SiO2) formed by plasma CVD, as well as on the laminated films described later, using hydrogen fluoride gas. Embodiments of the present invention are described in detail below based on the accompanying drawings.

[0062] Example 1

[0063] As Example 1, a method is described to process multiple high-dimensional holes formed by the multilayer stacked structure of silicon nitride / silicon oxide films in a 3D-NAND structure into a slit shape by dry etching, which expands and connects them in the horizontal direction (radial direction of the holes).

[0064] [Etching Processing Apparatus 1]

[0065] use Figure 1 A structural example of an etching processing apparatus is described below. The processing chamber 1 comprises a substrate chamber 11, in which a wafer stage 3 for mounting a wafer 2 is disposed. A plasma source using ICP discharge is disposed above the processing chamber 1. The ICP plasma source can be used for plasma-based generation of reactive gases and plasma-based cleaning of the chamber walls. A cylindrical quartz chamber 12 constituting the ICP plasma source is disposed above the processing chamber 1, and an ICP coil 20 is disposed on the outside of the quartz chamber 12. A high-frequency power supply 21 for plasma generation is connected to the ICP coil 20 via a matching connector 22. The frequency of the high-frequency power supply uses a frequency band of tens of MHz, such as 13.56 MHz. A top plate 25 is disposed on the upper part of the quartz chamber 12. A gas dispersion plate 24 and a cluster plate 23 are disposed below the top plate 25, and the processing gas is introduced into the quartz chamber 12 through the gas dispersion plate 24 and the cluster plate 23.

[0066] The supply flow rate of the processed gas is adjusted by a mass flow controller (MFC) 52 within a mass flow tank 50, which is configured for each gas type. Additionally, a gas distributor 51 is provided downstream of the MFC 52, capable of independently controlling the flow rate and composition of the gas supplied to the vicinity of the center of the quartz chamber 12 and the gas supplied to the vicinity of the outer periphery, and providing detailed control over the spatial distribution of the partial pressure of the processed gas. It should be noted that... Figure 1 Examples of process gases include Ar, N2, O2, H2, and HF, and examples of polar solvent gases include methanol (CH3OH) as an alcohol. Other process gases besides these can also be supplied. In particular, water, ethanol, isopropanol, etc. can also be used as polar solvents. However, when water is used, it freezes below 0°C, so a temperature above 0°C is required as the stage temperature.

[0067] At the lower part of the processing chamber 1, an exhaust mechanism 15 is connected via a vacuum exhaust pipe 16 to depressurize the processing chamber. The exhaust mechanism 15 is configured, for example, as a turbomolecular pump, a mechanical booster pump, or a dry pump. In addition, a pressure regulating mechanism 14 is provided upstream of the exhaust mechanism 15 to adjust the pressure of the processing chamber 1.

[0068] An IR lamp unit for heating the wafer 2 is disposed on the upper part of the wafer stage 3. The IR lamp unit includes an IR lamp 60, a reflector 61, and an IR light transmission window 72. A circular lamp is used in the IR lamp 60. The light emitted from the IR lamp 60 is designed to be primarily in the visible to infrared region (here, referred to as IR light). Figure 1 The device includes IR lamps 60-1, 60-2, and 60-3 with a range of 3 cycles, but it can also be configured with 2 cycles, 4 cycles, etc. Above the IR lamps 60, a reflector 61 is provided to reflect the IR light downwards (towards the wafer orientation). The material of the IR light transmission window 72 is desirable to be free of alkali metal ions, capable of transmitting light in the infrared region, and heat-resistant; quartz is a preferred material.

[0069] An IR lamp power supply 73 is connected to the IR lamp 60, and a high-frequency cutoff filter 74 is installed along its path to prevent high-frequency power noise from flowing into the IR lamp power supply. Furthermore, the IR lamp power supply 73 has the function of independently controlling the power supplied to the IR lamps 60-1, 60-2, and 60-3, and can adjust the radial distribution of the heating amount on the wafer (partial wiring is omitted from the diagram). A space is formed in the center of the IR lamp unit for installing an ion shielding plate 26 for introducing processing gas.

[0070] Inside the circular or cylindrical metal component of the wafer stage 3, a flow path 39 is arranged for a coolant used to cool and regulate the temperature of the wafer stage 3. A coolant, with its temperature regulated to a predetermined range, is supplied to the flow path 39 and circulates within a chiller 38 connected to the inlet and outlet of the flow path 39. The chiller 38 uses a temperature range of -20°C to -60°C for the coolant or the metal component. Furthermore, a dielectric membrane constituting the upper surface of the metal component is disposed, and multiple plate-shaped electrode plates 30 are embedded within this dielectric membrane. DC power is supplied to these electrode plates to fix the wafer 2 using electrostatic adsorption. A DC power supply 31 is connected to each electrode plate 30.

[0071] Furthermore, to efficiently regulate the temperature of wafer 2, a supply port for supplying He gas is provided on the upper surface of the dielectric film of the wafer stage 3. This configuration allows He gas to be supplied between the back side of wafer 2 and the dielectric film while wafer 2 is mounted, thereby promoting heat transfer between wafer 2 and flow path 39. Additionally, the dielectric film is made of a resin such as polyimide to suppress damage to the back side of wafer 2 even when it is heated or cooled while the wafer 2 is electrostatically attached.

[0072] Additionally, a thermocouple 70, serving as a temperature detector (sensor) for detecting the temperature of the wafer stage 3 or the metal component, is disposed inside the metal component of the wafer stage 3. This thermocouple 70 is connected to a thermocouple thermometer 71. The output from the thermocouple thermometer 71 is sent to a control unit that controls the operation of an etching process apparatus (not shown). The arithmetic unit within the control unit detects the temperature value based on an algorithm recorded in pre-set software stored in a storage device. Based on the difference between the detected value and the desired radial temperature distribution of the wafer 2 obtained therefrom, it sends command signals to the IR lamp power supply 73 to independently adjust the output of the IR light from each of the IR lamps 60-1, 60-2, and 60-3 in a manner that achieves the desired temperature distribution of the wafer 2.

[0073] It should be noted that, in addition to the wafer stage 3 having a flow path 39 for refrigerant circulation inside, wafer stages 3 that internally include Peltier elements or similar thermoelectric conversion devices that generate a temperature difference based on the supplied power can also be used. Furthermore, Figure 1 The etching apparatus can heat the inner wall surface of the processing chamber 1, excluding the wafer stage 3, which is exposed to processing gases such as hydrogen fluoride and methanol, to a temperature ranging from, for example, 40°C to 120°C. This suppresses the adsorption of hydrogen fluoride and other gases onto the surfaces of the internal components of the processing chamber 1 and reduces corrosion of the internal components.

[0074] [Etching process flow 1]

[0075] exist Figure 2A This paper presents a first example of a process flow for etching silicon oxide and silicon nitride films using hydrogen fluoride gas without the use of plasma. In this process, the stage temperature is set to -30°C in the same chamber, and the silicon oxide film is etched first (S102), followed by the silicon nitride film (S103, S104, S105).

[0076] First, after the wafer 2 is transported to the processing chamber 1 via the transport port (not shown) provided in the processing chamber 1, the wafer 2 is fixed to the wafer stage 3 using a DC power supply 31 for electrostatic adsorption, and He gas 55 for wafer cooling is supplied to the back of the wafer 2 to perform wafer cooling (S101). Here, the set temperature of the cooler 38 is set to -30°C.

[0077] Next, HF gas, methanol gas, and Ar gas are supplied to processing chamber 1 at specified amounts, for specified times, and at specified pressures to etch the silicon oxide film (S102). Here, -30°C is used as the stage temperature, but it is desirable to be above -50°C and below -20°C. An example of supplying methanol gas and HF gas together is shown, but ethanol or isopropanol can also be used instead of methanol. Furthermore, when using a low temperature near -40°C, only HF gas can be used without using polar solvent gases. Additionally, nitrogen or He can be used instead of the inactive Ar gas. Controlling the etching amount of the silicon oxide film by time is simple. It can also be adjusted by changing the pressure and flow rate. Although in Figure 2A It is not described in the text, but after step S102, the HF gas, methanol gas and Ar gas introduced for etching are vented.

[0078] The pressure used in step S102 is expected to be in the range of 10 Pa to 1000 Pa, and more particularly 100 Pa to 1000 Pa. In step S102, a higher pressure allows for etching of the silicon oxide film at a higher temperature.

[0079] Next, etching of the silicon nitride film is performed (S103, S104). HF gas is supplied to the processing chamber 1 in a predetermined amount and for a predetermined time, while heating is performed simultaneously to form a reaction layer with the silicon nitride film (S103). Heating is performed using an IR (infrared) lamp. The wafer temperature obtained as a result of cooling based on the wafer stage 3 and heating based on the IR lamp 60 is preferably 30°C or higher and 55°C or lower, and more preferably 35°C or higher and 50°C or lower. The thickness of the reaction layer can be controlled using the total pressure or HF partial pressure, the heating temperature (here, the IR lamp output), and the time. It should be noted that when the wafer temperature is lower than 30°C, the reaction layer is not sufficiently formed, making etching difficult. Conversely, at temperatures higher than 55°C, an excessive reaction layer is formed, and when it decomposes and volatilizes, undesirable adjacent silicon oxide films are etched, thus reducing controllability.

[0080] The pressure used in step S103 is preferably in the range of 10 Pa to 1000 Pa, and more particularly preferably 100 Pa to 1000 Pa. Higher pressures facilitate the formation of the silicon nitride film reaction layer, and the required temperature is lowered. Although in Figure 2A It is not described in the text, but after the reaction layer has been formed for a specified time, the supply of HF gas is stopped, and the HF gas remaining in the gas phase is vented. In the case of vacuum venting, it is desirable to set it to below 5 Pa.

[0081] Next, the reaction layer is removed by heating without the flow of HF gas or polar solvent gas (S104). The desired heating temperature here is 70°C to 120°C, and more preferably 70°C to 110°C. At temperatures lower than 70°C, the reaction layer is not sufficiently removed, and etching does not progress. Furthermore, at temperatures higher than 120°C, the decomposition and volatilization of the reaction layer can easily cause undesirable etching of adjacent silicon oxide films, leading to a tendency for decreased controllability.

[0082] Here, an IR lamp is used as the heating method for removing the reaction layer in step S104. Using an IR lamp has the advantage of allowing heating to be performed in a short time. Furthermore, Ar gas or nitrogen gas can be introduced during IR lamp irradiation. It should be noted that the heating method is not limited to this; for example, it could be a method of heating the wafer stage 3, or a method of separately transferring the wafer 2 to a heating-only apparatus for heating treatment. Additionally, the heating treatment can be performed multiple times as needed.

[0083] After heating, wafer cooling is performed (S105). For efficient wafer cooling, it is desirable to simultaneously introduce Ar and nitrogen gases while venting. Then, steps S103 to S105 are treated as one operation, and this cycle is repeated N times. The etching process ends after the desired amount of silicon nitride film etching is achieved by repeating the cycle N times. The amount of silicon nitride film etching can be easily controlled by the number of repetitions of steps S103 to S105.

[0084] [Etching process flow 2]

[0085] exist Figure 2B The diagram shows a second example of a process flow for etching silicon oxide and silicon nitride films using hydrogen fluoride gas without the use of plasma. In the first example, the silicon oxide film is etched in the order of silicon nitride film, while in the second example, the silicon nitride film is etched in the order of silicon oxide film.

[0086] Wafer cooling (S111) is equivalent to Figure 2A Step S101. Additionally, the etching of the silicon nitride film (S112, S113) is equivalent to... Figure 2A Steps S103 and S104, wafer cooling (S114) is equivalent to Figure 2A Step S105. Additionally, the etching of the silicon oxide film (S115) is equivalent to... Figure 2A Step S102. The detailed processing, conditions, and... Figure 2A The situation is the same, so repeated explanations are omitted.

[0087] It should be noted that in samples with actual holes, oxidation or other deterioration sometimes occurs at the ends of the etched silicon nitride film. Therefore, in process 2 (where the silicon nitride film is etched first)... Figure 2B In this process, etching may be hindered. In contrast, in process 1 where the silicon oxide film is etched first (in... Figure 2A Even in such cases, it is easy to obtain stable results.

[0088] [Etching Result 1]

[0089] Instructions for use Figure 1 The etching apparatus shown yielded the result of etching based on hydrogen fluoride (HF) gas. A voltage of ±1200V was applied during etching to electrostatically attract the wafer. Additionally, to ensure good thermal conductivity of the stage, He was allowed to flow from the back side at a pressure of 1.0 kPa.

[0090] The stage temperature was set to -30°C, and the etching rates of single-layer silicon nitride (PE-SiN) and silicon oxide (PE-SiO2) films formed by plasma CVD were first measured. Here, a structure was obtained by attaching 2cm square samples of silicon nitride and silicon oxide films to a high-resistivity substrate (31Ωcm) with vacuum grease on a 300mm diameter substrate wafer.

[0091] For etching the silicon oxide film, a flow rate of HF / methanol / Ar = 0.40 / 0.20 / 0.20 L / min was used, and etching was performed at a total pressure of 300 Pa for time variations of 60 s, 90 s, and 120 s. After etching, the wafer was heated to approximately 130 °C by irradiating it with an IR lamp at 70% output for 50 seconds to completely remove residues from the silicon oxide and silicon nitride films. Figure 3A In the diagram, the left vertical axis shows the etching amount of the silicon oxide and silicon nitride films relative to the aforementioned etching time, and the right vertical axis shows the selectivity of the silicon oxide film relative to the silicon nitride film. It can be seen that the etching amount of the silicon oxide film is 30 nm to 50 nm, while the etched silicon nitride film has a higher selectivity, with an etching amount below a few nm. The etching of the silicon oxide film is a continuous process, and the etching amount is approximately proportional to time, allowing the etching amount to be controlled by changing the time.

[0092] Figure 3A This is the result obtained by etching the silicon oxide film on the above-mentioned sample. In contrast, Figure 3BThe image shows the results of etching a silicon nitride film onto the aforementioned sample. As a first step, Ar was flowed at a flow rate of 1.4 L / min, pressurized to 900 Pa, and maintained at 900 Pa. Simultaneously, HF was introduced at 0.80 L / min, and Ar as a dilution gas was introduced at 0.20 L / min, while an IR lamp was irradiated at 60% output for 60 seconds. This caused the silicon nitride film to change, forming a reaction layer similar to ammonium fluorosilicate. Afterwards, the vent was opened to 100% for 60 seconds. This venting operation vented fluorine gas and a portion of the reaction products. Here, the reaction layer is described as similar to ammonium fluorosilicate because, when the reaction products were analyzed using X-ray photoelectron spectroscopy (XPS), peaks of silicate and ammonium salts were observed, but the composition ratio differed from that of intact ammonium fluorosilicate, with silicon being the more abundant component.

[0093] Next, as a second step, the stage temperature is maintained, Ar flows at 0.50 L / min, and with the exhaust valve open to 100%, an IR lamp is used to irradiate for 40 seconds at 70% output. This process removes the reactive layer. This series of process variations from the first and second steps is repeated 3, 4, and 5 times for etching.

[0094] exist Figure 3B In the diagram, the left vertical axis shows the etching amount of the silicon nitride and silicon oxide films relative to the number of etching cycles described above, and the right vertical axis shows the selectivity ratio of the silicon nitride film to the silicon oxide film. It can be seen that the etching amount of the silicon nitride film is 10 nm to 20 nm, while the etching amount of the etched silicon oxide film is less than 1 nm, exhibiting high selectivity. The etching of the silicon nitride film is a cyclic etching process consisting of the formation of a reaction layer as a first step and the removal of the reaction layer as a second step. The etching amount is proportional to the number of cycles, and the etching amount can be controlled by changing the number of cycles.

[0095] In addition to etching experiments, the process temperature during lamp irradiation was actually measured using a high-resistance substrate with thermocouples, replacing Ar with HF gas. Under the condition of 60% IR lamp output for 60 seconds in the previous reactive layer formation process, the measured temperature reached was 50°C. Furthermore, under the condition of 70% IR lamp output for 40 seconds used in the heating process for removing the reactive layer, the temperature reached was 80°C.

[0096] By setting the stage temperature to -30°C and using HF gas, the reaction temperature can be changed by the presence or absence of IR lamp irradiation, thereby enabling the silicon oxide film and silicon nitride film to be etched at arbitrary etching amounts.

[0097] Next, the etching process based on the combination of silicon oxide film and silicon nitride film using HF gas is performed. Figure 2A The etching process of the laminated film is explained.

[0098] exist Figure 4A The image shows a cross-sectional view of the etched film. Multiple silicon oxide films 102 and silicon nitride films 103 are alternately stacked on a substrate 101, and openings 104A and 104B, forming a hole structure, are provided. Here, only two openings are shown, but such a stacked film with multiple deep holes is a structure visible in 3D-NAND fabrication processes. Through application... Figure 2A The process flow involves etching a silicon oxide film and a silicon nitride film laterally from the opening 104 to enlarge the opening, thereby removing the sidewall 106 and connecting multiple adjacent openings 104. The cross-sectional view after connection is shown below. Figure 4B It should be noted that when the opening is enlarged and connected, the openings that do not need to be connected need to be sealed with an organic film such as a resist film to prevent them from enlarging (not shown).

[0099] exist Figure 5A The image shows a top view (top view) of the etched film, representing a first example. A row of openings is formed along the Y direction, and multiple rows of openings are arranged along the X direction. Figure 5A The section cut at point A-A' is equivalent to Figure 4A .application Figure 2A In the process flow, the opening 104 is isotropically etched and the opening is enlarged. Figure 5B As etching progresses, adjacent openings connect with each other, thus forming opening 107 as a groove structure extending along the Y direction. Figure 5C This situation is illustrated in [the image / image]. Figure 5C The section cut at point A-A' is equivalent to Figure 4B .

[0100] exist Figure 5D The image shows a second example of a top view of the etched film. In the first example, the Y-direction position of the opening 104 in the opening column is offset relative to the adjacent opening column; conversely, in the second example, the Y-direction position of the opening 104 in each opening column is set to be the same. Figure 5D The section cut at point B-B' is equivalent to Figure 4A .application Figure 2A In the process flow, the opening 104 is isotropically etched and the opening is enlarged. Figure 5E As etching progresses, adjacent openings connect with each other, thus forming opening 107 as a groove structure extending along the Y direction. Figure 5F This situation is illustrated in [the image / image]. Figure 5F The section cut at point B-B' is equivalent to Figure 4B .

[0101] The etched films are approximately as follows: the thickness of the silicon nitride film 103 is several nm to 100 nm, and the thickness of the silicon oxide film 102 is several nm to 100 nm. Furthermore, the number of layers is tens to hundreds. The total thickness t of these layers is several μm to tens of μm. The diameter of the opening 104 is several nm to 200 nm. Additionally, the width w (thickness of the sidewall 106) between the connecting openings 104A and 104B is 10 nm to 200 nm.

[0102] Using actual stacked samples, Figure 2A The process flow shown involves etching. At this point, the etching of the silicon oxide film is performed using... Figure 3A The conditions described in relation to the etching of silicon nitride films are applied and Figure 3B The conditions are explained in connection. As a stacking sample, a structure was obtained by alternately stacking 15 layers of silicon oxide film and 15 layers of silicon nitride film with a thickness of 30 nm each, for a total of 30 layers. The 100 nm pores were arranged according to... Figure 5A Such a configuration is achieved by arranging two columns at 60nm intervals to obtain a stacked sample.

[0103] The etching of the silicon oxide film was performed with the time varying to 60 seconds, 90 seconds, and 120 seconds, while the etching of the silicon nitride film was performed with the number of cycles varying to 3, 4, and 5.

[0104] [Table 1]

[0105]

[0106] The evaluation of the etching results is shown in Table 1. When the etching amount of the silicon nitride film is greater than that of the silicon oxide film, such as... Figure 6A As shown, the resulting residue of silicon oxide film 102 has an uneven shape in the vertical direction (out-of-plane direction). Conversely, when the etching amount of silicon oxide film is greater than that of silicon nitride film, such as Figure 6B This results in a residual silicon nitride film 103, creating a shape with unevenness in the vertical direction. In any case, this unevenness will be generated in the vertical direction of the groove (slit) shape for electrode formation in subsequent processes, thus adversely affecting the electrical characteristics of the device.

[0107] In Table 1, the ◎ mark indicates that the difference in etching amount between the silicon oxide film and the silicon nitride film layer is less than 10 nm and is very good; the 〇 mark indicates that the difference in etching amount between the silicon oxide film and the silicon nitride film layer is 10~20 nm and is somewhat good; and the △ mark indicates that the difference in etching amount between the silicon oxide film and the silicon nitride film layer is more than 20 nm and is not very good.

[0108] Based on the results in Table 1, it is suitable to set the etching time of the silicon oxide film to 90 seconds and the etching time of the silicon nitride film to 4 cycles. The etching amount of the silicon oxide film and the etching amount of the silicon nitride film can be controlled separately using the same HF gas, thereby enabling etching with less unevenness in the vertical direction.

[0109] Example 2

[0110] As Example 2, another method is described for processing a slit shape by expanding and connecting multiple high-dimensional holes formed in a multilayer stacked structure of silicon nitride / silicon oxide films in a 3D-NAND structure in the horizontal direction (radial direction of the holes) through dry etching.

[0111] [Etching Processing Device 2]

[0112] use Figure 7 Other structural examples of the etching apparatus are described in summary. This illustrates variations of the etching apparatus; both Embodiment 1 and Embodiment 2 utilize... Figure 1 The etching apparatus shown can also perform this process, utilizing... Figure 7 The etching apparatus shown can also perform this process. (Regarding...) Figure 1 The same structural elements are labeled with the same reference numerals, and the description focuses on the differences. The processing chamber 1 is composed of a substrate chamber 11, in which a wafer stage 3 for mounting the wafer 2 is disposed. A cluster plate 23 is disposed at the center of the upper side of the processing chamber, and the processing gas is supplied to the processing chamber 1 through the cluster plate 23.

[0113] The supply flow rate of the processed gas is adjusted by the MFC52 within the mass flow tank 50, which is set up for each gas type. The flow rate and composition of the gas supplied to the vicinity of the center of the processing chamber 1 and the gas supplied to the vicinity of the outer periphery are independently controlled by the gas distributor 51, thereby precisely controlling the spatial distribution of the partial pressure of the processed gas. Figure 7 Examples of process gases include Ar, N2, He, and HF, and examples of gases that are polar solvents include methanol (CH3OH) as an alcohol. Other process gases besides these can also be supplied.

[0114] Mechanisms for depressurizing the processing chamber, and IR lamp units for heating wafer 2, such as... Figure 1As described in connection with the preceding text, detailed explanation is omitted. A space for setting up a cluster plate 23 for introducing processing gas is formed in the center of the IR lamp unit.

[0115] The wafer stage 3 has an internal flow path 39 for cooling the stage, and the coolant is circulated and supplied by a chiller 38. The chiller 38 is a chiller capable of temperature control from -50°C to 50°C.

[0116] in addition, Figure 7 The wafer stage 3 shown employs a proximity cooling method. Protrusions 56 are provided on the surface of the wafer stage 3, and the wafer 2 is mounted using point support. The height of the protrusions 56 is expected to be between 0.1 mm and 1.0 mm, and the number of supported points is expected to be at least 3. Specifically, 6-point protrusions of 0.25 mm are used here. The material of the wafer stage 3 can be a corrosion-resistant metal, a metal compound, or a material with high thermal conductivity.

[0117] A gap created by the protrusion 56 exists between the wafer stage 3 and the wafer 2. Therefore, by allowing inactive gases such as He, Ar, and N2 to flow into the entire chamber, the inactive gases flow into this gap, causing heat conduction and cooling the wafer 2. It should be noted that the electrostatic adsorption method described in Example 1 can also be used for cooling the wafer.

[0118] Additionally, a thermocouple 70 for measuring the stage temperature is installed inside the wafer stage 3, and the thermocouple 70 is connected to a thermocouple thermometer 71. The stage temperature measured by the thermocouple 70 and the thermocouple thermometer 71 relative to the set temperature of the chiller 38 is within ±1°C.

[0119] Near-cooling wafer carriers have the advantage of simple structure, thus enabling cost reduction. However, in a vacuum state with the chamber empty, wafer 2 is insulated, so a certain amount of time is required before inactive gas flow begins to cool it. Furthermore, it is known that the distance between the refrigerant from cooler 38 and wafer 2 is relatively long, therefore the actual wafer temperature tends to be higher than the set temperature of cooler 38. Measurements of the cooling and processing temperatures in a wafer with a thermocouple showed that the actual wafer temperature is approximately 5°C higher than the set temperature of cooler 38.

[0120] It should be noted that, in addition to the wafer stage 3 having a flow path 39 for refrigerant circulation inside, wafer stages 3 that internally include Peltier elements or similar thermoelectric conversion devices that generate a temperature difference based on the supplied power can also be used. Furthermore, Figure 7The etching apparatus can heat the inner wall surface of the processing chamber 1, excluding the wafer stage 3, which is exposed to processing gases such as hydrogen fluoride and methanol, to a temperature ranging from 40°C to 120°C. This suppresses the adsorption of hydrogen fluoride and other gases onto the surfaces of the internal components of the processing chamber 1 and reduces corrosion of the internal components.

[0121] In this embodiment, HF with a pressure of 50 Pa to 1000 Pa is used at a stage temperature of -50°C to 50°C. Depending on the stage temperature, HF and the polar solvent used may condense, solidify, or liquefy on the wafer. Therefore, when using electrostatic adsorption, if solidification or liquefaction occurs on the back side of the wafer, the back-side cooling gas seal may break, leading to leakage of cooling gases such as He, potentially causing electrostatic chuck errors. In contrast, the stage, which is close to the cooling point, already has a gap with the wafer, so even if solidification or liquefaction of HF or polar solvents occurs, it will not cause errors in the wafer stage, offering the advantage of stable processing.

[0122] Furthermore, in electrostatic adsorption methods, the space between the wafer and the stage is relatively narrow. Therefore, when HF or the polar solvent used is cured or liquefied, the wafer is prone to adhering to the stage due to surface tension. Consequently, if the wafer is lifted using a push pin during wafer removal from the chuck, wafer breakage may occur. In contrast, with a stage that is close to a near-cooling method, the problem of the wafer adhering to the stage due to HF liquefaction can be mitigated.

[0123] In applications using low-temperature processes, condensation can occur on components inside the electrostatic chuck electrodes that come into contact with the atmospheric atmosphere, potentially causing short circuits in circuits such as the power supply unit. From this perspective, a simplified structure, where the internal electrode components are located close to the cooling platform, also has advantages.

[0124] [Etching process flow 2]

[0125] Instructions for use Figure 7 The etching process device performs Figure 8 The example shown is a process flow diagram of Embodiment 2. Additionally, in Figure 9 The timing diagram is shown in the figure. The process of flowing HF gas at low temperature, the process of heating the IR lamp while flowing HF gas, and the process of heating the IR lamp without flowing HF gas are in one cycle. By repeating this cycle N times, the etching of the silicon oxide film and the silicon nitride film is produced in one cycle.

[0126] HF gas is used to etch silicon oxide films at a low temperature of around -40°C. The reaction temperature is differentiated into low and high temperatures by the presence or absence of IR lamp irradiation. Basically, by controlling the reaction time and pressure, silicon oxide and silicon nitride films can be etched at arbitrary amounts. Using this process, the same amount of etching for both silicon oxide and silicon nitride films can be achieved in a single cycle.

[0127] First, after the wafer 2 is transported into the processing chamber 1 via the transport port (not shown) provided in the processing chamber 1, the wafer 2 is placed on the protrusion 56 located on the wafer stage 3. For example, the stage temperature is set to -40°C.

[0128] Subsequently, Ar gas, used for heat conduction to wafer 2, is supplied via MFC 52, gas distributor 51, and cluster plate 23, thereby performing wafer cooling based on stage temperature (S121). The Ar gas serves as both a heat conduction gas to the wafer and a dilution gas for the HF gas; it can be allowed to flow continuously until the etching process is complete, or it can be allowed to stop flowing until the etching process is complete. Alternatively, N2 gas or He gas can be used as inactive gases instead of Ar gas.

[0129] Next, while the wafer is at a low temperature, HF gas is supplied to processing chamber 1 in a predetermined amount for a predetermined time (S122). Here, the stage temperature is -40°C, and the wafer temperature is -35°C, which is about 5°C higher. At this low temperature, the etching of the silicon oxide film proceeds by supplying HF gas. In Example 1, an example of using HF and methanol in the etching of the silicon oxide film is shown. In contrast, at a low temperature near -40°C, although it also depends on the pressure, it is possible to etch the silicon oxide film using only HF. In addition, here, in order to cool the wafer, the pressure in the chamber, which is set to 900 Pa for introducing Ar gas, is temporarily reduced to 300 Pa to reduce the Ar flow rate, and HF gas is introduced. In step S122, it is important to supply HF gas at a low temperature, and by controlling its duration, the amount of silicon oxide film etched can be controlled.

[0130] The pressure within the chamber during the etching of the silicon oxide film is ideally between 10 Pa and 1000 Pa, particularly between 300 Pa and 1000 Pa. Higher pressure results in a higher etching rate. Furthermore, when diluted with an inert gas such as Ar, a higher partial pressure of HF results in a higher etching rate.

[0131] Next, the supplied inert gases such as HF and Ar are heated at the original flow rate to form a reaction layer with the silicon nitride film (S123). Heating is performed using an IR (infrared) lamp. The wafer temperature obtained as a result of stage-based cooling and IR lamp-based heating is ideally between 30°C and 55°C, and more preferably between 35°C and 50°C. The thickness of the reaction layer can be controlled using the total pressure or HF partial pressure, the heating temperature (IR lamp output), and the time. Furthermore, when the wafer temperature is lower than 30°C, the reaction layer is not fully formed, thus reducing the likelihood of etching.

[0132] The pressure used in step S123 is preferably between 10 Pa and 1000 Pa, and more particularly between 100 Pa and 1000 Pa. Higher pressures facilitate the formation of a reaction layer on the silicon nitride film, and the required temperature is lowered. Even with increased pressure, by controlling the output of the IR lamp, a reaction layer can be formed on the silicon nitride film without affecting the silicon oxide film. Although in Figure 8 Not described in the text, but after the reaction layer has formed for a specified time, the supply of HF gas is stopped, and the HF gas remaining in the gas phase is vented. In the case of vacuum venting, it is desirable to set the pressure to below 5 Pa.

[0133] Next, heating is performed without the use of HF gas to remove the reaction layer (S124). The desired heating temperature here is 70°C to 120°C, and more preferably 70°C to 110°C. At temperatures lower than 70°C, the reaction layer is not sufficiently removed, and etching does not progress. Furthermore, when using temperatures higher than 120°C, the decomposition and volatilization of the reaction layer can easily cause etching of adjacent silicon oxide films, resulting in reduced selectivity and a tendency for the shape of the remaining silicon oxide film to deteriorate.

[0134] As a heating method for removing the reaction layer in step S124, an IR lamp is shown here. Using an IR lamp has the advantage of allowing heating to be performed in a short time. Furthermore, Ar gas or nitrogen gas can be introduced during IR lamp irradiation. It should be noted that the heating method is not limited to this; for example, it could be a method of heating the wafer stage, or a method of separately transferring the wafer to a heating-only apparatus for heating treatment. Additionally, the heating treatment can be performed multiple times as needed. After heating, the process returns to step S121 for wafer cooling.

[0135] Thus, the process from step S121 to step S124 is set as one cycle, and this cycle is repeated N times. After repeating the cycle until the required etching amount is obtained, the process ends.

[0136] It should be noted that, Figure 8 The process flow can certainly be used. Figure 1 The etching process shown is achieved through the etching apparatus shown. Figure 10 The diagram shows the time series of gas introduction, temperature, pressure, etc. under this condition. Figure 1 The wafer stage 3 of the etching apparatus shown employs electrostatic adsorption, so the wafer 2 is placed on the wafer stage 3 and cooled, and HF gas is introduced into the processing chamber 1 immediately after placement.

[0137] [Etching Result 2]

[0138] use Figure 7 The etching apparatus shown illustrates the use of Figure 8 The etching process shown is used to obtain the etching results. The etching rates of single-layer silicon nitride (PE-SiN) and silicon oxide (PE-SiO2) films formed by plasma CVD were investigated by setting the stage temperature to -40°C. Here, structures were obtained by vacuum-attaching 2cm square samples of both silicon nitride and silicon oxide films onto a 300mm diameter high-resistivity substrate (31Ωcm) as the substrate wafer.

[0139] To conduct heat to the wafer, Ar is flowed at a flow rate of 1.4 L / min and a pressure of 900 Pa for 120 seconds (step S121). Then, after controlling the pressure to 300 Pa, the Ar flow rate is set to 0.1 L / min and held for 10 seconds. HF is then introduced at a flow rate of 0.80 L / min, and Ar, used as a dilution gas, is introduced at a flow rate of 0.20 L / min, raising the pressure to 900 Pa. The time for pressure rise and the holding time are set to 30 seconds. Etching of the silicon oxide film is induced by introducing HF gas at a low temperature of -40°C. It should be noted that the amount of silicon oxide film etched can be controlled by changing the time for pressure rise and the holding time (step S122).

[0140] Next, with the pressure at 900 Pa, HF was introduced at 0.80 L / min and Ar as a dilution gas was introduced at 0.20 L / min while heating was performed. Heating was conducted using an IR lamp while HF and Ar gases were flowing. Specifically, the IR lamp was irradiated at 60% output for 70 seconds. This caused the silicon nitride film to react, forming a reaction layer similar to ammonium fluorosilicate (step S123). Afterward, the venting valve was opened to 100% and venting was performed for 60 seconds. This venting operation vented fluorine gas and a portion of the reaction products.

[0141] Next, the stage temperature is maintained, and with Ar flowing at 0.50 L / min and the exhaust valve 100% open, heating is performed for 40 seconds at 70% IR lamp output. This process removes the reaction layer (step S124). Afterwards, the process is first returned to its original state, and then cooled by flowing Ar at 1.4 L / min under a pressure of 900 Pa for 60 seconds. Figure 8 The process involves repeating this series of processes multiple times.

[0142] In addition to the etching experiment, the process temperature during lamp irradiation was actually measured using a high-resistance substrate with thermocouples, replacing Ar with HF gas. The temperature reached after 70 seconds of irradiation at a stage temperature of -40°C and 60% output of the IR lamp was 47°C.

[0143] exist Figure 11A In the diagram, the left vertical axis shows the etching amount of the silicon oxide and silicon nitride films for the 1st, 2nd, 3rd, and 4th etching cycles described above. The right vertical axis shows the selectivity of the silicon nitride film relative to the silicon oxide film. Although the slope and shape of the curves differ for both silicon oxide and silicon nitride films, the etching amount increases proportionally with the number of cycles. Furthermore, it can be seen that the selectivity of the silicon nitride film relative to the silicon oxide film shown on the right vertical axis indicates a low-selectivity etching process close to 1.

[0144] exist Figure 11B The diagram shows the output of the IR lamp in step S123 being converted from... Figure 11A The etching conditions were improved from 60% to 65% as a result. Due to the increased output of the IR lamp and the resulting rise in temperature, the amount of reactive layer formed in the silicon nitride film increased, thus increasing the etching amount of the silicon nitride film. Figure 11A In the figure, the etching amount of the silicon oxide film is relatively large compared to that of the silicon nitride film. Conversely, in... Figure 11B The results show that the etching amount of the silicon nitride film is greater than that of the silicon oxide film.

[0145] Based on the above, by changing the output and time of the IR lamp in step S123, and / or the time and stage temperature in step S122, the etching amount of the silicon oxide film and silicon nitride film in one cycle can be controlled. The overall etching amount is also proportional to the number of cycles, and the etching amount can be controlled by changing the number of cycles.

[0146] Using actual stacked samples, Figure 8 The process flow shown involved etching. The laminated sample used the same method as in Example 1, alternating layers of silicon oxide and silicon nitride, 15 layers each with a silicon oxide thickness of 30 nm and a silicon nitride thickness of 30 nm, for a total of 30 layers. The resulting structure contained 100 nm holes. Figure 5ASuch a configuration, with two columns spaced at 60nm intervals, resulted in a stacked sample. Figure 11A as well as Figure 11B The conditions described in connection with the etching process were achieved by varying the number of cycles in an etching process that includes both silicon oxide film etching and silicon nitride film etching in one cycle.

[0147] [Table 2]

[0148]

[0149] The evaluation of the etching results is shown in Table 2. In Table 2, the ◎ symbol indicates a very good result where the difference in etching amount between the silicon oxide and silicon nitride films is less than 10 nm; the 〇 symbol indicates a somewhat good result where the difference in etching amount between the silicon oxide and silicon nitride films is 10-20 nm; and the △ symbol indicates a less good result where the difference in etching amount between the silicon oxide and silicon nitride films is more than 20 nm. Furthermore, the × symbol indicates a case where the overall etching amount is insufficient. In this case, removal by enlarging the hole structure cannot be completely achieved, such as... Figure 12A That leaves a thinner residue between the etching residue and the opening. The etching residue collapses, creating slag. ● The marking indicates a groove structure formed by excessive etching connecting the hole structures, as shown in the image. Figure 12B That would necessitate the aforementioned thickening.

[0150] When the etching amount of the silicon nitride film is greater than that of the silicon oxide film, such as Figure 6A As shown, a residual silicon oxide film is formed, resulting in a textured surface with unevenness in the vertical (out-of-plane) direction. Conversely, if the etching amount of the silicon oxide film is greater than that of the silicon nitride film, such as... Figure 6B This results in residual silicon nitride film, creating an uneven shape in the vertical direction. In any case, this unevenness will be present in the vertical direction of the groove (slit) shape used for electrode formation in subsequent processes, thus adversely affecting the electrical characteristics of the device.

[0151] In the method of Example 2, the overall etching amount can be controlled by the number of cycles. Furthermore, since the etching of the silicon oxide film and the silicon nitride film occur within a single step, the etching amount of the silicon oxide film can be increased by lengthening the time of step S122. Conversely, the etching amount of the silicon nitride film can be increased by increasing the formation of the heat-based reaction layer in step S123, i.e., increasing the heating temperature or lengthening the time. Here, as... Figure 11A , Figure 11B As shown in Table 2, the etching amount of the silicon nitride film is increased by increasing the output of the IR lamp.

[0152] Thus, in the process flow of Example 2, by controlling the etching amount of the silicon oxide film and the etching amount of the silicon nitride film and setting it to 1 cycle, etching with small unevenness in the vertical direction can be performed, and the overall etching amount can be controlled by the number of cycles.

[0153] Example 3

[0154] As an example 3, a method for mitigating the in-plane unevenness of the sidewall caused by enlarging multiple adjacent hole shapes (holes) to form a groove (slit) will be described.

[0155] [Flowchart 1 of the unevenness reduction process]

[0156] like Figure 5C or Figure 5F As shown, when multiple adjacent hole shapes are enlarged and connected, the connected circles form a groove (slit), thus inevitably creating in-plane irregularities on the sidewalls of the groove due to the original hole shapes. Figure 13A The process flow for mitigating such unevenness is shown.

[0157] Here, as a processing device, a device equipped with... Figure 1 An etching apparatus with a plasma source as shown. A 1.5 cm square sample is prepared by enlarging multiple adjacent hole shapes (holes) formed on a laminated film to form grooves (slits) using the method shown in Example 1 or Example 2. A high-resistivity substrate (31 Ωcm) with a diameter of 300 mm is used as the substrate wafer, and the sample is attached using vacuum grease (wafer 2).

[0158] First, after the wafer 2 is transported into the processing chamber 1 via a transport port (not shown) provided in the processing chamber 1, the wafer 2 is fixed to the wafer stage 3 using a DC power supply 31 for electrostatic adsorption, and He gas 55 for wafer cooling is supplied to the back side of the wafer 2 to perform wafer heating / cooling (S131). Here, the set temperature of the cooler is set to 40°C. Next, a plasma-based modification process is performed (S132). Here, N2 plasma and Ar plasma are both acceptable plasmas. Figure 14 The image shows a top view of the sample (wafer 2). Starting from state 1, which is the initial state, the protruding parts of the uneven portion are modified by plasma, thus becoming state 2, which has a plasma-based modified layer 110.

[0159] exist Figure 1 In the illustrated device, since it is not a mechanism that applies bias to the stage and has an ion shielding plate, the probability of ions generated by the plasma reaching wafer 2 is low; they arrive essentially as free radicals. Therefore, it is characterized by the absence of ion damage during device fabrication. Figure 15 As shown, in the protruding portion, highly reactive free radicals generated by the plasma react from both directions (here, the up and down directions) of the protrusion, as indicated by the arrows. Therefore, more reactions with free radicals are induced in the protruding portion.

[0160] Next, the plasma-based modified layer is etched. First, HF gas is supplied to the processing chamber 1 in a predetermined amount for a predetermined time, while heating is performed to form a reaction layer (S133). In the modified protrusions, the reaction layer is more easily formed and easier to remove. As a result, the unevenness is reduced. This state is taken as... Figure 14 State 3 is shown.

[0161] As a heating method, IR (infrared) lamp-based heating is used here. Regarding the wafer temperature obtained as a result of stage-based cooling and IR lamp-based heating, it is desirable to be above 30°C and below 55°C, and more preferably above 35°C and below 50°C. Furthermore, the pressure used in step S133 is desirable to be in the range of 10 Pa to 1000 Pa, and particularly preferably 100 Pa to 1000 Pa. After the reaction layer has been formed for a predetermined time, although... Figure 13A It is not described in the text, but the supply of HF gas is stopped, and the HF gas remaining in the gas phase is vented. In the case of vacuum venting, it is desirable to set it to below 5 Pa.

[0162] Next, heating is performed without allowing HF gas or polar solvent gas to flow, to remove the reaction layer formed by the reaction of the plasma-modified layer with HF gas (S134). The heating temperature here is preferably 70°C to 120°C, and more preferably 70°C to 110°C.

[0163] Here, an example is shown in which plasma treatment (S132) and the formation and removal of the reaction layer (S133, S134) are performed in one cycle. However, plasma treatment (S132) and the formation and removal of the reaction layer (S133, S134) can be performed repeatedly as needed. Moreover, the entire process can be repeated.

[0164] Here, an example of using an IR lamp is shown as a heating method for the formation and removal of the reaction layer. Using an IR lamp has the advantage of being able to heat in a short time. Ar gas or nitrogen gas can also be introduced during IR lamp irradiation. It should be noted that the heating method is not limited to these; for example, it could be a method of heating the wafer stage, or a method of separately handling the wafer in a heating-only device. Furthermore, the heating process can be performed multiple times as needed.

[0165] [Etching results based on bump reduction process 1]

[0166] Here, in the structure obtained by alternately stacking 15 layers of silicon oxide film and silicon nitride film with a thickness of 30 nm each, totaling 30 layers, as used in Examples 1 and 2, the 100 nm pores are described according to... Figure 5A The stacked sample, with two columns arranged at 60 nm intervals, was etched using the etching method shown in Example 2 (IR lamp output 65%, 4 cycles in the reaction layer formation step (S123) of (Table 2)). Thus, an experiment was conducted on the bump reduction effect based on the bump reduction process using a sample with enlarged and connected hole shapes to form a groove shape.

[0167] As for the plasma-based modification treatment (S132), experiments were conducted using the gases and flow rates shown in Table 3 under the conditions of a stage temperature of 40°C, a pressure of 50 Pa, a power of 1600 W, and a time of 180 seconds. Regarding the formation and removal of the reaction layer (S133, S134), irradiation was performed for 120 seconds at 40°C, HF 0.5 L / min, and 400 Pa, simultaneously with 40% IR lamp output. Afterwards, following 60 seconds of venting, irradiation was performed for 30 seconds with 70% IR lamp output while Ar flowed at 1.0 L / min. The reached temperatures, according to further measurements, were 50°C for the formation of the reaction layer in step S133 and 100°C for the removal of the reaction layer in step S134.

[0168] In this embodiment, to reduce such as Figure 14 As shown in state 1, the target is the in-plane irregularity formed by connecting the hole structures on the sidewall when viewed from the top surface. Originally, this irregularity is also continuous in the depth direction (out-of-plane direction), but it is difficult to observe and quantify it. Therefore, as in... Figure 16 As shown in the schematic diagram, regarding the unevenness observed from the upper surface, the average height h of the unevenness within a range of 1.0 μm along the length direction (Y direction) of the groove was measured and quantified as the surface roughness (Ra) based on photographs observed using a scanning electron microscope at 100,000x magnification. The surface roughness (Ra) values ​​as a result of unevenness reduction are shown in (Table 3). Furthermore, as comparative examples, a comparative example without any treatment (Experiment No. 5), a comparative example without plasma treatment but only undergoing the formation and removal of the reaction layer (S133, S134) (Experiment No. 6), and a comparative example only undergoing plasma treatment (S132) (Experiments No. 7 to No. 10) are also shown.

[0169] [Table 3]

[0170]

[0171] As shown in Table 3, the results of the formation and removal of the reaction layer based on HF in N2 plasma treatment in Experiment No. 1 and the results of the formation and removal of the reaction layer based on HF in Ar plasma treatment in Experiment No. 4 are smaller than the initial Ra=24.3nm, which is effective.

[0172] Next, as a comparative example, the results of HF and methanol-based etching performed at a stage temperature of -20°C after plasma modification are shown. The conditions for the plasma-based modification treatment were as follows: stage temperature -20°C, pressure 50 Pa, power 1600 W, and time 180 seconds, using the gases and flow rates shown in Table 4. Following this, the HF and methanol-based etching was performed at a stage temperature of -20°C, with HF flowing at 0.4 L / min, methanol at 0.2 L / min, and Ar at 0.2 L / min at a pressure of 300 Pa for 60 seconds. Afterward, Ar was flowed at 0.5 L / min, and irradiated with an IR lamp at 70% output for 40 seconds while venting, to remove residues, etc.

[0173] [Table 4]

[0174]

[0175] As shown in Table 4, the changes relative to the initial Ra = 25.0 nm are small and have no effect. Thus, it is effective in the unevenness reduction process of Example 4, but on the other hand, it is not effective in the plasma treatment + HF / methanol-based oxide film etching process used as a comparative example. The reasons for this will be examined below.

[0176] During the investigation, additional silicon oxynitride (SiON) films, as well as silicon oxide and silicon nitride films, were prepared. Specifically, these films were formed by plasma CVD at 400°C using SiH4, N2O, and NH3 as raw materials, with the ON ratio of the film thickness approximately 100 nm varying. The N2 / (O2+N2) values, calculated by X-ray photoelectron spectroscopy, were 87.5%, 74.5%, 62.7%, 53%, 42.7%, and 1.9%.

[0177] exist Figure 17A The etching rate is shown relative to this nitrogen content. Figure 17A The etching process used was essentially the same as that used for the silicon oxide film in the comparative examples (Table 4). Specifically, the following process was used: Figure 7The apparatus, at a stage temperature of -30°C, uses HF / methanol / Ar gas flowing at a rate of 0.40 / 0.20 / 0.20 (L / min) at a pressure of 300 Pa for 60 seconds to perform etching. Afterwards, Ar gas flows at 0.5 L / min, and while venting, an IR lamp at 70% output is used for 40 seconds to remove residues. Figure 17A As shown, it can be seen that in the etching process of this silicon oxide film, the etching amount decreases sharply relative to the nitrogen content of the silicon oxynitride (SiON) film.

[0178] exist Figure 17B The diagram shows the results of using the same silicon oxynitride (SiON) film, silicon oxide film, and silicon nitride film, with the etching process set to the silicon nitride film etching process. The process used here is similar to the etching process of the silicon nitride film in Example 1. Specifically, using... Figure 7 The apparatus was set at a stage temperature of -30°C, HF flow rate of 0.4 L / min, and Ar flow rate of 0.2 L / min, while simultaneously irradiating with an IR lamp at 60% output for 60 seconds. After venting for 120 seconds, irradiation was then performed for 50 seconds with Ar flowing at 0.5 L / min and IR lamp output at 70%. This cycle was repeated 5 times.

[0179] exist Figure 17B The figure shows the etching amount of the silicon nitride film etching process relative to the amount of nitrogen. For example... Figure 17B As shown, it can be seen that the closer to 100% nitrogen content, the greater the etching amount. In this experiment, the N2 / (O2+N2) range of 40% to 80% showed that the etching amount of silicon oxynitride film was greater than that of silicon nitride film.

[0180] In the unevenness reduction process of Example 3, it is necessary to reduce the unevenness of the silicon oxide film and silicon nitride film in the same way. That is, both need to be etched. Here, it is believed that when the silicon oxide film is treated with N2 plasma, the surface becomes a silicon oxynitride film. As mentioned above, the silicon oxynitride film can be etched using the same etching process as the silicon nitride film. Since the silicon nitride film can be etched normally, it is believed that by treating it with nitride plasma, the silicon oxide film can be etched, thereby allowing both to be etched simultaneously. Ar plasma, which is also effective, is believed to have a similar effect.

[0181] Example 4

[0182] As an example 4, regarding the method of reducing the in-plane unevenness of the sidewall formed by enlarging multiple adjacent hole shapes (holes) into grooves (slits), a process is described that further adds a step to the method used in example 3 to improve the effect.

[0183] [Flowchart 2 of the unevenness reduction process]

[0184] exist Figure 13B The process flow of Example 4 is shown in the figure. Figure 13B The process shown is in Example 3. Figure 13A The process shown is followed by the removal of the reaction layer based on the polar solvent gas process (S135) to obtain the process. After proceeding to step S134 according to the process shown in Example 3, the polar solvent gas is flowed at a specified temperature, time, and pressure, and then exhaust is performed (not shown).

[0185] As the polar solvent gas, alcohols such as methanol, ethanol, and isopropanol, as well as water, can be used. The desired flow rate of the polar solvent gas is 0.1 to 3.0 L / min, and the desired flow time is 30 to 300 s. The desired pressure is 10 to 1000 Pa. It should be noted that when the polar solvent gas is flowing, it can also be used as a diluent gas, allowing inert gases such as Ar and nitrogen to flow simultaneously. The stage temperature is suitable at this time, ranging from -50°C to 40°C, but when using water, freezing occurs, so a temperature above 0°C is required.

[0186] exist Figure 13B In the process shown, the reaction layer is removed based on heating in step S134, but by further adding the reaction layer removal based on polar solvent gas in step S135, the roughness can be reduced efficiently.

[0187] [Etching results based on bump reduction process 2]

[0188] Regarding the sample described in Example 3, a further process of flowing methanol gas was added, and the undulation was quantified in the same manner as in Example 3. Here, using... Figure 7 The apparatus shown was used for the removal of the reaction layer (S135) in a process based on a polar solvent gas. Experiments were conducted at a stage temperature of -40°C by flowing methanol gas at a rate of 0.8 L / min under a pressure of 300 Pa for 120 seconds. The surface roughness values ​​Ra before and after methanol gas flow are shown in Table 5.

[0189] [Table 5]

[0190]

[0191] As shown in Table 5, it can be seen that by performing N2 plasma treatment (Experiment No. 1a) and Ar plasma treatment (Experiment No. 4a), and then adding a methanol gas process after the reaction layer is formed and removed, the unevenness is further improved.

[0192] This invention is not limited to the foregoing embodiments, but includes various modifications. For example, the embodiments described above have been detailed to facilitate understanding of the invention, and are not limited to having all the structures described. Furthermore, it is possible to add, delete, or replace other structures in parts of the embodiments.

[0193] Explanation of reference numerals in the attached figures

[0194] 1: Processing chamber; 2: Wafer; 3: Wafer stage; 11: Substrate chamber; 12: Quartz chamber; 14: Voltage regulating mechanism; 15: Exhaust mechanism; 16: Vacuum exhaust piping; 20: ICP coil; 21: High-frequency power supply; 22: Matching device; 23: Cluster plate; 24: Gas dispersion plate; 25: Top plate; 26: Ion shielding plate; 30: Electrode plate; 31: DC power supply; 38: Cooler; 39: Flow path; 50: Mass... Flow meter, 51: Gas distributor, 55: He gas, 56: Protrusion, 60: IR lamp, 61: Reflector, 70: Thermocouple, 71: Thermocouple thermometer, 72: IR light transmission window, 73: IR lamp power supply, 74: High frequency cutoff filter, 101: Substrate, 102: Silicon oxide film, 103: Silicon nitride film, 104: Opening, 106: Sidewall, 107: Opening, 110: Modified layer.

Claims

1. An etching method, wherein, The etching method includes: The process of placing a wafer stage in a processing chamber with a laminated film having alternating layers of silicon oxide and silicon nitride films and multiple pores; and The process involves supplying hydrogen fluoride gas into the processing chamber to etch the silicon oxide film and the silicon nitride film that form the sidewalls of adjacent holes, thereby radially enlarging the holes and connecting a plurality of holes.

2. The etching method according to claim 1, wherein, The process of connecting the holes includes the process of forming a reaction film on the sidewall with supplied hydrogen fluoride and the process of removing the reaction film by heating the wafer to detach it.

3. The etching method according to claim 1, wherein, The process of connecting the holes includes etching the silicon oxide film and etching the silicon nitride film.

4. The etching method according to claim 3, wherein, The process of connecting the holes involves repeatedly cycling the etching process of the silicon oxide film and the etching process of the silicon nitride film.

5. The etching method according to any one of claims 1 to 4, wherein, During the etching process of the silicon oxide film, the wafer is maintained at a temperature below -20°C. During the etching process of the silicon nitride film, the wafer is maintained at a temperature above 30°C.

6. The etching method according to claim 1, wherein, In the process of connecting the holes, the sidewalls of the grooves formed in the laminated film by connecting multiple holes have irregularities in the in-plane direction of the laminated film. The etching method further includes a step of reducing the unevenness of the sidewalls of the groove.

7. The etching method according to claim 6, wherein, The process of reducing the unevenness includes a first step of supplying particles in a plasma of a prescribed gas to the sidewall of the trench, and a second step of supplying hydrogen fluoride gas after the first step to etch the sidewall of the trench.

8. The etching method according to claim 7, wherein, The process of reducing the unevenness also includes a third process of supplying polar solvent gas after the second process.

9. The etching method according to claim 7, wherein, The specified gas is nitrogen or argon.

10. The etching method according to claim 8, wherein, The polar solvent is methanol.

11. An etching method, wherein, The etching method includes: The process of placing a wafer stage in a processing chamber, comprising a wafer having alternating layers of silicon oxide and silicon nitride films with grooves, therein; and The process of reducing the in-plane unevenness of the laminated film on the sidewall of the groove. The process of reducing the unevenness includes a first step of supplying particles in a plasma of a prescribed gas to the sidewall of the trench, and a second step of supplying hydrogen fluoride gas after the first step to etch the sidewall of the trench.

12. The etching method according to claim 11, wherein, The process of reducing the unevenness also includes a third process of supplying polar solvent gas after the second process.

13. The etching method according to claim 11, wherein, The specified gas is nitrogen or argon.

14. The etching method according to claim 11, wherein, The polar solvent is methanol.

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