Amorphous wire magnetic sensing circuit, control method, and magnetic sensing device

Abstract

This application relates to an amorphous filament magnetic sensing circuit, control method, and magnetic sensing device. The amorphous filament magnetic sensing circuit includes: a pulse generation circuit; a sample-and-hold circuit, one end of which is connected to the induction coil in the amorphous filament sensor probe; a resistance-to-analog converter circuit, one end of which is connected to the other end of the sample-and-hold circuit, and the other end of which is connected to the induction coil to form a magnetic negative feedback loop; and a control module, which is connected to the pulse generation circuit, the sample-and-hold circuit, and the resistance-to-analog converter circuit respectively. The control module is used to instruct the resistance-to-analog converter circuit to turn on the magnetic negative feedback loop within an enable window, and to instruct the resistance-to-analog converter circuit to turn off the magnetic negative feedback loop outside the enable window. The enable window represents the time window for exciting the amorphous filament in the amorphous filament sensor probe and the time window for sampling the induced voltage of the induction coil. This application can effectively reduce the static power consumption of the magnetic sensing circuit.

Description

Technical Field

[0001] This application relates to the field of sensor circuit technology, and in particular to amorphous wire magnetic sensing circuits, control methods and magnetic sensing devices. Background Technology

[0002] Amorphous wire magnetic sensors are a current research hotspot in the field of weak magnetic field measurement (such as geomagnetic navigation, biomagnetic field detection, and non-destructive testing). Their core component is a cobalt-based amorphous alloy wire, typically in the tens of micrometers in diameter, fabricated using rapid solidification technology. Based on the Giant Magnetoimpedance (GMI) effect, when a high-frequency excitation current (typically tens of MHz to GHz) is applied to both ends of the amorphous wire, its AC impedance changes drastically with even a small change in the external axial magnetic field. Based on this principle, measurements of external magnetic fields can be achieved.

[0003] However, the traditional amorphous filament magnetic sensor circuit architecture still suffers from high static power consumption, resulting in high operating costs and hindering the further promotion and use of amorphous filament magnetic sensors. Summary of the Invention

[0004] Therefore, it is necessary to provide an amorphous wire magnetic sensing circuit, control method, and magnetic sensing device that can effectively reduce static power consumption.

[0005] In a first aspect, this application provides an amorphous wire magnetic sensing circuit, comprising:

[0006] Pulse generation circuit;

[0007] A sample-and-hold circuit, one end of which is connected to the induction coil in the amorphous wire sensor probe;

[0008] A resistance-to-digital-to-analog converter circuit, one end of which is connected to the other end of a sample-and-hold circuit, and the other end of which is connected to an induction coil to form a magnetic negative feedback loop; and,

[0009] The control module is connected to the pulse generation circuit, the sample and hold circuit, and the resistor-to-digital converter circuit.

[0010] The control module is used to indicate that the magnetic negative feedback loop is turned on by the resistor digital-to-analog converter circuit within the enable window, and to indicate that the magnetic negative feedback loop is turned off by the resistor digital-to-analog converter circuit outside the enable window; the enable window represents the time window for exciting the amorphous wire in the amorphous wire sensor probe and the time window for sampling the induced voltage of the induction coil.

[0011] In one embodiment, the sample-and-hold circuit includes a switched capacitor network and an integrator;

[0012] One end of the switched capacitor network is connected to the induction coil, and the other end is connected to one end of the integrator; the other end of the integrator is connected to one end of the resistor-to-digital converter circuit.

[0013] The control module is also connected to a switched capacitor network and an integrator.

[0014] In one embodiment, the integrator includes an operational amplifier, a first capacitor unit, and a second capacitor unit; the resistor-to-digital converter includes a first RDAC circuit and a second RDAC circuit.

[0015] The first and second input terminals of the switched capacitor network are respectively connected to one end and the other end of the induction coil.

[0016] The first output terminal of the switched capacitor network is connected in parallel with one end of the first capacitor unit and connected to the inverting input terminal of the operational amplifier; the second output terminal of the switched capacitor network is connected in parallel with one end of the second capacitor unit and connected to the non-inverting input terminal of the operational amplifier.

[0017] The first output terminal of the operational amplifier is connected in parallel with the other end of the first capacitor unit to one end of the first RDAC circuit, and the other end of the first RDAC circuit is connected between the first input terminal of the switched capacitor network and one end of the induction coil.

[0018] The second output terminal of the operational amplifier is connected in parallel with the other end of the second capacitor unit to one end of the second RDAC circuit, and the other end of the second RDAC circuit is connected between the second input terminal of the switched capacitor network and the other end of the induction coil.

[0019] The control module is also connected to the control terminals of the first RDAC circuit and the second RDAC circuit, respectively.

[0020] In one embodiment, the first RDAC circuit includes multiple first RDAC sub-circuits connected in parallel, each first RDAC sub-circuit including a first switch, a second switch, a first enable switch, and a first resistor; the second RDAC circuit includes multiple second RDAC sub-circuits connected in parallel, each second RDAC sub-circuit including a third switch, a fourth switch, a second enable switch, and a second resistor; wherein...

[0021] The first output terminal of the operational amplifier is connected in parallel with the other end of the first capacitor unit and connected to one end of the first enable switch in each first RDAC sub-circuit; the first input terminal of the switched capacitor network is connected in parallel with one end of the induction coil and connected to one end of the first resistor in each first RDAC sub-circuit.

[0022] In each of the first RDAC sub-circuits, the other end of the first enable switch is connected to the other end of the first resistor, one end of the first switch is used to connect to the power supply voltage, the other end of the first switch and one end of the second switch are connected in parallel between the other end of the first enable switch and the other end of the first resistor, and the other end of the second switch is used to ground.

[0023] The second output terminal of the operational amplifier is connected in parallel with the other end of the second capacitor unit and connected to one end of the second enable switch in each second RDAC sub-circuit; the second input terminal of the switched capacitor network is connected in parallel with the other end of the induction coil and connected to one end of the second resistor in each second RDAC sub-circuit.

[0024] In each of the second RDAC sub-circuits, the other end of the second enable switch is connected to the other end of the second resistor, one end of the fourth switch is used to connect to the power supply voltage, the other end of the fourth switch and one end of the third switch are connected in parallel between the other end of the second enable switch and the other end of the second resistor, and the other end of the third switch is used to ground.

[0025] The first RDAC circuit and each switch in the first RDAC circuit are connected to the control module.

[0026] In one embodiment, the amorphous wire magnetic sensing circuit further includes a first chopper switch and a second chopper switch; wherein,

[0027] The first chopper switch is located on the input side of the operational amplifier, and the second chopper switch is located on the output side of the operational amplifier; the first chopper switch and the second chopper switch are used to suppress low-frequency noise.

[0028] Secondly, this application provides a control method for an amorphous filament magnetic sensing circuit, applied to a control module in the amorphous filament magnetic sensing circuit described in any embodiment of the first aspect, the method comprising:

[0029] Within the enable window, the indicator resistor digital-to-analog converter circuit activates the magnetic negative feedback loop;

[0030] Outside the enable window, the indicator resistor digital-to-analog conversion circuit shuts off the magnetic negative feedback loop; wherein, the enable window characterizes the time window for exciting the amorphous filament in the amorphous filament sensor probe and the time window for sampling the induced voltage of the induction coil.

[0031] In one embodiment, the method further includes:

[0032] Without energizing the amorphous wire, the switched capacitor network of the control sample-and-hold circuit is disconnected from the integrator of the sample-and-hold circuit, and the current induced voltage of the induction coil is sampled to obtain the first sample voltage.

[0033] The control pulse generation circuit excites the amorphous wire, controls the switched capacitor network to disconnect from the integrator, and performs peak sampling on the current induced voltage of the induction coil based on the sampling phase to obtain the second sampled voltage; wherein, the sampling phase is determined based on the phase search strategy;

[0034] The control switched capacitor network is electrically connected to the integrator, and the difference between the first sampled voltage and the second sampled voltage is processed and output to one end of the integrator;

[0035] Based on the integrated signal output from the other end of the integrator, the feedback current output by the resistor-to-digital converter is adjusted; the feedback current is used to generate a magnetic flux density opposite to the direction of the magnetic field to be detected through the induction coil.

[0036] In one embodiment, the phase search strategy includes:

[0037] The control resistor digital-to-analog conversion circuit disconnects the magnetic negative feedback loop and applies a constant magnetic field to the induction coil;

[0038] The control switched capacitor network samples the induced voltage of the current induction coil based on the sampling clock to obtain the third sampled voltage;

[0039] If the third sampling voltage does not meet the zero-crossing condition, the sampling clock is finely phased, and the induced voltage of the current induction coil is sampled based on the phase-fine-tuned sampling clock until the induced voltage of the induction coil meets the zero-crossing condition to obtain the sampling phase.

[0040] In one embodiment, the method further includes:

[0041] The enable switch of the control resistor digital-to-analog conversion circuit is turned off;

[0042] By controlling the switching state of the resistor-to-digital converter circuit, the magnetic field bias on the induction coil is adjusted so that the differential output of the operational amplifier in the sample-and-hold circuit is zero when the external magnetic flux is zero.

[0043] Thirdly, this application provides a magnetic sensing device, including the amorphous wire magnetic sensing circuit described in any embodiment of the first aspect.

[0044] The aforementioned amorphous filament magnetic sensing circuit, control method, and magnetic sensing device can sample the peak voltage of the induced voltage output by the induction coil through a sample-and-hold circuit. The output signal of the sample-and-hold circuit is processed by a resistor-to-digital converter circuit and converted into a feedback current, which is then connected to the induction coil to form a magnetic negative feedback loop of the amorphous filament magnetic sensing circuit. The control module instructs the resistor-to-digital converter circuit to turn on the magnetic negative feedback loop during the time window of energizing the amorphous filament and sampling the induced voltage of the induction coil, and instructs the resistor-to-digital converter circuit to turn off the magnetic negative feedback loop outside the time window. In this way, the amorphous filament magnetic sensing circuit does not need to maintain the feedback current flowing through the induction coil at all times, thereby effectively reducing the overall static power consumption of the amorphous filament magnetic sensing circuit. Attached Figure Description

[0045] To more clearly illustrate the technical solutions in the embodiments of this application or the conventional technology, the drawings used in the description of the embodiments or the conventional technology will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0046] Figure 1 This is a first structural block diagram of an amorphous filament magnetic sensing circuit in one embodiment;

[0047] Figure 2 This is a linear model of an amorphous filament magnetic sensing circuit based on a magnetic negative feedback loop in one embodiment;

[0048] Figure 3 This is a second structural block diagram of an amorphous filament magnetic sensing circuit in one embodiment;

[0049] Figure 4 This is a third structural block diagram of an amorphous filament magnetic sensing circuit in one embodiment;

[0050] Figure 5 This is a fourth structural block diagram of an amorphous filament magnetic sensing circuit in one embodiment;

[0051] Figure 6 This is a fifth structural block diagram of an amorphous filament magnetic sensing circuit in one embodiment;

[0052] Figure 7 This is a first flowchart illustrating the control method of an amorphous filament magnetic sensing circuit in one embodiment.

[0053] Figure 8 This is a second flowchart illustrating the control method of an amorphous filament magnetic sensing circuit in one embodiment.

[0054] Figure 9 This is a flowchart illustrating the phase search strategy in one embodiment;

[0055] Figure 10 This is a schematic diagram of the circuit structure framework of the control module in one embodiment;

[0056] Figure 11 This is a schematic diagram of the sampling process for the peak induced voltage in one embodiment;

[0057] Figure 12 This is a schematic diagram of the magnetic field bias recalibration process in one embodiment. Detailed Implementation

[0058] To facilitate understanding of this application, a more complete description will be provided below with reference to the accompanying drawings, which illustrate embodiments of the present application. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that the disclosure of this application will be thorough and complete.

[0059] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the application.

[0060] It is understood that the terms "first," "second," etc., used herein may be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one element from another. For example, without departing from the scope of this application, a first resistor may be referred to as a second resistor, and similarly, a second resistor may be referred to as a first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0061] It is understood that the term "connection" in the following embodiments should be understood as "electrical connection," "communication connection," etc., if the connected circuits, modules, units, etc., have electrical signal or data transmission with each other.

[0062] It is understandable that "at least one" refers to one or more, and "multiple" refers to two or more. "At least a part of an element" refers to part or all of an element.

[0063] When used herein, the singular forms of “a,” “an,” and “the” may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms “comprising / including” or “having,” etc., specify the presence of the stated features, wholes, steps, operations, components, parts, or combinations thereof, but do not preclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts, or combinations thereof. Meanwhile, the term “and / or” as used in this specification includes any and all combinations of the associated listed items.

[0064] Understandably, compared to traditional magnetoresistive (MR), giant magnetoresistive (GMR), and tunnel magnetoresistive (TMR) sensors, amorphous filament magnetic sensors offer significant advantages such as nanoterascale resolution, wide dynamic range, low hysteresis, and fast response, providing a new solution for high-performance micro magnetic sensors. However, the design of amorphous filament magnetic sensing circuits still faces the following stringent challenges:

[0065] (1) Complex noise interference in non-magnetically shielded environments;

[0066] (2) Under the influence of PVT (Process, Voltage, Temperature) variation and various drift effects, the magneto-electric conversion gain of the amorphous wire magnetic sensor has poor robustness.

[0067] (3) Traditional amorphous wire magnetic sensing circuits have high static power consumption;

[0068] (4) The parasitic resistance voltage drop of the induction coil will lead to a deterioration of the signal-to-noise ratio.

[0069] To address the problems existing in traditional amorphous wire magnetic sensing circuits, technicians may consider Correlated Double Sampling (CDS) to eliminate noise interference. The core idea of ​​CDS for noise elimination is to sample the signal containing noise information and the noise signal sequentially, storing them in different capacitors, and finally subtracting them to eliminate the noise. With the maturity of CMOS technology and switched-capacitor circuit technology, CDS technology has been introduced into analog integrated circuit design. CDS technology originated from self-zeroing technology. For example, a typical AZ amplifier has a sampling phase and an amplification phase. In the sampling phase, the amplifier's offset voltage is sampled and stored in a capacitor, while in the amplification phase, the offset voltage is eliminated. Since low-frequency noise (e.g., 1 / f noise) is highly correlated between two short intervals, this technology has been extended to eliminate low-frequency noise. Furthermore, with structural improvements, CDS can also be used to eliminate offset voltage. However, in the traditional magnetic sensor circuit architecture using CDS, the feedback current needs to continuously flow through the induction coil to maintain negative feedback, which leads to a significant increase in power consumption. In addition, the non-ideal voltage drop caused by the parasitic resistance of the amorphous wire will further affect the detection accuracy.

[0070] In one exemplary embodiment, such as Figure 1 As shown, this application provides an amorphous filament magnetic sensing circuit 100, which includes:

[0071] Pulse generation circuit 102;

[0072] Sample and hold circuit 104, one end of which is connected to the induction coil in the amorphous wire sensor probe;

[0073] A resistance-to-digital-to-analog converter circuit 106 is provided, with one end connected to the other end of a sample-and-hold circuit 104, and the other end connected to an induction coil to form a magnetic negative feedback loop; and...

[0074] Control module 108 is connected to pulse generation circuit 102, sample and hold circuit 104 and resistor-to-digital converter circuit 106 respectively;

[0075] The control module 108 is used to turn on the magnetic negative feedback loop of the indicator resistor digital-to-analog converter circuit 106 within the enable window and to turn off the magnetic negative feedback loop of the indicator resistor digital-to-analog converter circuit 106 outside the enable window; the enable window represents the time window for exciting the amorphous wire in the amorphous wire sensor probe and the time window for sampling the induced voltage of the induction coil.

[0076] In practical applications, amorphous wires and induction coils wound on amorphous wires can be packaged into amorphous wire sensor probes (also known as amorphous wire sensing heads) so that the amorphous wire sensing head can be directly placed in the target magnetic field during magnetic field measurement.

[0077] For example, the sample-and-hold circuit 104 can be used to perform a sample / hold function for the output signal of the induction coil. In some possible implementations, the sample-and-hold circuit 104 can be composed of a switched capacitor network 202 and an integrator 204, which can be implemented by an operational amplifier (OPA). In practical applications, under specific timing control (controlling the opening and closing of the switch), the sample-and-hold circuit 104 can switch between the two modes of sampling and holding functions.

[0078] For example, a method based on Figure 1 The magneto-electric sensing process of the amorphous filament magnetic sensing circuit shown is as follows: First, the control module 108 can instruct the pulse generation circuit 102 to apply a current pulse I with a rise time of t to the amorphous filament. e Amorphous wires, on the other hand, become magnetized due to the skin effect, at which point the surface of the amorphous wire generates a magnetic flux density B that interacts with the external magnetic flux density. in The magnetic flux change Δφ is proportional to the induction coil wound on the amorphous wire, which will generate an induced voltage V. in Its magnitude is directly proportional to the change in magnetic flux Δφ on the amorphous wire surface and the number of turns N of the induction coil, and inversely proportional to the rise time t of the current pulse. Thus, the amorphous wire sensing head achieves the conversion between the magnetic field domain and the voltage domain, and the induced voltage V... in Peak voltage V in,s Then, with respect to the external magnetic flux density B in A linear relationship exists. It is understandable that, based on the above magneto-electric sensing process, the accuracy of the induced voltage peak V in practical applications is questionable. in,s Sampling is actually the key to achieving high-resolution magnetic field detection in amorphous filament magnetic sensors.

[0079] Furthermore, the amorphous filament magnetic sensing circuit can process the output signal of the sample-and-hold circuit 104 through the resistor-to-digital converter circuit 106 to form a magnetic negative feedback loop, thereby establishing the magnetic negative feedback mechanism of the amorphous filament magnetic sensing circuit.

[0080] In some examples, such as Figure 2 As shown, Figure 2 This is a linear model of the magnetic sensor circuit based on the aforementioned magnetic negative feedback mechanism. For details, please refer to... Figure 2 The magnetic field-to-voltage domain conversion gain of the amorphous wire sensing head is G1. However, considering the parasitic resistance of the induction coil, the induced voltage V output by the induction coil... inWith coil parasitic resistance voltage drop V p The sum, after being integrated by the integrator 204 in the sample-and-hold circuit 104, produces an output voltage of V. out And the output voltage V out With V p The coefficient between them is a1, and the coefficient a1 is related to the resistance of the induction coil.

[0081] Furthermore, the control module 108 may be equipped with a quantizer (e.g., a zero-crossing comparator), such as... Figure 2 As shown, the output voltage V out After being quantized by the quantizer, it is converted into a control signal D for controlling the resistor digital-to-analog converter (RDAC) 106. out And output the corresponding feedback current I through the resistor-to-digital converter circuit 106. fb It is important to note that the feedback current I... fb It will flow into the coil and cause it to generate with B in Magnetic flux density B in opposite directions fb The current-to-magnetic-domain conversion gain in this process is G2, while B in With B fb The difference is the net magnetic field ΔB of the amorphous magnetic sensing head. When the gain of the overall loop of the amorphous magnetic sensing circuit is large enough, the net magnetic field ΔB will converge to zero. When the net magnetic field ΔB converges to zero, it means that the output of the amorphous magnetic sensing circuit is saturated.

[0082] It should be noted that an enable switch can be introduced into the above-mentioned magnetic negative feedback loop in the resistor-to-analog converter circuit 106. The control module 108 can use this enable switch to allow the feedback current to flow through the resistor-to-analog converter circuit 106 and the induction coil only during a short enable window (i.e. when the pulse generation circuit 102 excites the amorphous wire and when the induced voltage of the induction coil is sampled), and completely turn it off at other times. This eliminates the need to continuously supply feedback current to the induction coil, thereby significantly reducing the overall average power consumption of the circuit.

[0083] In one embodiment, such as Figure 3 As shown, the sample-and-hold circuit 104 includes a switched capacitor network 202 and an integrator 204;

[0084] One end of the switched capacitor network 202 is connected to the induction coil, and the other end is connected to one end of the integrator 204; the other end of the integrator 204 is connected to one end of the resistor-to-digital converter circuit 106.

[0085] The control module 108 is also connected to the switched capacitor network 202 and the integrator 204.

[0086] For example, the switched capacitor network 202 may consist of a number of switches and capacitors, and the control module 108 may instruct each switch in the switched capacitor network 202 to open or close by sending timing signals to the switched capacitor network 202.

[0087] In some examples, the switched capacitor network 202 can be configured with two sets of capacitors, one set of which is used to acquire the error voltage corresponding to the parasitic resistance of the induction coil, while the other set of capacitors is used to acquire the superimposed voltage of the signal and the error, thereby offsetting the non-ideal voltage drop caused by the parasitic resistance through cross-coupling connection.

[0088] In practical applications, the sample-and-hold circuit 104 (also known as the sampling-integration circuit) will be reconfigured in different operating phases to achieve peak sampling, short-time correlation double sampling, and integration functions. Specifically, within one operating cycle, the sample-and-hold circuit 104 can operate sequentially in the error sampling phase, the excitation + peak sampling phase, and the short-time correlation double sampling + integration phase.

[0089] For example, during the error sampling phase, the amorphous wire is not excited to activate magnetization. At this time, the voltage drop caused by the parasitic resistance of the induction coil is the induced voltage. The control module 108 instructs the sample-and-hold circuit 104 to be reconfigured so that the switched capacitor network 202 is disconnected from the integrator 204, thereby sampling the induced voltage, i.e., the parasitic resistance voltage drop, and storing it in the energy storage element (e.g., a set of capacitors in the switched capacitor network 202).

[0090] During the excitation + peak sampling phase, the pulse generation circuit 102 (also known as the drive circuit) outputs a pulse current signal. This pulse current signal serves as the excitation for the amorphous wire, causing it to magnetize. At this time, the induced voltage generated at the output of the induction coil is actually the sum of the induced voltage of the amorphous wire magnetic ring and the voltage caused by the parasitic resistance. The control module 108 instructs the sample-and-hold circuit 104 to reconfigure so that the switched capacitor network 202 is disconnected from the integrator 204, and to perform peak sampling on the induced voltage containing parasitic parameters and store it in the energy storage element of the switched capacitor network 202 (e.g., another set of capacitors in the switched capacitor network 202).

[0091] During the short-time correlation double sampling + integration phase, the sample-and-hold circuit 104 is reconfigured to a cross-coupled input mode. In this cross-coupled input mode, the switched capacitor network 202 of the sample-and-hold circuit 104 is connected to the integrator 204. The difference between the induced voltage containing parasitic parameters (i.e., the induced voltage sampled during the excitation + peak sampling phase) and the voltage generated by the parasitic resistance sampled and stored during the error sampling phase is output, and then integrated by the integrator 204. Furthermore, the control module 108 can use a zero-crossing comparator to determine the zero-crossing of the integrated signal output by the integrator 204 to generate a control signal for the resistance digital-to-analog converter circuit 106.

[0092] In one embodiment, such as Figure 4 As shown, the integrator 204 includes an operational amplifier (OPA), a first capacitor unit, and a second capacitor unit; the resistor-to-digital converter (RDAC) circuit 106 includes a first RDAC circuit 302 and a second RDAC circuit 304.

[0093] The first and second input terminals of the switched capacitor network 202 are respectively connected to one end and the other end of the induction coil.

[0094] The first output terminal of the switched capacitor network 202 is connected in parallel with one end of the first capacitor unit to the inverting input terminal of the operational amplifier OPA; the second output terminal of the switched capacitor network 202 is connected in parallel with one end of the second capacitor unit to the non-inverting input terminal of the operational amplifier OPA.

[0095] The first output terminal of the operational amplifier OPA is connected in parallel with the other end of the first capacitor unit to one end of the first RDAC circuit 302, and the other end of the first RDAC circuit 302 is connected between the first input terminal of the switched capacitor network 202 and one end of the induction coil.

[0096] The second output terminal of the operational amplifier OPA is connected in parallel with the other end of the second capacitor unit to one end of the second RDAC circuit 304, and the other end of the second RDAC circuit 304 is connected between the second input terminal of the switched capacitor network 202 and the other end of the induction coil.

[0097] The control module 108 is also connected to the control terminal of the first RDAC circuit 302 and the control terminal of the second RDAC circuit 304.

[0098] In practical applications, refer to Figure 2 As shown in the linear model, the first RDAC circuit 302 and the second RDAC circuit 304 can convert the output voltage of the operational amplifier OPA into a feedback current to be connected to both ends of the induction coil, thereby forming a magnetic negative feedback loop of the amorphous wire magnetic sensing circuit.

[0099] For example, the first RDAC circuit 302 and the second RDAC circuit 304 can be respectively equipped with corresponding enable switches. The control module 108 can use the enable switches in the first RDAC circuit 302 and the second RDAC circuit 304 to allow the feedback current to flow through the resistor digital-to-analog converter circuit 106 and the induction coil only during the time window of activating the amorphous wire in the amorphous wire sensor probe and the time window of sampling the induced voltage of the induction coil, and completely turn it off at other times, so that there is no need to continuously supply feedback current to the induction coil, thereby greatly reducing the average power consumption of the entire circuit.

[0100] In one embodiment, such as Figure 5 As shown, the first RDAC circuit 302 includes multiple first RDAC sub-circuits 402 connected in parallel, each first RDAC sub-circuit 402 including a first switch, a second switch, a first enable switch, and a first resistor; the second RDAC circuit 304 includes multiple second RDAC sub-circuits 404 connected in parallel, each second RDAC sub-circuit 404 including a third switch, a fourth switch, a second enable switch, and a second resistor; wherein,

[0101] The first output terminal of the operational amplifier OPA is connected in parallel with the other end of the first capacitor unit and connected to one end of the first enable switch in each first RDAC sub-circuit 402; the first input terminal of the switched capacitor network 202 is connected in parallel with one end of the induction coil and connected to one end of the first resistor in each first RDAC sub-circuit 402.

[0102] In each of the first RDAC sub-circuits 402, the other end of the first enable switch is connected to the other end of the first resistor, one end of the first switch is used to connect to the power supply voltage, the other end of the first switch and one end of the second switch are connected in parallel between the other end of the first enable switch and the other end of the first resistor, and the other end of the second switch is used to ground.

[0103] The second output terminal of the operational amplifier OPA is connected in parallel with the other end of the second capacitor unit and connected to one end of the second enable switch in each second RDAC sub-circuit 404; the second input terminal of the switched capacitor network 202 is connected in parallel with the other end of the induction coil and connected to one end of the second resistor in each second RDAC sub-circuit 404.

[0104] In each of the second RDAC sub-circuits 404, the other end of the second enable switch is connected to the other end of the second resistor, one end of the fourth switch is used to connect to the power supply voltage, the other end of the fourth switch and one end of the third switch are connected in parallel between the other end of the second enable switch and the other end of the second resistor, and the other end of the third switch is used to ground.

[0105] The first RDAC circuit 302 and each switch in the first RDAC circuit 302 are connected to the control module 108.

[0106] In practical applications, the control module 108 can turn on the first enable switch in each first RDAC sub-circuit 402 and the second enable switch in each second RDAC sub-circuit 404 only during the time window for activating the amorphous wire in the amorphous wire sensor probe and the time window for sampling the induced voltage of the induction coil, and completely and reliably turn off at other times, thereby avoiding continuous input of feedback current to the induction coil and thus significantly reducing the overall average power consumption of the circuit.

[0107] In one embodiment, such as Figure 6 As shown, the amorphous wire magnetic sensing circuit also includes a first chopper switch 502 and a second chopper switch 504; wherein,

[0108] The first chopper switch 502 is located on the input side of the operational amplifier OPA, and the second chopper switch 504 is located on the output side of the operational amplifier OPA; the first chopper switch 502 and the second chopper switch 504 are used to suppress low-frequency noise.

[0109] For example, the first chopper switch 502 and the second chopper switch 504 disposed on both sides of the operational amplifier OPA can perform chopper modulation after each working cycle of the amorphous filament magnetic sensing circuit to eliminate low-frequency noise interference.

[0110] In one exemplary embodiment, such as Figure 7 As shown, this application provides a control method for an amorphous filament magnetic sensing circuit, applied to the control module 108 in the amorphous filament magnetic sensing circuit described in any of the above embodiments. The method includes the following steps S202 to S204. Wherein:

[0111] Step S202: Within the enable window, the magnetic negative feedback loop of the indicator resistor digital-to-analog conversion circuit is turned on.

[0112] Step S204: Outside the enable window, the indicator resistor digital-to-analog conversion circuit shuts off the magnetic negative feedback loop.

[0113] The enable window represents the time window for stimulating the amorphous wire in the amorphous wire sensor probe and the time window for sampling the induced voltage of the induction coil.

[0114] For example, the resistor-to-digital converter circuit 106 may incorporate an enable switch in the aforementioned magnetic negative feedback loop.

[0115] Specifically, the control module 108 can use the enable switch in the resistor-to-digital converter circuit 106 to allow the feedback current to flow through the resistor-to-digital converter circuit 106 and the induction coil only during the time window for activating the amorphous wire in the amorphous wire sensor probe and the time window for sampling the induced voltage of the induction coil, and completely turn it off at other times, so that there is no need to continuously supply feedback current to the induction coil, thereby significantly reducing the overall average power consumption of the circuit.

[0116] In one embodiment, such as Figure 8 As shown, the method further includes steps S302 to S308. Wherein:

[0117] In step S302, without energizing the amorphous wire, the switched capacitor network of the sample-and-hold circuit is disconnected from the integrator of the sample-and-hold circuit, and the current induced voltage of the induction coil is sampled to obtain the first sample voltage.

[0118] Step S304: Control the pulse generation circuit to excite the amorphous wire, control the switched capacitor network to disconnect from the integrator, and perform peak sampling on the current induced voltage of the induction coil based on the sampling phase to obtain the second sampling voltage;

[0119] Step S306: Control the switched capacitor network to be electrically connected to the integrator, and make the difference between the first sampled voltage and the second sampled voltage be processed and output to one end of the integrator;

[0120] Step S308: Adjust the feedback current output by the resistor-to-digital converter circuit based on the integration signal output from the other end of the integrator.

[0121] The feedback current can be used to generate a magnetic flux density opposite to the direction of the magnetic field to be detected through the induction coil. The first and second sampled voltages can be stored in two different sets of capacitor cells in the switched capacitor network. The sampling phase can be determined based on a phase search strategy.

[0122] For example, the control module 108 can implement a sample-and-hold operation for the induced voltage of the induction coil by inputting a corresponding timing signal into the switched capacitor network 202.

[0123] Specifically, when the amorphous wire is not excited, the control module 108 can control the switched capacitor network 202 of the sample-and-hold circuit 104 to disconnect from the integrator 204 of the sample-and-hold circuit 104, and sample the current induced voltage of the induction coil to obtain the first sample voltage. At this time, the first sample voltage is actually the voltage drop caused by the parasitic resistance of the induction coil.

[0124] Furthermore, the control pulse generation circuit 102 excites the amorphous wire, controls the switched capacitor network 202 to disconnect from the integrator 204, and performs peak sampling on the current induced voltage of the induction coil based on the sampling phase to obtain the second sampling voltage. At this time, the second sampling voltage is actually the sum of the induced voltage of the amorphous wire magnetic ring and the voltage caused by the parasitic resistance.

[0125] Furthermore, the first sampling voltage (i.e., the product of the coil parasitic resistance Rp and the current) and the second sampling voltage (i.e., the sum of the first sampling voltage and the amorphous wire response voltage) are stored respectively in two different sampling capacitors of the switched capacitor network 202. The control module 108 can then control the corresponding switches in the switched capacitor network 202 to output the difference between the second sampling voltage and the first sampling voltage to one end of the integrator. The integrated signal output from the other end of the integrator 204 can be determined according to... Figure 2 The linear model shown is converted into a feedback current connected to the induction coil by the resistor digital-to-analog converter circuit 106, thereby forming a magnetic negative feedback loop of the amorphous wire magnetic sensing circuit.

[0126] Understandably, after the sample-and-hold circuit performs 104 peak samplings, the front-end output of the amorphous filament magnetic sensing circuit will tend to saturate. At this time, the net magnetic field of the amorphous filament sensing head approaches 0 (i.e., the magnetic negative feedback loop tends to stabilize), resulting in the peak value of the induced voltage of the induction coil being 0. At this point, the magnitude of the magnetic field can be calculated.

[0127] In one embodiment, such as Figure 9 As shown, the phase search strategy includes the following steps S402 to S406. Wherein:

[0128] Step S402: The control resistor digital-to-analog conversion circuit disconnects the magnetic negative feedback loop and applies a constant magnetic field to the induction coil;

[0129] Step S404: Control the switched capacitor network to sample the induced voltage of the current induction coil based on the sampling clock to obtain the third sampled voltage;

[0130] Step S406: If the third sampling voltage does not meet the zero-crossing condition, the sampling clock is finely phased, and the induced voltage of the current induction coil is sampled based on the phase-fine-tuned sampling clock until the induced voltage of the induction coil meets the zero-crossing condition, so as to obtain the sampling phase.

[0131] For example, such as Figure 10 As shown, Figure 10This is a circuit architecture diagram of the control module 108 for generating the drive signal of the pulse generation circuit 102 and the sampling signal of the sample-and-hold circuit 104. Based on this circuit architecture, the control module 108 can adjust the sampling timing of the switched capacitor network 202 in the sample-and-hold circuit 104, thereby achieving peak sampling of the induced voltage.

[0132] It is understandable that, in response to the technical requirements of peak sampling, firstly, the control module 108 can control the drive pulse generation circuit 102 to generate a pulse current signal as the excitation signal for the amorphous wire sensing head, and the induction coil will generate an induced voltage accordingly. At this time, the timing generation + logic module of the control module 108 outputs a sampling signal SMPL, and the sampling clock phase of the sampling signal SMPL can correspond to or be close to the peak value of the induced voltage. The peak value of the induced voltage will be sampled by the sample-and-hold circuit 104 and processed by the subsequent signal processing circuit. On the other hand, it will be converted into a feedback current by the resistor digital-to-analog conversion circuit 106. This feedback current will cause the coil to generate a magnetic flux change in the opposite direction to the magnetic field on the surface of the amorphous wire. After multiple peak samplings, the analog front-end output will tend to saturate, and the net magnetic field of the sensing head will approach 0. At this time, the magnetic field magnitude of the target magnetic field to be measured can be calculated.

[0133] In other words, in practical applications, refer to Figure 10 , Figure 11 As shown, the peak sampling process can actually include the following implementation steps S1 to S4:

[0134] S1. The pulse generation circuit 102 generates an excitation signal, magnetizes the amorphous wire sensing head, and generates a corresponding induced voltage at both ends of the winding coil.

[0135] S2. After obtaining the sampling phase through phase search, the sample-and-hold circuit 104 uses the sampling phase to sample the peak value of the induced voltage and stores it in the energy storage element of the sample-and-hold circuit 104.

[0136] S3. After the sampled voltage is processed and output, it will be converted into a feedback current by the resistor digital-to-analog converter circuit 106. The feedback current generates a magnetic flux density in opposite direction through the winding coil, which partially cancels out the external magnetic flux density, thus reducing the peak value of the induced voltage.

[0137] S4. Determine whether the output is saturated by checking whether the peak value of the induced voltage of the induction coil is zero (i.e., whether the net magnetic field of the amorphous wire sensor head is zero). If the output is not saturated, repeat step S2. If it is zero, the detection ends.

[0138] Furthermore, when executing the phase search strategy (i.e., the phase search process in step S2 above), firstly, the control module 108 controls the magnetic negative feedback loop of the amorphous filament magnetic sensing circuit to disconnect (e.g., disconnect). Figure 5 (D1 and D2 in the diagram), and apply a constant magnetic field to the winding coil by generating a constant feedback current, and then apply a constant magnetic field to the induction coil by changing the delay amount t of the control signal of the sampling switch. sd This allows for fine-tuning of the phase of the sampling clock, thereby adjusting the sampling timing to achieve peak sampling of the induced voltage.

[0139] It is important to note that when using a sample-and-hold circuit based on the sampling phase, the peak value of the induced voltage V... in,s Before sampling, the magnetic negative feedback loop needs to be reconnected. This is because only by forming a magnetic feedback loop, continuously sampling the peak value and generating a reverse magnetic field, will the induced voltage peak value drop until it reaches 0, so that the final output reaches saturation.

[0140] In practical applications, with Figure 5 Taking the amorphous wire magnetic sensing circuit as an example, the control module 108 can control the signal D... ctrl This causes all D1 and D2 switches in the resistor-to-digital converter circuit 106 to open, while simultaneously closing the corresponding P and N switches. Since the other ends of the P and N switches are connected to the fixed biased VDD and GND, a feedback loop that generates a constant feedback current can be formed.

[0141] Furthermore, the aforementioned method for fine-tuning the phase may include a delay t in the control signal of the sampling switch. sd The system performs multi-step adjustments and outputs corresponding control signals to sample sequentially, detecting whether a peak value is sampled. Furthermore, the control module 108 can use a zero-crossing comparator to determine the zero-crossing of the output signal of the sample-and-hold circuit 104; the determination result can be used to control the sampling clock corresponding to the sampled signal.

[0142] In some examples, the workflow of the control module 108 in practical applications may include: on the one hand, the timing generation + logic module of the control module 108 outputs a driving timing signal to control the pulse generation circuit 102 to generate a pulse current to excite the amorphous filament sensing head, thereby enabling the sensing head to convert external physical changes into an input voltage signal and send it to the signal processing circuit; on the other hand, the timing generation + logic module of the control module 108 generates a sampling signal to control the sample-and-hold circuit.

[0143] During the phase search phase, after sampling and integration by the sample-and-hold circuit 104, the output signal undergoes zero-crossing detection by a comparator, which then outputs the digital code stream D. out The bitstream is processed by the internal logic circuit of the timing generation + logic module to generate a sampling signal SMPL that is output to the switched capacitor network 202, thereby realizing the peak sampling of the sensor head output voltage.

[0144] It should be noted that the adjustment step size of the timing generation + logic module for the sampling signal delay time can be set according to actual application requirements. This application embodiment does not specifically limit the specific setting method of the adjustment step size of the sampling signal delay time and the corresponding processing circuit.

[0145] In one embodiment, such as Figure 12 As shown, the method further includes steps S502 to S504. Wherein:

[0146] Step S502: The enable switch of the control resistor digital-to-analog conversion circuit is turned off;

[0147] Step S504: By controlling the on / off state of the switch of the resistor digital-to-analog conversion circuit, the magnetic field bias on the induction coil is adjusted so that the differential output of the operational amplifier of the sample-and-hold circuit is zero when the external magnetic flux is zero.

[0148] It should be noted that the gain coefficient of traditional GMI sensors is highly susceptible to non-ideal factors such as power supply voltage fluctuations, temperature drift, and parasitic resistance of amorphous wire coils. Furthermore, triaxial sensing heads suffer from inter-axis sensitivity mismatch due to manufacturing differences. In practical applications, amorphous wire magnetic sensors also face zero-field bias imbalance. When the actual applied magnetic field strength is zero, the differential output offset voltage of the amorphous wire magnetic sensing circuit, caused by PVT fluctuations and various drift factors (such as manufacturing processes, power supply voltage and temperature fluctuations, and temperature and time drift), can be converted into an equivalent magnetic field input. Therefore, without calibration, the feedback magnetic flux ≠ 0. According to the formula: Net magnetic flux = External magnetic flux - Feedback magnetic flux, the net magnetic flux ≠ 0, which will affect the accuracy of magnetic field strength detection.

[0149] To address the aforementioned issues, this application embodiment utilizes the resistor network in the resistor-to-digital converter circuit 106 to achieve recalibration of the magnetic field bias.

[0150] Specifically, please refer to Figure 6 As shown, the resistance-to-digital converter circuit 106 can be composed of several resistors (i.e., R1, R2) and several switches (N1, N2, P1, P2, D1, D2). During the recalibration of the magnetic field bias, all enable switches D1 and D2 in the resistance-to-digital converter circuit 106 will be normally open, and according to the control signal, each of the first RDAC sub-circuit 402 and the second RDAC sub-circuit 404 will always only close one of the P switch and the N switch.

[0151] For example, when the net magnetic field of the amorphous filament sensing head is 0, the resistor-to-digital converter circuit 106 can close the P switches in half of the RDAC sub-circuits (including the first RDAC sub-circuit 402 and the second RDAC sub-circuit 404), and close the N switches in the other half of the RDAC sub-circuits. When the net magnetic field of the amorphous filament sensing head is less than or greater than 0 (± signs indicate the magnetic field direction), the number of RDAC sub-circuits with closed N / P switches in the resistor-to-digital converter circuit 106 will be greater than the number of RDAC sub-circuits with closed P / N switches. This will increase or decrease the feedback current of the magnetic negative feedback loop to adjust the feedback magnetic field, thereby restoring the magnetic field bias of the amorphous filament magnetic sensing circuit to equilibrium. It can be understood that after the magnetic field bias is calibrated, when the external magnetic flux is 0, the differential output of the operational amplifier OPA of the sample-and-hold circuit 104 is zero. At this time, the net magnetic flux of the amorphous filament magnetic sensing circuit = external magnetic flux - feedback magnetic flux = 0.

[0152] It is understood that the background gain calibration mechanism based on the resistor-to-digital converter circuit 106 used in the embodiments of this application can detect the deviation of the feedback bias current through a zero-crossing comparator, thereby automatically adjusting the built-in resistance of the resistor-to-digital converter circuit 106. This enables the chip to maintain a stable magneto-electric conversion gain coefficient without interrupting normal magnetic field measurement, thereby suppressing the interference of PVT fluctuations and various drifts on the conversion gain coefficient, and effectively ensuring the stability of the amorphous filament magnetic sensing circuit detection.

[0153] In one embodiment, this application also provides a magnetic sensing device, including the amorphous filament magnetic sensing circuit described in any of the above embodiments.

[0154] It is understood that the solutions provided in this application are similar to the solutions from the perspective of amorphous filament magnetic sensing circuits described above. Therefore, the specific limitations of this application can be found in the limitations of the various amorphous filament magnetic sensing circuit embodiments described above, and will not be repeated here.

[0155] In the description of this specification, references to terms such as "some embodiments," "other embodiments," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative descriptions of the above terms do not necessarily refer to the same embodiments or examples.

[0156] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0157] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these modifications and improvements all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. An amorphous wire magnetic sensing circuit, characterized in that, include: Pulse generation circuit; A sample-and-hold circuit, one end of which is connected to the induction coil in the amorphous wire sensor probe; A resistance-to-digital-to-analog converter circuit, one end of which is connected to the other end of the sample-and-hold circuit, and the other end of which is connected to the induction coil to form a magnetic negative feedback loop; and, The control module is connected to the pulse generation circuit, the sample and hold circuit, and the resistor-to-digital converter circuit, respectively. The control module is used to instruct the resistor-to-analog converter circuit to turn on the magnetic negative feedback loop within the enable window, and to instruct the resistor-to-analog converter circuit to turn off the magnetic negative feedback loop outside the enable window; the enable window represents the time window for stimulating the amorphous wire in the amorphous wire sensor probe and the time window for sampling the induced voltage of the induction coil.

2. The amorphous wire magnetic sensing circuit according to claim 1, characterized in that, The sample-and-hold circuit includes a switched capacitor network and an integrator; One end of the switched capacitor network is connected to the induction coil, and the other end is connected to one end of the integrator; the other end of the integrator is connected to one end of the resistor-to-digital converter circuit. The control module is also connected to the switched capacitor network and the integrator.

3. The amorphous wire magnetic sensing circuit according to claim 2, characterized in that, The integrator includes an operational amplifier, a first capacitor unit, and a second capacitor unit; the resistor-to-digital converter circuit includes a first RDAC circuit and a second RDAC circuit. The first and second input terminals of the switched capacitor network are respectively connected to one end and the other end of the induction coil. The first output terminal of the switched capacitor network is connected in parallel with one end of the first capacitor unit and connected to the inverting input terminal of the operational amplifier; the second output terminal of the switched capacitor network is connected in parallel with one end of the second capacitor unit and connected to the non-inverting input terminal of the operational amplifier. The first output terminal of the operational amplifier is connected in parallel with the other end of the first capacitor unit to one end of the first RDAC circuit, and the other end of the first RDAC circuit is connected between the first input terminal of the switched capacitor network and one end of the induction coil. The second output terminal of the operational amplifier is connected in parallel with the other end of the second capacitor unit to one end of the second RDAC circuit, and the other end of the second RDAC circuit is connected between the second input terminal of the switched capacitor network and the other end of the induction coil. The control module is also connected to the control terminal of the first RDAC circuit and the control terminal of the second RDAC circuit.

4. The amorphous wire magnetic sensing circuit according to claim 3, characterized in that, The first RDAC circuit includes multiple first RDAC sub-circuits connected in parallel, each first RDAC sub-circuit including a first switch, a second switch, a first enable switch, and a first resistor; the second RDAC circuit includes multiple second RDAC sub-circuits connected in parallel, each second RDAC sub-circuit including a third switch, a fourth switch, a second enable switch, and a second resistor; wherein, The first output terminal of the operational amplifier is connected in parallel with the other end of the first capacitor unit and connected to one end of the first enable switch in each of the first RDAC sub-circuits; the first input terminal of the switched capacitor network is connected in parallel with one end of the induction coil and connected to one end of the first resistor in each of the first RDAC sub-circuits. In each of the first RDAC sub-circuits, the other end of the first enable switch is connected to the other end of the first resistor, one end of the first switch is used to connect to the power supply voltage, the other end of the first switch and one end of the second switch are connected in parallel between the other end of the first enable switch and the other end of the first resistor, and the other end of the second switch is used to ground. The second output terminal of the operational amplifier is connected in parallel with the other end of the second capacitor unit and connected to one end of the second enable switch in each of the second RDAC sub-circuits; the second input terminal of the switched capacitor network is connected in parallel with the other end of the induction coil and connected to one end of the second resistor in each of the second RDAC sub-circuits; In each of the second RDAC sub-circuits, the other end of the second enable switch is connected to the other end of the second resistor, one end of the fourth switch is used to connect to the power supply voltage, the other end of the fourth switch and one end of the third switch are connected in parallel between the other end of the second enable switch and the other end of the second resistor, and the other end of the third switch is used to ground. The first RDAC circuit and each switch in the first RDAC circuit are connected to the control module.

5. The amorphous wire magnetic sensing circuit according to claim 3, characterized in that, The amorphous wire magnetic sensing circuit further includes a first chopper switch and a second chopper switch; wherein... The first chopper switch is located on the input side of the operational amplifier, and the second chopper switch is located on the output side of the operational amplifier; the first chopper switch and the second chopper switch are used to suppress low-frequency noise.

6. A control method for an amorphous wire magnetic sensing circuit, characterized in that, The control module applied in the amorphous wire magnetic sensing circuit according to any one of claims 1 to 5, the method comprising: Within the enable window, the resistor-to-digital-to-analog converter circuit is instructed to activate the magnetic negative feedback loop; Outside the enable window, the resistor-to-analog converter circuit is instructed to shut off the magnetic negative feedback loop; wherein the enable window characterizes the time window for stimulating the amorphous filament in the amorphous filament sensor probe and the time window for sampling the induced voltage of the induction coil.

7. The method according to claim 6, characterized in that, The method further includes: Without energizing the amorphous wire, the switched capacitor network of the sample-and-hold circuit is disconnected from the integrator of the sample-and-hold circuit, and the current induced voltage of the induction coil is sampled to obtain a first sample voltage. The pulse generation circuit is controlled to excite the amorphous wire, the switched capacitor network is controlled to disconnect from the integrator, and the peak value of the current induced voltage of the induction coil is sampled based on the sampling phase to obtain a second sampled voltage; wherein, the sampling phase is determined based on a phase search strategy; The switched capacitor network is electrically connected to the integrator, and the difference between the first sampled voltage and the second sampled voltage is processed and output to one end of the integrator. The feedback current output by the resistor-to-digital converter is adjusted based on the integral signal output from the other end of the integrator; the feedback current is used to generate a magnetic flux density opposite to the direction of the magnetic field to be detected through the induction coil.

8. The method according to claim 7, characterized in that, The phase search strategy includes: The resistor-to-digital converter circuit is controlled to disconnect the magnetic negative feedback loop and apply a constant magnetic field to the induction coil; The switched capacitor network is controlled to sample the induced voltage of the current induction coil based on a sampling clock to obtain a third sampled voltage; If the third sampling voltage does not meet the zero-crossing condition, the sampling clock is phase-adjusted, and the induced voltage of the current induction coil is sampled based on the phase-adjusted sampling clock until the induced voltage of the induction coil meets the zero-crossing condition, so as to obtain the sampling phase.

9. The method according to claim 7, characterized in that, The method further includes: The enable switch of the resistor-to-digital-to-analog conversion circuit is turned off; By controlling the on / off state of the resistor-to-digital converter circuit, the magnetic field bias on the induction coil is adjusted so that the differential output of the operational amplifier of the sample-and-hold circuit is zero when the external magnetic flux is zero.

10. A magnetic sensing device, characterized in that, Includes the amorphous wire magnetic sensing circuit as described in any one of claims 1 to 5.

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