Training method of overlay error prediction model, overlay error prediction method and device

Abstract

This application provides a training method, an overlay error prediction method, and an apparatus for an overlay error prediction model, relating to the field of semiconductor manufacturing technology. The prediction method includes: acquiring topographic data of a wafer to be lithographicated and the coordinates of at least one target measurement position on the wafer; generating a first feature based on the topographic data and a second feature based on the coordinates of the target measurement position, wherein the first feature characterizes the global topographic features of the wafer to be lithographicated, and the second feature characterizes the positional features of the target measurement position; and fusing the first and second features to obtain a predicted overlay error value corresponding to the target measurement position. In this way, the prediction process can integrate the overall wafer topographic distortion law and the spatial position specificity, thereby improving the accuracy of overlay error prediction for a specified target measurement position.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, specifically to a training method for an overlay error prediction model, an overlay error prediction method, and an apparatus. Background Technology

[0002] In the semiconductor manufacturing industry, as photolithography process nodes continue to shrink, the requirements for controlling overlay error precision are becoming increasingly stringent. Overlay error directly reflects the pattern alignment deviation between different process layers, and its prediction accuracy is crucial to chip yield and device performance.

[0003] In related technologies, feedback compensation models based on historical wafer measurement data or physical models based on in-plane distortion (IPD) theory are commonly used to estimate overlay errors. However, feedback compensation methods rely on historical statistical patterns and are difficult to reflect the actual state of the wafer in real time, limiting their predictive effectiveness when there are large process fluctuations. On the other hand, physical model methods usually require idealized assumptions such as axisymmetric stress distribution, complete wafer adsorption, and film thickness being much smaller than substrate thickness, resulting in insufficient applicability and robustness under actual mass production conditions. Summary of the Invention

[0004] In view of this, embodiments of this application provide a training method for an overlay error prediction model, an overlay error prediction method and apparatus, aiming to provide a technical solution that can improve the accuracy of overlay error prediction.

[0005] The first aspect of this application provides a method for predicting overlay errors, comprising: acquiring topographic data of a wafer to be lithographicated and coordinates of at least one target measurement position on the wafer; generating a first feature based on the topographic data and generating a second feature based on the coordinates of the target measurement position, wherein the first feature is used to characterize the global topographic features of the wafer to be lithographicated and the second feature is used to characterize the positional features of the target measurement position; and fusing the first feature and the second feature to obtain a predicted overlay error value corresponding to the target measurement position.

[0006] In some embodiments, generating a first feature based on morphological data includes: preprocessing the morphological data to decouple the morphological data into multiple morphological components; selecting at least one morphological component from the multiple morphological components whose correlation with overlay error is higher than a preset threshold as target morphological data; and generating a first feature based on the target morphological data.

[0007] In some embodiments, selecting at least one topography component from multiple topography components whose correlation with overlay error is higher than a preset threshold as target topography data includes: determining the order of each topography component among the multiple topography components; and determining at least one topography component with an order greater than a preset order as at least one higher-order topography component as target topography data.

[0008] In some embodiments, fusing the first feature and the second feature to obtain a predicted overlay error value corresponding to the target measurement position includes: conditionally modulating the first feature using the second feature as a condition to obtain a modulated first feature; and generating a predicted overlay error value based on the modulated first feature.

[0009] In some embodiments, conditional modulation of the first feature based on the second feature includes: performing an asymmetric feature transformation operation on the first feature based on the second feature, such that different dimensions of the first feature are differentially adjusted in response to the target measurement position.

[0010] In some embodiments, after obtaining the overlay error prediction value corresponding to the target measurement position, the method further includes: calculating the confidence index corresponding to the overlay error prediction value; determining whether the confidence index exceeds a preset confidence threshold; if so, then performing feedforward error compensation on the wafer to be lithographicd before it enters the lithography process based on the overlay error prediction value.

[0011] The second aspect of this application provides a training method for an overlay error prediction model, comprising: inputting training input samples into an initial overlay error prediction model to obtain an overlay error prediction value output by the initial overlay error prediction model, wherein the training input samples include topographic data samples of historical wafers and coordinate samples of historical target measurement positions on historical wafers, the initial overlay error prediction model is used to generate a first feature based on the topographic data samples to characterize the global topographic features of historical wafers, and to generate a second feature based on the coordinate samples to characterize the positional features of historical target measurement positions, and to fuse the first feature and the second feature to obtain an overlay error prediction value corresponding to the historical target measurement position; calculating a prediction loss value based on the difference between the overlay error prediction value and the training output samples, wherein the training output samples include the actual overlay error of the historical target measurement position; performing backpropagation of the overlay error prediction model based on the prediction loss value to update the parameters of the overlay error prediction model; inputting the training input samples into the updated overlay error prediction model, and repeating the above steps until the prediction loss value meets a preset training convergence condition; and determining the currently updated overlay error prediction model as the trained overlay error prediction model.

[0012] In some embodiments, the training method further includes: extracting overlay error components related to wafer morphology from the original measurement results of historical target measurement locations as actual overlay errors of historical target measurement locations, wherein the overlay error component samples are measurement value component samples related to wafer morphology extracted from historical overlay error measurement value samples.

[0013] A third aspect of this application provides an overlay error prediction device, comprising: an acquisition module for acquiring topographic data of a wafer to be lithographicated and coordinates of at least one target measurement position on the wafer; a generation module for generating a first feature based on the topographic data and generating a second feature based on the coordinates of the target measurement position, wherein the first feature is used to characterize the global topographic features of the wafer to be lithographicated and the second feature is used to characterize the positional features of the target measurement position; and a processing module for fusing the first feature and the second feature to obtain an overlay error prediction value corresponding to the target measurement position.

[0014] The fourth aspect of this application provides a computer-readable storage medium, including a processor and a memory, wherein the memory is used to store computer-executable instructions; when the computer-executable instructions are executed by the processor, they implement the overlay error prediction method provided in the first aspect of this application or the training method for the overlay error prediction model provided in the second aspect.

[0015] The overlay error prediction method provided in this application acquires the topography data of the wafer to be lithographicated and the coordinates of the target measurement position. It then generates a first feature representing the global topography of the wafer from the topography data and a second feature representing the positional characteristics from the coordinates of the target measurement position. The two features are then fused to obtain the predicted overlay error value corresponding to the target measurement position. This approach simultaneously integrates the overall wafer topography distortion pattern and the spatial position specificity, effectively capturing the coupling relationship between global topography features and local positional features, thereby significantly improving the accuracy of overlay error prediction for a specified target measurement position.

[0016] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and do not constitute a limitation on this application. Attached Figure Description

[0017] To more clearly illustrate the technical solutions of the embodiments of this application, the drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0018] Figure 1The diagram shown is a schematic diagram of an exemplary overlay error prediction system provided in an embodiment of this application.

[0019] Figure 2 The diagram shown is a flowchart illustrating an overlay error prediction method provided in an embodiment of this application.

[0020] Figure 3 The diagram shown is a flowchart illustrating the generation of a first feature according to an embodiment of this application.

[0021] Figure 4a and Figure 4b The diagram shown is a comparison of the effects of preprocessing wafer morphology data before and after one embodiment of this application.

[0022] Figure 5 The diagram shown is a flowchart illustrating a method for predicting overlay errors according to another embodiment of this application.

[0023] Figure 6 The diagram shown is a flowchart illustrating a training method for an overlay error prediction model provided in an embodiment of this application.

[0024] Figure 7 The diagram shown is a schematic diagram of an overlay error prediction device provided in an embodiment of this application.

[0025] Figure 8 The diagram shown is a schematic diagram of a training device for an overlay error prediction model provided in an embodiment of this application.

[0026] Figure 9 The diagram shown is an exemplary electronic device provided in an embodiment of this application. Detailed Implementation

[0027] In the field of overlay error prediction in semiconductor lithography, to predict overlay errors at specific measurement locations on a wafer, the common approach is to build a prediction model based on the overall wafer topography data. Specifically, this approach acquires wafer topography measurement data before lithography and directly maps it to obtain an estimated overlay error value through a physical model or machine learning model. The physical model method, based on in-plane distortion theory, calculates the stress and displacement fields using the wafer topography to predict the overlay error. The machine learning method uses wafer topography data as input and employs models such as neural networks to learn the end-to-end mapping relationship between topography and overlay error. The initial design principle of these approaches is that wafer topography is a major factor affecting overlay error; by capturing wafer deformation trends through overall topography characteristics, relatively fast prediction can be achieved.

[0028] However, when the above-mentioned solutions are applied to high-precision lithography compensation scenarios requiring precise control of overlay errors at each measurement location, their performance is less than ideal. A fundamental contradiction lies in the fact that, in pursuit of describing the overall state of the wafer, the inherent design of these solutions inevitably weakens their ability to discriminate local spatial locations, resulting in an inability to output differentiated prediction results for different target measurement locations. Specifically, when predicting overlay errors for different marker points on the wafer under multi-exposure processes, the prediction values ​​output by methods relying solely on overall morphological features often reflect the global average trend, failing to capture the details of local offsets at different locations, thus leading to significant prediction deviations at individual measurement locations.

[0029] In-depth analysis revealed that the root cause of the aforementioned contradiction lies in the fact that the prediction models in related technologies do not explicitly model the spatial coordinate information of the target measurement location. Although wafer topography data contains overall deformation information, the overlay error at different locations is also affected by factors such as the local topography gradient and stress distribution of that location on the wafer. Simple overall features cannot express this location specificity. In addition, the original topography data contains a large number of low-order topography components that are weakly correlated with overlay error. Directly inputting these components into the prediction model introduces noise, further obscuring the contribution of location differences to the prediction results.

[0030] To overcome the aforementioned contradictions, embodiments of this application provide a method for predicting overlay errors. The core concept lies in introducing a dual-branch network architecture to extract global topographic features and local positional features from wafer topographic data and target measurement position coordinates, respectively. These two types of features are then fused, thereby effectively improving the prediction accuracy of overlay errors at a specified target measurement position without significantly increasing the data acquisition burden, and avoiding local prediction inaccuracies caused by ignoring positional information. In other words, embodiments of this application provide a dual-branch prediction method that fuses wafer topographic features and spatial positional features to solve the problem in related technologies where overlay error prediction results lack spatial discriminability due to the lack of wafer measurement position modeling, achieving refined feedforward prediction of overlay errors at any specified measurement position on the wafer.

[0031] It should be noted that, in the embodiments of this application, overlay error refers to the pattern alignment deviation between different process layers during semiconductor manufacturing, which can be expressed as the positional offset between two measurement points. For example, it may include, but is not limited to, the coordinate difference (such as offsets in the x and y directions) obtained by measuring the same mark on the wafer before and after the photolithography process, or various vector forms of deviation data output by an overlay error measurement device. In this application, unless otherwise specified, overlay error is not limited to a specific unit of measurement or expression method.

[0032] Exemplary System Figure 1 The diagram shown is an exemplary overlay error prediction system 100 provided in an embodiment of this application. The prediction system 100 may include a topography measurement device 110, a coordinate acquisition device 120, a computing device 130, and a photolithography device 140.

[0033] The morphology measurement device 110 is used to perform full-field morphology measurement on the wafer surface before it enters the photolithography process, generating morphology data reflecting the wafer's geometry. The coordinate acquisition device 120 is used to provide coordinate data for at least one target measurement position on the wafer for which overlay error prediction is to be performed. This coordinate data is typically determined based on predefined measurement mark (Mark) position information in the process recipe or measurement recipe.

[0034] The computing device 130 is communicatively connected to the topography measurement device 110 and the coordinate acquisition device 120, respectively, for receiving wafer topography data and target measurement position coordinates. The computing device 130 can be an industrial computer, server, or embedded processing platform, and it internally includes a processor and memory. The memory contains a pre-trained overlay error prediction model. The computing device 130 is configured to process the received data and generate overlay error prediction values ​​corresponding to each target measurement position.

[0035] The lithography apparatus 140 is communicatively connected to the computing device 130 to receive overlay error prediction values. The lithography apparatus 140 may include an exposure unit and a stage control system, which can adjust exposure parameters or wafer position based on the received prediction values, thereby performing feedforward error compensation on the wafer to be lithographicated before exposure. Data exchange between components can be achieved via fieldbus, industrial Ethernet, or dedicated data links to support real-time or near real-time prediction and control in the manufacturing process.

[0036] Exemplary methods The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0037] Figure 2 The diagram shown is a flowchart illustrating an overlay error prediction method according to an embodiment of this application. This method can, for example, be derived from... Figure 1 The computing device 130 in the overlay error prediction system 100 shown performs the operation. For example... Figure 2 As shown, the method may include the following steps S210~S230: Step S210: Obtain the morphology data of the wafer to be photolithographically lithographically oriented and the coordinates of at least one target measurement position on the wafer to be photolithographically oriented.

[0038] In this embodiment, the morphology data of the wafer to be lithographically measured and the coordinates of at least one target measurement position on the wafer are first acquired. The morphology data of the wafer to be lithographically measured can be obtained, for example, by measuring the wafer before the lithography process using a wafer morphology measurement device. This morphology data is used to characterize the three-dimensional morphology distribution of the wafer surface. Acquiring the current morphology data of the wafer before the lithography process allows the prediction model to perform feedforward prediction based on the real-time state of the current wafer, avoiding the lag problem caused by the reliance on historical wafer measurement results in traditional feedback compensation methods.

[0039] Specifically, morphology data refers to information that reflects the geometric shape or surface changes of the wafer surface to be lithographicated. For example, morphology data may include, but is not limited to, height distribution maps of the wafer surface, in-plane distortion (IPD) data, raw morphology measurements obtained by interferometers or morphology measurement equipment, preprocessed morphology data (such as high-order morphology components after removing low-order terms), or morphology descriptions characterized in the form of Zernike polynomial coefficients, polynomial fitting coefficients, frequency domain filtering results, etc.

[0040] A target measurement location generally refers to a specific spatial point or region on the wafer to be lithographicated where the overlay error needs to be predicted. For example, it could be the location of a pre-fabricated measurement mark on the wafer surface, also known as a target location; it could also be a specific sampling point used for overlay error assessment; or any wafer surface location specified according to process requirements. At least one target measurement location can include one or more target measurement locations. By using the coordinates of the target measurement location as model input, the model can output corresponding overlay error prediction values ​​for any specified measurement location on the wafer, achieving fine-grained prediction at the location level.

[0041] Step S220: Generate a first feature based on the topography data and generate a second feature based on the coordinates of the target measurement position, wherein the first feature is used to characterize the global topography features of the wafer to be lithographically measured and the second feature is used to characterize the positional features of the target measurement position.

[0042] The first feature is used to characterize the global topography of the wafer to be lithographically patterned, and is generated from the topography data of the wafer. For example, the first feature may include, but is not limited to, a one-dimensional feature vector, a two-dimensional feature map, or a multi-channel tensor extracted from the topography data by one or more neural network layers (such as convolutional layers or fully connected layers). Encoding the topography data into a global topography feature vector enables the model to extract key information related to overlay errors from the high-dimensional topography data, providing an information basis for subsequent fusion with positional features.

[0043] The second feature, used to characterize the positional features of the target measurement location, is generated from the coordinates of the target measurement location. For example, the second feature can be a feature vector with the same dimension as the first feature, obtained by transforming the coordinates of the target measurement location (e.g., two-dimensional coordinates (x, y)) through a fully connected neural network, a position encoding layer, or other feature mapping functions. Encoding the low-dimensional position coordinates into a positional feature vector with the same dimension as the first feature through dimensional transformation allows the positional information to participate in subsequent fusion operations in vector form within the feature space, thereby enabling the model to differentiate the overlay error distribution patterns at different spatial locations.

[0044] For example, generating a first feature based on topographic data and a second feature based on the coordinates of the target measurement location can be achieved using a dual-branch neural network structure. The first branch extracts the wafer topographic features, and the second branch extracts the target measurement location coordinate features. By employing a dual-branch structure to extract features from the topographic data and location coordinates independently, the two types of heterogeneous information are fully encoded in their respective dedicated network branches. This avoids feature interference caused by directly mixing heterogeneous data as input, and improves the representation quality of the features in each branch.

[0045] This application does not limit the neural network structure. For example, the neural network structure can adopt structures such as Multi-Layer Perceptron (MLP), Residual Network (ResNet), Vision Transformer (ViT), Swin Transformer, Graph Neural Network (GNN), Mixed Multi-Layer Perceptron (MLP-Mixer), or Diffusion Model. The diverse choice of neural network structure enables this method to adapt to topographic data of different complexities. Compared with traditional physical model methods, it does not require the establishment of complex theoretical derivation models, and has stronger robustness and engineering applicability.

[0046] exist Figure 3 In a preferred implementation shown, the step of generating the first feature based on the topographic data in step S220 above is implemented by the following steps, that is, step S220 above may include the following steps S311 to S313.

[0047] Step S311: Preprocess the topography data to decouple it into multiple topography components.

[0048] Specifically, the morphology data is preprocessed to decouple it into multiple morphology components; then, from these multiple morphology components, at least one morphology component whose correlation with overlay error is higher than a preset threshold is selected as the target morphology data; and finally, a first feature is generated based on the target morphology data.

[0049] Step S312: From multiple topographic components, select at least one topographic component whose correlation with overlay error is higher than a preset threshold as the target topographic data.

[0050] By preprocessing and decoupling the topography data and filtering out topography components that are highly correlated with overlay error, low-order topography information that is less correlated with overlay error is removed. This makes the topography data input to the neural network more focused on topography features that have a substantial impact on overlay error, thereby improving the model's prediction accuracy and reducing the interference of irrelevant information on model training.

[0051] Preprocessing the topography data to decouple it into multiple topography components, such as using Zernike polynomial decomposition, polynomial fitting, or frequency domain filtering, decomposes the original wafer topography into topography components of different orders. By decoupling the topography data into multiple independent topography components, the correlation between each component and overlay error can be evaluated and filtered one by one, enabling refined management of topography information.

[0052] For example, multiple topographic components may include topographic components of different orders, such as translation, tilting, bending, and higher-order local deformation. Decomposing the topographic data into multiple components from low to high order provides a structured analytical basis for subsequent correlation-based filtering.

[0053] The preset threshold can be set based on actual process experience or statistical analysis results. By setting a correlation threshold, it is ensured that only morphological components that substantially contribute to the overlay error are used as model input, avoiding the introduction of noise from irrelevant or weakly correlated morphological information, and improving the model's signal-to-noise ratio and prediction accuracy.

[0054] In some embodiments, the correlation with overlay error can be reflected in the order of the topography component. Accordingly, the preset threshold for the correlation can be a threshold set for the order, i.e., a preset order.

[0055] Specifically, the method for filtering target topography data from multiple topography components can be based on the order of the topography components. The order of each topography component is used to characterize its spatial frequency features. The lower the order, the smoother the spatial variation of the corresponding topography component (e.g., translation, tilting, bending); the higher the order, the more drastic the spatial variation of the corresponding topography component (e.g., local deformation). Classifying topography components by order provides a quantitative basis for subsequent filtering based on order thresholds.

[0056] After determining the order of each of the multiple morphological components, at least one morphological component with an order greater than a preset order is identified as at least one higher-order morphological component and used as the target morphological data. By selecting higher-order morphological components as target morphological data based on order, the stronger correlation between higher-order morphology and residual overlay error is utilized. This allows the model input to focus on morphological features that are difficult for the lithography equipment itself to compensate for, thereby improving the predictive ability of residual overlay error.

[0057] The preset order can be a predetermined integer, for example, second order. Topographic components of second order or lower (including second order) are considered low-order topographic components, while those of second order or higher are considered high-order topographic components. Research shows that changes in wafer residual stress can lead to topographic changes of second order or higher, and the overlay errors caused by this stress are difficult for lithography equipment to compensate for. Therefore, using second order as the boundary and taking high-order topographic components as target topographic data allows the model to focus on predicting residual overlay errors that lithography equipment cannot compensate for, improving the targeting and effectiveness of feedforward compensation.

[0058] For example, Figure 4 is a schematic diagram comparing the effects of preprocessing wafer morphology data before and after processing according to an embodiment of this application. Wherein, Figure 4a To remove the original wafer morphology before removing low-order terms, Figure 4b The higher-order morphological features retained after removing lower-order terms.

[0059] like Figure 4a As shown, raw wafer topography data typically contains various low-order topography components such as translation, tilt, and bending, as well as high-order local deformation components. These low-order topography components correspond to the rigid displacement or uniform deformation of the wafer as a whole, have a weak correlation with overlay errors, and can usually be compensated for by the alignment and leveling system of the lithography equipment itself. If raw topography data containing such low-order components is directly input into the prediction model, it will not only increase the burden of learning redundant information for the model, but may also introduce noise interference, reducing the model's learning efficiency for overlay error-related features.

[0060] To overcome the above problems, this embodiment performs low-order term removal preprocessing on the original wafer morphology data. Exemplarily, this preprocessing can be achieved by removing low-order Zernike terms, polynomial fitting, or frequency domain filtering, filtering out morphology components of second order and below, and retaining higher-order morphology components of second order and above. The preprocessed wafer morphology is shown below. Figure 4b As shown, after removing the overall translation and tilting trends, the retained morphological features are more focused on local deformation details. These higher-order morphological components are closely related to the local deformation caused by residual stress in the wafer. The resulting overlay error is difficult for the lithography equipment to compensate for on its own. Therefore, using them as target morphological data input into the subsequent feature generation network enables the model to focus on learning morphological patterns that are strongly correlated with residual overlay error, thereby effectively improving the prediction accuracy of overlay error at a specified target measurement location.

[0061] Step S313: Generate the first feature based on the target topography data.

[0062] Specifically, at least one morphological component after filtering is the target morphological data, and the input data for the first feature is generated based on the target morphological data.

[0063] Step S230: Fuse the first feature and the second feature to obtain the overlay error prediction value corresponding to the target measurement position.

[0064] After obtaining the first feature and the second feature, the first feature and the second feature are fused together to obtain the predicted value of the overlay error corresponding to the target measurement position.

[0065] Specifically, fusion generally refers to the operation of combining a first feature with a second feature to obtain a combined representation that integrates global topographic information and local location information. Fusion methods can include, for example, dot product, feature concatenation, attention mechanisms, cross-attention, or gated fusion.

[0066] For example, taking dot product fusion as an example, the first feature is represented as The second feature is characterized as The fusion result obtained by using the dot product method is as follows: Where O is the predicted overlay error corresponding to the target measurement position, and S i For the i-th component of the first feature, t i It is the i-th component of the second feature.

[0067] By fusing global topography features with location features, the model can learn the coupling relationship between the overall topography features of the wafer and the spatial location features, so that the same wafer topography produces differentiated prediction outputs at different target measurement locations, thereby achieving location-sensitive overlay error prediction.

[0068] In some embodiments, when dot product fusion is used, the fusion result can be a real scalar that directly corresponds to the predicted overlay error value of the target measurement position.

[0069] exist Figure 5 In a preferred implementation shown, the step of fusing the first feature and the second feature in step S230 above to obtain the overlay error prediction value corresponding to the target measurement position is achieved through the following steps: that is, step S230 above may include the following steps S511~S512.

[0070] Step S511: Using the second feature as a condition, conditionally modulate the first feature to obtain the modulated first feature.

[0071] By conditionally modulating the first feature with the second feature as a condition, the global topography features can be adaptively adjusted according to the positional features of different target measurement positions, thereby achieving position-sensitive feature fusion. This enables the same wafer topography to produce differentiated prediction outputs at different spatial locations, improving the prediction accuracy of overlay error at a specified position.

[0072] Conditional modulation refers to adjusting the representation of the first feature by using a second feature as a modulation condition. The modulated first feature carries spatial information about the target measurement location, making the subsequently generated overlay error prediction value associated with that target measurement location. The conditional modulation mechanism makes the global topography features no longer a fixed, location-independent representation, but rather responsive to dynamic changes in different target measurement locations, thus enabling the model to differentiate the overlay error distribution patterns at different spatial locations.

[0073] Step S512: Generate overlay error prediction values ​​based on the modulated first feature.

[0074] Specifically, overlay error prediction values ​​are generated based on the modulated first feature. For example, the modulated feature vector can be converted into scalar overlay error prediction values ​​by summing, weighted aggregation, or mapping through an additional fully connected layer.

[0075] For example, taking dot product fusion as an example, the components of each dimension of the modulated first feature are multiplied by the corresponding components of the second feature and then summed, i.e. This yields the predicted overlay error in scalar form.

[0076] The modulated high-dimensional feature vector is mapped to a scalar predicted value, which matches the physical meaning of the overlay error being a scalar value at a single target measurement position, so that the model output can be directly used for subsequent error compensation.

[0077] Furthermore, in some embodiments, conditional modulation of the first feature based on the second feature includes: performing an asymmetric feature transformation operation on the first feature based on the second feature, such that different dimensions of the first feature are differentially adjusted in response to the target measurement position.

[0078] Conditional modulation is achieved by performing an asymmetric feature transformation operation on the first feature, so that different dimensions of the first feature are differentially adjusted in response to the target measurement position. Here, the asymmetric feature transformation operation means that the second feature applies different transformation amplitudes or directions to each dimension of the first feature, that is, each dimension of the first feature is differentially scaled, offset, or transformed.

[0079] For example, asymmetric feature transformation operations can be implemented through element-wise multiplication: the second feature vector Each component is related to the first eigenvector. The corresponding components are multiplied to obtain the modulated first feature. Since the values ​​of the components of the second feature are usually different, the different dimensions of the first feature are differentially scaled. Element-wise multiplication is a computationally efficient asymmetric transformation implementation with linear computational complexity, suitable for quickly generating prediction results in online inference scenarios, while effectively achieving dimensionality-level differential modulation.

[0080] Furthermore, as another implementation method, asymmetric feature transformation operations can also be implemented through attention mechanisms, gating mechanisms, etc., allowing the second feature to apply differentiated transformations to different dimensions of the first feature. The availability of multiple asymmetric transformation methods allows this method to flexibly choose the implementation method according to different accuracy requirements and computational resource constraints, making trade-offs between prediction accuracy and computational efficiency.

[0081] In some embodiments, after obtaining the overlay error prediction value corresponding to the target measurement position, the confidence index corresponding to the overlay error prediction value can be calculated, and it can be determined whether the confidence index exceeds a preset confidence threshold; if so, feedforward error compensation is performed on the wafer to be lithographicd before it enters the lithography process based on the overlay error prediction value.

[0082] By calculating the confidence index of the overlay error prediction value and comparing it with the confidence threshold, feedforward error compensation is only performed when the confidence exceeds the preset confidence threshold. This avoids the risk of introducing additional errors by directly using low-confidence prediction results for lithography compensation, thereby improving the reliability and robustness of the feedforward control system.

[0083] Confidence metrics are used to characterize the reliability of overlay error predictions. Confidence metrics can be calculated based on factors such as the uncertainty estimate of the model output, the variance of the predicted values, the consistency of multiple inference results, or the distribution characteristics of internal model features. Introducing confidence metrics allows the system to quantitatively evaluate the quality of prediction results, providing a basis for subsequent compensation decisions and avoiding blindly trusting all predictions.

[0084] The preset confidence threshold can be set according to actual process accuracy requirements and production line yield targets. The configurability of the confidence threshold allows the system to flexibly adjust the compensation strategy according to the accuracy requirements of different process nodes and products, balancing compensation coverage and compensation reliability.

[0085] Feedforward error compensation refers to the pre-adjustment of exposure parameters of the lithography equipment based on the predicted overlay error value before the wafer enters the lithography process, in order to compensate for the predicted overlay error. Feedforward error compensation predicts and compensates based on the real-time morphology of the wafer. Compared with traditional feedback compensation, it eliminates the lag caused by relying on historical wafer data. When there are significant process differences between batches or wafers, feedforward error compensation can significantly reduce compensation errors compared to traditional feedback compensation.

[0086] To implement the overlay error prediction method based on wafer topography data and target measurement position coordinates in the above embodiments, a prediction model that can simultaneously integrate global topography features and position features can be pre-established. Figure 6 The diagram shown is a flowchart illustrating a training method for an overlay error prediction model according to an embodiment of this application. Figure 6 As shown, the training method may include the following steps S610~S650.

[0087] Step S610: Input the training input samples into the initial overlay error prediction model to obtain the overlay error prediction value output by the initial overlay error prediction model.

[0088] The initial overlay error prediction model is used to generate a first feature based on topography data samples to characterize the global topography features of historical wafers, and a second feature based on coordinate samples to characterize the position features of historical target measurement positions. The first feature and the second feature are then fused to obtain the overlay error prediction value corresponding to the historical target measurement position.

[0089] Specifically, the training input samples can include topographic data samples of historical wafers and coordinate samples of historical target measurement positions on historical wafers. Historical wafers are wafers that have completed the photolithography process and have obtained actual overlay error measurement results. Using historical wafer data with obtained actual measurement results as training samples provides the model with supervised learning data with real labels, ensuring that the model can learn the real mapping relationship between topography and overlay error.

[0090] The initial overlay error prediction model generates a first feature based on topographic data samples and a second feature based on coordinate samples. The first and second features are then fused to obtain the predicted overlay error value. The structure of this model is consistent with the model structure of the prediction method described above, featuring a dual-branch fusion structure. This allows the model to simultaneously learn the parameters for topographic feature extraction, positional feature extraction, and their fusion during training, achieving end-to-end joint optimization.

[0091] After inputting the training input samples into the initial overlay error prediction model, the predicted overlay error value output by the initial overlay error prediction model can be obtained.

[0092] Step S620: Calculate the prediction loss value based on the difference between the predicted overlay error value and the training output sample.

[0093] The training output samples include the actual overlay errors of historical target measurement positions, which are used as supervision labels for model training. Using actual overlay errors as supervision labels ensures that the model's optimization objective is directly aligned with improving the accuracy of overlay error prediction, guaranteeing that the trained model output is as consistent as possible with the actual measurement results.

[0094] In some embodiments, the actual overlay error in the training output samples can be obtained by extracting the overlay error component related to the wafer morphology from the original measurement results of the historical target measurement positions, as the actual overlay error of the historical target measurement positions. The original measurement results of the historical target measurement positions contain the superposition of multiple error sources, such as wafer morphology error, lithography equipment error, thermal stress error, process drift error, etc. Clearly identifying that the original measurement results contain multiple error sources provides a necessary basis for the subsequent extraction of the component related to the wafer morphology through separation processing.

[0095] The overlay error component related to wafer morphology is a measurement component caused by wafer morphology factors, separated from historical overlay error measurements. By extracting the overlay error component related to wafer morphology from the original measurement results as training labels, error components unrelated to wafer morphology, such as lithography equipment errors, thermal stress errors, and process drift errors, are removed. This makes the supervision signal during model training more purely reflect the mapping relationship between morphology and overlay error, thereby improving the model's prediction accuracy for morphology-related overlay errors. Extracting the morphology-related overlay error component separately as training labels allows the model's learning objective to focus on the causal relationship between morphology and overlay error, avoiding overfitting or prediction bias caused by the model attempting to learn error components unrelated to morphology.

[0096] In one optional embodiment, extracting the overlay error component related to wafer morphology from the original overlay error measurement results of historical target measurement locations includes: obtaining the original overlay error measurements of the same historical wafer at multiple target measurement locations; fitting the non-morphological error components related to lithography equipment, mask, batch drift, or low-order alignment errors based on a preset non-morphological error model; and determining the residual obtained by subtracting the non-morphological error components from the original overlay error measurements as the overlay error component related to wafer morphology. The non-morphological error model may include a low-order polynomial model, an equipment state regression model, or a baseline error model based on historical batch statistics. By using the residual as a training output sample, the overlay error prediction model can focus on learning the mapping relationship between wafer morphology changes and overlay errors.

[0097] The prediction loss value is a function used to measure the difference between the predicted value and the actual overlay error of the overlay error prediction model. For example, mean squared error (MSE), mean absolute error (MAE), or other regression loss functions can be used. The loss function quantifies the deviation between the predicted and actual values, providing a clear direction for backpropagation and driving the model parameters to be updated in a way that reduces the prediction error.

[0098] Step S630: Based on the predicted loss value, perform backpropagation of the overlay error prediction model to update the parameters of the overlay error prediction model.

[0099] Performing backpropagation to update the parameters of the overlay error prediction model refers to updating the network model parameters by taking the derivative of the gradient. The updated parameters include all learnable parameters in the shape feature extraction branch, the position coordinate feature extraction branch, and the feature fusion module. Backpropagation enables the parameters of all branches of the model to be jointly optimized based on the prediction loss, ensuring coordinated improvement of the three stages of shape feature extraction, position feature extraction, and feature fusion, and achieving globally optimal prediction performance.

[0100] Step S640: Input the training input samples into the updated overlay error prediction model, and repeat the above steps until the prediction loss value meets the preset training convergence condition.

[0101] Preset training convergence conditions can be, for example, the predicted loss value being less than a preset loss threshold, the change in the loss value being less than a preset change threshold, or reaching a preset maximum number of training epochs. Setting training convergence conditions ensures that the model stops training after fully learning the patterns in the data, avoiding underfitting or overfitting, and enabling the trained model to have good generalization ability.

[0102] Step S650: Determine that the currently updated overlay error prediction model is the trained overlay error prediction model.

[0103] When the training convergence condition is met, it indicates that the updated overlay error prediction model has reached the accuracy standard and can be put into use. At this time, the updated overlay error prediction model can be used as the final trained overlay error training model and applied to the overlay error prediction method provided in the foregoing embodiments of this application. Based on the input morphology data of the wafer to be lithographically analyzed and the coordinates of at least one target measurement position on the wafer, a first feature and a second feature are generated and fused together to output the overlay error prediction value of the target measurement position.

[0104] Exemplary device Figure 7 The diagram shown is a schematic representation of an overlay error prediction device 700 provided in an embodiment of this application. Figure 7 As shown, the overlay error prediction device 700 provided in this application embodiment may include an acquisition module 710, a generation module 720 and a processing module 730.

[0105] The acquisition module 710 can be used to acquire the topographic data of the wafer to be lithographicated and the coordinates of at least one target measurement position on the wafer to be lithographicated; the generation module 720 can be used to generate a first feature based on the topographic data and generate a second feature based on the coordinates of the target measurement position, wherein the first feature is used to characterize the global topographic features of the wafer to be lithographicated and the second feature is used to characterize the positional features of the target measurement position; the processing module 730 can be used to fuse the first feature and the second feature to obtain the overlay error prediction value corresponding to the target measurement position.

[0106] In some embodiments, the generation module 720 may include a preprocessing module, a filtering module, and a generation module. The preprocessing module may be used to preprocess the morphology data to decouple the morphology data into multiple morphology components. The filtering module may be used to filter at least one morphology component from the multiple morphology components whose correlation with overlay error is higher than a preset threshold as target morphology data. The generation module may be used to generate a first feature based on the target morphology data.

[0107] In some embodiments, the filtering module described above can also be used to determine the order of each of the multiple morphological components; and to determine at least one morphological component with an order greater than a preset order as at least one higher-order morphological component as target morphological data.

[0108] In some embodiments, the processing module 730 may include a modulation module and a generation module. The modulation module may be used to conditionally modulate the first feature based on the second feature to obtain the modulated first feature. The generation module may be used to generate a predicted overlay error value based on the modulated first feature.

[0109] In some embodiments, the adjustment module described above can also be used to perform an asymmetric feature transformation operation on the first feature based on the second feature, such that different dimensions of the first feature are adjusted differentially in response to the target measurement position.

[0110] In some embodiments, the prediction device 700 may further include a compensation module, which can be used to calculate the confidence index corresponding to the overlay error prediction value; determine whether the confidence index exceeds a preset confidence threshold; if so, perform feedforward error compensation on the wafer to be lithographically ...

[0111] It should be understood that the principles, functions, characteristics of the data used, processing methods for the data, and technical effects of all optional implementation methods of each module in the prediction device 700 provided in this embodiment can be referred to the corresponding content in the above method embodiments, and will not be repeated here.

[0112] Figure 8 The diagram shown is a schematic of a training device 800 for an overlay error prediction model provided in an embodiment of this application. Figure 8 As shown, the training device 800 for the overlay error prediction model provided in this application embodiment may include a generation module 810, a calculation module 820, an update module 830, an adaptive module 840, and a determination module 850.

[0113] The generation module 810 can input training input samples into the initial overlay error prediction model to obtain the overlay error prediction value output by the initial overlay error prediction model. The training input samples include topographic data samples of historical wafers and coordinate samples of historical target measurement positions on the historical wafers. The initial overlay error prediction model generates a first feature based on the topographic data samples to characterize the global topographic features of the historical wafers, and generates a second feature based on the coordinate samples to characterize the positional features of the historical target measurement positions. The first and second features are then fused to obtain the overlay error prediction value corresponding to the historical target measurement position. The calculation module... 820 can be used to calculate the prediction loss value based on the difference between the predicted overlay error value and the training output sample, wherein the training output sample includes the actual overlay error of the historical target measurement position; the update module 830 can be used to perform backpropagation of the overlay error prediction model based on the prediction loss value to update the parameters of the overlay error prediction model; the adaptive module 840 can be used to input the training input sample into the updated overlay error prediction model and repeat the above steps until the prediction loss value meets the preset training convergence condition; the determination module 850 can be used to determine that the currently updated overlay error prediction model is the trained overlay error prediction model.

[0114] The training device 800 may also include an extraction module, which can be used to extract the overlay error component related to the wafer morphology from the original measurement results of the historical target measurement position as the actual overlay error of the historical target measurement position, wherein the overlay error component sample is the measurement value component sample related to the wafer morphology extracted from the historical overlay error measurement value sample.

[0115] It should be understood that the principles, functions, characteristics of the data used, data processing methods, and technical effects of all optional implementation methods of each module in the training device 800 provided in this embodiment can be referred to the corresponding content in the above method embodiments, and will not be repeated here.

[0116] Exemplary device Figure 9 The diagram shown is an exemplary electronic device 900 provided in an embodiment of this application. Figure 9 As shown, the electronic device 900 may include a processor 910 and a memory 920. The memory 920 stores computer instructions, and the processor 910 executes these instructions to implement the overlay error prediction method or the overlay error prediction model training method provided in any of the above embodiments.

[0117] The memory 920 may be a read-only memory (ROM), a static storage device, a dynamic storage device, or a random access memory (RAM). The memory 920 may store a program, and when the program stored in the memory 920 is executed by the processor 910, the processor 910 is used to execute the various steps of the overlay error prediction method or the training method of the overlay error prediction model provided in the embodiments of this application.

[0118] The processor 910 may be a general-purpose central processing unit (CPU), microprocessor, application specific integrated circuit (ASIC), graphics processing unit (GPU), or one or more integrated circuits, used to execute relevant programs to achieve the functions required by the modules in the prediction device or training device of this application embodiment.

[0119] The processor 910 can also be an integrated circuit chip with signal processing capabilities. In implementation, each step of the method in this application can be completed by the integrated logic circuitry in the hardware of the processor 910 or by instructions in software form. The processor 910 can also be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It can implement or execute the methods, steps, and logic block diagrams disclosed in the embodiments of this application. The general-purpose processor can be a microprocessor or any conventional processor. The steps of the method disclosed in the embodiments of this application can be directly embodied in the execution of a hardware decoding processor, or can be executed by a combination of hardware and software modules in the decoding processor. The software modules can be located in random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or other mature storage media in the art. The storage medium is located in the memory 920. The processor 910 reads the information in the memory 920 and, in conjunction with its hardware, performs the functions required by the units included in the control device of this application embodiment, or executes the overlay error prediction method or the training method of the overlay error prediction model of this application method embodiment.

[0120] Exemplary computer-readable storage media Other embodiments of this application also provide a computer-readable storage medium, including a processor and a memory, wherein the memory is used to store computer-executable instructions. When the computer-executable instructions are executed by the processor, the above-described overlay error prediction method or the training method for the overlay error prediction model is implemented.

[0121] Computer-readable storage media can be, for example, random access memory (RAM), read-only memory (ROM), flash memory, hard disk, or solid-state drive (SSD). This variety of storage media allows this method to flexibly select the appropriate storage medium based on different deployment scenarios (such as embedded devices, servers, or edge computing devices). Processors can be, for example, central processing units (CPUs), graphics processing units (GPUs), or dedicated acceleration chips. This diverse selection of processors allows this method to choose a suitable hardware platform based on inference speed and computing resource requirements, balancing production line real-time requirements and computational costs. This provides a concrete hardware platform for the engineering deployment and production line integration of this method, facilitating the integration of the prediction method or the training method for the prediction model into the process control system of the semiconductor manufacturing production line.

[0122] The block diagrams of the devices, equipment, and systems involved in this application are merely illustrative examples and are not intended to require or imply that they must be connected, arranged, or configured in the manner shown in the block diagrams. Those skilled in the art will understand that these devices, equipment, and systems can be connected, arranged, and configured in any manner. Words such as “comprising,” “including,” “having,” etc., are open-ended terms, up to “including but not limited to,” and are used interchangeably with them unless the context clearly indicates otherwise. The term “such as” as used herein refers to the phrase “such as but not limited to,” and is used interchangeably with it.

[0123] It should also be noted that in the apparatus, equipment, and methods of this application, each module or step can be decomposed and / or recombined. These decompositions and / or recombinations should be considered as equivalent solutions of this application.

[0124] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use this application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein can be applied to other aspects without departing from the scope of this application. Therefore, this application is not intended to be limited to the foregoing aspects, but rather to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0125] The above description is for illustrative purposes only, illustrating and describing the technical solutions of this application. Furthermore, this description is not intended to limit the embodiments of this application to the scope of the forms disclosed above. Although several exemplary aspects and embodiments have been discussed above, those skilled in the art can readily derive other variations, modifications, alterations, additions, and sub-combinations based on the above content.

[0126] The above are merely preferred embodiments of this application and are not intended to limit this application. Any modifications or equivalent substitutions made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A method for predicting overlay error, characterized in that, include: Acquire the morphological data of the wafer to be photolithographically lithographically lithographically oriented and the coordinates of at least one target measurement position on the wafer to be photolithographically lithographically oriented; A first feature is generated based on the topography data, and a second feature is generated based on the coordinates of the target measurement position. The first feature is used to characterize the global topography features of the wafer to be lithographically analyzed, and the second feature is used to characterize the positional features of the target measurement position. The first feature and the second feature are fused to obtain the overlay error prediction value corresponding to the target measurement position.

2. The method according to claim 1, characterized in that, The generation of the first feature based on the morphological data includes: The topography data is preprocessed to decouple it into multiple topography components; From the plurality of topographic components, at least one topographic component whose correlation with overlay error is higher than a preset threshold is selected as the target topographic data. The first feature is generated based on the target topography data.

3. The method according to claim 2, characterized in that, The step of selecting at least one morphological component from the plurality of morphological components whose correlation with overlay error is higher than a preset threshold as the target morphological data includes: Determine the order of each of the plurality of topographic components; At least one morphological component with an order greater than a preset order is identified as at least one higher-order morphological component and used as the target morphological data.

4. The method according to claim 1, characterized in that, The step of fusing the first feature and the second feature to obtain the predicted overlay error value corresponding to the target measurement position includes: Using the second feature as a condition, the first feature is conditionally modulated to obtain the modulated first feature; The overlay error prediction value is generated based on the modulated first feature.

5. The method according to claim 4, characterized in that, The conditional modulation of the first feature based on the second feature includes: Based on the second feature, an asymmetric feature transformation operation is performed on the first feature, such that different dimensions of the first feature are differentially adjusted in response to the target measurement position.

6. The method according to claim 1, characterized in that, After obtaining the predicted overlay error value corresponding to the target measurement position, the method further includes: Calculate the confidence index corresponding to the predicted overlay error value; Determine whether the confidence index exceeds a preset confidence threshold; If so, then based on the predicted overlay error value, feedforward error compensation is performed on the wafer to be lithographicated before it enters the lithography process.

7. A training method for an overlay error prediction model, characterized in that, include: The training input samples are input into the initial overlay error prediction model to obtain the overlay error prediction value output by the initial overlay error prediction model. The training input samples include topographic data samples of historical wafers and coordinate samples of historical target measurement positions on the historical wafers. The initial overlay error prediction model is used to generate a first feature based on the topographic data samples to characterize the global topographic features of the historical wafers, and to generate a second feature based on the coordinate samples to characterize the positional features of the historical target measurement positions. The first feature and the second feature are then fused to obtain the overlay error prediction value corresponding to the historical target measurement position. Based on the difference between the predicted overlay error value and the training output sample, a prediction loss value is calculated, wherein the training output sample includes the actual overlay error of the historical target measurement position; Based on the predicted loss value, backpropagation of the overlay error prediction model is performed to update the parameters of the overlay error prediction model; Input the training input samples into the updated overlay error prediction model and repeat the above steps until the prediction loss value meets the preset training convergence condition. The updated overlay error prediction model is determined to be the trained overlay error prediction model.

8. The training method for the overlay error prediction model according to claim 7, characterized in that, Also includes: The overlay error component related to the wafer morphology is extracted from the original measurement results of the historical target measurement position and used as the actual overlay error of the historical target measurement position. The overlay error component sample is the measurement value component sample related to the wafer morphology extracted from the historical overlay error measurement value sample.

9. A device for predicting overlay errors, characterized in that, include: The acquisition module is used to acquire the morphological data of the wafer to be photolithographically lithographically lithographically oriented and the coordinates of at least one target measurement position on the wafer to be photolithographically lithographically oriented; The generation module is used to generate a first feature based on the topography data and a second feature based on the coordinates of the target measurement position, wherein the first feature is used to characterize the global topography features of the wafer to be lithographically analyzed, and the second feature is used to characterize the positional features of the target measurement position. The processing module is used to fuse the first feature and the second feature to obtain the overlay error prediction value corresponding to the target measurement position.

10. A computer-readable storage medium comprising a processor and a memory, the memory being used to store computer-executable instructions; When the computer execution instructions are executed by the processor, the overlay error prediction method as described in any one of claims 1 to 6 or the training method for the overlay error prediction model as described in claim 7 or 8 is implemented.

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