Apparatus, implementation method and device based on hardware and software sharing TRNG

Abstract

This invention discloses a device, implementation method, and apparatus based on a shared hardware and software TRNG, relating to the field of random number generation technology. The device includes a TRNG module, a TRNG CTRL module, a FIFO CTRL module, a Bus Ctrl Mux module, an Intr Mux module, and a Mux module. The TRNG module is used to configure the registers within the TRNG to implement SEED and generate random numbers. The TRNG CTRL module is used to generate the control sequences required for the SEED phase and the random number generation phase in the TRNG. The FIFO CTRL module is used to store the random numbers generated by the TRNG into a FIFO and feed back the current number of available random numbers in the FIFO to the TRNG CTRL module. This application can effectively improve the efficiency of hardware and software in obtaining random numbers.

Description

Technical Field

[0001] This application relates to the field of random number generation technology, specifically to a device, implementation method, and equipment based on a shared software and hardware TRNG. Background Technology

[0002] Currently, common schemes used in random number generation include: (1) In order to improve the scheduling efficiency of software and hardware, the TRNG (True Random Number Generator) of software and hardware are often independent, so that there are at least two TRNG modules in the whole system; (2) Software and hardware share a TRNG and share a FIFO (First In First Out data buffer).

[0003] For the above scheme (1), under the existing TRNG, the time for each SEED (random number seed) is usually on the order of milliseconds, and the random number is usually generated every 512 clock cycles to generate 128-bit random numbers. Given that it takes a long time for the software to configure the TRNG to generate random numbers, it will consume time for the application of the software, which will not only increase the area but also make the software operation performance low. For the above scheme (2), the software and hardware sharing scheme has system limitations, that is, the software and hardware cannot access and obtain random numbers at the same time, resulting in low software and hardware parallelization efficiency. Summary of the Invention

[0004] This application provides a device, implementation method, and apparatus based on a shared TRNG between software and hardware, which can effectively improve the efficiency of software and hardware in obtaining random numbers.

[0005] In a first aspect, embodiments of this application provide an apparatus based on a shared software and hardware TRNG, the apparatus comprising: The TRNG module is used to implement SEED and generate random numbers by configuring the registers inside the TRNG; The TRNG CTRL module is used to generate the control sequences required for the SEED phase and the random number generation phase in TRNG. The FIFO CTRL module is used to store random numbers generated by TRNG into a FIFO and to feed back the number of available random numbers inside the FIFO to the TRNG CTRL module. The Bus Ctrl Mux module is used to configure the register signals of the TRNG CTRL module via software, so as to enable direct access to the TRNG by software or access to the TRNG by hardware. The Intr Mux module is used to determine whether to report an interrupt from the TRNG or an internal interrupt of the TRNG CTRL module to the software, based on the register signals of the TRNG CTRL module configured in the software. The Mux module is used to implement the option of storing random numbers in a software FIFO or a hardware FIFO.

[0006] In conjunction with the first aspect, in one implementation method: The register signals of the TRNG CTRL module include hw_ctrl, trng_ctrl_en, seeding_mode, reseed_req, nonce_data, FIFO_Threshold, software_req, and software_req_len; The hw_ctrl indicates that the TRNG is controlled by hardware or directly by software; The trng_ctrl_en signal represents the signal that enables the TRNG CTRL module to work; The seeding_mode represents the working mode of the SEED phase of the TRNG, including self-seeding mode and temporary seeding mode; The reseed_req represents a reseeding request; The nonce_data represents temporary random number seed data; The FIFO_Threshold represents the threshold value for storing random numbers in both software and hardware FIFOs. The software_req indicates that the software requests a random number. The software_req_len represents the length of the software request to obtain a random number.

[0007] In conjunction with the first aspect, in one implementation method: The Bus Ctrl Mux module is specifically used to: configure the register signal hw_ctrl of the TRNG CTRL module through software to control the corresponding APB bus access path. When hw_ctrl is 0, the software directly accesses the TRNG; when hw_ctrl is 1, the hardware accesses the TRNG. The Intr Mux module is specifically used to: select whether to report interrupts from the TRNG or interrupts within the TRNG CTRL module to the software, based on the software_req register signal of the TRNG CTRL module configured in the software.

[0008] In conjunction with the first aspect, in one implementation, the Mux module is specifically used for: When the number of random numbers in the hardware FIFO reaches the threshold for storing random numbers, the path is switched to store the random numbers obtained by the TRNG CTRL module into the software FIFO. Alternatively, when the number of random numbers in the software FIFO reaches the threshold for storing random numbers, the path is switched to store the random numbers obtained by the TRNG CTRL module into the hardware FIFO.

[0009] In conjunction with the first aspect, in one implementation method: The device also includes a Hardware Crypto Engine module; The Hardware Crypto Engine module is used to call random numbers to implement symmetric or asymmetric algorithms.

[0010] Secondly, embodiments of this application provide a method for implementing a software and hardware control TRNG, which is implemented based on the device described above. The method for implementing a software and hardware control TRNG includes a software control TRNG process and a hardware control TRNG process. The software control TRNG process includes configuring the register signals hw_ctrl and trng_ctrl_en of the TRNG CTRL module to put the TRNG into software control mode; The hardware control TRNG process includes: Configure the register signals seeding_mode, FIFO_Threshold, hw_ctrl, and trng_ctrl_en of the TRNG CTRL module to put TRNG in hardware control mode; Interruption detection is performed based on the seeding mode, and after the seeding phase is completed, the random number generated by TRNG is stored in the hardware FIFO or software FIFO by combining the storable random number threshold of the hardware FIFO and software FIFO. Wherein, hw_ctrl indicates that TRNG is controlled by the TRNG CTRL module or directly by software, trng_ctrl_en indicates the signal that enables the TRNG CTRL module, seeding_mode indicates the working mode of the TRNG's SEED stage, including self-seeding mode and temporary seeding mode, and FIFO_Threshold indicates the threshold for storing random numbers for software FIFO and hardware FIFO.

[0011] In conjunction with the second aspect, in one implementation method, the determination of the completion of the sowing stage is specifically as follows: When the seeding_mode is in self-seeding mode, wait for the interrupt signal from the TRNG. If the interrupt signal from the TRNG is detected, it means that the self-seeding stage is complete. When seeding_mode is in temporary seeding mode, the temporary random number seed data written by the software is written to TRNG, and the system waits for the interrupt signal from TRNG. If the interrupt signal from TRNG is detected, it means that the temporary seeding stage is complete.

[0012] In conjunction with the second aspect, in one implementation, storing the random numbers generated by the TRNG into the hardware FIFO or software FIFO by combining the storable random number thresholds of the hardware FIFO and the software FIFO specifically includes: The random numbers generated by TRNG are written to the hardware FIFO via the APB interface. When the random numbers in the hardware FIFO reach the threshold for storing random numbers, the random numbers generated by TRNG are written to the software FIFO. This process is repeated. When the random numbers in one FIFO reach the threshold for storing random numbers, it is determined whether the random numbers in the other FIFO have reached the threshold for storing random numbers. If not, the random numbers generated by TRNG are written to that FIFO. This process continues until the random numbers in both the hardware FIFO and the software FIFO have reached the threshold for storing random numbers, at which point the random number generation phase ends.

[0013] In conjunction with the second aspect, in one implementation, after the random number generation phase ends, the method further includes: Real-time detection of the number of random numbers in both hardware and software FIFOs: If the number of random numbers in the hardware FIFO or software FIFO is less than the threshold for storing random numbers, then the random numbers generated by TRNG are written into the FIFO whose number of random numbers is less than the threshold for storing random numbers. If the number of random numbers in both the hardware FIFO and the software FIFO is not less than the threshold for storing random numbers, then when a reseeding request is detected, the hardware control TRNG is disabled, or the TRNG CTRL module is disabled, the hardware control TRNG process is re-executed.

[0014] Thirdly, embodiments of this application provide a hardware and software control TRNG implementation device, the hardware and software control TRNG implementation device including a processor, a memory, and a hardware and software control TRNG implementation program stored in the memory and executable by the processor, wherein when the hardware and software control TRNG implementation program is executed by the processor, it implements the steps of the hardware and software control TRNG implementation method described above.

[0015] The beneficial effects of the technical solutions provided in this application include: It supports simultaneous requests for random numbers from both software and hardware. This means that software can control the TRNG independently, and software can still request random numbers in parallel even when the TRNG is controlled by hardware. This effectively improves the efficiency of software and hardware in obtaining random numbers without compromising the security of true random numbers. At the same time, it optimizes the number of TRNGs in the SoC system and reduces the area. Attached Figure Description

[0016] Figure 1 This is a schematic diagram of the device based on a shared hardware and software TRNG according to this application; Figure 2 This is a flowchart of the state control process; Figure 3 This is a schematic diagram of the hardware structure of the device for implementing the software and hardware control of the TRNG in this application. Detailed Implementation

[0017] To enable those skilled in the art to better understand the present application, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present application, and not all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of the present application.

[0018] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in further detail below with reference to the accompanying drawings.

[0019] In a first aspect, embodiments of this application provide a device based on a shared hardware and software TRNG, which supports software to control the TRNG independently, and allows the software to still request random numbers in parallel even when the TRNG is controlled by hardware.

[0020] In one embodiment, reference is made to Figure 1 , Figure 1 This is a schematic diagram of the device based on a shared hardware and software TRNG according to this application. Figure 1 As shown, the device based on the shared hardware and software TRNG includes: TRNG module, TRNG CTRL module, FIFO CTRL module, BusCtrl Mux module, Intr Mux module, Mux module, and Hardware Crypto Engine module.

[0021] The TRNG module is used to implement SEED and generate random numbers by configuring the registers inside the TRNG. Specifically, the purpose of the TRNG module is to generate random numbers, that is, to configure the registers inside the TRNG through the APB (Advanced Peripheral Bus) interface, and finally realize the functions of SEED and random number generation.

[0022] The Hardware Crypto Engine module is used to implement symmetric or asymmetric algorithms by calling random numbers. Specifically, the Hardware Crypto Engine module is the cryptographic engine algorithm module, used to implement symmetric or asymmetric algorithms by calling random numbers.

[0023] The TRNG CTRL module is used to generate the control sequences required for the SEED phase and the random number generation phase in the TRNG. The state control flowchart for the TRNG CTRL module (i.e., the TRNG control module) is as follows: Figure 2 As shown, IDLE indicates that the state machine is in an idle state, SELF_SEED indicates that the state machine is in a self-seeding state, NONCE indicates that the state machine is in a temporary seeding state, GEN indicates that the state machine is in a random number generation state, and WAIT indicates that the state machine is in a waiting state.

[0024] For the control sequence, its specific contents may include: (1) Configure TRNG internal register A (A is the register name in the example), the purpose of which is to tell the TRNG module that the current operation stage is the seeding stage; (2) Configure TRNG internal register B (B is the register name in the example), the purpose of which is to tell the TRNG module the current seeding method (temporary seeding or self-seeding); (3) If it is temporary seeding, TRNG internal registers C, D, E, and F (all are register names) need to be configured, the purpose of which is to send temporary data to TRNG internally as seed data for temporary seeding, which is used by TRNG to generate random numbers; (4) TRNG CTRL module configures TRNG register G, notifies TRNG to start seeding, and then listens for the interrupt signal of TRNG module. Detecting an interrupt indicates that the seeding stage of TRNG is complete; (5) TRNG CTRL module configures TRNG register H, notifies TRNG to start generating random numbers, waits for TRNG to return a response signal, and once the response signal of TRNG is received, it means that TRNG has put the random number into the specified register (such as I, J, K, M); (6) TRNG The CTRL module reads the values ​​of random numbers from registers I, J, K, and M inside the TRNG; (7) Execute steps (5) and (6) repeatedly to fill the read random numbers into the hardware and software FIFOs. The TRNGCTRL module monitors the number of available random numbers in both the hardware and software FIFOs. Once the number of available random numbers in the hardware and software FIFOs is detected to be lower than the threshold, random numbers are generated again.

[0025] The register signals of the TRNG CTRL module include hw_ctrl, trng_ctrl_en, seeding_mode, reseed_req, nonce_data, FIFO_Threshold, software_req, and software_req_len. hw_ctrl indicates whether the TRNG is controlled by hardware (i.e., the TRNG CTRL module) or directly by software; a value of 1 indicates hardware control, and a value of 0 indicates direct software control. trng_ctrl_en is the enable signal for the TRNG CTRL module; a value of 1 indicates the TRNG CTRL module is working, and a value of 0 indicates the TRNG CTRL module is not working. seeding_mode indicates the working mode of the SEED stage of TRNG, including self-seed mode and nonce mode. Self-seed mode relies on random number seeds generated by TRNG sampling noise, while nonce mode requires external input of random number seeds to complete the SEED stage operation. When seeding_mode is 1, it indicates nonce mode, and when it is 0, it indicates self-seed mode.

[0026] `reseed_req` represents the reseeding request; a value of 1 indicates a reseeding request, while a value of 0 indicates no reseeding request. `nonce_data` represents the temporary random number seed data. `FIFO_Threshold` represents the storable random number threshold for both software and hardware FIFOs. `software_req` represents the software request to retrieve random numbers. `software_req_len` represents the length of the random numbers retrieved by the software request.

[0027] When IDLE is active, hw_ctrl=0 or trng_ctrl_en=0; when switching from IDLE to SELF_SEED, hw_ctrl=1, trng_ctrl_en=1, and seeding_mode=0; when switching from IDLE to NONCE, hw_ctrl=1, trng_ctrl_en=1, and seeding_mode=1; when SELF_SEED is active, seeding_done=0, indicating that the seeding phase is complete; when NONCE is active... `nonce_done=0` indicates that the temporary seeding phase is complete; when switching from SELF_SEED to GEN, `seeding_done=1`; when switching from NONCE to GEN, `nonce_done=1`; when in GEN, `gen_done=0` indicates that random number generation is complete; when switching from GEN to WAIT, `gen_done=1`; when switching from WAIT to GEN, `software_cnt` is less than `FIFO_Threshold` or `hard word_cnt` is less than `FIFO_Threshold`, where `software_cnt` represents the number of available random numbers in the software FIFO and `hard word_cnt` represents the number of available random numbers in the hardware FIFO; when in WAIT, `reseed_req=0`, `hw_ctrl=1`, and `trng_ctrl_en=1`; when switching from WAIT to IDLE, `reseed_req=1`, `hw_ctrl=0`, or `trng_ctrl_en=0`.

[0028] The FIFO CTRL module (FIFO control module) is used to store random numbers generated by TRNG into the FIFO and to feed back the number of available random numbers in the current FIFO to the TRNG CTRL module. In other words, it feeds back the number of available random numbers in the hardware FIFO or software FIFO to the TRNG CTRL module.

[0029] The Bus Ctrl Mux module (i.e., the bus control multiplexing module) is used to configure the register signals of the TRNG CTRL module via software (software refers to the underlying driver or operating system; for example, in some business scenarios, when a private group needs to be created, the random number is used as a security key. In this case, the task may come from the business layer (the user-initiated request), and needs to be passed down layer by layer until it is finally passed to the driver or operating system for execution). This allows the software to directly access the TRNG or the hardware to access the TRNG. Specifically, the Bus Ctrl Mux module is used to configure the register signal hw_ctrl of the TRNG CTRL module via software to control the corresponding APB bus access path. When hw_ctrl is 0, the software directly accesses the TRNG; when hw_ctrl is 1, the hardware (i.e., the TRNGCTRL module) accesses the TRNG.

[0030] The Intr Mux module (interrupt multiplexing module) is used to determine whether to report TRNG interrupts or internal TRNG CTRL module interrupts to the software based on the register signals configured in the software of the TRNG CTRL module. Specifically, the Intr Mux module selects whether to report TRNG interrupts or internal TRNG CTRL module interrupts to the software based on the software_req register signal configured in the TRNG CTRL module. This is because in hardware control mode, if the software requests random numbers, the software needs to be notified via an interrupt to read the random numbers once they are ready.

[0031] The Mux module (multiplexer module) is used to select whether to store random numbers in a software FIFO or a hardware FIFO. Specifically, the Mux module switches paths as follows: when the number of random numbers in the hardware FIFO reaches the storage threshold, it switches to store the random numbers obtained by the TRNGCTRL module in the software FIFO; conversely, when the number of random numbers in the software FIFO reaches the storage threshold, it switches paths to store the random numbers obtained by the TRNGCTRL module in the hardware FIFO. In other words, the Mux module automatically selects whether to write random numbers to the hardware or software FIFO, automatically switching the selection signal based on the status of the software and hardware FIFO control modules.

[0032] Furthermore, the TRNG CTRL module can also include a Register module. The main purpose of the Register module is to implement control, data, interrupt, and status registers, such as signal control for hw_ctrl, trng_ctrl_en, reseed_req, seeding_mode, software_req, and software_req_len, as well as software writing nonce_data (one-time data) and providing it to the TRNG module, interrupt clearing, and providing interrupt information, state machine information, FIFO status, and other related information to the software.

[0033] The device based on a shared software and hardware TRNG of this application can realize software direct control of the TRNG to obtain random numbers, hardware control of the TRNG to generate random numbers for use by the HCE, and hardware control of the TRNG to generate random numbers for use by the software.

[0034] To enable software to directly control the TRNG to generate random numbers, the software configures the register signal hw_ctrl of the TRNG CTRL module to 0, thus enabling the software to directly control the TRNG to generate random numbers.

[0035] For hardware-controlled TRNG to generate random numbers for HCE use, during the software initialization phase, after configuring the register signal hw_ctrl of the TRNGCTRL module to 0 and the corresponding SEED mode, the hardware automatically configures TRNG. The subsequently obtained random numbers are automatically written into the hardware and software FIFOs. When HCE (Hardware Crypto Engine module) needs random numbers, it directly reads the random numbers to complete the encryption, decryption, and signature verification algorithm calculations. It is not necessary to configure TRNG separately when HCE wants to use it, thus improving the performance of HCE's internal encryption, decryption, and signature verification algorithms.

[0036] For hardware-controlled TRNG to generate random numbers for software use, during the initialization phase, the software configures the register signal hw_ctrl of the TRNGCTRL module to 0 and the corresponding SEED mode. The hardware then automatically configures the TRNG, and the subsequently obtained random numbers are automatically written into the hardware and software FIFOs. When the software needs random numbers, it can directly obtain the random numbers from the software FIFO without needing to configure the TRNG separately when the software wants to use them, thus improving the performance of HCE's internal encryption / decryption and signature verification algorithms.

[0037] Secondly, embodiments of this application also provide a method for implementing software and hardware control of a TRNG, which is implemented based on the aforementioned apparatus. The method for implementing software and hardware control of a TRNG includes a software control TRNG process and a hardware control TRNG process.

[0038] The software-controlled TRNG process includes configuring the register signals hw_ctrl and trng_ctrl_en of the TRNG CTRL module to put the TRNG into software control mode.

[0039] The hardware control TRNG process includes: S21: Configure the register signals seeingding_mode, FIFO_Threshold, hw_ctrl, and trng_ctrl_en of the TRNG CTRL module to put TRNG in hardware control mode; Specifically, first configure the register signals seeing_mode and FIFO_Threshold of the TRNG CTRL module, then configure the register signals hw_ctrl and trng_ctrl_en of the TRNG CTRL module to 1, so that TRNG is in hardware control mode; S22: Based on the seeding mode, interruption detection is performed, and after the seeding phase is completed, the random number generated by TRNG is stored in the hardware FIFO or software FIFO by combining the storable random number threshold of the hardware FIFO and software FIFO. Wherein, hw_ctrl indicates that TRNG is controlled by the TRNG CTRL module or directly by software, trng_ctrl_en indicates the signal that enables the TRNG CTRL module, seeding_mode indicates the working mode of the TRNG's SEED stage, including self-seeding mode and temporary seeding mode, and FIFO_Threshold indicates the threshold for storing random numbers for software FIFO and hardware FIFO.

[0040] Furthermore, in one embodiment, the determination of the completion of the sowing stage is specifically as follows: When the seeding_mode is in self-seeding mode, wait for the interrupt signal of TRNG. If the interrupt signal of TRNG is detected, it means that the self-seeding stage is completed. If the interrupt signal of TRNG is not detected, continue to wait for the interrupt signal of TRNG. When the seeding_mode is temporary seeding mode, the temporary random number seed data written by the software is written to the TRNG, and the system waits for the interrupt signal of the TRNG. If the interrupt signal of the TRNG is detected, it means that the temporary seeding stage is completed. If the interrupt signal of the TRNG is not detected, the system continues to wait for the interrupt signal of the TRNG.

[0041] Furthermore, in one embodiment, the random numbers generated by the TRNG are stored in the hardware FIFO or the software FIFO by combining the storable random number thresholds of the hardware FIFO and the software FIFO, specifically including: The random numbers generated by TRNG are written to the hardware FIFO via the APB interface. When the random numbers in the hardware FIFO reach the threshold for storing random numbers, the random numbers generated by TRNG are written to the software FIFO. This process is repeated. When the random numbers in one FIFO reach the threshold for storing random numbers, it is determined whether the random numbers in the other FIFO have reached the threshold for storing random numbers. If not, the random numbers generated by TRNG are written to that FIFO. This process continues until the random numbers in both the hardware FIFO and the software FIFO have reached the threshold for storing random numbers, at which point the random number generation phase ends.

[0042] Specifically, random numbers generated by TRNG are written to the hardware FIFO via the APB interface. Once the random numbers in the hardware FIFO reach the threshold for storing random numbers, they are automatically written to the software FIFO. Once the random numbers in the software FIFO also reach the threshold for storing random numbers, the system checks whether the random numbers in the hardware FIFO have reached the threshold for storing random numbers. This process is repeated until the random numbers in both the hardware and software FIFOs reach the threshold for storing random numbers, at which point the random number generation phase ends. Otherwise, the writing of random numbers to the hardware and software FIFOs continues.

[0043] Furthermore, in one embodiment, after the random number generation phase ends, the method further includes: Real-time detection of the number of random numbers in both hardware and software FIFOs: If the number of random numbers in the hardware FIFO or software FIFO is less than the threshold for storing random numbers, then the random numbers generated by TRNG are written into the FIFO whose number of random numbers is less than the threshold for storing random numbers. If the number of random numbers in both the hardware FIFO and the software FIFO is not less than the threshold for storing random numbers, then when a reseeding request is detected, the hardware control TRNG is disabled, or the TRNG CTRL module is disabled, the hardware control TRNG process is re-executed. In other cases, the number of random numbers in the hardware FIFO and software FIFO continues to be monitored in real time.

[0044] The software and hardware control TRNG implementation method of this application supports simultaneous requests for random numbers by both software and hardware. That is, it supports software to control TRNG independently, and software can still request random numbers in parallel when the hardware controls TRNG. This effectively improves the efficiency of software and hardware in obtaining random numbers without changing the security of true random numbers. At the same time, it optimizes the number of TRNGs in the SoC (System on Chip) system and reduces the area.

[0045] Thirdly, embodiments of this application provide a device for implementing software and hardware control of a TRNG. The device for implementing software and hardware control of a TRNG can be a personal computer (PC), a laptop computer, a server, or other devices with data processing capabilities.

[0046] Reference Figure 3 , Figure 3 This is a schematic diagram of the hardware structure of the device for implementing software and hardware control of the TRNG involved in the embodiments of this application. In the embodiments of this application, the device for implementing software and hardware control of the TRNG may include a processor, a memory, a communication interface, and a communication bus.

[0047] The communication bus can be of any type and is used to interconnect the processor, memory, and communication interface.

[0048] Communication interfaces include input / output (I / O) interfaces, physical interfaces, and logical interfaces used for interconnecting devices within the implementation device of the TRNG (Transmission and Access Control Group) to enable hardware and software control, as well as interfaces used for interconnecting the implementation device of the TRNG with other devices (such as other computing devices or user equipment). Physical interfaces can be Ethernet interfaces, fiber optic interfaces, ATM interfaces, etc.; user equipment can be displays, keyboards, etc.

[0049] Memory can be various types of storage media, such as random access memory (RAM), read-only memory (ROM), non-volatile RAM (NVRAM), flash memory, optical storage, hard disk, programmable ROM (PROM), erasable PROM (EPROM), electrically erasable PROM (EEPROM), etc.

[0050] The processor can be a general-purpose processor, which can call the implementation program of the hardware and software control TRNG stored in memory and execute the implementation method of the hardware and software control TRNG provided in the embodiments of this application. For example, the general-purpose processor can be a central processing unit (CPU). The method executed when the implementation program of the hardware and software control TRNG is called can be referred to the various embodiments of the implementation method of the hardware and software control TRNG of this application, and will not be repeated here.

[0051] Those skilled in the art will understand that Figure 3 The hardware structure shown does not constitute a limitation of this application and may include more or fewer components than shown, or combine certain components, or have different component arrangements.

[0052] The terms "comprising" and "having," and any variations thereof, in the specification, claims, and accompanying drawings of this application are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that includes a series of steps or units is not limited to the listed steps or units, but may optionally include steps or units not listed, or may optionally include other steps or units inherent to such process, method, product, or apparatus. The terms "first," "second," and "third," etc., are used to distinguish different objects, etc., and do not indicate a sequence, nor do they limit "first," "second," and "third" to different types.

[0053] In the description of the embodiments of this application, terms such as "exemplary," "for example," or "for instance" are used to indicate examples, illustrations, or explanations. Any embodiment or design described as "exemplary," "for example," or "for instance" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or designs. Specifically, the use of terms such as "exemplary," "for example," or "for instance" is intended to present the relevant concepts in a concrete manner.

[0054] In the description of the embodiments of this application, unless otherwise stated, " / " means "or". For example, A / B can mean A or B. The "and / or" in the text is merely a description of the relationship between related objects, indicating that there can be three relationships. For example, A and / or B can mean: A exists alone, A and B exist simultaneously, and B exists alone. In addition, in the description of the embodiments of this application, "multiple" means two or more.

[0055] In some processes described in the embodiments of this application, multiple operations or steps are included in a specific order. However, it should be understood that these operations or steps may not be executed in the order they appear in the embodiments of this application, or they may be executed in parallel. The sequence number of the operation is only used to distinguish different operations, and the sequence number itself does not represent any execution order. In addition, these processes may include more or fewer operations, and these operations or steps may be executed sequentially or in parallel, and these operations or steps may be combined.

[0056] Through the above description of the embodiments, those skilled in the art can clearly understand that the methods of the above embodiments can be implemented by means of software plus necessary general-purpose hardware platforms. Of course, they can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product is stored in a storage medium (such as ROM / RAM, magnetic disk, optical disk) as described above, and includes several instructions to cause a terminal device to execute the methods described in the various embodiments of this application.

[0057] The above are merely preferred embodiments of this application and do not limit the patent scope of this application. Any equivalent structural or procedural transformations made using the content of this application's specification and drawings, or direct or indirect applications in other related technical fields, are similarly included within the patent protection scope of this application.

Claims

1. A device based on a shared hardware and software TRNG, characterized in that, The device based on a shared hardware and software TRNG includes: The TRNG module is used to implement SEED and generate random numbers by configuring the registers inside the TRNG; The TRNG CTRL module is used to generate the control sequences required for the SEED phase and the random number generation phase in TRNG. The FIFO CTRL module is used to store random numbers generated by TRNG into a FIFO and to feed back the number of available random numbers inside the FIFO to the TRNG CTRL module. The Bus Ctrl Mux module is used to configure the register signals of the TRNG CTRL module via software, so as to enable direct access to the TRNG by software or access to the TRNG by hardware. The Intr Mux module is used to determine whether to report an interrupt from the TRNG or an internal interrupt of the TRNG CTRL module to the software, based on the register signals of the TRNG CTRL module configured in the software. The Mux module is used to implement the option of storing random numbers in a software FIFO or a hardware FIFO.

2. The device based on a shared hardware and software TRNG as described in claim 1, characterized in that: The register signals of the TRNG CTRL module include hw_ctrl, trng_ctrl_en, seeding_mode, reseed_req, nonce_data, FIFO_Threshold, software_req, and software_req_len; The hw_ctrl indicates that the TRNG is controlled by hardware or directly by software; The trng_ctrl_en signal represents the signal that enables the TRNG CTRL module to work; The seeding_mode represents the working mode of the SEED phase of the TRNG, including self-seeding mode and temporary seeding mode; The reseed_req represents a reseeding request; The nonce_data represents temporary random number seed data; The FIFO_Threshold represents the threshold value for storing random numbers in both software and hardware FIFOs. The software_req indicates that the software requests a random number. The software_req_len represents the length of the software request to obtain a random number.

3. The device based on a shared hardware and software TRNG as described in claim 2, characterized in that: The Bus Ctrl Mux module is specifically used to: configure the register signal hw_ctrl of the TRNG CTRL module through software to control the corresponding APB bus access path. When hw_ctrl is 0, the software directly accesses the TRNG; when hw_ctrl is 1, the hardware accesses the TRNG. The Intr Mux module is specifically used to: select whether to report interrupts from the TRNG or interrupts within the TRNG CTRL module to the software, based on the software_req register signal of the TRNG CTRL module configured in the software.

4. The device based on a shared hardware and software TRNG as described in claim 1, characterized in that, The Mux module is specifically used for: When the number of random numbers in the hardware FIFO reaches the threshold for storing random numbers, the path is switched to store the random numbers obtained by the TRNG CTRL module into the software FIFO. Alternatively, when the number of random numbers in the software FIFO reaches the threshold for storing random numbers, the path is switched to store the random numbers obtained by the TRNG CTRL module into the hardware FIFO.

5. The device based on a shared hardware and software TRNG as described in claim 1, characterized in that: The device also includes a Hardware Crypto Engine module; The Hardware Crypto Engine module is used to call random numbers to implement symmetric or asymmetric algorithms.

6. A method for implementing software and hardware control of a TRNG, based on the apparatus described in any one of claims 1 to 5, characterized in that, The implementation method of the software and hardware control TRNG includes a software control TRNG process and a hardware control TRNG process. The software control TRNG process includes configuring the register signals hw_ctrl and trng_ctrl_en of the TRNG CTRL module to put the TRNG into software control mode; The hardware control TRNG process includes: Configure the register signals seeding_mode, FIFO_Threshold, hw_ctrl, and trng_ctrl_en of the TRNG CTRL module to put TRNG in hardware control mode; Interruption detection is performed based on the seeding mode, and after the seeding phase is completed, the random number generated by TRNG is stored in the hardware FIFO or software FIFO by combining the storable random number threshold of the hardware FIFO and software FIFO. Wherein, hw_ctrl indicates that TRNG is controlled by the TRNG CTRL module or directly by software, trng_ctrl_en indicates the signal that enables the TRNG CTRL module, seeding_mode indicates the working mode of the TRNG's SEED stage, including self-seeding mode and temporary seeding mode, and FIFO_Threshold indicates the threshold for storing random numbers for software FIFO and hardware FIFO.

7. The method for implementing a hardware and software control TRNG as described in claim 6, characterized in that, The determination of whether the sowing stage is complete is as follows: When the seeding_mode is in self-seeding mode, wait for the interrupt signal from the TRNG. If the interrupt signal from the TRNG is detected, it means that the self-seeding stage is complete. When seeding_mode is in temporary seeding mode, the temporary random number seed data written by the software is written to TRNG, and the system waits for the interrupt signal from TRNG. If the interrupt signal from TRNG is detected, it means that the temporary seeding stage is complete.

8. The method for implementing a hardware and software control TRNG as described in claim 6, characterized in that, The method of storing random numbers generated by TRNG into a hardware FIFO or a software FIFO by combining the storable random number threshold of hardware FIFO and software FIFO specifically includes: The random numbers generated by TRNG are written to the hardware FIFO via the APB interface. When the random numbers in the hardware FIFO reach the threshold for storing random numbers, the random numbers generated by TRNG are written to the software FIFO. This process is repeated. When the random numbers in one FIFO reach the threshold for storing random numbers, it is determined whether the random numbers in the other FIFO have reached the threshold for storing random numbers. If not, the random numbers generated by TRNG are written to that FIFO. This process continues until the random numbers in both the hardware FIFO and the software FIFO have reached the threshold for storing random numbers, at which point the random number generation phase ends.

9. The method for implementing a hardware and software control TRNG as described in claim 8, characterized in that, After the random number generation phase ends, the following also includes: Real-time detection of the number of random numbers in both hardware and software FIFOs: If the number of random numbers in the hardware FIFO or software FIFO is less than the threshold for storing random numbers, then the random numbers generated by TRNG are written into the FIFO whose number of random numbers is less than the threshold for storing random numbers. If the number of random numbers in both the hardware FIFO and the software FIFO is not less than the threshold for storing random numbers, then when a reseeding request is detected, the hardware control TRNG is disabled, or the TRNG CTRL module is disabled, the hardware control TRNG process is re-executed.

10. A hardware and software control device for implementing a TRNG, characterized in that, The device for implementing the hardware and software control TRNG includes a processor, a memory, and a program for implementing the hardware and software control TRNG stored in the memory and executable by the processor, wherein when the program for implementing the hardware and software control TRNG is executed by the processor, it implements the steps of the method for implementing the hardware and software control TRNG as described in any one of claims 6 to 9.

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