Program burning device, program burning method and phased array antenna

Abstract

This application provides a program burning device, a program burning method, and a phased array antenna. In the program burning device, a user interface module receives the program to be burned; a data verification module performs local caching on the program to be burned to obtain a cached program, and then transmits the program to be burned to a Flash interface module; the Flash interface module receives the program to be burned, transmits it to a memory, and sends a transmission completion signal; upon receiving the transmission completion signal, the data verification module sends a data readback command to the Flash interface module; upon receiving the data readback command, the Flash interface module reads back the program to be burned from the memory to obtain a readback program, and transmits the readback program to the data verification module; the data verification module performs verification based on the readback program and the cached program, determines the program verification result, and performs program burning based on the program verification result, thus achieving the purpose of highly timely and low-risk program burning.

Description

Technical Field

[0001] This application relates to the field of phased array antenna technology, and in particular to a program burning device, a program burning method, and a phased array antenna. Background Technology

[0002] Currently, in the field of phased array antennas, a signal processor or similar programming platform is typically used to connect to the phased array antenna motherboard, and the motherboard is programmed via this platform. However, if a program upgrade is needed after the phased array antenna is assembled, the entire unit must be disassembled to program the motherboard. Existing technology requires disassembly and assembly using fixtures, followed by transporting the disassembled phased array antenna surface to the programming platform for program updates. This disassembly and programming process is complex, labor-intensive, and time- and material-intensive, hindering timely upgrades. Furthermore, due to the precision and complexity of phased array antennas, the risk of damage during disassembly is high. Therefore, how to achieve timely and low-risk program programming is a crucial technical problem that needs to be solved. Summary of the Invention

[0003] This application provides a program burning device, a program burning method, and a phased array antenna, aiming to solve the technical problem of how to perform program burning with high timeliness and low risk.

[0004] In a first aspect, this application provides a program burning device, including a user interface module, a data verification module, and a Flash interface module; The user interface module is used to receive the program to be burned and transmit the program to be burned to the data verification module. The data verification module is connected to the user interface module and is used to perform local caching processing on the program to be burned output by the user interface module to obtain a cached program, and then transmit the program to be burned to the Flash interface module. The Flash interface module is connected to the data verification module and is used to receive the program to be burned transmitted by the data verification module, transmit the program to be burned to the memory, and send a transmission completion signal to the data verification module when the memory has finished receiving the program to be burned. The data verification module is also used to send a data readback command to the Flash interface module when the transmission completion signal is received; The Flash interface module is also used to read back the program to be burned in the memory after receiving the data readback instruction, obtain the readback program, and transmit the readback program to the data verification module. The data verification module is further configured to receive the readback program, perform verification based on the readback program and the cache program, determine the program verification result, and burn the program into the memory based on the program verification result.

[0005] Secondly, this application provides a program burning method, including: Receive the program to be burned; The program to be burned is locally cached to obtain a cached program, and then the program to be burned is written into the memory. Upon receiving the transmission completion signal from the memory, the program to be burned in the memory is read back to obtain the read-back program; The verification result is determined based on the readback program and the caching program. Based on the program verification results, the memory is programmed.

[0006] Thirdly, this application provides a phased array antenna, including the aforementioned programming device and memory, wherein the programming device is connected to the memory and is used to program the memory.

[0007] In this embodiment, a program burning device including a user interface module, a data verification module, and a Flash interface module is used to program the memory in the phased array antenna. This eliminates the need for complex procedures, making program burning highly efficient and convenient. Once the latest program is available, it can be used as the program to be burned. The program burning device in this embodiment performs real-time program burning to the memory in the phased array antenna, ensuring timely program updates. Furthermore, during the program burning process, the program burning device continuously verifies the program to be burned in the memory, effectively ensuring the accuracy of program burning, reducing the error rate, and guaranteeing high-quality program burning. This program burning device can be applied to pre-assembled phased array antennas. During the program burning process, there is no need to disassemble the pre-assembled phased array antenna; program burning can be completed accurately, saving workload and effectively reducing time and material costs. It enables efficient real-time program burning and effectively avoids antenna damage caused by disassembly, resulting in low risk. The programming device in this embodiment can achieve the purpose of programming phased array antennas with high timeliness and low risk, and has high application value. Attached Figure Description

[0008] Figure 1 This is a structural diagram of a program burning device provided in an embodiment of this application; Figure 2 This is another structural diagram of the program burning device provided in one embodiment of this application; Figure 3 This is a structural diagram of a data verification module provided in an embodiment of this application; Figure 4 This is another structural diagram of the data verification module provided in one embodiment of this application; Figure 5 This is a schematic diagram illustrating the relationship between the clock management module and other modules in a program burning device provided in an embodiment of this application; Figure 6 This is a structural diagram of a Flash interface module provided in one embodiment of this application; Figure 7 This is a flowchart of a program burning method provided in an embodiment of this application; Figure 8 This is another flowchart of a program burning method provided in one embodiment of this application; Figure 9 This is a structural diagram of a phased array antenna provided in one embodiment of this application; Figure 10 This is another structural diagram of a phased array antenna provided in one embodiment of this application; Figure 11 This is a simulation diagram showing that the program verification result is a verification failure according to an embodiment of this application; Figure 12 This is a simulation diagram showing that the program verification result provided in one embodiment of this application is successful. Detailed Implementation

[0009] To make the technical problems, technical solutions, and beneficial effects solved by this application clearer, the following detailed description is provided in conjunction with embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0010] This application provides a program programming device, a program programming method, and a phased array antenna. The program programming device includes a user interface module, a data verification module, and a Flash interface module. The user interface module receives the program to be programmed and transmits it to the data verification module. The data verification module, connected to the user interface module, performs local caching on the program to be programmed output by the user interface module to obtain a cached program, and then transmits the cached program to the Flash interface module. The Flash interface module, connected to the data verification module, receives the program to be programmed transmitted by the data verification module. The program to be programmed is transferred to the memory, and upon receiving the program, the memory sends a transmission completion signal to the data verification module. The data verification module, upon receiving the transmission completion signal, also sends a data readback command to the Flash interface module. The Flash interface module, upon receiving the data readback command, reads back the program to be programmed from the memory, obtains the readback program, and transmits it to the data verification module. The data verification module receives the readback program, performs verification based on the readback program and the cached program, determines the program verification result, and, based on the program verification result, programs the program to be programmed into the memory. This programming device enables highly timely and low-risk programming of phased array antennas, and it has high application value.

[0011] In one embodiment, such as Figure 1 As shown, a program burning device is provided, including a user interface module, a data verification module and a Flash interface module; The user interface module is used to receive the program to be burned and transmit the program to be burned to the data verification module. The data verification module, connected to the user interface module, is used to perform local caching processing on the program to be burned output by the user interface module, obtain the cached program, and transmit the program to be burned to the Flash interface module. The Flash interface module is connected to the data verification module. It is used to receive the program to be burned from the data verification module, transmit the program to be burned to the memory, and send a transmission completion signal to the data verification module when the memory has finished receiving the program to be burned. The data verification module is also used to send a data readback command to the Flash interface module when a transmission completion signal is received; The Flash interface module is also used to read back the program to be burned in the memory after receiving the data readback instruction, obtain the readback program, and transmit the readback program to the data verification module. The data verification module is also used to receive the readback program, perform verification based on the readback program and the cache program, determine the program verification result, and burn the program into the memory based on the program verification result.

[0012] As an example, such as Figure 1 As shown, the program burning device includes a user interface module, a data verification module, and a Flash interface module. These modules are connected sequentially. The user interface module also connects to the device sending the program to be burned. The Flash interface module connects to the program's memory. The user interface module interacts with the device sending the program and the data verification module. The data verification module interacts with the user interface module and the Flash interface module. The Flash interface module, as the interface between the memory and the program burning device, interacts with the data verification module and the memory. In this application, the memory can be a Flash memory.

[0013] by Figure 1 Taking the program burning device shown as an example, the process of program burning using the program burning device in this application is explained.

[0014] When the user interface module receives the program to be programmed from the peripheral control device, it transmits the program to the data verification module connected to the user interface module. In this example, the peripheral control device includes, but is not limited to, computer equipment, phased array antenna development equipment, user-end control equipment, and user-end laptops, etc., control devices capable of transmitting program data, used for efficient and real-time program updates and programming of the phased array antenna. Figure 1 As shown in this example, the user interface module includes an SPI (Serial Peripheral Interface) interface, a serial port interface, and a network port interface, enabling wired and wireless communication with peripheral control devices. It allows for program burning through multiple interfaces. When burning programs into the phased array antenna's memory via the user interface module, there is no need to disassemble the entire phased array antenna. The program to be burned can be transmitted through the user interface module, effectively avoiding complex disassembly procedures, saving time and manpower costs, and effectively preventing antenna damage caused by disassembly, thus reducing the risk of antenna damage.

[0015] When the data verification module receives the program to be programmed from the user interface module, it performs local caching on the program output by the user interface module to obtain a cached program, and then transmits the program to be programmed to the Flash interface module connected to the data verification module. Understandably, the data verification module is used to verify whether the program to be programmed into the memory is error-free. Therefore, after receiving the program to be programmed, the data verification module needs to transmit the program to be programmed to the Flash interface module connected to the memory so that it can be subsequently transmitted to the memory via the Flash interface module. The data verification module also needs to cache the program to be programmed locally to obtain a cached program, which can then be used as a basis for verifying whether the program to be programmed in the memory is error-free, thus ensuring the accuracy of program programming.

[0016] The Flash interface module, upon receiving the program to be burned from the data verification module, transfers the program to the memory. When the memory finishes receiving the program, the module receives a reception completion signal from the memory and then sends a transmission completion signal to the data verification module. In this example, the reception completion signal can be represented by a different level than the level during program transmission. For example, if the memory sends a high-level signal to the Flash interface module at a preset time interval during the transmission of the program, and the Flash interface module receives a low-level signal from the memory, it determines that the low-level signal is the reception completion signal from the memory and sends a transmission completion signal to the data verification module. The transmission completion signal indicates that the entire sector of the program to be burned has been transferred to the memory. The memory refers to the memory used to store programs within the phased array antenna. In this example, the program to be burned is a sector of the entire program to be burned into the memory; that is, in this example, the program burning device uses a sector as the smallest unit for program updating and upgrading. In this example, the size of a sector is 16 frames (256 bytes). In this application, the memory can be partitioned for program storage, and the program to be programmed and other programs required for the normal operation of the phased array antenna (such as programs corresponding to multiple user terminals) can be partitioned for storage according to different storage addresses.

[0017] When the data verification module receives the transmission completion signal from the Flash interface module, it sends a data readback command to the Flash interface module. This data readback command is used to read back the program to be programmed from the memory. Understandably, to verify whether the program to be programmed transmitted to the memory is error-free, it is necessary to read back the program transmitted to the memory through the Flash interface module.

[0018] Upon receiving a data readback command, the Flash interface module reads back the program to be programmed from the memory, identifies the program as the readback program, and transmits it to the data verification module. The readback program refers to the program to be programmed from the memory that has been read back.

[0019] The data verification module receives the readback program transmitted by the Flash interface module, performs program verification based on the readback program and the cached program, determines the program verification result, and programs the memory based on the program verification result. In this example, the data verification module performs consistency verification on the readback program and the cached program, determines the program verification result based on whether the readback program and the cached program are consistent, and programs the memory are programmed according to different program verification results.

[0020] In this embodiment, a program burning device is used to burn the program to be burned into each sector, and the program to be burned into each sector is verified to ensure the correctness and accuracy of the program burning.

[0021] like Figure 2 As shown, the program burning device in this embodiment can be integrated on chips such as FPGAs, eliminating the need for additional chip control for program burning. This not only saves hardware space but also reduces hardware costs, and has a wide range of application scenarios.

[0022] In practical applications, when using the programming device described in this application to program the memory of a pre-installed phased array antenna, the programming process typically takes only a few minutes. In contrast, existing technologies, which involve disassembling the pre-installed phased array antenna for programming, usually require several hours or days. Compared to existing technologies, the programming device described in this application effectively reduces the workload and cost of programming.

[0023] In this embodiment, a programming device including a user interface module, a data verification module, and a Flash interface module is used to program the memory in the phased array antenna. This eliminates the need for complex procedures, making programming highly efficient and convenient. Once the latest program is available, it can be used as the program to be programmed. The programming device in this embodiment performs real-time programming of the memory in the phased array antenna, ensuring timely program updates. Furthermore, during the programming process, the device continuously verifies the program to be programmed in the memory, effectively ensuring programming accuracy, reducing error rates, and guaranteeing high-quality programming. This programming device can be used in pre-assembled phased array antenna systems. Programming can be completed accurately without disassembling the completed phased array antenna system, saving workload, reducing time and material costs, enabling efficient real-time programming, and effectively avoiding antenna damage caused by disassembly, thus minimizing risk. The programming device in this embodiment can achieve the purpose of programming phased array antennas with high timeliness and low risk, and has high application value.

[0024] In one embodiment, such as Figure 3 As shown, the data verification module includes an instruction control bus; The instruction control bus is connected to the user interface module and the Flash interface module. It is used to receive the program to be programmed transmitted by the user interface module and transmit the program to be programmed to the Flash interface module. It is also used to receive the transmission completion signal sent by the Flash interface module and send a data readback instruction to the Flash interface module.

[0025] As an example, such as Figure 3 As shown, the data verification module includes an instruction control bus. One end of the instruction control bus is connected to the user interface module, and the other end is connected to the Flash interface module. After receiving the program to be programmed from the user interface module, the instruction control bus transmits the program to the Flash interface module so that the Flash interface module can subsequently transfer the program to the memory. Furthermore, after receiving the transmission completion signal from the Flash interface module, the instruction control bus sends a data readback instruction to the Flash interface module.

[0026] In this embodiment, the program to be burned is transmitted via an instruction control bus, making it feasible to subsequently transfer the program to the memory. The instruction control bus also receives a transmission completion signal and sends a data readback command, enabling subsequent readback verification of the program to be burned in the memory and ensuring the accuracy of the program burning process.

[0027] In one embodiment, such as Figure 3 As shown, the data verification module also includes a data cache controller, a Flash instruction controller, and a data comparison submodule connected to the instruction control bus; The data cache controller is used to cache the program to be programmed when it receives the program to be programmed transmitted via the instruction control bus, and obtain the cached program. The Flash instruction controller is used to send a data readback instruction to the Flash interface module via the instruction control bus when it receives the transmission completion signal transmitted by the instruction control bus, and to receive the readback program sent by the Flash interface module. The data comparison submodule is used to receive the readback program in the Flash instruction controller and the cache program in the data cache controller through the instruction control bus, verify the readback program and the cache program, determine the program verification result, and transmit the program verification result to the instruction control bus.

[0028] As an example, such as Figure 3 As shown, the data verification module also includes a data cache controller, a Flash instruction controller, and a data comparison submodule, which are connected to the instruction control bus.

[0029] When the instruction control bus receives the program to be programmed from the user interface module, it transmits the program to the data cache controller. The data cache controller caches the program and designates it as the cached program. This cached program is then used as standard program data to verify the correctness of the program transmitted to memory, ensuring the correctness and accuracy of the program programming. In this example, the data cache controller can be a BRAM (Block RAM).

[0030] When the Flash interface module determines that it will transfer the received program to be programmed in a sector to the memory, it sends a transfer completion signal to the instruction control bus. After receiving the transfer completion signal through the instruction control bus, the Flash instruction controller sends a data readback command to the Flash interface module through the instruction control bus. After receiving the data readback command, the Flash interface module reads back the program to be programmed in the memory to obtain the readback program. The Flash interface module then sends the readback program to the Flash instruction controller through the instruction control bus.

[0031] After receiving the readback program, the Flash instruction controller sends the readback program to the data comparison submodule via the instruction control bus. Upon receiving the readback program, the data comparison submodule calls the cache program in the data cache controller via the instruction control bus to verify the readback program and the cache program, determine the program verification result, and transmit the program verification result back to the instruction control bus for transmission. In this example, the data comparison submodule performs a consistency check on the readback program and the cache program, determining whether they are consistent. If they are consistent, the program to be burned into memory is determined to be error-free, and the program verification result is determined to be successful. If they are inconsistent, the program to be burned into memory is determined to be erroneous, and the program verification result is determined to be failed.

[0032] In this embodiment, the data cache controller performs cache processing on the program to be burned to obtain a cached program. The Flash instruction controller sends a data readback instruction to the Flash interface module and receives the readback program sent by the Flash interface module. The data comparison submodule verifies the readback program and the cached program to determine the program verification result, so that the program can be burned to the memory according to the program verification result, ensuring the accuracy and correctness of the program burning.

[0033] In one embodiment, such as Figure 4 As shown, the Flash instruction controller includes a readback submodule and a rewrite submodule connected to the instruction control bus; The readback submodule receives the readback program sent by the Flash interface module via the instruction control bus; The rewrite submodule receives the program verification result through the instruction control bus. When the program verification result is a verification failure, it generates an erase instruction and connects to the Flash interface module through the instruction control bus to transmit the erase instruction to the memory so that the memory can erase the program to be burned. The write submodule is also used to generate write instructions and transmit them to the data cache controller via the instruction control bus; The data cache controller is also used to send the cache program to the Flash interface module via the instruction control bus when a write instruction is received; The Flash interface module is also used to burn the cache program to the memory when it is received.

[0034] As an example, such as Figure 4 As shown, the Flash instruction controller includes a readback submodule and a rewrite submodule. Both the readback and rewrite submodules are connected to the instruction control bus for data transmission via the instruction control bus.

[0035] When the Flash interface module sends the readback program to the instruction control bus, the readback submodule receives the readback program sent by the Flash interface module through the instruction control bus, and sends the readback program to the data comparison submodule through the instruction control bus. After receiving the readback program, the data comparison submodule calls the cache program in the data cache controller through the instruction control bus to verify the readback program and the cache program and determine the program verification result.

[0036] The rewrite submodule receives the program verification result via the instruction control bus. When the verification result is a failure, it generates an erase instruction and transmits it to the memory via the instruction control bus and the Flash interface module, so that the memory can erase the sector corresponding to the program to be programmed. Furthermore, after determining that the memory has erased the sector corresponding to the program to be programmed, the rewrite submodule generates a write instruction and transmits it to the data cache controller via the instruction control bus.

[0037] When the data cache controller receives a write command, it sends the cached program to the Flash interface module via the command control bus. Upon receiving the cached program, the Flash interface module programs it into memory, ensuring accurate and correct programming of the phased array antenna program. This guarantees the accuracy and correctness of the program programming, thereby ensuring the normal operation of the phased array antenna and reducing the risk of operational errors. Figure 11 As shown, the blue simulation data represents the signal transmission waveform between the Flash interface module and the memory of the program burning device. Figure 11 In the middle, in top-to-bottom order, the first, second, third, and fourth blue signal transmission waveforms (i.e. Figure 11 The first four signal transmission waveforms (arranged from top to bottom) characterize the process of the programming device transmitting the program to be programmed to the memory. The first blue signal transmission waveform also characterizes the process of the programming device reading back the program to be programmed from the memory. The second, third, and fourth blue signal transmission waveforms characterize the process of the programming device transmitting cached programs to the memory. If the programming device transmits cached programs to the memory, it indicates that the program verification result has failed, the program to be programmed in the memory is incorrect, and the cached program needs to be transmitted to the memory to ensure the correctness and accuracy of the program programming. Figure 11As shown, during the period before the time mark represented by the yellow line, the first, second, third, and fourth blue signal transmission waveforms indicate that the Flash interface module transmits the program to be burned to the memory. The first blue signal transmission waveform also indicates that the Flash interface module reads the program from the memory. During the period after the time mark represented by the yellow line, the second, third, and fourth blue signal transmission waveforms indicate that the Flash interface module rewrites the program to the memory. That is, when the program verification result is a failure, the program burning device transmits a cached program to the memory to ensure accurate program burning.

[0038] In this embodiment, the readback submodule receives the readback program sent by the Flash interface module via the instruction control bus to ensure the feasibility of program verification. When the program verification result is a failure, the rewrite submodule generates an erase command to erase the erroneous program to be programmed from the memory and generates a write command to write the error-free cached program in the data cache controller to the memory, achieving accurate and error-free programming of the program to be programmed. This program verification and programming process requires no complex operations and does not require disassembling the entire phased array antenna, achieving accurate and error-free programming, saving programming workload, effectively reducing the time and material costs of programming, enabling real-time and efficient programming, and effectively avoiding antenna damage caused by disassembly, thus minimizing risk and achieving the goal of highly timely and low-risk programming of phased array antennas.

[0039] In one embodiment, such as Figure 1 and Figure 2 As shown, the program burning device also includes a program reloading module connected to the user interface module; The user interface module receives the program verification results corresponding to all sectors through the instruction control bus. If all program verification results are successful, it outputs a burning completion signal to the program reloading module. The program reload module, upon receiving the programming completion signal, controls the programming device to restart.

[0040] As an example, such as Figure 1 and Figure 2 As shown, the program burning device also includes a program reloading module. This program reloading module is connected to the user interface module.

[0041] In this example, the data comparison submodule transmits the program verification results to the user interface module via the instruction control bus. The user interface module receives the program verification results corresponding to the program to be burned in all sectors. When it is determined that all received program verification results are successful, it outputs a burning completion signal to the program reloading module. After receiving the burning completion signal, the program reloading module controls the program burning device to restart and complete one program burning cycle, so that the program burning device can perform the next program burning cycle.

[0042] Alternatively, the data comparison submodule transmits the program verification results to the user interface module via the instruction control bus. The user interface module receives the program verification results corresponding to the program to be programmed in all sectors. The user interface module transmits all received program verification results to the peripheral control device (e.g., a computer device). When the peripheral control device determines that all received program verification results are successful, it outputs a programming completion signal to the program reloading module through the user interface module. Upon receiving the programming completion signal, the program reloading module controls the programming device to restart, completing one programming cycle, so that the programming device can perform the next programming cycle.

[0043] like Figure 12 As shown, the blue simulation data represents the signal transmission waveform between the Flash interface module and the memory of the program burning device. Figure 12 In the middle, in top-to-bottom order, the first, second, third, and fourth blue signal transmission waveforms (i.e. Figure 12 The first four signal transmission waveforms (arranged from top to bottom) characterize the transmission of the program to be programmed from the programming device to the memory. The first blue signal transmission waveform also characterizes the reading back of the program to be programmed from the memory. The second, third, and fourth blue signal transmission waveforms characterize the transmission of the cached program from the programming device to the memory. If the programming device does not transmit the cached program to the memory, it indicates that the program verification result is successful, the program to be programmed transmitted to the memory is correct, and the program to be programmed received in the memory is accurate. Figure 12As shown, during the period before the time mark represented by the yellow line, the first, second, third, and fourth blue signal transmission waveforms indicate that the Flash interface module transmits the program to be burned to the memory. The first blue signal transmission waveform indicates that the Flash interface module reads the program from the memory. During the period after the time mark represented by the yellow line, the second, third, and fourth blue signal transmission waveforms indicate that there is no signal for the Flash interface module to rewrite the program to the memory. This means the program verification result is successful, and there is no need to transmit the cached program to the memory. The program to be burned previously transmitted to the memory by the program burning device is correct, ensuring the accuracy of the program burning process.

[0044] In this embodiment, the user interface module receives the program verification results corresponding to all sectors through the instruction control bus, and when all program verification results are successful, it outputs a burning completion signal to the program reloading module. The program reloading module controls the program burning device to restart based on the received burning completion signal, thereby completing the accurate and correct program burning of the memory in the phased array antenna.

[0045] In one embodiment, such as Figure 5 As shown, the program burning device also includes a clock management module; The clock management module is connected to the user interface module, the Flash interface module, and the data verification module. It provides the master clock and the corresponding interface clocks for the user interface module and the Flash interface module.

[0046] As an example, the program burning device also includes a clock management module. The clock management module is connected to the user interface module, the Flash interface module, and the data verification module. Figure 5 As shown, the clock management module provides the master clock for the user interface module, Flash interface module, data verification module, program reloading module, and other modules in the program burning device. Furthermore, the interface clock for the user interface module is the interface communication clock for communication between the user interface module and the peripheral control device, and the interface clock for the Flash interface module is the Flash interface clock required for data transfer between the Flash interface module and the memory. Both the interface communication clock and the Flash interface clock correspond to the lower clock domain under the master clock domain. The master clock is the clock corresponding to the master clock domain. The clock management module provides the interface communication clock for the user interface module to communicate with the peripheral control device, and the Flash interface clock for the Flash interface module to transfer data with the memory.

[0047] Understandably, in the programming device, the clock management module outputs the master clock to the user interface module, Flash interface module, and data verification module to ensure that all modules operate under the same clock, facilitating data exchange and transmission between modules. This allows all modules in the programming device to avoid crossing clock domains during data exchange and transmission, reducing timing issues. Furthermore, since the user interface module and flash interface module are connected to other hardware outside the programming device (in this embodiment, the user interface module is also used to connect to peripheral control devices, and the flash interface module is also used to connect to the memory in the phased array antenna), in addition to the master clock, the user interface module and flash interface module also require corresponding interface clocks during operation. Internally, the user interface module and flash interface module perform cross-clock processing on the signals from the input module interfaces to ensure normal communication with peripheral control devices and memory, guaranteeing the normal transmission of program and other data.

[0048] In one embodiment, such as Figure 6 As shown, the Flash interface module includes an address management submodule, a cross-clock submodule, an interface submodule, and a clock interface control submodule; The address management submodule is connected to the data verification module and the cross-clock submodule, and is used to manage the address translation of the program to be burned or the cached program. The cross-clock submodule is also connected to the interface submodule and is used for cross-clock management of the program to be burned or the cached program. The interface submodule is also connected to the memory for transmitting program data with the memory. The program data includes the program to be burned and the cached program. The clock interface control submodule is connected to the interface submodule and is used to transmit clock signals with the clock management module.

[0049] As an example, such as Figure 6 As shown, the Flash interface module includes an address management submodule, a cross-clock submodule, an interface submodule, and a clock interface control submodule. The address management submodule is connected to the data verification module and the cross-clock submodule. The cross-clock submodule is also connected to the interface submodule, which is used to connect to the memory. The clock interface control submodule is connected to the interface submodule.

[0050] In this example, the address management submodule is used to manage address translation for the program to be programmed or the cached program. The cross-clock submodule is used to manage cross-clock operations for the program to be programmed or the cached program; the interface submodule is used to transfer program data with the memory, including the program to be programmed and the cached program; and the clock interface control submodule is used to transmit clock signals between the interface submodule and the clock management module.

[0051] In this example, in the Flash interface module, when the address management submodule receives the program to be programmed from the data verification module (specifically via the instruction control bus), it partitions and allocates the memory address of the program to be programmed, obtaining a program to be programmed carrying the memory address. This program is then transmitted to the interface submodule via the cross-clock module. The interface submodule then transmits the program to be programmed with the memory address to the memory, ensuring that the program carries the memory address upon arrival. This allows the memory to program the program according to the memory address after successful program verification. Alternatively, when the address management submodule receives the cached program from the data verification module, it manages the memory address of the cached program and transmits the cached program to the interface submodule via the cross-clock module. The interface submodule then transmits the cached program carrying the memory address to the memory, ensuring that the cached program carries the memory address upon arrival. This allows the memory to program the cached program according to the memory address.

[0052] When the address management submodule reads back the program to be programmed from the memory through the cross-clock submodule and interface submodule, it manages the storage address of the program to be programmed in the memory in the readback submodule, obtains the program to be read back and its storage address in the readback submodule, and transmits the program to the readback submodule in the data verification module with the storage address, so that the readback submodule can temporarily store the program to be read back according to the storage address, and perform program verification based on the program to be read back.

[0053] In the Flash interface module, the cross-clock submodule is connected to both the address management submodule and the interface submodule. When the program to be programmed or the cached program passes through the cross-clock submodule, the cross-clock submodule performs cross-clock management to ensure the normal operation of the program. For example, when the cross-clock submodule receives the program to be programmed from the address management submodule, it performs a cross-clock operation on the program, converting the master clock corresponding to the program transmitted by the address management submodule to the Flash interface clock corresponding to the memory. Similarly, when the cross-clock submodule receives the cached program transmitted by the address management submodule, it performs a cross-clock operation on the cached program, converting the master clock corresponding to the cached program to the Flash interface clock corresponding to the memory. Furthermore, when the cross-clock submodule reads back the program to be programmed from the memory, it performs a cross-clock operation on the read-back program, identifying the read-back program as a read-back program and converting the Flash interface clock corresponding to the read-back program to the master clock.

[0054] In this example, when the program to be burned or the cached program in the data verification module is transmitted to the Flash interface module, it sequentially passes through the address management submodule and the cross-clock submodule in the Flash interface module. The address management submodule allocates the memory address for the program to be burned or the cached program, and the cross-clock submodule converts the master clock corresponding to the program to be burned or the cached program to the Flash interface clock corresponding to the memory, effectively ensuring the normal transmission and burning of the program. The program to be burned in the memory is read back through the interface submodule, sequentially passing through the address management submodule and the cross-clock submodule in the Flash interface module. When the read-back program is obtained, the address management submodule allocates the memory address for the read-back program in the read-back submodule, and the cross-clock submodule converts the Flash interface clock corresponding to the read-back program to the master clock, ensuring the normal read-back and verification of the program.

[0055] In this example, the clock interface control submodule is a dedicated clock transmission module used to connect the clock management module and the interface submodule. It is used to transmit the clock signal corresponding to the main clock and the Flash interface clock corresponding to the memory to the cross-clock submodule through the interface submodule, so as to ensure that the cross-clock submodule performs normal cross-clock management on the received program during program transmission.

[0056] In this embodiment, the address management submodule, cross-clock submodule, interface submodule, and clock interface control submodule in the Flash interface module are used to perform program transmission, address translation management, and cross-clock management on the program to be burned and the cached program, so as to ensure the normal transmission and burning of the program.

[0057] In one embodiment, such as Figure 7 As shown, a program burning method is provided, which is applied in the above-mentioned program burning device, and includes: S701: Receives the program to be burned; S702: Perform local caching processing on the program to be burned, obtain the cached program, and write the program to be burned into the memory; S703: Upon receiving the transmission completion signal from the memory, read back the program to be burned from the memory to obtain the read-back program; S704: Verification is performed based on the readback procedure and the cache procedure to determine the program verification result; S705: Based on the program verification results, program the memory is burned.

[0058] by Figure 1 Taking the program burning device shown as an example, the program burning method in this application is explained as follows: As an example, in step S701, when the user interface module receives the program to be programmed from the peripheral control device, it transmits the program to the data verification module connected to the user interface module. In this example, the peripheral control device includes, but is not limited to, computer equipment, phased array antenna development equipment, user-end control equipment, and user-end laptops—control devices capable of transmitting program data—for efficient and real-time program updates and programming of the phased array antenna. Figure 1 As shown in this example, the user interface module includes an Spi (Serial Peripheral Interface) interface, a serial port interface, and a network port interface, enabling wired and wireless communication with peripheral control devices. When programming the phased array antenna's memory through the user interface module, there is no need to disassemble the entire phased array antenna unit. The program to be programmed can be transmitted through the user interface module, effectively avoiding the complex disassembly process, saving time and manpower costs, and effectively preventing antenna damage caused by disassembly, thus reducing the risk of antenna damage.

[0059] As an example, in step S702, when the data verification module receives the program to be burned from the user interface module, it performs local caching on the program to be burned output by the user interface module to obtain a cached program, and then transmits the program to be burned to the Flash interface module connected to the data verification module. Understandably, the data verification module is used to verify whether the program to be burned into the memory is erroneous. Therefore, after receiving the program to be burned, the data verification module needs to transmit the program to be burned to the Flash interface module connected to the memory so that it can be subsequently transmitted to the memory via the Flash interface module. The data verification module also needs to cache the program to be burned locally to obtain a cached program, so that it can be used as a basis for verifying whether the program to be burned in the memory is erroneous, thereby ensuring the accuracy of program burning.

[0060] When the Flash interface module receives the program to be burned from the data verification module, it transfers the program to the memory. Upon completion of program burning in the memory, the module receives a reception completion signal and then sends a transmission completion signal to the data verification module. In this example, the reception completion signal can be represented by a different level than the signal transmitted during program transfer. For example, if the memory sends a high-level signal to the Flash interface module at preset time intervals during program transmission, and the Flash interface module receives a low-level signal from the memory, it determines that the low-level signal is the reception completion signal and sends a transmission completion signal to the data verification module. The transmission completion signal refers to the feedback signal indicating that the entire received program has been transferred to the memory. The memory refers to the memory used to store programs within the phased array antenna. In this example, the program to be burned is a sector of the entire program to be burned into the memory; that is, in this example, the program burning device uses a sector as the smallest unit for program updates and upgrades. In this example, the size of a sector is 16 frames (256 bytes). In this application, the memory can be partitioned for program storage, and the program to be programmed and other programs required for the normal operation of the phased array antenna (such as programs corresponding to multiple user terminals) can be partitioned for storage according to different storage addresses.

[0061] As an example, in step S703, when the data verification module receives the transmission completion signal from the Flash interface module, it sends a data readback command to the Flash interface module. The data readback command is an instruction used to read back the program to be programmed from the memory. Understandably, to verify whether the program to be programmed transmitted to the memory is error-free, it is necessary to read back the program transmitted to the memory through the Flash interface module.

[0062] After receiving a data readback command, the Flash interface module reads back the program to be programmed from the memory, identifies the program as the readback program, and transmits it to the data verification module. The readback program refers to the program to be programmed from the memory that has been read back.

[0063] As an example, in step S704, the data verification module receives the readback program transmitted by the Flash interface module and performs program verification based on the readback program and the cached program to determine the program verification result. In this example, the data verification module performs consistency verification on the readback program and the cached program, and determines the program verification result based on whether the readback program and the cached program are consistent.

[0064] As an example, in step S705, the data verification module performs program burning on the memory through the Flash interface module based on the program verification result.

[0065] In this embodiment, a program burning device is used to burn the program to be burned into each sector, and the program to be burned into each sector is verified to ensure the correctness and accuracy of the program burning.

[0066] like Figure 2 As shown, the program burning device in this embodiment can be integrated on chips such as FPGAs, eliminating the need for additional chip control for program burning. This not only saves hardware space but also reduces hardware costs, and has a wide range of application scenarios.

[0067] In practical applications, when using the programming device described in this application to perform the programming method on the memory of a pre-installed phased array antenna, the programming process typically takes only a few minutes. In contrast, existing technologies, which involve disassembling the pre-installed phased array antenna for programming, usually require several hours or days. Compared to existing technologies, the programming method in this application effectively reduces the workload and cost of programming.

[0068] In this embodiment, the above-described program burning method is executed by a program burning device including a user interface module, a data verification module, and a Flash interface module to burn programs into the memory of the phased array antenna. This eliminates the need for complex procedures, making program burning highly efficient and convenient. Once the latest program is available, it can be used as the program to be burned. The program burning device in this embodiment performs real-time program burning into the memory of the phased array antenna, ensuring timely program updates. Furthermore, the program burning method in this embodiment continuously verifies the program to be burned transmitted to the memory during the burning process, effectively ensuring the accuracy of program burning, reducing the error rate, and guaranteeing high-quality program burning. This programming method can be applied to pre-assembled phased array antenna systems. During the programming process, the completed phased array antenna system can be programmed accurately without disassembling it, saving workload and effectively reducing time, manpower, and material costs. It enables real-time, efficient programming and effectively avoids antenna damage caused by disassembly, resulting in low risk. Using the programming equipment and method described in this application, the goal of timely and low-risk programming of phased array antennas can be achieved, demonstrating high application value.

[0069] In one embodiment, such as Figure 8 As shown, step S705, which involves programming the memory based on the program verification results, includes: S801: If the program verification result is a verification failure, the control memory will erase the program to be burned and re-burn the cached program to the memory; S802: If the program verification result is successful, the program to be burned will be executed repeatedly to burn the program to the next sector.

[0070] In this application, in the data verification module, after receiving the readback program, the Flash instruction controller sends the readback program to the data comparison submodule via the instruction control bus. Upon receiving the readback program, the data comparison submodule calls the cache program in the data cache controller via the instruction control bus to verify the readback program and the cache program, determine the program verification result, and transmit the program verification result to the instruction control bus for transmission. In this example, the data comparison submodule performs a consistency check on the readback program and the cache program, determining whether they are consistent. If they are consistent, the program to be programmed into the memory is determined to be error-free, and the program verification result is determined to be successful. If the readback program and the cache program are inconsistent, the program to be programmed into the memory is determined to be erroneous, and the program verification result is determined to be a verification failure.

[0071] As an example, in step S801, the rewrite submodule receives the program verification result fed back by the data comparison submodule via the instruction control bus. When the program verification result is a verification failure, it generates an erase instruction and transmits the erase instruction to the memory via the instruction control bus and the Flash interface module, so that the memory can erase the sector corresponding to the program to be programmed. Furthermore, after determining that the memory has erased the sector corresponding to the program to be programmed, the rewrite submodule generates a write instruction and transmits the write instruction to the data cache controller via the instruction control bus.

[0072] When the data cache controller receives a write command, it sends the cached program to the Flash interface module via the command control bus. Upon receiving the cached program, the Flash interface module programs it into memory, thus ensuring accurate and correct programming of the program to be programmed. This guarantees the accuracy and correctness of the phased array antenna program programming, thereby ensuring the normal operation of the phased array antenna and reducing the risk of operational errors.

[0073] As an example, in step S802, the data comparison submodule transmits the program verification result to the user interface module through the instruction control bus, and repeats steps S701 to S705 until the program to be burned to all sectors is burned, thus completing one program burning cycle.

[0074] Furthermore, in this example, the data comparison submodule transmits the program verification results to the user interface module via the instruction control bus. The user interface module receives the program verification results corresponding to the program to be burned in all sectors. When it is determined that all received program verification results are successful, it outputs a burning completion signal to the program reloading module. After receiving the burning completion signal, the program reloading module controls the program burning device to restart and complete one program burning cycle, so that the program burning device can perform the next program burning cycle.

[0075] Alternatively, the data comparison submodule transmits the program verification results to the user interface module via the instruction control bus. The user interface module receives the program verification results corresponding to the program to be programmed in all sectors. The user interface module transmits all received program verification results to the peripheral control device (e.g., a computer device). When the peripheral control device determines that all received program verification results are successful, it outputs a programming completion signal to the program reloading module through the user interface module. Upon receiving the programming completion signal, the program reloading module controls the programming device to restart, completing one programming cycle, so that the programming device can perform the next programming cycle.

[0076] In this embodiment, when the program verification result fails, the rewrite submodule generates an erase command to erase the erroneous program to be programmed from the memory and generates a write command to program the error-free cached program in the data cache controller to the memory, thus achieving accurate and error-free programming of the program to be programmed. This program verification and programming process requires no complex operations and does not require disassembling the entire phased array antenna, achieving accurate and error-free programming. This saves programming workload, effectively reduces time and material costs, enables real-time and efficient programming, and effectively avoids antenna damage caused by disassembly, resulting in low risk. It achieves the goal of highly timely and low-risk programming of phased array antennas.

[0077] In one embodiment, such as Figure 9 and Figure 10 As shown, a phased array antenna is provided, including a programming device and a memory. The programming device is connected to the memory and is used to program the memory.

[0078] As an example, such as Figure 9 and Figure 10As shown, the phased array antenna includes a programming device and a memory. The programming device is connected to the memory and is used to program the memory. During the programming process, the entire phased array antenna can be programmed without disassembling it, saving programming workload and effectively reducing programming time and material costs. It can perform efficient programming in real time and effectively avoid antenna damage caused by disassembly, with low risk. It achieves the goal of highly timely and low-risk programming of phased array antennas and has high application value.

[0079] In this application, "multiple" refers to two or more.

[0080] In this application, unless otherwise expressly defined, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a mechanical connection or an electrical connection; they can refer to a direct connection or an indirect connection through an intermediate medium; and they can refer to the internal connection between two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.

[0081] The terms “first,” “second,” “third,” “fourth,” etc., in this application (if present) are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0082] In this application, the term "and / or" is merely a description of the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A existing alone, A and B existing simultaneously, or B existing alone. Additionally, in this application, the character " / " generally indicates that the preceding and following related objects have an "or" relationship.

[0083] Unless otherwise specified, all steps in this application may be performed sequentially or randomly. For example, if the method includes steps A and B, it means that the method may include steps A and B performed sequentially, or it may include steps B and A performed sequentially. For example, if the method may also include step C, it means that step C may be added to the method in any order. For example, the method may include steps A, B, and C, or it may include steps A, C, and B, or it may include steps C, A, and B, etc.

[0084] The above description is merely a preferred embodiment of this application and is not intended to limit this application. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this application should be included within the protection scope of this application.

Claims

1. A program burning device, characterized in that, It includes a user interface module, a data verification module, and a Flash interface module; The user interface module is used to receive the program to be burned and transmit the program to be burned to the data verification module. The data verification module is connected to the user interface module and is used to perform local caching processing on the program to be burned output by the user interface module to obtain a cached program, and then transmit the program to be burned to the Flash interface module. The Flash interface module is connected to the data verification module and is used to receive the program to be burned transmitted by the data verification module, transmit the program to be burned to the memory, and send a transmission completion signal to the data verification module when the memory has finished receiving the program to be burned. The data verification module is also used to send a data readback command to the Flash interface module when the transmission completion signal is received; The Flash interface module is also used to read back the program to be burned in the memory after receiving the data readback instruction, obtain the readback program, and transmit the readback program to the data verification module. The data verification module is further configured to receive the readback program, perform verification based on the readback program and the cache program, determine the program verification result, and burn the program into the memory based on the program verification result.

2. The program burning device according to claim 1, characterized in that, The data verification module includes an instruction control bus; The instruction control bus is connected to the user interface module and the Flash interface module, and is used to receive the program to be burned transmitted by the user interface module and transmit the program to be burned to the Flash interface module. It is also used to receive the transmission completion signal sent by the Flash interface module and send a data readback instruction to the Flash interface module.

3. The program burning device according to claim 2, characterized in that, The data verification module also includes a data cache controller, a Flash instruction controller, and a data comparison submodule connected to the instruction control bus; The data cache controller is used to cache the program to be programmed when it receives the program to be programmed transmitted by the instruction control bus, so as to obtain a cached program. The Flash instruction controller is configured to send a data readback instruction to the Flash interface module via the instruction control bus when it receives the transmission completion signal transmitted by the instruction control bus, and to receive the readback program sent by the Flash interface module. The data comparison submodule is used to receive the readback program in the Flash instruction controller and the cache program in the data cache controller through the instruction control bus, verify the readback program and the cache program, determine the program verification result, and transmit the program verification result to the instruction control bus.

4. The program burning device according to claim 3, characterized in that, The Flash instruction controller includes a readback submodule and a rewrite submodule connected to the instruction control bus; The readback submodule receives the readback program sent by the Flash interface module through the instruction control bus; The rewriting submodule receives the program verification result through the instruction control bus. When the program verification result is a verification failure, it generates an erasure instruction and connects to the Flash interface module through the instruction control bus to transmit the erasure instruction to the memory so that the memory can erase the program to be burned. The rewrite submodule is also used to generate write instructions and transmit the write instructions to the data cache controller via the instruction control bus; The data cache controller is further configured to send the cache program to the Flash interface module via the instruction control bus when the write instruction is received; The Flash interface module is also used to burn the cache program into the memory when it receives the cache program.

5. The program burning device according to claim 1, characterized in that, The program burning device also includes a program reloading module connected to the user interface module; The user interface module receives the program verification results corresponding to all sectors through the instruction control bus. If all the program verification results are successful, it outputs a burning completion signal to the program reloading module. Upon receiving the burning completion signal, the program reloading module controls the program burning device to restart.

6. The program burning device according to claim 1, characterized in that, The program burning device also includes a clock management module; The clock management module is connected to the user interface module, the Flash interface module, and the data verification module, and is used to provide the master clock and provide corresponding interface clocks for the user interface module and the Flash interface module.

7. The program burning device according to claim 6, characterized in that, The Flash interface module includes an address management submodule, a cross-clock submodule, an interface submodule, and a clock interface control submodule. The address management submodule is connected to the data verification module and the cross-clock submodule, and is used to manage the address translation of the program to be burned or the cached program. The cross-clock submodule is also connected to the interface submodule and is used to perform cross-clock management on the program to be burned or the cached program. The interface submodule is also connected to the memory for transmitting program data with the memory. The program data includes the program to be burned and the cached program. The clock interface control submodule is connected to the interface submodule and is used to transmit clock signals with the clock management module.

8. A method for burning a program, characterized in that, include: Receive the program to be burned; The program to be burned is locally cached to obtain a cached program, and then the program to be burned is written into the memory. Upon receiving the transmission completion signal from the memory, the program to be burned in the memory is read back to obtain the read-back program; The verification result is determined based on the readback program and the caching program. Based on the program verification results, the memory is programmed.

9. The program burning method according to claim 8, characterized in that, The step of programming the memory based on the program verification result includes: If the program verification result is a verification failure, the memory is controlled to erase the program to be burned and the cached program is re-burned into the memory; If the program verification result is successful, the receiving program to be burned is executed repeatedly to burn the program to the next sector.

10. A phased array antenna, characterized in that, The device includes the program burning apparatus and memory as described in any one of claims 1 to 7, wherein the program burning apparatus is connected to the memory and is used to program the memory.

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