A storage area acceleration reading method, electronic equipment and storage medium

Abstract

This invention provides a method for accelerating read access to a storage area, an electronic device, and a storage medium. The method includes: determining a corresponding first area based on the data address included in each first read request; determining corresponding fourth areas sequentially from storage areas other than the first area according to the decreasing order of processing priorities of a plurality of write data requests; determining a storage area that is neither the first area nor the fourth area as a fifth area; if the data address included in any second read request is within any fifth area, then determining the fifth area as a sixth area corresponding to the second read request; and performing data read processing on the sixth area corresponding to each second read request, so as to process the second read request using the remaining free storage area during the processing of the first read request, thereby improving the processing efficiency of read data requests without affecting the processing of the first read request and write data requests.

Description

Technical Field

[0001] This invention relates to the field of memory data read and write, and in particular to a method for accelerating the reading of storage areas, an electronic device, and a storage medium. Background Technology

[0002] In a memory module, a bank (also called a storage bank or storage area) is the basic organizational unit in a computer storage system. It is mainly used in memory hardware structure and data storage. A bank is a collection of storage units that can independently provide data. A memory module consists of several banks, and each bank can independently perform data read and write operations. Data processing between different banks is parallel. However, within the same clock cycle, all commands within the same bank are serial, meaning that a bank can only perform read or write operations. Therefore, when multiple banks of the same memory module receive multiple read and write data requests within the same clock cycle, how to classify the read data requests according to data performance requirements and allocate several read data requests to different banks to improve the data reading efficiency between multiple banks is a technical problem that urgently needs to be solved. Summary of the Invention

[0003] To address the aforementioned technical problems, the technical solution adopted by this invention is as follows: According to one aspect of this application, a method for accelerating access to a storage region is provided, comprising: Step S100: When the target memory module receives several read data requests and several write data requests in the same clock cycle, the several read data requests are divided into several first read requests and several second read requests according to the data performance requirements corresponding to each read data request; wherein, the data performance requirements corresponding to the first read request are higher than the data performance requirements corresponding to the second read request. Step S200: Based on the data address included in each first read request, determine the first region corresponding to each first read request from several storage regions of the target memory module; Step S300: Based on the decreasing order of processing priorities of several write data requests, determine the fourth region corresponding to each write data request from several storage regions that are not in the first region of the target memory module. Step S400: Among the several storage regions of the target memory module, the storage region that is neither the first region nor the fourth region is determined as the fifth region; Step S500: Traverse each second read request. If the data address included in any second read request is in any fifth region, then determine the fifth region as the sixth region corresponding to the second read request. Step S600: Perform data reading processing on the sixth region corresponding to each second read request.

[0004] According to another aspect of this application, a non-transitory computer-readable storage medium is provided, wherein at least one instruction or at least one program is stored in the storage medium, the at least one instruction or the at least one program being loaded and executed by a processor to implement the aforementioned method for accelerating access to the storage area.

[0005] According to another aspect of this application, an electronic device is provided, including a processor and the aforementioned non-transitory computer-readable storage medium.

[0006] The present invention has at least the following beneficial effects: The storage region accelerated read method of the present invention, when the target memory module receives several read data requests and several write data requests within the same clock cycle, firstly divides the several read data requests into several first read requests and several second read requests according to the data performance requirements corresponding to each read data request. Then, based on the data address included in each first read request, a first region corresponding to each first read request is determined from several storage regions of the target memory module. Furthermore, based on the decreasing processing priority of the several write data requests, a fourth region corresponding to each write data request is sequentially determined from several storage regions of the target memory module that are not in the first region. Finally, the several storage regions of the target memory module are... In the region, the storage region that is neither the first region nor the fourth region is determined as the fifth region. If the data address included in any second read request is within any fifth region, then the fifth region is determined as the sixth region corresponding to the second read request, and data reading processing is performed on the sixth region corresponding to each second read request. By dividing several read data requests into two categories, first read requests and second read requests, with different data performance requirements, and allocating different storage regions to these two types of read data requests, the second read requests are processed using the remaining free storage regions during the processing of the first read request, so as to improve the processing efficiency of read data requests without affecting the processing of the first read request and write data requests. Attached Figure Description

[0007] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0008] Figure 1 A flowchart of a method for accelerating the reading of storage areas provided in an embodiment of the present invention. Detailed Implementation

[0009] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0010] This application proposes a method for accelerating access to storage areas, such as... Figure 1 As shown, it includes: Step S100: When the target memory module receives several read data requests and several write data requests in the same clock cycle, the several read data requests are divided into several first read requests and several second read requests according to the data performance requirements corresponding to each read data request. The data performance requirements for the first read request are higher than those for the second read request.

[0011] Furthermore, step S100 includes steps S110-S120: Step S110: When the target memory module receives several read data requests and several write data requests within the same clock cycle, obtain the data performance requirement index corresponding to each read data request; The data performance requirement index is a parameter that indicates the required read performance level.

[0012] Step S120: Traverse each read data request. If the data performance requirement index corresponding to any read data request is greater than the preset performance index threshold, then the read data request is determined as the first read request; otherwise, the read data request is determined as the second read request.

[0013] After dividing several read data requests into first read requests and second read requests, since the data performance requirements of the first read requests are higher, the first region corresponding to each first read request is determined first when determining the first region. The storage region corresponding to the second read request is determined after the storage region for the write data requests is allocated, so as to prioritize the processing of first read requests and write data requests.

[0014] Step S200: Based on the data address included in each first read request, determine the first region corresponding to each first read request from several storage regions of the target memory module; The storage area of ​​the target memory module is called the bank.

[0015] Furthermore, step S200 includes steps S210-S230: Step S210: Obtain the data addresses included in each first read request to obtain a first data address list J=(J1,J2,...,J...). e ,...,J f ); where e = 1, 2, ..., f; f is the number of read requests in the first read request; J e The data address included in the e-th first read request; Step S220: Obtain the address code corresponding to each storage region in the target memory module to obtain the region address code list B=(B1,B2,...,B m ,...,B n ); where m=1,2,...,n; n is the number of storage regions included in the target memory module; B m This is the address code corresponding to the m-th storage region in the target memory module; The address code corresponding to the storage area is the address code of the bank.

[0016] Step S230, according to J e Traverse the region address code list B, if J e Located in B m Within the corresponding storage area, the m-th storage area in the target memory module is determined as the first area corresponding to the e-th first read request.

[0017] Step S300: Based on the decreasing order of processing priorities of several write data requests, determine the fourth region corresponding to each write data request from several storage regions that are not in the first region of the target memory module. Furthermore, step S300 includes steps S310-S370: Step S310: Among the several storage areas of the target memory module, the storage area that is not the first area is determined as the second area; Step S320: Obtain the preset storable capacity corresponding to each second region to obtain a storable capacity list C=(C1,C2,...,C...). p ,...,C q ); where p = 1, 2, ..., q; q is the number of the second region; C p Let be the storage capacity corresponding to the p-th second region; Step S330: Obtain the stored capacity of each second region at the current time to obtain a list of stored capacities D=(D1,D2,...,D...). p ,...,D q ); where D p Let be the stored capacity of the p-th second region at the current time; Step S340: Determine the idle percentage E corresponding to the p-th second region. p =1-D p / C p ; Step S350, if E p If E0 > 0, then the p-th second region will be designated as the third region; where E0 is the preset space ratio. Step S360: Sort the several write data requests according to the descending order of their processing priorities to obtain the processing rank of each write data request after sorting. The rank of a write data request is negatively correlated with its processing priority. That is, the lower the rank of a write data request (the earlier it appears in the order of several write data requests), the higher its processing priority, and the more likely it is to be processed.

[0018] After determining the storage area corresponding to the read data request, the storage area corresponding to the write data request is then determined from the remaining storage areas. This ensures the read-then-write processing logic and prevents situations where write data requests cannot be processed due to insufficient storage capacity, which in turn prevents read data requests from being processed. This avoids read data request queue congestion. Furthermore, since the storage area corresponding to the read data request is fixed (the address of the data to be read by the read data request is known), prioritizing the processing of read data requests and then determining the storage area corresponding to the write data request from the remaining storage areas also avoids conflicts where both read and write operations occur in the same storage area within the same clock cycle.

[0019] Step S360 includes steps S361-S362: Step S361: Sort the write data requests according to their decreasing processing priority to obtain a sorted request list F=(F1,F2,...,F...). r ,...,F t ); where r = 1, 2, ..., t; t is the number of write data requests; F r This refers to the r-th write data request after sorting several write data requests according to their processing priority. Each write data request has a processing priority based on the data being written, which indicates the priority of the write data request. The higher the processing priority, the more important the data to be written in the corresponding write data request is, and the sooner it needs to be processed.

[0020] Step S362: Determine r as F r The corresponding processing rank.

[0021] Step S370: Based on the ascending order of the processing rank corresponding to several write data requests, determine the fourth region corresponding to each write data request from several third regions in sequence.

[0022] Step S370 includes steps S371-S375: Step S371: Let c=1; Step S372: If c≤t, then proceed to step S373; otherwise, proceed to step S400. Step S373, Obtain F c The number of corresponding data write addresses H c ; Step S3731, if H c ≤H 01 If so, proceed to step S374; otherwise, proceed to steps S3732-S3738. Among them, H 01 This refers to the number of third regions.

[0023] Step S3732, if F c If the request is a batch write request for a preset standard protocol, proceed to step S3733; otherwise, proceed to step S3735. Step S3733, Obtain F c Number of scheduling failures I c ; F c The number of scheduling failures is F. c The number of times a scheduling failure (unprocessed) occurred within a historical clock cycle.

[0024] Step S3734, if I c If I > 0, then proceed to step S3735; otherwise, F c Adjust the write data request to the target memory module in the next clock cycle; Where I0 is the preset threshold for the number of scheduling attempts.

[0025] If F c If the number of scheduling failures exceeds a preset scheduling threshold, the request will be processed first to prevent the loss of the write data corresponding to the write request; otherwise, if F c If the number of scheduling failures does not exceed the preset scheduling threshold, other requests will be processed first.

[0026] Step S3735: Traverse each first region. If any first region is not the storage region corresponding to any write data request of the target memory module in the previous clock cycle, then determine the first region as the second candidate region. To ensure a balanced allocation and scheduling of storage areas and to make the storage areas for write requests as discrete as possible, the storage areas for data written in the previous clock cycle are temporarily not considered as the storage areas for writes in the current clock cycle. Instead, the storage areas corresponding to write requests in the current clock cycle are selected from the second candidate areas.

[0027] Step S3736: Determine the number H of areas to be adjusted. 02 =H c -H 01 ; Step S3737: Select H from several second candidate regions. 02 A second candidate region, and select H 02 The second candidate region was determined to be F. c The corresponding fourth region; Step S3738: Re-determine the remaining second candidate areas as the first areas of the corresponding read data requests; Step S374: Select H from several third regions. c A third region, and select H c The third region was identified as F. c The corresponding fourth region; Step S374 includes steps S3741-S3743: Step S3741: Traverse each third region. If any third region is not the storage region corresponding to any write data request of the target memory module in the previous clock cycle, then determine the third region as the first candidate region. Step S3742: Select H from several first candidate regions. c The first candidate region, and the selected H c The first candidate region was determined to be F. c The corresponding fourth region; Step S3743: Determine the remaining first candidate areas as the third area.

[0028] Therefore, the criteria for determining the storage region for write data requests are: 1. Sufficient storage space to meet the required amount of data to be written; 2. Storage space where no data was written in the previous clock cycle; 3. Storage regions should be as dispersed as possible. Each storage region is evaluated individually based on these three conditions to ensure balanced scheduling across all storage regions.

[0029] Step S375: Let c = c + 1, and execute step S372.

[0030] Step S301: Simultaneously, perform data reading processing on the first region corresponding to each first read request, and perform data writing processing on the fourth region corresponding to each write data request.

[0031] Step S400: Among the several storage regions of the target memory module, the storage region that is neither the first region nor the fourth region is determined as the fifth region; Step S500: Traverse each second read request. If the data address included in any second read request is in any fifth region, then determine the fifth region as the sixth region corresponding to the second read request. Step S510: If the data address included in any second read request does not exist in any of the fifth regions, then obtain the scheduling count corresponding to the second read request; Step S520: If the number of scheduling requests corresponding to the second read request is greater than the preset number of scheduling requests threshold, then proceed to step S530; otherwise, adjust the second read request to the read data request of the target memory module in the next clock cycle. Step S530: Determine the storage area corresponding to the data address included in the second read request as the seventh area; Step S540: Configure the seventh region as the storage region corresponding to the second read request in the next clock cycle.

[0032] Step S600: Perform data reading processing on the sixth region corresponding to each second read request.

[0033] After determining the first read request and the write data request, the storage area corresponding to the second read request is determined from the remaining storage areas. When determining the storage area corresponding to the second read request, since the data performance requirements of the second read request are lower than those of the first read request, the second read request can choose whether to process it in the current clock cycle based on the current scheduling status of the storage area. If the scheduling count of the second read request has exceeded the preset threshold, it means that the second read request has gone through several rounds of scheduling but has not yet been processed. Therefore, the second read request will be scheduled for processing in the current clock cycle. Otherwise, the second read request will be delayed to ensure the priority scheduling of the first read request and the write data request.

[0034] The storage region accelerated read method of the present invention, when the target memory module receives several read data requests and several write data requests within the same clock cycle, firstly divides the several read data requests into several first read requests and several second read requests according to the data performance requirements corresponding to each read data request. Then, based on the data address included in each first read request, a first region corresponding to each first read request is determined from several storage regions of the target memory module. Furthermore, based on the decreasing processing priority of the several write data requests, a fourth region corresponding to each write data request is sequentially determined from several storage regions of the target memory module that are not in the first region. Finally, the several storage regions of the target memory module are... In the region, the storage region that is neither the first region nor the fourth region is determined as the fifth region. If the data address included in any second read request is within any fifth region, then the fifth region is determined as the sixth region corresponding to the second read request, and data reading processing is performed on the sixth region corresponding to each second read request. By dividing several read data requests into two categories, first read requests and second read requests, with different data performance requirements, and allocating different storage regions to these two types of read data requests, the second read requests are processed using the remaining free storage regions during the processing of the first read request, so as to improve the processing efficiency of read data requests without affecting the processing of the first read request and write data requests.

[0035] Embodiments of the present invention also provide a computer program product including program code, which, when the program product is run on an electronic device, causes the electronic device to perform the steps of the methods described above in various exemplary embodiments of the present invention.

[0036] Furthermore, although the steps of the method in this disclosure are described in a specific order in the accompanying drawings, this does not require or imply that the steps must be performed in that specific order, or that all the steps shown must be performed to achieve the desired result. Additional or alternative steps may be omitted, multiple steps may be combined into one step, and / or a step may be broken down into multiple steps.

[0037] From the above description of the embodiments, those skilled in the art will readily understand that the exemplary embodiments described herein can be implemented by software or by combining software with necessary hardware. Therefore, the technical solutions according to the embodiments of this disclosure can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, external hard drive, etc.) or on a network, including several instructions to cause a computing device (such as a personal computer, server, mobile terminal, or network device, etc.) to execute the methods according to the embodiments of this disclosure.

[0038] In an exemplary embodiment of this disclosure, an electronic device capable of implementing the above-described method is also provided.

[0039] Those skilled in the art will understand that various aspects of the present invention can be implemented as systems, methods, or program products. Therefore, various aspects of the present invention can be specifically implemented in the following forms: entirely in hardware, entirely in software (including firmware, microcode, etc.), or in a combination of hardware and software, collectively referred to herein as “circuit,” “module,” or “system.”

[0040] An electronic device according to this embodiment of the invention. The electronic device is merely an example and should not be construed as limiting the functionality or scope of the embodiments of the invention.

[0041] Electronic devices are manifested in the form of general-purpose computing devices. Components of an electronic device may include, but are not limited to: at least one processor, at least one memory, and buses connecting different system components (including memory and processor).

[0042] The storage device stores program code that can be executed by the processor to perform the steps described in the "Exemplary Methods" section above, according to various exemplary embodiments of the present invention.

[0043] The storage may include readable media in the form of volatile storage, such as random access memory (RAM) and / or cache memory, and may further include read-only memory (ROM).

[0044] The storage may also include programs / utilities having a set (at least one) of program modules, including but not limited to: an operating system, one or more applications, other program modules, and program data, each or some combination of these examples may include an implementation of a network environment.

[0045] A bus can represent one or more of several bus architectures, including a memory bus or memory controller, a peripheral bus, a graphics acceleration port, a processor, or a local bus that uses any of the various bus architectures.

[0046] Electronic devices can also communicate with one or more external devices (such as keyboards, pointing devices, Bluetooth devices, etc.), one or more devices that enable users to interact with the electronic device, and / or any device that enables the electronic device to communicate with one or more other computing devices (such as routers, modems, etc.). This communication can be performed through input / output (I / O) interfaces. Furthermore, electronic devices can also communicate with one or more networks (such as local area networks (LANs), wide area networks (WANs), and / or public networks, such as the Internet) via network adapters.

[0047] In exemplary embodiments of this disclosure, a computer-readable storage medium is also provided, on which a program product capable of implementing the methods described above is stored. In some possible embodiments, various aspects of the invention may also be implemented as a program product comprising program code that, when the program product is run on a terminal device, causes the terminal device to perform the steps of the various exemplary embodiments of the invention described in the "Exemplary Methods" section of this specification.

[0048] The program product may employ any combination of one or more readable media. A readable medium may be a readable signal medium or a readable storage medium. A readable storage medium may be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination thereof. More specific examples of readable storage media (a non-exhaustive list) include: an electrical connection having one or more wires, a portable disk, a hard disk, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0049] Computer-readable signal media may include data signals propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A readable signal medium may also be any readable medium other than a readable storage medium, capable of sending, propagating, or transmitting programs for use by or in conjunction with an instruction execution system, apparatus, or device.

[0050] The program code contained on the readable medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.

[0051] Program code for performing the operations of this invention can be written in any combination of one or more programming languages, including object-oriented programming languages ​​such as Java and C++, and conventional procedural programming languages ​​such as C or similar languages. The program code can execute entirely on the user's computing device, partially on the user's device, as a standalone software package, partially on the user's computing device and partially on a remote computing device, or entirely on a remote computing device or server. In cases involving remote computing devices, the remote computing device can be connected to the user's computing device via any type of network, including a local area network (LAN) or a wide area network (WAN), or it can be connected to an external computing device (e.g., via the Internet using an Internet service provider).

[0052] Furthermore, the above figures are merely illustrative of the processes included in the method according to exemplary embodiments of the present invention, and are not intended to be limiting. It is readily understood that the processes shown in the above figures do not indicate or limit the temporal order of these processes. Additionally, it is readily understood that these processes may be executed synchronously or asynchronously, for example, in multiple modules.

[0053] It should be noted that although several modules or units for the device used to perform actions have been mentioned in the detailed description above, this division is not mandatory. In fact, according to embodiments of this disclosure, the features and functions of two or more modules or units described above can be embodied in one module or unit. Conversely, the features and functions of one module or unit described above can be further divided and embodied by multiple modules or units.

[0054] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A method for accelerating access to a storage area, characterized in that, include: Step S100: When the target memory module receives several read data requests and several write data requests within the same clock cycle, the several read data requests are divided into several first read requests and several second read requests according to the data performance requirements corresponding to each read data request; wherein, the data performance requirements corresponding to the first read request are higher than the data performance requirements corresponding to the second read request. Step S200: Based on the data address included in each first read request, determine the first region corresponding to each first read request from several storage regions of the target memory module; Step S300: Based on the decreasing order of the processing priorities corresponding to the several write data requests, determine the fourth region corresponding to each write data request sequentially from several storage regions other than the first region of the target memory module. Step S400: Among the several storage regions of the target memory module, the storage region that is neither the first region nor the fourth region is determined as the fifth region; Step S500: Traverse each second read request. If the data address included in any second read request is in any of the fifth regions, then the fifth region is determined as the sixth region corresponding to the second read request. Step S600: Perform data reading processing on the sixth region corresponding to each second read request.

2. The method according to claim 1, characterized in that, Step S100 includes: Step S110: When the target memory module receives several read data requests and several write data requests within the same clock cycle, obtain the data performance requirement index corresponding to each read data request; Step S120: Traverse each read data request. If the data performance requirement index corresponding to any read data request is greater than the preset performance index threshold, then the read data request is determined as the first read request; otherwise, the read data request is determined as the second read request.

3. The method according to claim 1, characterized in that, Step S200 includes: Step S210: Obtain the data address included in each of the first read requests to obtain a first data address list J=(J1,J2,...,J...). e ,...,J f ); where e = 1, 2, ..., f; f is the number of the first read requests; J e The data address included in the e-th first read request; Step S220: Obtain the address code corresponding to each storage region in the target memory module to obtain a region address code list B=(B1,B2,...,B m ,...,B n ); where m=1,2,...,n; n is the number of storage regions included in the target memory module; B m The address code corresponding to the m-th storage region in the target memory module; Step S230, according to J e Traverse the address code list B of the region, if J e Located in B m Within the corresponding storage area, the m-th storage area in the target memory module is determined as the first area corresponding to the e-th first read request.

4. The method according to claim 1, characterized in that, Step S300 includes: Step S310: Among the several storage regions of the target memory module, the storage regions that are not the first region are determined as the second region; Step S320: Obtain the preset storable capacity corresponding to each of the second regions to obtain a storable capacity list C=(C1,C2,...,C...). p ,...,C q ); where p = 1, 2, ..., q; q is the number of the second region; C p This represents the storable capacity corresponding to the p-th second region; Step S330: Obtain the stored capacity of each of the second regions at the current time to obtain a list of stored capacities D=(D1,D2,...,D...). p ,...,D q ); where D p The stored capacity of the p-th second region at the current time; Step S340: Determine the idle percentage E corresponding to the p-th second region. p =1-D p / C p ; Step S350, if E p If E0 > 0, then the p-th second region is determined as the third region; where E0 is the preset space ratio. Step S360: Sort the write data requests according to the descending order of their processing priorities to obtain the processing rank of each write data request after sorting; the rank of the write data request is negatively correlated with the processing priority of the write data request. Step S370: Based on the increasing order of the processing rank corresponding to the plurality of write data requests, determine the fourth region corresponding to each write data request sequentially from the plurality of third regions.

5. The method according to claim 4, characterized in that, Step S360 includes: Step S361: Sort the write data requests according to their decreasing processing priority to obtain a sorted request list F=(F1,F2,...,F...). r ,...,F t ); where r = 1, 2, ..., t; t is the number of write data requests; F r The r-th write data request is the sorted write data requests according to processing priority. Step S362: Determine r as F r The corresponding processing rank.

6. The method according to claim 5, characterized in that, Step S370 includes: Step S371: Let c=1; Step S372: If c≤t, then proceed to step S373; otherwise, proceed to step S400. Step S373, Obtain F c The number of corresponding data write addresses H c ; Step S374: Select H from the plurality of said third regions. c The third region, and the selected H c The third region is defined as F. c The corresponding fourth region; Step S375: Let c = c + 1, and execute step S372.

7. The method according to claim 1, characterized in that, Step S500 further includes: Step S510: If the data address included in any of the second read requests does not exist in all of the fifth regions, then obtain the scheduling count corresponding to the second read request; Step S520: If the number of scheduling requests corresponding to the second read request is greater than the preset number of scheduling requests threshold, then execute step S530; otherwise, adjust the second read request to the read data request of the target memory module in the next clock cycle. Step S530: Determine the storage area corresponding to the data address included in the second read request as the seventh area; Step S540: Configure the seventh region as the storage region corresponding to the second read request in the next clock cycle.

8. The method according to claim 1, characterized in that, After step S300, the method further includes: Step S301: Simultaneously, perform data reading processing on the first region corresponding to each first read request, and perform data writing processing on the fourth region corresponding to each write data request.

9. A non-transitory computer-readable storage medium, characterized in that, The storage medium stores at least one instruction or at least one program segment, which is loaded and executed by a processor to implement the method as described in any one of claims 1-8.

10. An electronic device, characterized in that, Includes a processor and the non-transitory computer-readable storage medium as described in claim 9.

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