Software-based hot plug controller for multi-function device

Abstract

This disclosure relates to a software-based hot-plug controller for a multifunctional device. A method for facilitating the insertion into or removal from a computer system's bus architecture during computer system operation includes: configuring a first function of the device in the computer system as a control function to control the insertion and removal of at least one additional function from the bus architecture; and having the device in the computer system send a binding command to a host driver of a host computer to bind the control function to the host driver. The method may further include: configuring at least one additional function for insertion into the bus architecture; having the control function send a request to the host driver to insert at least one additional function into the bus architecture; and, in response to the request, having the host driver enable at least one additional function.

Description

Related applications

[0001] This application claims the benefit of U.S. Provisional Application No. 63 / 748,592, filed January 23, 2025. The entire teachings of the above application are incorporated herein by reference. Technical Field

[0002] This disclosure relates to a software-based hot-swappable controller for multifunctional devices. Background Technology

[0003] Fast Peripheral Component Interconnect (PCI) (often referred to as PCIe) is a high-speed bus standard used to connect hardware components in electronic architectures such as computer systems. PCIe can be used to connect expansion devices (such as graphics cards, sound cards, and network cards) and storage devices (such as solid-state drives and hard disk drives).

[0004] PCIe hot-swapping is a technology that allows the insertion or removal of PCIe-compatible devices from an electronic system while the system is running, without disabling or otherwise shutting down the system. Hot-swapping is achieved through a coordinated process between hardware (such as the motherboard and endpoint devices) and software (such as the operating system and associated drives) that safely powers the device on or off.

[0005] Current PCIe specifications require hot-plug support on upstream ports (such as root ports or downstream ports of a switch) and endpoint devices. However, implementing PCIe switches is a complex undertaking that requires investment and support of additional hardware resources.

[0006] Figure 1A The diagram illustrates a basic PCIe topology from the prior art. The root complex device (host) 102 connects the CPU and memory subsystem to a fast PCI switch structure consisting of one or more PCIe devices 104.

[0007] Figure 1B The illustration shows a typical PCIe hot-plugging implementation in a prior art system. The data processing unit 106 hosts a hardware hot-plug switch 108 and associated controller circuitry, as well as n PCIe devices 1101 to 110. n The root port 112 at root composite device 102 is connected to DPU 106 via PCIe structure 114. The host driver at root composite device 102 works with hardware switch 108 to activate and enable n PCIe devices 1101 to 110. n One or more of them, and coordinate PCIe devices 1101 to 110 n Hot insertion or hot removal of one or more of them. Summary of the Invention

[0008] The embodiments described herein relate to a system and method for establishing a PCIe hot-plugging implementation without a hardware PCIe switch.

[0009] In one aspect, the invention can be a method facilitating the insertion of a device into or removal from the bus architecture of a computer system during operation. The method may include configuring a first function of a multifunction device of the computer system as a control function to control the insertion and removal of at least one additional function from the bus architecture. Each of the first function and the at least one additional function may represent a configurable capability of the multifunction device. The method may further include a device of the computer system sending a binding command to a host driver of a host computer to bind the control function to the host driver. The method may further include configuring at least one additional function to a state suitable for insertion into the bus architecture, the control function sending a request to the host driver to insert at least one additional function into the bus architecture, and the host driver enabling at least one additional function in response to the request to enable at least one additional function. Enabling occurs without using a hardware switch to decouple at least one additional function from the bus architecture.

[0010] The method may further include receiving a request from a control function to remove at least one additional function from the bus architecture, sending the request from the control function to a host driver to remove at least one additional function from the bus architecture, and disabling at least one additional function by the host driver in response to the request to remove at least one additional function from the bus architecture.

[0011] Bus architecture can enable rapid interconnection of peripheral components. ® (PCIe) ® The method may also include providing the device as a multi-functional PCIe. ® Endpoint. The method may also include providing the drive as a PCIe endpoint. ® The method may further include, when a control function is bound to the driver, the driver logically removes at least one additional function from the host. The network firmware component (i) can configure at least one additional function for insertion into the bus architecture, and (ii) can generate a request to insert at least one additional function into the bus architecture.

[0012] In another aspect, the invention can be a system that facilitates the insertion of devices into or removal from the bus architecture of a computer system during operation. The system may include a device having a first function and at least one additional function, the first function being configured as a control function to control the insertion and removal of at least one additional function from the bus architecture. The system may also include a computer system host and a driver for the computer system host, the driver being bound to and communicating with the control function to manage the insertion of at least one additional function into the computer system's bus architecture.

[0013] The computer system host's driver can communicate with the control function to (i) configure at least one additional function for insertion into the bus architecture, (ii) communicate a request from the control function to the driver to insert at least one additional function into the bus architecture, and (iii) enable at least one additional function by the driver in response to the request to insert at least one additional function.

[0014] The computer system host's driver can communicate with the control function to (i) convey a request from the control function to the driver to remove at least one additional function from the bus architecture, and (ii) in response to the request to remove at least one additional function from the bus architecture, the driver disables at least one additional function. The bus architecture can be a fast peripheral component interconnect. ® (PCIe) ® This device can be a multi-functional PCIe. ® Endpoint. The driver can be PCIe. ® Vendor hot-swappable system driver. The driver of the computer system host can communicate with the control function to logically remove at least one additional function from the host when the control function is bound to the driver. The network firmware component can (i) configure at least one additional function for insertion into the bus architecture, and (ii) generate a request to insert at least one additional function into the bus architecture.

[0015] In another aspect, the present invention can be a method that facilitates inserting or removing devices from the bus architecture of an electronic system without disabling the electronic system. The method may include configuring a first function of a multi-functional device in the electronic system as a control function to control the insertion and removal of a second function from the bus architecture. Each of the first and second functions may represent the configurable capabilities of the multi-functional device. The method may further include having a device in the electronic system send a binding command to a host driver of a central controller to bind the control function to the host driver. The method may further include configuring the second function to a state for insertion into the bus architecture, having the control function send a request to the host driver to insert the second function into the bus architecture, and having the host driver enable the second function in response to the request to enable the second function, the activation occurring without using a hardware switch to decouple the second function from the bus architecture.

[0016] The method may further include receiving a request from a control function to remove a second function from the bus architecture, sending the request from the control function to a host driver, and disabling the second function by the host driver in response to the request. The bus architecture may be a Fast Peripheral Component Interconnect (FPPC). ® (PCIe) ® The method may also include providing the device as a multi-functional PCIe. ® Endpoint. The method may also include providing the host drive as a PCIe endpoint. ® Supplier hot-swappable system driver. Attached Figure Description

[0017] The patent or application documents contain at least one drawing executed in color. A copy of this patent or patent application publication with the color drawing(s) will be provided by the Patent Office upon request and payment of the necessary fees.

[0018] The foregoing will become apparent from the following more specific description of exemplary embodiments, as illustrated in the accompanying drawings, wherein similar reference numerals refer to the same parts in different views. The drawings are not necessarily drawn to scale, but rather the emphasis is on the illustrated embodiments.

[0019] Figure 1A The diagram illustrates the basic PCIe topology from existing technologies.

[0020] Figure 1B The illustration shows a typical PCIe hot-plugging implementation in an existing technology system.

[0021] Figure 1C The basic topology of the described embodiment is illustrated.

[0022] Figure 2An example implementation of hot-plugging in the described embodiment is illustrated.

[0023] Figure 3 A timeline of an example hot-plug operation is shown in the example embodiment.

[0024] Figure 4 The diagram illustrates the execution. Figure 3 An alternative view of an example embodiment of the example process described herein.

[0025] Figure 5 A flowchart illustrating the operation of the example embodiments described herein is shown. Detailed Implementation

[0026] The following is a description of an example embodiment.

[0027] The described embodiments relate to a system and method for establishing a PCIe hot-plugging implementation without a hardware PCIe switch. Without a hardware switch, the root port and endpoint devices need to support the hot-plugging aspects of the PCIe specification. Not all motherboards support hot-plugging root ports.

[0028] Figure 1C The basic topology of the described embodiment is illustrated. DPU 120 hosts multifunction device 122. Root port 112 of root composite device 102 is connected to DPU 120 and multifunction device 122 via PCIe structure 114. PCIe multifunction device 122 is a single physical PCIe card or chip that behaves like several independent devices (e.g., a network card and a sound card), appearing as separate physical functions (e.g., PF0, PF1) to root composite device 102. Each physical function has its own configuration space and resources, which simplifies virtualization management and enabling features, allowing a single physical device to represent multiple virtual devices. In the example embodiment described herein, multifunction device 122 includes eight functions (PF0 to PF7), although typically multifunction device 122 can consist of more functions (e.g., PF0 to PFn). In the described embodiment, the first function PF0 provides hot-plug controller services.

[0029] Figure 2 An example implementation of hot-plugging in the described embodiment is illustrated. Root complex device 102 hosts hot-plug driver 202, virtual network interface device driver 204, and virtual cryptographic device driver 206. Through PCIe structure 114, the hot-plug controller at PF0 communicates with hot-plug driver 202 to coordinate the hot-plug insertion or removal of virtual interface devices and / or virtual cryptographic devices at PF1 and PF2, respectively. Communication between the hot-plug controller PF0 and hot-plug driver 202 is essentially implemented within the PCIe structure using sideband signaling.

[0030] Figure 3 A timeline of an example hot-plug operation according to an embodiment of the present invention is shown. At time T0, DPU 120 boots up, and the local operating system (Linux) begins executing the hot-plug firmware. At time T1, the hot-plug driver at root complex device 102 is loaded on PF0, and virtual devices at PF1 through PF7 are logically removed. At time T2, the network firmware component at DPU begins execution, configures the PF1 configuration space, and requests the hot-plug controller at PF0 of multifunction device 122 to enable PF1 (in this example embodiment, the virtual network interface device driver (virtio_net) 204).

[0031] Time T3 marks the beginning of the process of hot-adding PF1. As described herein, functional PF1 emulates a PCIe device in this example embodiment. "Hot-adding" PF1 refers to the action of introducing the PF1 device onto the PCIe bus without powering down or otherwise terminating the CPU at the root composite device 102 of the PCIe system. The hot-plug controller at PF0 receives a PF1 hot-add request from the network firmware component. A "PF1 hot-add request" represents a query message that facilitates introducing the PF1 device onto the PCIe bus without powering down or otherwise terminating the CPU, and sends the hot-add request as a command to the hot-plug driver at the root composite device 102. At time T4, the hot-plug driver at the root composite device 102 receives the command to hot-add PF1 and, in response, subsequently enables PF1.

[0032] Time T5 marks the beginning of the process of hot-removing PF1. "Hot removal" of PF1 refers to the action of withdrawing the PF1 device from the PCIe bus without powering down or otherwise terminating the CPU at the root composite device 102 of the PCIe system. The network firmware component on DPU 120 stops and provides an PF1 hot-removal request to the hot-plug controller PF0. The "PF1 hot-removal request" is a query message that queries for assistance in withdrawing the PF1 device from the PCIe bus without powering down or otherwise terminating the CPU. At time T6, the hot-plug controller at PF0 on DPU 120 receives the PF1 hot-removal request from the network firmware component and sends it as a command to the hot-plug driver at the root composite device 102. At time T7, the hot-plug driver at the root composite device 102 receives the hot-removal command and disables PF1 in response.

[0033] The described embodiments reduce the complexity of hot-plugging operations because they eliminate the need for a hardware PCIe switch at the PCIe endpoint device. The described embodiments also contribute to reduced power consumption. Since only the required functions are active, power usage can be reduced by selectively enabling these required functions. The described embodiments further promote flexibility because the runtime individuality of each function varies based on the firmware components running on the host. The described embodiments help simplify design, thereby reducing hardware costs. The described embodiments promote scalability because they can easily accommodate multiple virtual individuals without requiring additional hardware changes.

[0034] Figure 4 The diagram illustrates the execution. Figure 3 An alternative view of an example embodiment of the example process described herein. Host 102 is shown having PCIe links 402a to 402h to functions PF0 to PF7. A hot-pluggable driver 202 is coupled to PF0 link 402a, a virtual network interface device driver 204 is coupled to PF1 link 402b, and a virtual cryptographic device driver 206 is coupled to PF2 link 402c. A multifunction device 122 on the DPU is shown having functions PF0 404a, PF1 404b, PF2 404c, and PF3 to PF7 404d to 404h. (As relative to...) Figure 3 As described, the multifunction device 122 at the DPU boots up, and Linux begins hot-plugging the firmware on the controller at PF0 404a. On host 102, hot-plug driver 202 is loaded onto PF0 402a, and PF1 to PF7 404b to 404h are logically removed.

[0035] Hot-swap addition process. On the DPU, the network firmware component begins, configures the PF1 configuration space, and requests the hot-swap controller firmware at PF0404a to enable PF1 404b (i.e., hot-swap addition request). The hot-swap controller firmware at PF0 404a receives the PF1 hot-swap addition request and, in response, sends a PF1 hot-swap command to the hot-swap driver 202 on the host. The hot-swap driver 202 receives the hot-swap command and, in response, enables the PF1 404b function.

[0036] Hot-swap removal process. On the DPU, the network firmware component stops and sends a request to the hot-swap controller firmware at PF0 404a to hot-swap PF1 404b. The hot-swap controller firmware at PF0 404a receives the request to hot-swap PF1 404b and, in response, sends a hot-swap removal command to the hot-swap driver 202 on the host. The hot-swap driver receives the hot-swap command and, in response, disables PF1 404b.

[0037] Figure 5 A flowchart illustrating the operation of the example embodiment described herein is shown. Once system operation 500 occurs, the first function PF0 is configured 502 as a hot-swap controller. The hot-swap driver at the host sends a binding command 504 to the hot-swap controller at PF0. After binding, the hot-swap driver logically removes 506 non-controller functions PF1 to PF7 from the host. Additional functions 508 can then be configured for insertion or removal.

[0038] If the next request 510 is determined to be a hot-plug (i.e., add) request, the hot-plug controller at PF0 receives a hot-add request (512) to add functions PF1 through PF7. The hot-plug controller at PF0 responds to the hot-add request by sending a hot-add command (514) to the hot-plug driver at the host. The hot-plug driver responds to the hot-add command by enabling the function associated with the hot-plug add command (516) and returns to the configuration (508) for additional functions.

[0039] If the next request is determined to be a hot-remove request, the hot-plug controller at PF0 receives hot-remove request 518 to remove functions PF1 through PF7. The hot-plug controller at PF0 responds to the hot-remove request by sending hot-remove command 520 to the hot-plug driver at the host. The hot-plug driver responds to the hot-add command by disabling the function associated with the hot-remove command 522 and returns to configuration 508 for additional functions.

[0040] If it is determined that there are no further add or remove requests pending at 510, the hot-swap controller initiates the termination of the hot-add and / or remove process at 524, and the hot-swap driver logically enables any remaining non-hot-swap controller functions at 526 for normal operation.

[0041] While exemplary embodiments have been specifically shown and described, those skilled in the art will understand that various changes in form and detail may be made therein without departing from the scope of the embodiments covered by the appended claims.

Claims

1. A method for facilitating the insertion of a device into or removal from the bus architecture of a computer system during operation, the method comprising: The first function of the multifunction device of the computer system is configured as a control function to control the insertion and removal of at least one additional function from the bus architecture, each of the first function and the at least one additional function representing the configurability of the multifunction device; The device of the computer system sends a binding command to the host driver of the host computer to bind the control function to the host driver; Configure the at least one additional function to a state suitable for insertion into the bus architecture; The control function sends a request to the host driver to insert the at least one additional function into the bus architecture; as well as In response to the request to enable the at least one additional function, the host driver enables the at least one additional function, which occurs without using a hardware switch to decouple the at least one additional function from the bus architecture.

2. The method according to claim 1, further comprising: The control function receives a request to remove at least one additional function from the bus architecture; The control function sends a request to the host driver to remove the at least one additional function from the bus architecture; as well as In response to the request to remove the at least one additional function from the bus architecture, the host driver disables the at least one additional function.

3. The method according to claim 1, wherein the bus architecture is a fast peripheral component interconnect. ® PCIe ® .

4. The method according to claim 3, further comprising: Provide the device as a multi-functional PCIe ® Endpoint.

5. The method according to claim 3, further comprising: Provide the drive as a PCIe ® Supplier hot-swappable system driver.

6. The method according to claim 1, further comprising: When the control function is bound to the driver, the driver logically removes the at least one additional function from the host.

7. The method of claim 1, wherein the network firmware component (i) configures the at least one additional function for insertion into the bus architecture, and (ii) generates the request to insert the at least one additional function into the bus architecture.

8. A system for facilitating the insertion of a device into or removal from the bus architecture of a computer system during operation, the system comprising: A device having a first function and at least one additional function, wherein the first function is configured as a control function to control the insertion and removal of at least one additional function from the bus architecture; Computer system host; as well as The computer system host's driver is bound to and communicates with the control function to manage the insertion of the at least one additional function into the computer system's bus architecture.

9. The system of claim 8, wherein the driver of the computer system host communicates with the control function to: (i) Configure the at least one additional function for insertion into the bus architecture; (ii) Communicating a request from the control function to the driver to insert the at least one additional function into the bus architecture; and (iii) In response to the request to insert the at least one additional function, the driver enables the at least one additional function.

10. The system of claim 8, wherein the driver of the computer system host communicates with the control function to: (i) Communicating a request from the control function to the driver to remove at least one additional function from the bus architecture; and (ii) In response to the request to remove the at least one additional function from the bus architecture, the driver disables the at least one additional function.

11. The system of claim 8, wherein the bus architecture is a fast peripheral component interconnect. ® PCIe ® .

12. The system of claim 11, wherein the device is a multi-functional PCIe ® Endpoint.

13. The system of claim 11, wherein the driver is a PCIe ® Supplier hot-swappable system driver.

14. The system of claim 8, wherein the driver of the computer system host communicates with the control function to logically remove the at least one additional function from the host when the control function is bound to the driver.

15. The system of claim 8, wherein the network firmware component (i) configures the at least one additional function for insertion into the bus architecture, and (ii) generates the request to insert the at least one additional function into the bus architecture.

16. A method for facilitating the insertion of a device into or removal of a device from the bus architecture of an electronic system without disabling the electronic system, the method comprising: The first function of the multi-functional device of the electronic system is configured as a control function to control the insertion and removal of a second function from the bus architecture, each of the first function and the second function representing the configurability of the multi-functional device; The device of the electronic system sends a binding command to the host driver of the central controller to bind the control function to the host driver; Configure the second function to be inserted into the bus architecture; The control function sends a request to the host driver to insert the second function into the bus architecture; as well as In response to the request to enable the second function, the second function is enabled by the host driver, and the enabling occurs without using a hardware switch to decouple the second function from the bus architecture.

17. The method of claim 16, further comprising: The control function receives a request to remove the second function from the bus architecture; The control function sends a request to the host driver to remove the second function from the bus architecture; as well as In response to the request to remove the second function from the bus architecture, the second function is disabled by the host driver.

18. The method of claim 16, wherein the bus architecture is a fast peripheral component interconnect. ® PCIe ® .

19. The method of claim 18, further comprising: Provide the device as a multi-functional PCIe ® Endpoint.

20. The method of claim 18, further comprising: Provide the host drive as a PCIe ® Supplier hot-swappable system driver.

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