A data acquisition and analysis device with an SSI interface

Abstract

This invention provides a data acquisition and analysis device with an SSI interface, comprising a main controller, an SSI data acquisition unit, an RS422 bus transceiver unit, a CAN bus transceiver unit, and a power supply unit. The main controller is bidirectionally connected to one end of each of the SSI data acquisition unit, RS422 bus transceiver unit, and CAN bus transceiver unit. The other ends of the RS422 bus transceiver unit and CAN bus transceiver unit are bidirectionally connected to a host computer data reading device. The other end of the SSI data acquisition unit is connected to the corresponding terminal of an SSI interface encoder or sensor. The main controller is electrically connected to the DC current output terminal through the power supply unit. This data acquisition and analysis device with an SSI interface enables rapid and convenient reading of encoder values ​​and flexible adjustment of acquisition parameters without relying on complex instruments or pre-programming, thereby simplifying the encoder data acquisition and characteristic analysis process and improving the efficiency of servo system development and testing.

Description

Technical Field

[0001] This invention relates to the field of servo system technology, and more specifically, to a data acquisition and analysis device with an SSI interface. Background Technology

[0002] SSI is a common data protocol format. The SSI interface, also known as a synchronous serial interface, is a full-duplex serial interface that uses a synchronous clock for real-time data transmission, allowing the chip to communicate with various serial devices. The SSI interface is a commonly used interface method in high-precision absolute angle encoders. Furthermore, SSI interface encoders, sensors, and other devices are characterized by convenient reading and writing, ease of maintenance, and widespread application in closed-loop control of servo control systems.

[0003] After using an SSI interface encoder, servo systems are typically directly connected to the control system, and programming is done by referring to the manual. However, without prior analysis of the encoder data, direct programming is often time-consuming. Alternatively, when encoder data analysis is needed, a signal generator and oscilloscope are used for testing. The signal generator signal is differentially converted and connected to CLK+ and CLK-, and the oscilloscope's differential probe is connected to the SSI interface DATA+ and DATA- interfaces. The encoder characteristics are then determined by observing the waveform. This method is time-consuming and labor-intensive, significantly reducing work efficiency. Therefore, researching a dedicated data acquisition device for SSI interface encoders that can quickly and conveniently read encoder values ​​and flexibly adjust acquisition parameters (such as clock frequency) without relying on complex instruments and pre-programming is of great significance. This simplifies the encoder data acquisition and characteristic analysis process, improving the efficiency of servo system development and testing.

[0004] Patent CN113848863B discloses a universal servo system test adapter, including a sensor adapter unit, a motor adapter unit, a digital isolated input / output test unit, an analog input / output test unit, a centralized control unit, a communication interface, and a control display terminal. The centralized control unit uses an MCU and an FPGA as its core control chips. The FPGA performs angle detection for the sensor adapter unit and simulates all encoder communication protocols in real time to send the current encoder feedback position to the servo driver. The MCU handles data interaction with the servo driver, the control display terminal, and the FPGA, as well as angle information interaction and real-time calculation of test data. The centralized control unit can connect to various models of servo drivers. While it can independently test multiple models of servo drivers or motors, its structure is complex, leading to high costs. Furthermore, the test adapter is bulky and has many interfaces, making it unsuitable for embedding into a user's own control system or equipment as a fixed data acquisition module. Summary of the Invention

[0005] In view of this, the present invention aims to propose a data acquisition and analysis device with an SSI interface to solve the problem in the prior art that, when dealing with SSI interface encoders, complex instruments and pre-programming are required, which makes the reading of encoder values ​​complicated and affects the efficiency of servo system development and testing. The present invention aims to enable rapid and convenient reading of encoder values ​​and flexible adjustment of acquisition parameters without relying on complex instruments and pre-programming, thereby simplifying the encoder data acquisition and characteristic analysis process and improving the efficiency of servo system development and testing.

[0006] To achieve the above objectives, the technical solution of the present invention is implemented as follows:

[0007] This invention relates to a data acquisition and analysis device with an SSI interface, comprising a main controller, an SSI data acquisition unit, an RS422 bus transceiver unit, a CAN bus transceiver unit, and a power supply unit; the main controller is bidirectionally connected to one end of each of the SSI data acquisition unit, the RS422 bus transceiver unit, and the CAN bus transceiver unit; the other end of each of the RS422 bus transceiver unit and the CAN bus transceiver unit is bidirectionally connected to a host computer data reading device; the other end of the SSI data acquisition unit is connected to the corresponding terminal of an SSI interface encoder or sensor; the main controller is electrically connected to the current output terminal of a DC power supply unit.

[0008] Furthermore, the device also includes a FLASH data storage unit; the FLASH data storage unit is bidirectionally connected to the main controller and is used to store abnormal data collected by the device during the data acquisition process.

[0009] Furthermore, the device also includes a clock frequency selection switch; the signal output terminal of the clock frequency selection switch is unidirectionally connected to the main controller.

[0010] Furthermore, the device also includes an LED status indicator unit; the LED status indicator unit is unidirectionally connected to the main controller; under the action of the main controller, it is used to indicate the operating status of the data acquisition and analysis device connected to the SSI interface encoder. According to the different acquisition frequencies of the device, the corresponding combination of indicator lights in the LED status indicator unit will light up accordingly.

[0011] Furthermore, the main controller consists of a central processing unit (MCU), a power supply interface, a serial port module, a CAN communication module, an SPI1 module, an SPI2 module, and a GPIO module. The MCU, power supply interface, serial port module, CAN communication module, SPI1 module, SPI2 module, and GPIO module are all integrated on the main controller. The MCU is located at the center of the main controller. The power supply interface, serial port module, CAN communication module, SPI1 module, SPI2 module, and GPIO module are arranged around the MCU.

[0012] Furthermore, the power supply interface is connected to the positive and negative terminals of the power supply unit; the serial port module is bidirectionally connected to the RS422 bus transceiver unit; the CAN communication module is bidirectionally connected to the CAN bus transceiver unit; and the SPI1 module is bidirectionally connected to the SSI data acquisition unit.

[0013] Furthermore, the SPI2 module has a bidirectional communication connection with the FLASH data storage unit.

[0014] Furthermore, the GPIO module has a one-way communication connection with the output of the clock frequency selection switch and the input of the LED status indicator unit.

[0015] Furthermore, both the RS422 bus transceiver unit and the CAN bus transceiver unit employ isolated circuitry. The power supply unit is powered by a DC-DC power supply.

[0016] Compared with existing technologies, the data acquisition and analysis device with an SSI interface described in this invention has the following advantages:

[0017] By setting up the device, encoder values ​​can be read quickly and conveniently and acquisition parameters can be flexibly adjusted without relying on complex instruments and pre-programming, thereby simplifying the encoder data acquisition and characteristic analysis process and improving the efficiency of servo system development and testing. Attached Figure Description

[0018] The accompanying drawings, which constitute a part of this invention, are used to provide a further understanding of the invention. The illustrative embodiments of the invention and their descriptions are used to explain the invention and do not constitute an undue limitation of the invention. In the drawings:

[0019] Figure 1 This is a schematic diagram of the overall structure of the device;

[0020] Figure 2 This is a schematic diagram of the internal circuitry of the RS422 bus transceiver unit 300.

[0021] Figure 3 This is a schematic diagram of the internal circuitry of the CAN bus transceiver unit 400.

[0022] Figure 4 This is a schematic diagram of the internal circuitry of the SSI data acquisition unit 200.

[0023] Figure 5 This is a schematic diagram of the internal circuitry of the FLASH data storage unit 600.

[0024] Figure 6 This is a schematic diagram of the internal circuit of the LED status indicator unit 800.

[0025] Explanation of reference numerals in the attached diagram: 100, Main controller; 101, Power supply interface; 102, Serial port module; 103, CAN communication module; 104, SPI1 module; 105, SPI2 module; 106, GPIO module; 200, SSI data acquisition unit; 300, RS422 bus transceiver unit; 400, CAN bus transceiver unit; 500, Power supply unit; 600, FLASH data storage unit; 700, Clock frequency selection switch; 800, LED status indicator unit; 81, Protection resistor; 82, Light-emitting diode. Detailed Implementation

[0026] The inventive concepts of this disclosure will be described below using terminology commonly used by those skilled in the art to communicate the essence of their work to others skilled in the art. However, these inventive concepts may be embodied in many different forms and should not be construed as limited to the embodiments described herein.

[0027] It should be noted that, unless otherwise specified, the embodiments and features described in the present invention can be combined with each other.

[0028] The present invention will now be described in detail with reference to the accompanying drawings and embodiments.

[0029] To address the problem in existing technologies that require complex instruments and pre-programming when dealing with SSI interface encoders, leading to complex encoder value readings and impacting the efficiency of servo system development and testing, this embodiment proposes a data acquisition and analysis device with an SSI interface. The device includes a main controller 100, an SSI data acquisition unit 200, an RS422 bus transceiver unit 300, a CAN bus transceiver unit 400, and a power supply unit 500. The main controller 100 is bidirectionally connected to one end of each of the SSI data acquisition unit 200, RS422 bus transceiver unit 300, and CAN bus transceiver unit 400. The other end of each of the RS422 bus transceiver unit 300 and CAN bus transceiver unit 400 is bidirectionally connected to a host computer data reading device. The other end of the SSI data acquisition unit 200 is connected to the corresponding terminal of the SSI interface encoder or sensor. The main controller 100 is electrically connected to the DC current output terminal through the power supply unit 500, which is a DC-DC power supply. In this embodiment, the output voltage of the DC power supply ranges from 9V to 36V. The output DC voltage of the power supply unit 500 is 5V.

[0030] By configuring the aforementioned device, encoder values ​​can be read quickly and conveniently, and acquisition parameters can be flexibly adjusted without relying on complex instruments or pre-programming. This simplifies the encoder data acquisition and characteristic analysis process, and improves the efficiency of servo system development and testing.

[0031] The device also includes a FLASH data storage unit 600. The FLASH data storage unit 600 has a bidirectional communication connection with the main controller 100. It is used to store abnormal data collected during the data acquisition process, and the host computer can read the collected abnormal data simultaneously. The storage capacity of the FLASH data storage unit 600 is 256MB. When the FLASH data storage unit 600 is full, it can automatically delete the oldest stored data, achieving cyclic storage in the FLASH data storage unit 600.

[0032] By configuring the FLASH data storage unit 600, the device can promptly store and retrieve abnormal data, improving the reliability of device operation. Furthermore, when the FLASH data storage unit 600 is full, it can automatically delete the oldest stored data, enabling cyclic storage. This effectively extends the lifespan of the FLASH data storage unit 600, improves storage accuracy, and prevents the inability to store current data promptly due to previously stored data not being deleted after the storage unit is full, thus enhancing user convenience.

[0033] The device also includes a clock frequency selection switch 700. The signal output terminal of the clock frequency selection switch 700 is unidirectionally connected to the main controller 100. Specifically, when it is necessary to verify the response time and data of the SSI interface encoder under different clock frequencies, the DIP switch of the clock frequency selection unit 7 is selected; different DIP switch values ​​represent different clock frequencies. In this embodiment, a 3-position DIP switch has 2... 3 =8 different clock frequency options, namely 5kbps, 10kbps, 20kbps, 30kbps, 40kbps, 50kbps, 80kbps, and 100kbps, for a total of 8 clock frequencies.

[0034] By setting the clock frequency selection switch 700, the frequency of the clock pulses sent by the main controller 100 to the SSI interface encoder can be actively changed by selecting different values ​​of the DIP switch, thereby simulating different communication speed conditions and realizing manual control of the SSI communication rate. Furthermore, SSI is a synchronous serial interface, and data bits must be sent on the rising / falling edge of each clock pulse. By changing the frequency, it is possible to test whether the encoder's internal circuitry can stably output data within a specified time under different "rhythms," identifying its limiting operating frequency and thus verifying the encoder's "response timeliness." In addition, high-frequency clocks are prone to signal reflection, cable attenuation, and jitter, while low-frequency clocks may introduce drift. By changing the frequency, the reliable communication frequency point with the lowest bit error rate under the current cable length and electrical environment can be found, thereby verifying the stability of data transmission.

[0035] The device also includes an LED status indicator unit 800. The LED status indicator unit 800 is unidirectionally connected to the main controller 100. Under the action of the main controller 100, it is used to indicate the operating status of the data acquisition and analysis device connected to the SSI interface encoder. According to the different acquisition frequencies of the device, the corresponding indicator light combination in the LED status indicator unit 800 will light up accordingly.

[0036] Specifically, the main controller 100 consists of a central processing unit (MCU), a power supply interface 101, a serial port module 102, a CAN communication module 103, an SPI1 module 104, an SPI2 module 105, and a GPIO module 106. The MCU, MCU, CAN communication module 103, SPI1 module 104, SPI2 module 105, and GPIO module 106 are all integrated on the main controller 100. The MCU is located at the center of the main controller 100. The power supply interface 101, serial port module 102, CAN communication module 103, SPI1 module 104, SPI2 module 105, and GPIO module 106 are arranged around the MCU. The power supply interface 101 is connected to the positive and negative terminals of the power supply unit 500. The serial port module 102 is bidirectionally connected to the RS422 bus transceiver unit 300. The CAN communication module 103 is bidirectionally connected to the CAN bus transceiver unit 400. SPI1 module 104 is bidirectionally connected to SSI data acquisition unit 200. SPI2 module 105 is bidirectionally connected to FLASH data storage unit 600. GPIO module 106 is unidirectionally connected to the output of clock frequency selection switch 700 and the input of LED status indicator unit 800. In this embodiment, the central processing unit (MCU) can be a domestically produced ARM core MCU.

[0037] By configuring the units and modules within the main controller 100, the operational stability of the main controller 100 can be effectively improved. It also helps to ensure the security of the connection between the main controller 100 and each component, and further enhances the reliability of data transmission between the main controller 100 and each component.

[0038] The RS422 bus transceiver unit 300 employs an isolated circuit. The RS422 bus transceiver unit 300 includes a transceiver chip U1 and a first ribbon cable interface J1. Pins 1 and 8, and pins 9 and 16 of the transceiver chip U1 are connected in parallel and then electrically connected to ground GND and ground GNDW_422-3, respectively. Pins 11, 12, 13, and 14 of the transceiver chip U1 are connected to pins 1, 2, 3, and 4 of the first ribbon cable interface J1, respectively. Pins 13 and 14 of the transceiver chip U1 are electrically connected through a third resistor R3. Pins 2 and 7 of the transceiver chip U1 are connected in parallel and then electrically connected to one end of the first capacitor C1, the second capacitor C2, the third capacitor C3, and the fourth capacitor C4, and to the DC power supply VCC, respectively. The other ends of the first capacitor C1, the second capacitor C2, the third capacitor C3, and the fourth capacitor C4 are connected in parallel to ground GND. Pin 4 of the transceiver chip U1 is grounded through the first resistor R1. Pin 5 of transceiver chip U1 is electrically connected to the DC power supply VCC through the second resistor R2. Pins 10 and 15 of transceiver chip U1 are connected in parallel and then grounded (GNDW_422-3) through the fifth capacitor C5, the sixth capacitor C6, the seventh capacitor C7, and the eighth capacitor C8, respectively. Pins 3 and 6 of transceiver chip U1 are connected to the corresponding pins of the serial port module 102 inside the main controller 100; the DC power supply VCC can be 3.3V.

[0039] The CAN bus transceiver unit 400 uses isolated circuitry. The CAN bus transceiver unit 400 includes an isolation chip U2, a transceiver chip U3, and a second ribbon cable interface P1.

[0040] Specifically, pin 1 of isolation chip U2 is electrically connected to one end of the first three-capacitor C13 and the DC power supply Vcc. The other end of the first three-capacitor C13 is electrically connected to pin 2 of isolation chip U2 and ground GND. Pin 6 of isolation chip U2 is electrically connected to pin 13 of transceiver chip U3 and one end of the first four-capacitor C14. The other end of the first four-capacitor C14 is electrically connected to pin 5 of isolation chip U2 and ground GNDW_CAN1.

[0041] A ninth capacitor C9, a first zero capacitor C10, a first first capacitor C11, and a first second capacitor C12 are installed between pins 13 and 16 of transceiver chip U3, and pin 16 of transceiver chip U3 is grounded to GNDW_CAN1. Pin 7 of transceiver chip U3 is electrically connected to the DC power supply VCC. Pins 9 and 16 of transceiver chip U3 are connected in parallel.

[0042] Pins 4, 5, and 6 of transceiver chip U3 are connected to the corresponding pins of CAN communication module 103 within the main controller 100. Pin 12 of transceiver chip U3 is electrically connected to pin 2 of the second ribbon cable interface P1. Pin 1 of the second ribbon cable interface P1 is grounded to GNDW_CAN1, and pin 3 of the second ribbon cable interface P1 is electrically connected to pin 11 of transceiver chip U3 and pin 4 of the second ribbon cable interface P1 through the fourth resistor R4.

[0043] Pins 2, 3, and 8 of transceiver chip U3 are connected in parallel and then electrically connected to one end of capacitors C15 (first five), C16 (first six), C17 (first seven), and C18 (first eight) and ground GND, respectively. The other ends of capacitors C15 (first five), C16 (first six), C17 (first seven), and C18 (first eight) are all electrically connected to DC power supply VCC.

[0044] By using RS422 bus transceiver unit 300 and CAN bus transceiver unit 400 as two different methods for acquiring data from the host computer data reading device, the applicability of the device can be expanded, and the flexibility of information transmission between the device and the host computer data reading device can be improved, thereby enhancing the device's operating efficiency. Furthermore, through the coordinated arrangement of components within the respective circuits of RS422 bus transceiver unit 300 and CAN bus transceiver unit 400, isolation can be achieved between the RS422 bus transceiver unit 300 or CAN bus transceiver unit 400 and the circuit of the main controller 100. This ensures that when an SSI interface encoder or sensor is connected, the device's internal circuitry does not interfere with the connected data, thus guaranteeing the authenticity and reliability of the acquired data.

[0045] The SSI data acquisition unit 200 includes a first acquisition chip U4 and a second acquisition chip U5. Pin 1 of the first acquisition chip U4 is electrically connected to the DC power supply VCC and one end of the first nine-electrode capacitor C19, respectively. The other end of the first nine-electrode capacitor C19 and pin 4 of the first acquisition chip U4 are both grounded (GND). Pin 5 of the first acquisition chip U4 is electrically connected to ground (GNDW_422). Pins 2 and 3 of the first acquisition chip U4 are connected to the corresponding pins of the SPI1 module 104, respectively. Pin 5 of the first acquisition chip U4 is electrically connected to the DC power supply Vcc and pin 8 of the first acquisition chip U4 via the second zero-electrode capacitor C20, respectively. Pins 6 and 7 of the first acquisition chip U4 are electrically connected to pins 3 and 2 of the second acquisition chip U5, respectively.

[0046] Pin 1 of the second acquisition chip U5 is electrically connected to the DC power supply Vcc and one end of the second capacitor C21, respectively. The other end of the second capacitor C21 is electrically connected to ground GNDW_422 and pin 4 of the second acquisition chip U5, respectively. Pins 5, 6, 7, and 8 of the second acquisition chip U5 are all connected to the corresponding pins of the SPI1 module 104 of the main controller 100. A fifth resistor R5 is set between pins 7 and 8 of the second acquisition chip U5.

[0047] By configuring the components within the SSI data acquisition unit 200, the accuracy of data acquisition can be effectively improved. The second zero capacitor C20 and the second first capacitor C21 enable power supply decoupling and signal filtering, thereby ensuring signal quality.

[0048] The FLASH data storage unit 600 includes a memory chip U6. Pins 1, 2, 5, and 6 of the memory chip U6 are connected to pins CS, MISC, SCK, and MOSI of the SPI2 module 105, respectively. Pins 3, 7, and 8 of the memory chip U6 are all electrically connected to the DC power supply VCC. Pin 8 of the memory chip U6 is grounded to GND through a second capacitor C22. Pin 4 of the memory chip U6 is also grounded to GND.

[0049] By configuring the components within the FLASH data storage unit 600, both accuracy and reliability in storing abnormal data can be achieved.

[0050] The LED status indicator unit 800 includes a protection resistor 81 and a light-emitting diode (LED) 82. The GPIO module 106 of the main controller 100 is electrically connected to a DC power supply VCC via the LED 82 and the protection resistor 81. At least one LED and at least one protection resistor 81 are provided. Preferably, three LEDs and three protection resistors are provided. The three LEDs 82 are designated as diode D1, diode D2, and diode D3. The three protection resistors 81 are designated as resistor R6, resistor R7, and resistor R8. One end of each of the LEDs D1, D2, and D3 is electrically connected to the DC power supply VCC via resistors R6, R7, and R8, respectively. The other ends of each LED are connected to the corresponding pins of the GPIO module 106.

[0051] By combining the protective resistor 81 and the light-emitting diode 82, the operating status of the internal circuit of the device can be distinguished and displayed, thereby improving the convenience of user operation.

[0052] Working principle:

[0053] During operation, the DC-to-DC power supply unit 500 supplies power to the entire data acquisition and analysis device. The SSI interface encoder or sensor is connected to the SSI data acquisition unit 200 of the data acquisition and analysis device according to the core wire definition. While the device sends the clock CLK, it receives the DATA data transmitted back by the SSI interface encoder or sensor. The central processing unit MCU parses the acquired data through a certain algorithm and outputs it to the host computer data reading device through the RS422 bus transceiver unit 300 or the CAN bus transceiver unit 400. Then, the host computer data reading device reads the acquired data values ​​of the SSI interface encoder or sensor.

[0054] During use, the SSI interface encoder or sensor is connected to the device according to the core wire definition. The device can directly read and write the values ​​of the SSI interface encoder or sensor from the CAN bus or RS422 serial port. At the same time, by adjusting the DIP switches on the device, different clock frequencies of the data acquisition and analysis device can be adjusted to analyze the values ​​of the SSI interface encoder or sensor, thereby gaining a clearer understanding of the characteristics of the SSI interface encoder or sensor. This is beneficial for the overall setting of the servo control system and can also improve the overall working efficiency of the system.

[0055] It is important to note that all components used in the data acquisition and analysis device for SSI interface encoders described in this application are domestically produced chips, ensuring 100% independent control. Furthermore, the integrated software algorithm employed in this application, which uses SPI simulation for data acquisition and key data storage, significantly improves communication speed and accuracy compared to traditional IO signal simulation. In addition, the device integrates multiple functional modes, is easy to operate, and can selectively read data from either the CAN bus or the RS422 serial bus, thereby enhancing the flexibility of the device's use.

[0056] It is also worth noting that this application can be used to test SSI interface encoders or sensors before or during the design of servo systems, effectively analyze data, obtain necessary data values, and facilitate subsequent system design and software programming.

[0057] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A data acquisition and analysis device with an SSI interface, characterized in that, It includes a main controller (100), an SSI data acquisition unit (200), an RS422 bus transceiver unit (300), a CAN bus transceiver unit (400), and a power supply unit (500); the main controller (100) is bidirectionally connected to one end of the SSI data acquisition unit (200), the RS422 bus transceiver unit (300), and the CAN bus transceiver unit (400); the other end of the RS422 bus transceiver unit (300) and the CAN bus transceiver unit (400) are bidirectionally connected to the host computer data reading device; the other end of the SSI data acquisition unit (200) is connected to the corresponding terminal of the SSI interface encoder or sensor; the main controller (100) is electrically connected to the DC current output terminal through the power supply unit (500).

2. The data acquisition and analysis device with an SSI interface according to claim 1, characterized in that, The device also includes a FLASH data storage unit (600); the FLASH data storage unit (600) is bidirectionally connected to the main controller (100) and is used to store abnormal data collected by the device during the data acquisition process.

3. A data acquisition and analysis device with an SSI interface according to claim 2, characterized in that, The device also includes a clock frequency selection switch (700); the signal output terminal of the clock frequency selection switch (700) is unidirectionally connected to the main controller (100).

4. A data acquisition and analysis device with an SSI interface according to claim 3, characterized in that, The device also includes an LED status indicator unit (800); the LED status indicator unit (800) is unidirectionally connected to the main controller (100); under the action of the main controller (100), it is used to indicate the operating status of the data acquisition and analysis device connected to the SSI interface encoder. According to the different acquisition frequencies of the device, the corresponding indicator light combination in the LED status indicator unit (800) will light up accordingly.

5. A data acquisition and analysis device with an SSI interface according to claim 4, characterized in that, The main controller (100) consists of a central processing unit (MCU), a power supply interface (101), a serial port module (102), a CAN communication module (103), an SPI1 module (104), an SPI2 module (105), and a GPIO module (106). The central processing unit (MCU), power supply interface (101), serial port module (102), CAN communication module (103), SPI1 module (104), SPI2 module (105), and GPIO module (106) are all integrated on the main controller (100). The central processing unit (MCU) is located at the center of the main controller (100). The power supply interface (101), serial port module (102), CAN communication module (103), SPI1 module (104), SPI2 module (105), and GPIO module (106) are arranged around the outside of the central processing unit (MCU).

6. A data acquisition and analysis device with an SSI interface according to claim 5, characterized in that, The power supply interface (101) is connected to the positive and negative terminals of the power supply unit (500); the serial port module (102) is bidirectionally connected to the RS422 bus transceiver unit (300); the CAN communication module (103) is bidirectionally connected to the CAN bus transceiver unit (400); and the SPI1 module (104) is bidirectionally connected to the SSI data acquisition unit (200).

7. A data acquisition and analysis device with an SSI interface according to claim 5, characterized in that, The SPI2 module (105) is bidirectionally connected to the FLASH data storage unit (600).

8. A data acquisition and analysis device with an SSI interface according to claim 5, characterized in that, The GPIO module (106) is unidirectionally connected to the output of the clock frequency selection switch (700) and the input of the LED status indicator unit (800).

9. A data acquisition and analysis device with an SSI interface according to claim 1, characterized in that, Both the RS422 bus transceiver unit (300) and the CAN bus transceiver unit (400) adopt isolated circuits.

10. A data acquisition and analysis device with an SSI interface according to claim 1, characterized in that, The power supply unit (500) is powered by a DC-DC power supply.

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